Commit | Line | Data |
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27c6750e GG |
1 | /* |
2 | * tps65910.c -- TI TPS6591x | |
3 | * | |
4 | * Copyright 2010 Texas Instruments Inc. | |
5 | * | |
6 | * Author: Graeme Gregory <gg@slimlogic.co.uk> | |
7 | * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify it | |
10 | * under the terms of the GNU General Public License as published by the | |
11 | * Free Software Foundation; either version 2 of the License, or (at your | |
12 | * option) any later version. | |
13 | * | |
14 | */ | |
15 | ||
16 | #include <linux/module.h> | |
17 | #include <linux/moduleparam.h> | |
18 | #include <linux/init.h> | |
dc9913a0 | 19 | #include <linux/err.h> |
27c6750e GG |
20 | #include <linux/slab.h> |
21 | #include <linux/i2c.h> | |
4aab3fad LD |
22 | #include <linux/interrupt.h> |
23 | #include <linux/irq.h> | |
24 | #include <linux/irqdomain.h> | |
27c6750e | 25 | #include <linux/mfd/core.h> |
dc9913a0 | 26 | #include <linux/regmap.h> |
27c6750e | 27 | #include <linux/mfd/tps65910.h> |
cd4209ce | 28 | #include <linux/of_device.h> |
27c6750e | 29 | |
5863eabb VB |
30 | static struct resource rtc_resources[] = { |
31 | { | |
32 | .start = TPS65910_IRQ_RTC_ALARM, | |
33 | .end = TPS65910_IRQ_RTC_ALARM, | |
34 | .flags = IORESOURCE_IRQ, | |
35 | } | |
36 | }; | |
37 | ||
27c6750e | 38 | static struct mfd_cell tps65910s[] = { |
32df986e LD |
39 | { |
40 | .name = "tps65910-gpio", | |
41 | }, | |
27c6750e GG |
42 | { |
43 | .name = "tps65910-pmic", | |
44 | }, | |
45 | { | |
46 | .name = "tps65910-rtc", | |
5863eabb VB |
47 | .num_resources = ARRAY_SIZE(rtc_resources), |
48 | .resources = &rtc_resources[0], | |
27c6750e GG |
49 | }, |
50 | { | |
51 | .name = "tps65910-power", | |
52 | }, | |
53 | }; | |
54 | ||
55 | ||
4aab3fad LD |
56 | static const struct regmap_irq tps65911_irqs[] = { |
57 | /* INT_STS */ | |
58 | [TPS65911_IRQ_PWRHOLD_F] = { | |
59 | .mask = INT_MSK_PWRHOLD_F_IT_MSK_MASK, | |
60 | .reg_offset = 0, | |
61 | }, | |
62 | [TPS65911_IRQ_VBAT_VMHI] = { | |
63 | .mask = INT_MSK_VMBHI_IT_MSK_MASK, | |
64 | .reg_offset = 0, | |
65 | }, | |
66 | [TPS65911_IRQ_PWRON] = { | |
67 | .mask = INT_MSK_PWRON_IT_MSK_MASK, | |
68 | .reg_offset = 0, | |
69 | }, | |
70 | [TPS65911_IRQ_PWRON_LP] = { | |
71 | .mask = INT_MSK_PWRON_LP_IT_MSK_MASK, | |
72 | .reg_offset = 0, | |
73 | }, | |
74 | [TPS65911_IRQ_PWRHOLD_R] = { | |
75 | .mask = INT_MSK_PWRHOLD_R_IT_MSK_MASK, | |
76 | .reg_offset = 0, | |
77 | }, | |
78 | [TPS65911_IRQ_HOTDIE] = { | |
79 | .mask = INT_MSK_HOTDIE_IT_MSK_MASK, | |
80 | .reg_offset = 0, | |
81 | }, | |
82 | [TPS65911_IRQ_RTC_ALARM] = { | |
83 | .mask = INT_MSK_RTC_ALARM_IT_MSK_MASK, | |
84 | .reg_offset = 0, | |
85 | }, | |
86 | [TPS65911_IRQ_RTC_PERIOD] = { | |
87 | .mask = INT_MSK_RTC_PERIOD_IT_MSK_MASK, | |
88 | .reg_offset = 0, | |
89 | }, | |
90 | ||
91 | /* INT_STS2 */ | |
92 | [TPS65911_IRQ_GPIO0_R] = { | |
93 | .mask = INT_MSK2_GPIO0_R_IT_MSK_MASK, | |
94 | .reg_offset = 1, | |
95 | }, | |
96 | [TPS65911_IRQ_GPIO0_F] = { | |
97 | .mask = INT_MSK2_GPIO0_F_IT_MSK_MASK, | |
98 | .reg_offset = 1, | |
99 | }, | |
100 | [TPS65911_IRQ_GPIO1_R] = { | |
101 | .mask = INT_MSK2_GPIO1_R_IT_MSK_MASK, | |
102 | .reg_offset = 1, | |
103 | }, | |
104 | [TPS65911_IRQ_GPIO1_F] = { | |
105 | .mask = INT_MSK2_GPIO1_F_IT_MSK_MASK, | |
106 | .reg_offset = 1, | |
107 | }, | |
108 | [TPS65911_IRQ_GPIO2_R] = { | |
109 | .mask = INT_MSK2_GPIO2_R_IT_MSK_MASK, | |
110 | .reg_offset = 1, | |
111 | }, | |
112 | [TPS65911_IRQ_GPIO2_F] = { | |
113 | .mask = INT_MSK2_GPIO2_F_IT_MSK_MASK, | |
114 | .reg_offset = 1, | |
115 | }, | |
116 | [TPS65911_IRQ_GPIO3_R] = { | |
117 | .mask = INT_MSK2_GPIO3_R_IT_MSK_MASK, | |
118 | .reg_offset = 1, | |
119 | }, | |
120 | [TPS65911_IRQ_GPIO3_F] = { | |
121 | .mask = INT_MSK2_GPIO3_F_IT_MSK_MASK, | |
122 | .reg_offset = 1, | |
123 | }, | |
124 | ||
125 | /* INT_STS2 */ | |
126 | [TPS65911_IRQ_GPIO4_R] = { | |
127 | .mask = INT_MSK3_GPIO4_R_IT_MSK_MASK, | |
128 | .reg_offset = 2, | |
129 | }, | |
130 | [TPS65911_IRQ_GPIO4_F] = { | |
131 | .mask = INT_MSK3_GPIO4_F_IT_MSK_MASK, | |
132 | .reg_offset = 2, | |
133 | }, | |
134 | [TPS65911_IRQ_GPIO5_R] = { | |
135 | .mask = INT_MSK3_GPIO5_R_IT_MSK_MASK, | |
136 | .reg_offset = 2, | |
137 | }, | |
138 | [TPS65911_IRQ_GPIO5_F] = { | |
139 | .mask = INT_MSK3_GPIO5_F_IT_MSK_MASK, | |
140 | .reg_offset = 2, | |
141 | }, | |
142 | [TPS65911_IRQ_WTCHDG] = { | |
143 | .mask = INT_MSK3_WTCHDG_IT_MSK_MASK, | |
144 | .reg_offset = 2, | |
145 | }, | |
146 | [TPS65911_IRQ_VMBCH2_H] = { | |
147 | .mask = INT_MSK3_VMBCH2_H_IT_MSK_MASK, | |
148 | .reg_offset = 2, | |
149 | }, | |
150 | [TPS65911_IRQ_VMBCH2_L] = { | |
151 | .mask = INT_MSK3_VMBCH2_L_IT_MSK_MASK, | |
152 | .reg_offset = 2, | |
153 | }, | |
154 | [TPS65911_IRQ_PWRDN] = { | |
155 | .mask = INT_MSK3_PWRDN_IT_MSK_MASK, | |
156 | .reg_offset = 2, | |
157 | }, | |
158 | }; | |
159 | ||
160 | static const struct regmap_irq tps65910_irqs[] = { | |
161 | /* INT_STS */ | |
162 | [TPS65910_IRQ_VBAT_VMBDCH] = { | |
163 | .mask = TPS65910_INT_MSK_VMBDCH_IT_MSK_MASK, | |
164 | .reg_offset = 0, | |
165 | }, | |
166 | [TPS65910_IRQ_VBAT_VMHI] = { | |
167 | .mask = TPS65910_INT_MSK_VMBHI_IT_MSK_MASK, | |
168 | .reg_offset = 0, | |
169 | }, | |
170 | [TPS65910_IRQ_PWRON] = { | |
171 | .mask = TPS65910_INT_MSK_PWRON_IT_MSK_MASK, | |
172 | .reg_offset = 0, | |
173 | }, | |
174 | [TPS65910_IRQ_PWRON_LP] = { | |
175 | .mask = TPS65910_INT_MSK_PWRON_LP_IT_MSK_MASK, | |
176 | .reg_offset = 0, | |
177 | }, | |
178 | [TPS65910_IRQ_PWRHOLD] = { | |
179 | .mask = TPS65910_INT_MSK_PWRHOLD_IT_MSK_MASK, | |
180 | .reg_offset = 0, | |
181 | }, | |
182 | [TPS65910_IRQ_HOTDIE] = { | |
183 | .mask = TPS65910_INT_MSK_HOTDIE_IT_MSK_MASK, | |
184 | .reg_offset = 0, | |
185 | }, | |
186 | [TPS65910_IRQ_RTC_ALARM] = { | |
187 | .mask = TPS65910_INT_MSK_RTC_ALARM_IT_MSK_MASK, | |
188 | .reg_offset = 0, | |
189 | }, | |
190 | [TPS65910_IRQ_RTC_PERIOD] = { | |
191 | .mask = TPS65910_INT_MSK_RTC_PERIOD_IT_MSK_MASK, | |
192 | .reg_offset = 0, | |
193 | }, | |
194 | ||
195 | /* INT_STS2 */ | |
196 | [TPS65910_IRQ_GPIO_R] = { | |
197 | .mask = TPS65910_INT_MSK2_GPIO0_F_IT_MSK_MASK, | |
198 | .reg_offset = 1, | |
199 | }, | |
200 | [TPS65910_IRQ_GPIO_F] = { | |
201 | .mask = TPS65910_INT_MSK2_GPIO0_R_IT_MSK_MASK, | |
202 | .reg_offset = 1, | |
203 | }, | |
204 | }; | |
205 | ||
206 | static struct regmap_irq_chip tps65911_irq_chip = { | |
207 | .name = "tps65910", | |
208 | .irqs = tps65911_irqs, | |
209 | .num_irqs = ARRAY_SIZE(tps65911_irqs), | |
210 | .num_regs = 3, | |
211 | .irq_reg_stride = 2, | |
212 | .status_base = TPS65910_INT_STS, | |
213 | .mask_base = TPS65910_INT_MSK, | |
0582c0fa | 214 | .ack_base = TPS65910_INT_STS, |
4aab3fad LD |
215 | }; |
216 | ||
217 | static struct regmap_irq_chip tps65910_irq_chip = { | |
218 | .name = "tps65910", | |
219 | .irqs = tps65910_irqs, | |
220 | .num_irqs = ARRAY_SIZE(tps65910_irqs), | |
221 | .num_regs = 2, | |
222 | .irq_reg_stride = 2, | |
223 | .status_base = TPS65910_INT_STS, | |
224 | .mask_base = TPS65910_INT_MSK, | |
0582c0fa | 225 | .ack_base = TPS65910_INT_STS, |
4aab3fad LD |
226 | }; |
227 | ||
228 | static int tps65910_irq_init(struct tps65910 *tps65910, int irq, | |
229 | struct tps65910_platform_data *pdata) | |
230 | { | |
231 | int ret = 0; | |
232 | static struct regmap_irq_chip *tps6591x_irqs_chip; | |
233 | ||
234 | if (!irq) { | |
235 | dev_warn(tps65910->dev, "No interrupt support, no core IRQ\n"); | |
236 | return -EINVAL; | |
237 | } | |
238 | ||
239 | if (!pdata) { | |
240 | dev_warn(tps65910->dev, "No interrupt support, no pdata\n"); | |
241 | return -EINVAL; | |
242 | } | |
243 | ||
244 | switch (tps65910_chip_id(tps65910)) { | |
245 | case TPS65910: | |
246 | tps6591x_irqs_chip = &tps65910_irq_chip; | |
247 | break; | |
248 | case TPS65911: | |
249 | tps6591x_irqs_chip = &tps65911_irq_chip; | |
250 | break; | |
251 | } | |
252 | ||
253 | tps65910->chip_irq = irq; | |
254 | ret = regmap_add_irq_chip(tps65910->regmap, tps65910->chip_irq, | |
255 | IRQF_ONESHOT, pdata->irq_base, | |
256 | tps6591x_irqs_chip, &tps65910->irq_data); | |
257 | if (ret < 0) | |
258 | dev_warn(tps65910->dev, "Failed to add irq_chip %d\n", ret); | |
259 | return ret; | |
260 | } | |
261 | ||
262 | static int tps65910_irq_exit(struct tps65910 *tps65910) | |
263 | { | |
264 | if (tps65910->chip_irq > 0) | |
265 | regmap_del_irq_chip(tps65910->chip_irq, tps65910->irq_data); | |
266 | return 0; | |
267 | } | |
268 | ||
dc9913a0 LD |
269 | static bool is_volatile_reg(struct device *dev, unsigned int reg) |
270 | { | |
271 | struct tps65910 *tps65910 = dev_get_drvdata(dev); | |
272 | ||
273 | /* | |
274 | * Caching all regulator registers. | |
275 | * All regualator register address range is same for | |
276 | * TPS65910 and TPS65911 | |
277 | */ | |
278 | if ((reg >= TPS65910_VIO) && (reg <= TPS65910_VDAC)) { | |
279 | /* Check for non-existing register */ | |
280 | if (tps65910_chip_id(tps65910) == TPS65910) | |
281 | if ((reg == TPS65911_VDDCTRL_OP) || | |
282 | (reg == TPS65911_VDDCTRL_SR)) | |
283 | return true; | |
284 | return false; | |
285 | } | |
286 | return true; | |
287 | } | |
288 | ||
39ecb037 | 289 | static const struct regmap_config tps65910_regmap_config = { |
dc9913a0 LD |
290 | .reg_bits = 8, |
291 | .val_bits = 8, | |
292 | .volatile_reg = is_volatile_reg, | |
3bf6bf9b | 293 | .max_register = TPS65910_MAX_REGISTER - 1, |
dc9913a0 LD |
294 | .cache_type = REGCACHE_RBTREE, |
295 | }; | |
296 | ||
f791be49 | 297 | static int tps65910_ck32k_init(struct tps65910 *tps65910, |
712db99d JH |
298 | struct tps65910_board *pmic_pdata) |
299 | { | |
712db99d JH |
300 | int ret; |
301 | ||
d02e83cb JH |
302 | if (!pmic_pdata->en_ck32k_xtal) |
303 | return 0; | |
304 | ||
305 | ret = tps65910_reg_clear_bits(tps65910, TPS65910_DEVCTRL, | |
712db99d | 306 | DEVCTRL_CK32K_CTRL_MASK); |
d02e83cb JH |
307 | if (ret < 0) { |
308 | dev_err(tps65910->dev, "clear ck32k_ctrl failed: %d\n", ret); | |
309 | return ret; | |
712db99d JH |
310 | } |
311 | ||
312 | return 0; | |
313 | } | |
314 | ||
f791be49 | 315 | static int tps65910_sleepinit(struct tps65910 *tps65910, |
201cf052 LD |
316 | struct tps65910_board *pmic_pdata) |
317 | { | |
318 | struct device *dev = NULL; | |
319 | int ret = 0; | |
320 | ||
321 | dev = tps65910->dev; | |
322 | ||
323 | if (!pmic_pdata->en_dev_slp) | |
324 | return 0; | |
325 | ||
326 | /* enabling SLEEP device state */ | |
3f7e8275 | 327 | ret = tps65910_reg_set_bits(tps65910, TPS65910_DEVCTRL, |
201cf052 LD |
328 | DEVCTRL_DEV_SLP_MASK); |
329 | if (ret < 0) { | |
330 | dev_err(dev, "set dev_slp failed: %d\n", ret); | |
331 | goto err_sleep_init; | |
332 | } | |
333 | ||
334 | /* Return if there is no sleep keepon data. */ | |
335 | if (!pmic_pdata->slp_keepon) | |
336 | return 0; | |
337 | ||
338 | if (pmic_pdata->slp_keepon->therm_keepon) { | |
3f7e8275 RK |
339 | ret = tps65910_reg_set_bits(tps65910, |
340 | TPS65910_SLEEP_KEEP_RES_ON, | |
201cf052 LD |
341 | SLEEP_KEEP_RES_ON_THERM_KEEPON_MASK); |
342 | if (ret < 0) { | |
343 | dev_err(dev, "set therm_keepon failed: %d\n", ret); | |
344 | goto disable_dev_slp; | |
345 | } | |
346 | } | |
347 | ||
348 | if (pmic_pdata->slp_keepon->clkout32k_keepon) { | |
3f7e8275 RK |
349 | ret = tps65910_reg_set_bits(tps65910, |
350 | TPS65910_SLEEP_KEEP_RES_ON, | |
201cf052 LD |
351 | SLEEP_KEEP_RES_ON_CLKOUT32K_KEEPON_MASK); |
352 | if (ret < 0) { | |
353 | dev_err(dev, "set clkout32k_keepon failed: %d\n", ret); | |
354 | goto disable_dev_slp; | |
355 | } | |
356 | } | |
357 | ||
358 | if (pmic_pdata->slp_keepon->i2chs_keepon) { | |
3f7e8275 RK |
359 | ret = tps65910_reg_set_bits(tps65910, |
360 | TPS65910_SLEEP_KEEP_RES_ON, | |
201cf052 LD |
361 | SLEEP_KEEP_RES_ON_I2CHS_KEEPON_MASK); |
362 | if (ret < 0) { | |
363 | dev_err(dev, "set i2chs_keepon failed: %d\n", ret); | |
364 | goto disable_dev_slp; | |
365 | } | |
366 | } | |
367 | ||
368 | return 0; | |
369 | ||
370 | disable_dev_slp: | |
3f7e8275 RK |
371 | tps65910_reg_clear_bits(tps65910, TPS65910_DEVCTRL, |
372 | DEVCTRL_DEV_SLP_MASK); | |
201cf052 LD |
373 | |
374 | err_sleep_init: | |
375 | return ret; | |
376 | } | |
377 | ||
cd4209ce RK |
378 | #ifdef CONFIG_OF |
379 | static struct of_device_id tps65910_of_match[] = { | |
380 | { .compatible = "ti,tps65910", .data = (void *)TPS65910}, | |
381 | { .compatible = "ti,tps65911", .data = (void *)TPS65911}, | |
382 | { }, | |
383 | }; | |
384 | MODULE_DEVICE_TABLE(of, tps65910_of_match); | |
385 | ||
386 | static struct tps65910_board *tps65910_parse_dt(struct i2c_client *client, | |
387 | int *chip_id) | |
388 | { | |
389 | struct device_node *np = client->dev.of_node; | |
390 | struct tps65910_board *board_info; | |
391 | unsigned int prop; | |
392 | const struct of_device_id *match; | |
cd4209ce | 393 | int ret = 0; |
cd4209ce RK |
394 | |
395 | match = of_match_device(tps65910_of_match, &client->dev); | |
396 | if (!match) { | |
397 | dev_err(&client->dev, "Failed to find matching dt id\n"); | |
398 | return NULL; | |
399 | } | |
400 | ||
401 | *chip_id = (int)match->data; | |
402 | ||
403 | board_info = devm_kzalloc(&client->dev, sizeof(*board_info), | |
404 | GFP_KERNEL); | |
405 | if (!board_info) { | |
406 | dev_err(&client->dev, "Failed to allocate pdata\n"); | |
407 | return NULL; | |
408 | } | |
409 | ||
410 | ret = of_property_read_u32(np, "ti,vmbch-threshold", &prop); | |
411 | if (!ret) | |
412 | board_info->vmbch_threshold = prop; | |
413 | else if (*chip_id == TPS65911) | |
414 | dev_warn(&client->dev, "VMBCH-Threshold not specified"); | |
415 | ||
416 | ret = of_property_read_u32(np, "ti,vmbch2-threshold", &prop); | |
417 | if (!ret) | |
418 | board_info->vmbch2_threshold = prop; | |
419 | else if (*chip_id == TPS65911) | |
420 | dev_warn(&client->dev, "VMBCH2-Threshold not specified"); | |
421 | ||
bcc1dd4c JH |
422 | prop = of_property_read_bool(np, "ti,en-ck32k-xtal"); |
423 | board_info->en_ck32k_xtal = prop; | |
424 | ||
cd4209ce RK |
425 | board_info->irq = client->irq; |
426 | board_info->irq_base = -1; | |
b079fa72 BH |
427 | board_info->pm_off = of_property_read_bool(np, |
428 | "ti,system-power-controller"); | |
cd4209ce RK |
429 | |
430 | return board_info; | |
431 | } | |
432 | #else | |
7f65f74c SO |
433 | static inline |
434 | struct tps65910_board *tps65910_parse_dt(struct i2c_client *client, | |
435 | int *chip_id) | |
cd4209ce RK |
436 | { |
437 | return NULL; | |
438 | } | |
439 | #endif | |
201cf052 | 440 | |
b079fa72 BH |
441 | static struct i2c_client *tps65910_i2c_client; |
442 | static void tps65910_power_off(void) | |
443 | { | |
444 | struct tps65910 *tps65910; | |
445 | ||
446 | tps65910 = dev_get_drvdata(&tps65910_i2c_client->dev); | |
447 | ||
448 | if (tps65910_reg_set_bits(tps65910, TPS65910_DEVCTRL, | |
449 | DEVCTRL_PWR_OFF_MASK) < 0) | |
450 | return; | |
451 | ||
452 | tps65910_reg_clear_bits(tps65910, TPS65910_DEVCTRL, | |
453 | DEVCTRL_DEV_ON_MASK); | |
454 | } | |
455 | ||
f791be49 | 456 | static int tps65910_i2c_probe(struct i2c_client *i2c, |
63745d40 | 457 | const struct i2c_device_id *id) |
27c6750e GG |
458 | { |
459 | struct tps65910 *tps65910; | |
2537df72 | 460 | struct tps65910_board *pmic_plat_data; |
cb8d8654 | 461 | struct tps65910_board *of_pmic_plat_data = NULL; |
e3471bdc | 462 | struct tps65910_platform_data *init_data; |
27c6750e | 463 | int ret = 0; |
cd4209ce | 464 | int chip_id = id->driver_data; |
27c6750e | 465 | |
2537df72 | 466 | pmic_plat_data = dev_get_platdata(&i2c->dev); |
cd4209ce | 467 | |
cb8d8654 | 468 | if (!pmic_plat_data && i2c->dev.of_node) { |
cd4209ce | 469 | pmic_plat_data = tps65910_parse_dt(i2c, &chip_id); |
cb8d8654 LD |
470 | of_pmic_plat_data = pmic_plat_data; |
471 | } | |
cd4209ce | 472 | |
2537df72 GG |
473 | if (!pmic_plat_data) |
474 | return -EINVAL; | |
475 | ||
63fe7dee | 476 | init_data = devm_kzalloc(&i2c->dev, sizeof(*init_data), GFP_KERNEL); |
e3471bdc GG |
477 | if (init_data == NULL) |
478 | return -ENOMEM; | |
479 | ||
63fe7dee LD |
480 | tps65910 = devm_kzalloc(&i2c->dev, sizeof(*tps65910), GFP_KERNEL); |
481 | if (tps65910 == NULL) | |
27c6750e GG |
482 | return -ENOMEM; |
483 | ||
cb8d8654 | 484 | tps65910->of_plat_data = of_pmic_plat_data; |
27c6750e GG |
485 | i2c_set_clientdata(i2c, tps65910); |
486 | tps65910->dev = &i2c->dev; | |
487 | tps65910->i2c_client = i2c; | |
cd4209ce | 488 | tps65910->id = chip_id; |
27c6750e | 489 | |
63fe7dee | 490 | tps65910->regmap = devm_regmap_init_i2c(i2c, &tps65910_regmap_config); |
dc9913a0 LD |
491 | if (IS_ERR(tps65910->regmap)) { |
492 | ret = PTR_ERR(tps65910->regmap); | |
493 | dev_err(&i2c->dev, "regmap initialization failed: %d\n", ret); | |
63fe7dee | 494 | return ret; |
dc9913a0 LD |
495 | } |
496 | ||
b1224cd1 | 497 | init_data->irq = pmic_plat_data->irq; |
1773140f | 498 | init_data->irq_base = pmic_plat_data->irq_base; |
b1224cd1 | 499 | |
1e351a95 | 500 | tps65910_irq_init(tps65910, init_data->irq, init_data); |
d02e83cb | 501 | tps65910_ck32k_init(tps65910, pmic_plat_data); |
201cf052 LD |
502 | tps65910_sleepinit(tps65910, pmic_plat_data); |
503 | ||
b079fa72 BH |
504 | if (pmic_plat_data->pm_off && !pm_power_off) { |
505 | tps65910_i2c_client = i2c; | |
506 | pm_power_off = tps65910_power_off; | |
507 | } | |
508 | ||
10ecb80e LD |
509 | ret = mfd_add_devices(tps65910->dev, -1, |
510 | tps65910s, ARRAY_SIZE(tps65910s), | |
17143e38 LD |
511 | NULL, 0, |
512 | regmap_irq_get_domain(tps65910->irq_data)); | |
10ecb80e LD |
513 | if (ret < 0) { |
514 | dev_err(&i2c->dev, "mfd_add_devices failed: %d\n", ret); | |
515 | return ret; | |
516 | } | |
517 | ||
27c6750e GG |
518 | return ret; |
519 | } | |
520 | ||
4740f73f | 521 | static int tps65910_i2c_remove(struct i2c_client *i2c) |
27c6750e GG |
522 | { |
523 | struct tps65910 *tps65910 = i2c_get_clientdata(i2c); | |
524 | ||
ec2328c3 | 525 | tps65910_irq_exit(tps65910); |
1e351a95 | 526 | mfd_remove_devices(tps65910->dev); |
27c6750e GG |
527 | |
528 | return 0; | |
529 | } | |
530 | ||
531 | static const struct i2c_device_id tps65910_i2c_id[] = { | |
79557056 JEC |
532 | { "tps65910", TPS65910 }, |
533 | { "tps65911", TPS65911 }, | |
27c6750e GG |
534 | { } |
535 | }; | |
536 | MODULE_DEVICE_TABLE(i2c, tps65910_i2c_id); | |
537 | ||
538 | ||
539 | static struct i2c_driver tps65910_i2c_driver = { | |
540 | .driver = { | |
541 | .name = "tps65910", | |
542 | .owner = THIS_MODULE, | |
cd4209ce | 543 | .of_match_table = of_match_ptr(tps65910_of_match), |
27c6750e GG |
544 | }, |
545 | .probe = tps65910_i2c_probe, | |
84449216 | 546 | .remove = tps65910_i2c_remove, |
27c6750e GG |
547 | .id_table = tps65910_i2c_id, |
548 | }; | |
549 | ||
550 | static int __init tps65910_i2c_init(void) | |
551 | { | |
552 | return i2c_add_driver(&tps65910_i2c_driver); | |
553 | } | |
554 | /* init early so consumer devices can complete system boot */ | |
555 | subsys_initcall(tps65910_i2c_init); | |
556 | ||
557 | static void __exit tps65910_i2c_exit(void) | |
558 | { | |
559 | i2c_del_driver(&tps65910_i2c_driver); | |
560 | } | |
561 | module_exit(tps65910_i2c_exit); | |
562 | ||
563 | MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>"); | |
564 | MODULE_AUTHOR("Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>"); | |
565 | MODULE_DESCRIPTION("TPS6591x chip family multi-function driver"); | |
566 | MODULE_LICENSE("GPL"); |