treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_30.RULE (part 2)
[linux-block.git] / drivers / mfd / tps65217.c
CommitLineData
2aec85b2 1// SPDX-License-Identifier: GPL-2.0-only
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2/*
3 * tps65217.c
4 *
5 * TPS65217 chip family multi-function driver
6 *
4f4ed454 7 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
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8 */
9
d48f411c 10#include <linux/device.h>
6556bdac 11#include <linux/err.h>
d48f411c 12#include <linux/init.h>
6556bdac 13#include <linux/interrupt.h>
d48f411c 14#include <linux/i2c.h>
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15#include <linux/irq.h>
16#include <linux/irqdomain.h>
17#include <linux/kernel.h>
18#include <linux/module.h>
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19#include <linux/of.h>
20#include <linux/of_device.h>
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21#include <linux/platform_device.h>
22#include <linux/regmap.h>
23#include <linux/slab.h>
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24
25#include <linux/mfd/core.h>
26#include <linux/mfd/tps65217.h>
27
0aefed0e 28static const struct resource charger_resources[] = {
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29 DEFINE_RES_IRQ_NAMED(TPS65217_IRQ_AC, "AC"),
30 DEFINE_RES_IRQ_NAMED(TPS65217_IRQ_USB, "USB"),
31};
32
0aefed0e 33static const struct resource pb_resources[] = {
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34 DEFINE_RES_IRQ_NAMED(TPS65217_IRQ_PB, "PB"),
35};
36
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37static void tps65217_irq_lock(struct irq_data *data)
38{
39 struct tps65217 *tps = irq_data_get_irq_chip_data(data);
40
41 mutex_lock(&tps->irq_lock);
42}
43
44static void tps65217_irq_sync_unlock(struct irq_data *data)
45{
46 struct tps65217 *tps = irq_data_get_irq_chip_data(data);
47 int ret;
48
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49 ret = tps65217_set_bits(tps, TPS65217_REG_INT, TPS65217_INT_MASK,
50 tps->irq_mask, TPS65217_PROTECT_NONE);
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51 if (ret != 0)
52 dev_err(tps->dev, "Failed to sync IRQ masks\n");
53
54 mutex_unlock(&tps->irq_lock);
55}
56
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57static void tps65217_irq_enable(struct irq_data *data)
58{
59 struct tps65217 *tps = irq_data_get_irq_chip_data(data);
fa917052 60 u8 mask = BIT(data->hwirq) << TPS65217_INT_SHIFT;
6556bdac 61
fa917052 62 tps->irq_mask &= ~mask;
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63}
64
65static void tps65217_irq_disable(struct irq_data *data)
66{
67 struct tps65217 *tps = irq_data_get_irq_chip_data(data);
fa917052 68 u8 mask = BIT(data->hwirq) << TPS65217_INT_SHIFT;
6556bdac 69
fa917052 70 tps->irq_mask |= mask;
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71}
72
73static struct irq_chip tps65217_irq_chip = {
f6602064 74 .name = "tps65217",
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75 .irq_bus_lock = tps65217_irq_lock,
76 .irq_bus_sync_unlock = tps65217_irq_sync_unlock,
77 .irq_enable = tps65217_irq_enable,
78 .irq_disable = tps65217_irq_disable,
79};
80
81static struct mfd_cell tps65217s[] = {
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82 {
83 .name = "tps65217-pmic",
11d0d300 84 .of_compatible = "ti,tps65217-pmic",
817bb7fb 85 },
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86 {
87 .name = "tps65217-bl",
11d0d300 88 .of_compatible = "ti,tps65217-bl",
b6290ffe 89 },
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90 {
91 .name = "tps65217-charger",
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92 .num_resources = ARRAY_SIZE(charger_resources),
93 .resources = charger_resources,
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94 .of_compatible = "ti,tps65217-charger",
95 },
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96 {
97 .name = "tps65217-pwrbutton",
98 .num_resources = ARRAY_SIZE(pb_resources),
99 .resources = pb_resources,
100 .of_compatible = "ti,tps65217-pwrbutton",
101 },
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102};
103
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104static irqreturn_t tps65217_irq_thread(int irq, void *data)
105{
106 struct tps65217 *tps = data;
107 unsigned int status;
108 bool handled = false;
109 int i;
110 int ret;
111
112 ret = tps65217_reg_read(tps, TPS65217_REG_INT, &status);
113 if (ret < 0) {
114 dev_err(tps->dev, "Failed to read IRQ status: %d\n",
115 ret);
116 return IRQ_NONE;
117 }
118
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119 for (i = 0; i < TPS65217_NUM_IRQ; i++) {
120 if (status & BIT(i)) {
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121 handle_nested_irq(irq_find_mapping(tps->irq_domain, i));
122 handled = true;
123 }
124 }
125
126 if (handled)
127 return IRQ_HANDLED;
128
129 return IRQ_NONE;
130}
131
132static int tps65217_irq_map(struct irq_domain *h, unsigned int virq,
133 irq_hw_number_t hw)
134{
135 struct tps65217 *tps = h->host_data;
136
137 irq_set_chip_data(virq, tps);
138 irq_set_chip_and_handler(virq, &tps65217_irq_chip, handle_edge_irq);
139 irq_set_nested_thread(virq, 1);
140 irq_set_parent(virq, tps->irq);
141 irq_set_noprobe(virq);
142
143 return 0;
144}
145
146static const struct irq_domain_ops tps65217_irq_domain_ops = {
147 .map = tps65217_irq_map,
148};
149
150static int tps65217_irq_init(struct tps65217 *tps, int irq)
151{
152 int ret;
153
154 mutex_init(&tps->irq_lock);
155 tps->irq = irq;
156
157 /* Mask all interrupt sources */
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158 tps->irq_mask = TPS65217_INT_MASK;
159 tps65217_set_bits(tps, TPS65217_REG_INT, TPS65217_INT_MASK,
160 TPS65217_INT_MASK, TPS65217_PROTECT_NONE);
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161
162 tps->irq_domain = irq_domain_add_linear(tps->dev->of_node,
163 TPS65217_NUM_IRQ, &tps65217_irq_domain_ops, tps);
164 if (!tps->irq_domain) {
165 dev_err(tps->dev, "Could not create IRQ domain\n");
166 return -ENOMEM;
167 }
168
169 ret = devm_request_threaded_irq(tps->dev, irq, NULL,
170 tps65217_irq_thread, IRQF_ONESHOT,
171 "tps65217-irq", tps);
172 if (ret) {
173 dev_err(tps->dev, "Failed to request IRQ %d: %d\n",
174 irq, ret);
175 return ret;
176 }
177
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178 enable_irq_wake(irq);
179
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180 return 0;
181}
182
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183/**
184 * tps65217_reg_read: Read a single tps65217 register.
185 *
186 * @tps: Device to read from.
187 * @reg: Register to read.
188 * @val: Contians the value
189 */
190int tps65217_reg_read(struct tps65217 *tps, unsigned int reg,
191 unsigned int *val)
192{
193 return regmap_read(tps->regmap, reg, val);
194}
195EXPORT_SYMBOL_GPL(tps65217_reg_read);
196
197/**
198 * tps65217_reg_write: Write a single tps65217 register.
199 *
4976bfb8 200 * @tps: Device to write to.
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201 * @reg: Register to write to.
202 * @val: Value to write.
203 * @level: Password protected level
204 */
205int tps65217_reg_write(struct tps65217 *tps, unsigned int reg,
206 unsigned int val, unsigned int level)
207{
208 int ret;
209 unsigned int xor_reg_val;
210
211 switch (level) {
212 case TPS65217_PROTECT_NONE:
213 return regmap_write(tps->regmap, reg, val);
214 case TPS65217_PROTECT_L1:
215 xor_reg_val = reg ^ TPS65217_PASSWORD_REGS_UNLOCK;
216 ret = regmap_write(tps->regmap, TPS65217_REG_PASSWORD,
217 xor_reg_val);
218 if (ret < 0)
219 return ret;
220
221 return regmap_write(tps->regmap, reg, val);
222 case TPS65217_PROTECT_L2:
223 xor_reg_val = reg ^ TPS65217_PASSWORD_REGS_UNLOCK;
224 ret = regmap_write(tps->regmap, TPS65217_REG_PASSWORD,
225 xor_reg_val);
226 if (ret < 0)
227 return ret;
228 ret = regmap_write(tps->regmap, reg, val);
229 if (ret < 0)
230 return ret;
231 ret = regmap_write(tps->regmap, TPS65217_REG_PASSWORD,
232 xor_reg_val);
233 if (ret < 0)
234 return ret;
235 return regmap_write(tps->regmap, reg, val);
236 default:
237 return -EINVAL;
238 }
239}
240EXPORT_SYMBOL_GPL(tps65217_reg_write);
241
242/**
243 * tps65217_update_bits: Modify bits w.r.t mask, val and level.
244 *
4976bfb8 245 * @tps: Device to write to.
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246 * @reg: Register to read-write to.
247 * @mask: Mask.
248 * @val: Value to write.
249 * @level: Password protected level
250 */
27757e82 251static int tps65217_update_bits(struct tps65217 *tps, unsigned int reg,
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252 unsigned int mask, unsigned int val, unsigned int level)
253{
254 int ret;
255 unsigned int data;
256
257 ret = tps65217_reg_read(tps, reg, &data);
258 if (ret) {
259 dev_err(tps->dev, "Read from reg 0x%x failed\n", reg);
260 return ret;
261 }
262
263 data &= ~mask;
264 data |= val & mask;
265
266 ret = tps65217_reg_write(tps, reg, data, level);
267 if (ret)
268 dev_err(tps->dev, "Write for reg 0x%x failed\n", reg);
269
270 return ret;
271}
272
273int tps65217_set_bits(struct tps65217 *tps, unsigned int reg,
274 unsigned int mask, unsigned int val, unsigned int level)
275{
276 return tps65217_update_bits(tps, reg, mask, val, level);
277}
278EXPORT_SYMBOL_GPL(tps65217_set_bits);
279
280int tps65217_clear_bits(struct tps65217 *tps, unsigned int reg,
281 unsigned int mask, unsigned int level)
282{
283 return tps65217_update_bits(tps, reg, mask, 0, level);
284}
285EXPORT_SYMBOL_GPL(tps65217_clear_bits);
286
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287static bool tps65217_volatile_reg(struct device *dev, unsigned int reg)
288{
289 switch (reg) {
290 case TPS65217_REG_INT:
291 return true;
292 default:
293 return false;
294 }
295}
296
af0a837d 297static const struct regmap_config tps65217_regmap_config = {
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298 .reg_bits = 8,
299 .val_bits = 8,
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300
301 .max_register = TPS65217_REG_MAX,
6556bdac 302 .volatile_reg = tps65217_volatile_reg,
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303};
304
817bb7fb 305static const struct of_device_id tps65217_of_match[] = {
511cb174 306 { .compatible = "ti,tps65217"},
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307 { /* sentinel */ },
308};
4895e493 309MODULE_DEVICE_TABLE(of, tps65217_of_match);
817bb7fb 310
511cb174 311static int tps65217_probe(struct i2c_client *client)
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312{
313 struct tps65217 *tps;
d48f411c 314 unsigned int version;
eb433dad 315 bool status_off = false;
817bb7fb 316 int ret;
d48f411c 317
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318 status_off = of_property_read_bool(client->dev.of_node,
319 "ti,pmic-shutdown-controller");
a7f1b63e 320
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321 tps = devm_kzalloc(&client->dev, sizeof(*tps), GFP_KERNEL);
322 if (!tps)
323 return -ENOMEM;
324
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325 i2c_set_clientdata(client, tps);
326 tps->dev = &client->dev;
817bb7fb 327
0ef4619c 328 tps->regmap = devm_regmap_init_i2c(client, &tps65217_regmap_config);
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329 if (IS_ERR(tps->regmap)) {
330 ret = PTR_ERR(tps->regmap);
331 dev_err(tps->dev, "Failed to allocate register map: %d\n",
332 ret);
333 return ret;
334 }
335
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336 if (client->irq) {
337 tps65217_irq_init(tps, client->irq);
338 } else {
339 int i;
340
341 /* Don't tell children about IRQ resources which won't fire */
342 for (i = 0; i < ARRAY_SIZE(tps65217s); i++)
343 tps65217s[i].num_resources = 0;
344 }
345
b89b6b6b 346 ret = devm_mfd_add_devices(tps->dev, -1, tps65217s,
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347 ARRAY_SIZE(tps65217s), NULL, 0,
348 tps->irq_domain);
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349 if (ret < 0) {
350 dev_err(tps->dev, "mfd_add_devices failed: %d\n", ret);
351 return ret;
352 }
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353
354 ret = tps65217_reg_read(tps, TPS65217_REG_CHIPID, &version);
355 if (ret < 0) {
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356 dev_err(tps->dev, "Failed to read revision register: %d\n",
357 ret);
358 return ret;
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359 }
360
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361 /* Set the PMIC to shutdown on PWR_EN toggle */
362 if (status_off) {
363 ret = tps65217_set_bits(tps, TPS65217_REG_STATUS,
364 TPS65217_STATUS_OFF, TPS65217_STATUS_OFF,
365 TPS65217_PROTECT_NONE);
366 if (ret)
367 dev_warn(tps->dev, "unable to set the status OFF\n");
368 }
369
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370 dev_info(tps->dev, "TPS65217 ID %#x version 1.%d\n",
371 (version & TPS65217_CHIPID_CHIP_MASK) >> 4,
372 version & TPS65217_CHIPID_REV_MASK);
373
d48f411c 374 return 0;
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375}
376
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377static int tps65217_remove(struct i2c_client *client)
378{
379 struct tps65217 *tps = i2c_get_clientdata(client);
380 unsigned int virq;
381 int i;
382
fa917052 383 for (i = 0; i < TPS65217_NUM_IRQ; i++) {
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384 virq = irq_find_mapping(tps->irq_domain, i);
385 if (virq)
386 irq_dispose_mapping(virq);
387 }
388
389 irq_domain_remove(tps->irq_domain);
390 tps->irq_domain = NULL;
391
392 return 0;
393}
394
d48f411c 395static const struct i2c_device_id tps65217_id_table[] = {
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396 {"tps65217", TPS65217},
397 { /* sentinel */ }
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398};
399MODULE_DEVICE_TABLE(i2c, tps65217_id_table);
400
401static struct i2c_driver tps65217_driver = {
402 .driver = {
403 .name = "tps65217",
a351451a 404 .of_match_table = tps65217_of_match,
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405 },
406 .id_table = tps65217_id_table,
511cb174 407 .probe_new = tps65217_probe,
40a50f8b 408 .remove = tps65217_remove,
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409};
410
411static int __init tps65217_init(void)
412{
413 return i2c_add_driver(&tps65217_driver);
414}
415subsys_initcall(tps65217_init);
416
417static void __exit tps65217_exit(void)
418{
419 i2c_del_driver(&tps65217_driver);
420}
421module_exit(tps65217_exit);
422
423MODULE_AUTHOR("AnilKumar Ch <anilkumar@ti.com>");
424MODULE_DESCRIPTION("TPS65217 chip family multi-function driver");
425MODULE_LICENSE("GPL v2");