Commit | Line | Data |
---|---|---|
3bda759f | 1 | // SPDX-License-Identifier: GPL-2.0-only |
01636eb9 PR |
2 | /* |
3 | * TI Touch Screen / ADC MFD driver | |
4 | * | |
4f4ed454 | 5 | * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ |
01636eb9 PR |
6 | */ |
7 | ||
8 | #include <linux/module.h> | |
01636eb9 PR |
9 | #include <linux/slab.h> |
10 | #include <linux/err.h> | |
11 | #include <linux/io.h> | |
12 | #include <linux/clk.h> | |
13 | #include <linux/regmap.h> | |
14 | #include <linux/mfd/core.h> | |
15 | #include <linux/pm_runtime.h> | |
a6543a1c | 16 | #include <linux/of.h> |
dc0c386e | 17 | #include <linux/platform_device.h> |
7ca6740c | 18 | #include <linux/sched.h> |
01636eb9 PR |
19 | |
20 | #include <linux/mfd/ti_am335x_tscadc.h> | |
21 | ||
01636eb9 PR |
22 | static const struct regmap_config tscadc_regmap_config = { |
23 | .name = "ti_tscadc", | |
24 | .reg_bits = 32, | |
25 | .reg_stride = 4, | |
26 | .val_bits = 32, | |
27 | }; | |
28 | ||
a318b7d0 | 29 | void am335x_tsc_se_set_cache(struct ti_tscadc_dev *tscadc, u32 val) |
abeccee4 | 30 | { |
317b2099 SAS |
31 | unsigned long flags; |
32 | ||
a318b7d0 AD |
33 | spin_lock_irqsave(&tscadc->reg_lock, flags); |
34 | tscadc->reg_se_cache |= val; | |
35 | if (tscadc->adc_waiting) | |
36 | wake_up(&tscadc->reg_se_wait); | |
37 | else if (!tscadc->adc_in_use) | |
0d3a7cce | 38 | regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache); |
7ca6740c | 39 | |
a318b7d0 | 40 | spin_unlock_irqrestore(&tscadc->reg_lock, flags); |
abeccee4 | 41 | } |
7e170c6e SAS |
42 | EXPORT_SYMBOL_GPL(am335x_tsc_se_set_cache); |
43 | ||
a318b7d0 | 44 | static void am335x_tscadc_need_adc(struct ti_tscadc_dev *tscadc) |
7ca6740c SAS |
45 | { |
46 | DEFINE_WAIT(wait); | |
47 | u32 reg; | |
48 | ||
0d3a7cce | 49 | regmap_read(tscadc->regmap, REG_ADCFSM, ®); |
7ca6740c | 50 | if (reg & SEQ_STATUS) { |
a318b7d0 AD |
51 | tscadc->adc_waiting = true; |
52 | prepare_to_wait(&tscadc->reg_se_wait, &wait, | |
7ca6740c | 53 | TASK_UNINTERRUPTIBLE); |
a318b7d0 | 54 | spin_unlock_irq(&tscadc->reg_lock); |
7ca6740c SAS |
55 | |
56 | schedule(); | |
57 | ||
a318b7d0 AD |
58 | spin_lock_irq(&tscadc->reg_lock); |
59 | finish_wait(&tscadc->reg_se_wait, &wait); | |
7ca6740c | 60 | |
b10848e6 V |
61 | /* |
62 | * Sequencer should either be idle or | |
63 | * busy applying the charge step. | |
64 | */ | |
0d3a7cce | 65 | regmap_read(tscadc->regmap, REG_ADCFSM, ®); |
b10848e6 | 66 | WARN_ON((reg & SEQ_STATUS) && !(reg & CHARGE_STEP)); |
a318b7d0 | 67 | tscadc->adc_waiting = false; |
7ca6740c | 68 | } |
a318b7d0 | 69 | tscadc->adc_in_use = true; |
7ca6740c SAS |
70 | } |
71 | ||
a318b7d0 | 72 | void am335x_tsc_se_set_once(struct ti_tscadc_dev *tscadc, u32 val) |
7ca6740c | 73 | { |
a318b7d0 AD |
74 | spin_lock_irq(&tscadc->reg_lock); |
75 | am335x_tscadc_need_adc(tscadc); | |
7ca6740c | 76 | |
0d3a7cce | 77 | regmap_write(tscadc->regmap, REG_SE, val); |
a318b7d0 | 78 | spin_unlock_irq(&tscadc->reg_lock); |
7ca6740c SAS |
79 | } |
80 | EXPORT_SYMBOL_GPL(am335x_tsc_se_set_once); | |
81 | ||
a318b7d0 | 82 | void am335x_tsc_se_adc_done(struct ti_tscadc_dev *tscadc) |
7e170c6e SAS |
83 | { |
84 | unsigned long flags; | |
85 | ||
a318b7d0 AD |
86 | spin_lock_irqsave(&tscadc->reg_lock, flags); |
87 | tscadc->adc_in_use = false; | |
0d3a7cce | 88 | regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache); |
a318b7d0 | 89 | spin_unlock_irqrestore(&tscadc->reg_lock, flags); |
7e170c6e | 90 | } |
7ca6740c | 91 | EXPORT_SYMBOL_GPL(am335x_tsc_se_adc_done); |
abeccee4 | 92 | |
a318b7d0 | 93 | void am335x_tsc_se_clr(struct ti_tscadc_dev *tscadc, u32 val) |
abeccee4 | 94 | { |
317b2099 SAS |
95 | unsigned long flags; |
96 | ||
a318b7d0 AD |
97 | spin_lock_irqsave(&tscadc->reg_lock, flags); |
98 | tscadc->reg_se_cache &= ~val; | |
0d3a7cce | 99 | regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache); |
a318b7d0 | 100 | spin_unlock_irqrestore(&tscadc->reg_lock, flags); |
abeccee4 PR |
101 | } |
102 | EXPORT_SYMBOL_GPL(am335x_tsc_se_clr); | |
103 | ||
a318b7d0 | 104 | static void tscadc_idle_config(struct ti_tscadc_dev *tscadc) |
01636eb9 PR |
105 | { |
106 | unsigned int idleconfig; | |
107 | ||
bf0f394c MR |
108 | idleconfig = STEPCONFIG_INM_ADCREFM | STEPCONFIG_INP_ADCREFM; |
109 | if (ti_adc_with_touchscreen(tscadc)) | |
110 | idleconfig |= STEPCONFIG_YNN | STEPCONFIG_YPN; | |
01636eb9 | 111 | |
0d3a7cce | 112 | regmap_write(tscadc->regmap, REG_IDLECONFIG, idleconfig); |
01636eb9 PR |
113 | } |
114 | ||
612b95cd | 115 | static int ti_tscadc_probe(struct platform_device *pdev) |
01636eb9 | 116 | { |
36e48f07 MR |
117 | struct ti_tscadc_dev *tscadc; |
118 | struct resource *res; | |
119 | struct clk *clk; | |
120 | struct device_node *node; | |
121 | struct mfd_cell *cell; | |
0a123303 | 122 | bool use_tsc = false, use_mag = false; |
36e48f07 | 123 | u32 val; |
b813f320 | 124 | int err; |
430b98fc | 125 | int tscmag_wires = 0, adc_channels = 0, cell_idx = 0, total_channels; |
0a123303 | 126 | int readouts = 0, mag_tracks = 0; |
01636eb9 | 127 | |
61479479 MR |
128 | /* Allocate memory for device */ |
129 | tscadc = devm_kzalloc(&pdev->dev, sizeof(*tscadc), GFP_KERNEL); | |
130 | if (!tscadc) | |
131 | return -ENOMEM; | |
132 | ||
133 | tscadc->dev = &pdev->dev; | |
134 | ||
9e5775f3 SAS |
135 | if (!pdev->dev.of_node) { |
136 | dev_err(&pdev->dev, "Could not find valid DT data.\n"); | |
01636eb9 PR |
137 | return -EINVAL; |
138 | } | |
139 | ||
f7834843 MR |
140 | tscadc->data = of_device_get_match_data(&pdev->dev); |
141 | ||
bf0f394c MR |
142 | if (ti_adc_with_touchscreen(tscadc)) { |
143 | node = of_get_child_by_name(pdev->dev.of_node, "tsc"); | |
144 | of_property_read_u32(node, "ti,wires", &tscmag_wires); | |
90fc6ff4 MR |
145 | err = of_property_read_u32(node, "ti,coordinate-readouts", |
146 | &readouts); | |
147 | if (err < 0) | |
148 | of_property_read_u32(node, "ti,coordiante-readouts", | |
149 | &readouts); | |
150 | ||
bf0f394c | 151 | of_node_put(node); |
90fc6ff4 | 152 | |
bf0f394c MR |
153 | if (tscmag_wires) |
154 | use_tsc = true; | |
0a123303 MR |
155 | } else { |
156 | /* | |
157 | * When adding support for the magnetic stripe reader, here is | |
158 | * the place to look for the number of tracks used from device | |
159 | * tree. Let's default to 0 for now. | |
160 | */ | |
161 | mag_tracks = 0; | |
162 | tscmag_wires = mag_tracks * 2; | |
163 | if (tscmag_wires) | |
164 | use_mag = true; | |
bf0f394c | 165 | } |
a6543a1c | 166 | |
9e5775f3 | 167 | node = of_get_child_by_name(pdev->dev.of_node, "adc"); |
9722c3b6 | 168 | of_property_for_each_u32(node, "ti,adc-channels", val) { |
18926ede SAS |
169 | adc_channels++; |
170 | if (val > 7) { | |
171 | dev_err(&pdev->dev, " PIN numbers are 0..7 (not %d)\n", | |
243e3cb9 | 172 | val); |
29f95e8b | 173 | of_node_put(node); |
18926ede SAS |
174 | return -EINVAL; |
175 | } | |
176 | } | |
29f95e8b MR |
177 | |
178 | of_node_put(node); | |
179 | ||
430b98fc | 180 | total_channels = tscmag_wires + adc_channels; |
5e53a69b PR |
181 | if (total_channels > 8) { |
182 | dev_err(&pdev->dev, "Number of i/p channels more than 8\n"); | |
183 | return -EINVAL; | |
184 | } | |
243e3cb9 | 185 | |
24d5c82f | 186 | if (total_channels == 0) { |
ad70c03f | 187 | dev_err(&pdev->dev, "Need at least one channel.\n"); |
24d5c82f PA |
188 | return -EINVAL; |
189 | } | |
2b99bafa | 190 | |
2a4e333a | 191 | if (use_tsc && (readouts * 2 + 2 + adc_channels > 16)) { |
18926ede SAS |
192 | dev_err(&pdev->dev, "Too many step configurations requested\n"); |
193 | return -EINVAL; | |
194 | } | |
195 | ||
3c39c9c6 | 196 | err = platform_get_irq(pdev, 0); |
bc239d8d | 197 | if (err < 0) |
287ee127 | 198 | return err; |
bc239d8d | 199 | else |
3c39c9c6 | 200 | tscadc->irq = err; |
01636eb9 | 201 | |
07141cfe | 202 | tscadc->tscadc_base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); |
924ff918 JH |
203 | if (IS_ERR(tscadc->tscadc_base)) |
204 | return PTR_ERR(tscadc->tscadc_base); | |
01636eb9 | 205 | |
de98a43e | 206 | tscadc->tscadc_phys_base = res->start; |
0d3a7cce | 207 | tscadc->regmap = devm_regmap_init_mmio(&pdev->dev, |
243e3cb9 MR |
208 | tscadc->tscadc_base, |
209 | &tscadc_regmap_config); | |
0d3a7cce | 210 | if (IS_ERR(tscadc->regmap)) { |
01636eb9 | 211 | dev_err(&pdev->dev, "regmap init failed\n"); |
287ee127 | 212 | return PTR_ERR(tscadc->regmap); |
01636eb9 PR |
213 | } |
214 | ||
abeccee4 | 215 | spin_lock_init(&tscadc->reg_lock); |
7ca6740c SAS |
216 | init_waitqueue_head(&tscadc->reg_se_wait); |
217 | ||
01636eb9 PR |
218 | pm_runtime_enable(&pdev->dev); |
219 | pm_runtime_get_sync(&pdev->dev); | |
220 | ||
221 | /* | |
c4359f75 MR |
222 | * The TSC_ADC_Subsystem has 2 clock domains: OCP_CLK and ADC_CLK. |
223 | * ADCs produce a 12-bit sample every 15 ADC_CLK cycles. | |
224 | * am33xx ADCs expect to capture 200ksps. | |
0a123303 MR |
225 | * am47xx ADCs expect to capture 867ksps. |
226 | * We need ADC clocks respectively running at 3MHz and 13MHz. | |
227 | * These frequencies are valid since TSC_ADC_SS controller design | |
c4359f75 | 228 | * assumes the OCP clock is at least 6x faster than the ADC clock. |
01636eb9 | 229 | */ |
235a96e9 | 230 | clk = devm_clk_get(&pdev->dev, NULL); |
01636eb9 | 231 | if (IS_ERR(clk)) { |
e40b5971 | 232 | dev_err(&pdev->dev, "failed to get fck\n"); |
01636eb9 PR |
233 | err = PTR_ERR(clk); |
234 | goto err_disable_clk; | |
235 | } | |
efe3126a | 236 | |
f7834843 | 237 | tscadc->clk_div = (clk_get_rate(clk) / tscadc->data->target_clk_rate) - 1; |
0d3a7cce | 238 | regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div); |
01636eb9 | 239 | |
b813f320 MR |
240 | /* |
241 | * Set the control register bits. tscadc->ctrl stores the configuration | |
242 | * of the CTRL register but not the subsystem enable bit which must be | |
243 | * added manually when timely. | |
244 | */ | |
bf0f394c MR |
245 | tscadc->ctrl = CNTRLREG_STEPID; |
246 | if (ti_adc_with_touchscreen(tscadc)) { | |
247 | tscadc->ctrl |= CNTRLREG_TSC_STEPCONFIGWRT; | |
248 | if (use_tsc) { | |
249 | tscadc->ctrl |= CNTRLREG_TSC_ENB; | |
250 | if (tscmag_wires == 5) | |
251 | tscadc->ctrl |= CNTRLREG_TSC_5WIRE; | |
252 | else | |
253 | tscadc->ctrl |= CNTRLREG_TSC_4WIRE; | |
254 | } | |
0a123303 MR |
255 | } else { |
256 | tscadc->ctrl |= CNTRLREG_MAG_PREAMP_PWRDOWN | | |
257 | CNTRLREG_MAG_PREAMP_BYPASS; | |
f0933a60 | 258 | } |
b813f320 | 259 | regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl); |
01636eb9 | 260 | |
25b15d04 MR |
261 | tscadc_idle_config(tscadc); |
262 | ||
01636eb9 | 263 | /* Enable the TSC module enable bit */ |
c3e36b5d | 264 | regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl | CNTRLREG_SSENB); |
01636eb9 | 265 | |
0a123303 MR |
266 | /* TSC or MAG Cell */ |
267 | if (use_tsc || use_mag) { | |
7c605802 | 268 | cell = &tscadc->cells[cell_idx++]; |
f7834843 MR |
269 | cell->name = tscadc->data->secondary_feature_name; |
270 | cell->of_compatible = tscadc->data->secondary_feature_compatible; | |
24d5c82f PA |
271 | cell->platform_data = &tscadc; |
272 | cell->pdata_size = sizeof(tscadc); | |
273 | } | |
2b99bafa | 274 | |
5e53a69b | 275 | /* ADC Cell */ |
24d5c82f | 276 | if (adc_channels > 0) { |
7c605802 | 277 | cell = &tscadc->cells[cell_idx++]; |
f7834843 MR |
278 | cell->name = tscadc->data->adc_feature_name; |
279 | cell->of_compatible = tscadc->data->adc_feature_compatible; | |
24d5c82f PA |
280 | cell->platform_data = &tscadc; |
281 | cell->pdata_size = sizeof(tscadc); | |
282 | } | |
5e53a69b | 283 | |
b40ee006 | 284 | err = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_AUTO, |
7c605802 | 285 | tscadc->cells, cell_idx, NULL, 0, NULL); |
01636eb9 PR |
286 | if (err < 0) |
287 | goto err_disable_clk; | |
288 | ||
01636eb9 | 289 | platform_set_drvdata(pdev, tscadc); |
01636eb9 PR |
290 | return 0; |
291 | ||
292 | err_disable_clk: | |
293 | pm_runtime_put_sync(&pdev->dev); | |
294 | pm_runtime_disable(&pdev->dev); | |
287ee127 | 295 | |
01636eb9 PR |
296 | return err; |
297 | } | |
298 | ||
740ad6d1 | 299 | static void ti_tscadc_remove(struct platform_device *pdev) |
01636eb9 | 300 | { |
36e48f07 | 301 | struct ti_tscadc_dev *tscadc = platform_get_drvdata(pdev); |
01636eb9 | 302 | |
0d3a7cce | 303 | regmap_write(tscadc->regmap, REG_SE, 0x00); |
01636eb9 PR |
304 | |
305 | pm_runtime_put_sync(&pdev->dev); | |
306 | pm_runtime_disable(&pdev->dev); | |
307 | ||
308 | mfd_remove_devices(tscadc->dev); | |
01636eb9 PR |
309 | } |
310 | ||
c974ac77 V |
311 | static int __maybe_unused ti_tscadc_can_wakeup(struct device *dev, void *data) |
312 | { | |
313 | return device_may_wakeup(dev); | |
314 | } | |
315 | ||
dae936a0 | 316 | static int __maybe_unused tscadc_suspend(struct device *dev) |
01636eb9 | 317 | { |
36e48f07 | 318 | struct ti_tscadc_dev *tscadc = dev_get_drvdata(dev); |
01636eb9 | 319 | |
0d3a7cce | 320 | regmap_write(tscadc->regmap, REG_SE, 0x00); |
c974ac77 V |
321 | if (device_for_each_child(dev, NULL, ti_tscadc_can_wakeup)) { |
322 | u32 ctrl; | |
323 | ||
324 | regmap_read(tscadc->regmap, REG_CTRL, &ctrl); | |
325 | ctrl &= ~(CNTRLREG_POWERDOWN); | |
c3e36b5d | 326 | ctrl |= CNTRLREG_SSENB; |
c974ac77 V |
327 | regmap_write(tscadc->regmap, REG_CTRL, ctrl); |
328 | } | |
01636eb9 PR |
329 | pm_runtime_put_sync(dev); |
330 | ||
331 | return 0; | |
332 | } | |
333 | ||
dae936a0 | 334 | static int __maybe_unused tscadc_resume(struct device *dev) |
01636eb9 | 335 | { |
36e48f07 | 336 | struct ti_tscadc_dev *tscadc = dev_get_drvdata(dev); |
01636eb9 PR |
337 | |
338 | pm_runtime_get_sync(dev); | |
339 | ||
3dafbe93 | 340 | regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div); |
b813f320 | 341 | regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl); |
25b15d04 | 342 | tscadc_idle_config(tscadc); |
c3e36b5d | 343 | regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl | CNTRLREG_SSENB); |
01636eb9 PR |
344 | |
345 | return 0; | |
346 | } | |
347 | ||
dae936a0 | 348 | static SIMPLE_DEV_PM_OPS(tscadc_pm_ops, tscadc_suspend, tscadc_resume); |
01636eb9 | 349 | |
f7834843 MR |
350 | static const struct ti_tscadc_data tscdata = { |
351 | .adc_feature_name = "TI-am335x-adc", | |
352 | .adc_feature_compatible = "ti,am3359-adc", | |
353 | .secondary_feature_name = "TI-am335x-tsc", | |
354 | .secondary_feature_compatible = "ti,am3359-tsc", | |
2f89c261 | 355 | .target_clk_rate = TSC_ADC_CLK, |
f7834843 MR |
356 | }; |
357 | ||
0a123303 MR |
358 | static const struct ti_tscadc_data magdata = { |
359 | .adc_feature_name = "TI-am43xx-adc", | |
360 | .adc_feature_compatible = "ti,am4372-adc", | |
361 | .secondary_feature_name = "TI-am43xx-mag", | |
362 | .secondary_feature_compatible = "ti,am4372-mag", | |
363 | .target_clk_rate = MAG_ADC_CLK, | |
364 | }; | |
365 | ||
a6543a1c | 366 | static const struct of_device_id ti_tscadc_dt_ids[] = { |
f7834843 | 367 | { .compatible = "ti,am3359-tscadc", .data = &tscdata }, |
0a123303 | 368 | { .compatible = "ti,am4372-magadc", .data = &magdata }, |
a6543a1c PR |
369 | { } |
370 | }; | |
371 | MODULE_DEVICE_TABLE(of, ti_tscadc_dt_ids); | |
372 | ||
01636eb9 PR |
373 | static struct platform_driver ti_tscadc_driver = { |
374 | .driver = { | |
a6543a1c | 375 | .name = "ti_am3359-tscadc", |
dae936a0 | 376 | .pm = &tscadc_pm_ops, |
131221bc | 377 | .of_match_table = ti_tscadc_dt_ids, |
01636eb9 PR |
378 | }, |
379 | .probe = ti_tscadc_probe, | |
740ad6d1 | 380 | .remove_new = ti_tscadc_remove, |
01636eb9 PR |
381 | |
382 | }; | |
383 | ||
384 | module_platform_driver(ti_tscadc_driver); | |
385 | ||
0a123303 | 386 | MODULE_DESCRIPTION("TI touchscreen/magnetic stripe reader/ADC MFD controller driver"); |
01636eb9 PR |
387 | MODULE_AUTHOR("Rachna Patil <rachna@ti.com>"); |
388 | MODULE_LICENSE("GPL"); |