[linux-2.6-block.git] / drivers / mfd / ti_am335x_tscadc.c

/*
 * TI Touch Screen / ADC MFD driver
 *
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation version 2.
 *
 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
 * kind, whether express or implied; without even the implied warranty
 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/regmap.h>
#include <linux/mfd/core.h>
#include <linux/pm_runtime.h>
#include <linux/of.h>
#include <linux/of_device.h>

#include <linux/mfd/ti_am335x_tscadc.h>
#include <linux/input/ti_am335x_tsc.h>
#include <linux/platform_data/ti_am335x_adc.h>

static unsigned int tscadc_readl(struct ti_tscadc_dev *tsadc, unsigned int reg)
{
	unsigned int val;

	regmap_read(tsadc->regmap_tscadc, reg, &val);
	return val;
}

static void tscadc_writel(struct ti_tscadc_dev *tsadc, unsigned int reg,
					unsigned int val)
{
	regmap_write(tsadc->regmap_tscadc, reg, val);
}

static const struct regmap_config tscadc_regmap_config = {
	.name = "ti_tscadc",
	.reg_bits = 32,
	.reg_stride = 4,
	.val_bits = 32,
};

void am335x_tsc_se_update(struct ti_tscadc_dev *tsadc)
{
	tscadc_writel(tsadc, REG_SE, tsadc->reg_se_cache);
}
EXPORT_SYMBOL_GPL(am335x_tsc_se_update);

void am335x_tsc_se_set(struct ti_tscadc_dev *tsadc, u32 val)
{
	spin_lock(&tsadc->reg_lock);
	tsadc->reg_se_cache |= val;
	spin_unlock(&tsadc->reg_lock);

	am335x_tsc_se_update(tsadc);
}
EXPORT_SYMBOL_GPL(am335x_tsc_se_set);

void am335x_tsc_se_clr(struct ti_tscadc_dev *tsadc, u32 val)
{
	spin_lock(&tsadc->reg_lock);
	tsadc->reg_se_cache &= ~val;
	spin_unlock(&tsadc->reg_lock);

	am335x_tsc_se_update(tsadc);
}
EXPORT_SYMBOL_GPL(am335x_tsc_se_clr);

static void tscadc_idle_config(struct ti_tscadc_dev *config)
{
	unsigned int idleconfig;

	idleconfig = STEPCONFIG_YNN | STEPCONFIG_INM_ADCREFM |
			STEPCONFIG_INP_ADCREFM | STEPCONFIG_YPN;

	tscadc_writel(config, REG_IDLECONFIG, idleconfig);
}

static	int ti_tscadc_probe(struct platform_device *pdev)
{
	struct ti_tscadc_dev	*tscadc;
	struct resource		*res;
	struct clk		*clk;
	struct mfd_tscadc_board	*pdata = pdev->dev.platform_data;
	struct device_node	*node = pdev->dev.of_node;
	struct mfd_cell		*cell;
	int			err, ctrl;
	int			clk_value, clock_rate;
	int			tsc_wires = 0, adc_channels = 0, total_channels;

	if (!pdata && !pdev->dev.of_node) {
		dev_err(&pdev->dev, "Could not find platform data\n");
		return -EINVAL;
	}

	if (pdev->dev.platform_data) {
		if (pdata->tsc_init)
			tsc_wires = pdata->tsc_init->wires;

		if (pdata->adc_init)
			adc_channels = pdata->adc_init->adc_channels;
	} else {
		node = of_get_child_by_name(pdev->dev.of_node, "tsc");
		of_property_read_u32(node, "ti,wires", &tsc_wires);

		node = of_get_child_by_name(pdev->dev.of_node, "adc");
		of_property_read_u32(node, "ti,adc-channels", &adc_channels);
	}

	total_channels = tsc_wires + adc_channels;

	if (total_channels > 8) {
		dev_err(&pdev->dev, "Number of i/p channels more than 8\n");
		return -EINVAL;
	}

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!res) {
		dev_err(&pdev->dev, "no memory resource defined.\n");
		return -EINVAL;
	}

	/* Allocate memory for device */
	tscadc = devm_kzalloc(&pdev->dev,
			sizeof(struct ti_tscadc_dev), GFP_KERNEL);
	if (!tscadc) {
		dev_err(&pdev->dev, "failed to allocate memory.\n");
		return -ENOMEM;
	}
	tscadc->dev = &pdev->dev;

	err = platform_get_irq(pdev, 0);
	if (err < 0) {
		dev_err(&pdev->dev, "no irq ID is specified.\n");
		goto ret;
	} else
		tscadc->irq = err;

	res = devm_request_mem_region(&pdev->dev,
			res->start, resource_size(res), pdev->name);
	if (!res) {
		dev_err(&pdev->dev, "failed to reserve registers.\n");
		return -EBUSY;
	}

	tscadc->tscadc_base = devm_ioremap(&pdev->dev,
			res->start, resource_size(res));
	if (!tscadc->tscadc_base) {
		dev_err(&pdev->dev, "failed to map registers.\n");
		return -ENOMEM;
	}

	tscadc->regmap_tscadc = devm_regmap_init_mmio(&pdev->dev,
			tscadc->tscadc_base, &tscadc_regmap_config);
	if (IS_ERR(tscadc->regmap_tscadc)) {
		dev_err(&pdev->dev, "regmap init failed\n");
		err = PTR_ERR(tscadc->regmap_tscadc);
		goto ret;
	}

	spin_lock_init(&tscadc->reg_lock);
	pm_runtime_enable(&pdev->dev);
	pm_runtime_get_sync(&pdev->dev);

	/*
	 * The TSC_ADC_Subsystem has 2 clock domains
	 * OCP_CLK and ADC_CLK.
	 * The ADC clock is expected to run at target of 3MHz,
	 * and expected to capture 12-bit data at a rate of 200 KSPS.
	 * The TSC_ADC_SS controller design assumes the OCP clock is
	 * at least 6x faster than the ADC clock.
	 */
	clk = clk_get(&pdev->dev, "adc_tsc_fck");
	if (IS_ERR(clk)) {
		dev_err(&pdev->dev, "failed to get TSC fck\n");
		err = PTR_ERR(clk);
		goto err_disable_clk;
	}
	clock_rate = clk_get_rate(clk);
	clk_put(clk);
	clk_value = clock_rate / ADC_CLK;
	if (clk_value < MAX_CLK_DIV) {
		dev_err(&pdev->dev, "clock input less than min clock requirement\n");
		err = -EINVAL;
		goto err_disable_clk;
	}
	/* TSCADC_CLKDIV needs to be configured to the value minus 1 */
	clk_value = clk_value - 1;
	tscadc_writel(tscadc, REG_CLKDIV, clk_value);

	/* Set the control register bits */
	ctrl = CNTRLREG_STEPCONFIGWRT |
			CNTRLREG_TSCENB |
			CNTRLREG_STEPID |
			CNTRLREG_4WIRE;
	tscadc_writel(tscadc, REG_CTRL, ctrl);

	/* Set register bits for Idle Config Mode */
	tscadc_idle_config(tscadc);

	/* Enable the TSC module enable bit */
	ctrl = tscadc_readl(tscadc, REG_CTRL);
	ctrl |= CNTRLREG_TSCSSENB;
	tscadc_writel(tscadc, REG_CTRL, ctrl);

	/* TSC Cell */
	cell = &tscadc->cells[TSC_CELL];
	cell->name = "tsc";
	cell->of_compatible = "ti,am3359-tsc";
	cell->platform_data = &tscadc;
	cell->pdata_size = sizeof(tscadc);

	/* ADC Cell */
	cell = &tscadc->cells[ADC_CELL];
	cell->name = "tiadc";
	cell->of_compatible = "ti,am3359-adc";
	cell->platform_data = &tscadc;
	cell->pdata_size = sizeof(tscadc);

	err = mfd_add_devices(&pdev->dev, pdev->id, tscadc->cells,
			TSCADC_CELLS, NULL, 0, NULL);
	if (err < 0)
		goto err_disable_clk;

	device_init_wakeup(&pdev->dev, true);
	platform_set_drvdata(pdev, tscadc);

	return 0;

err_disable_clk:
	pm_runtime_put_sync(&pdev->dev);
	pm_runtime_disable(&pdev->dev);
ret:
	return err;
}

static int ti_tscadc_remove(struct platform_device *pdev)
{
	struct ti_tscadc_dev	*tscadc = platform_get_drvdata(pdev);

	tscadc_writel(tscadc, REG_SE, 0x00);

	pm_runtime_put_sync(&pdev->dev);
	pm_runtime_disable(&pdev->dev);

	mfd_remove_devices(tscadc->dev);

	return 0;
}

#ifdef CONFIG_PM
static int tscadc_suspend(struct device *dev)
{
	struct ti_tscadc_dev	*tscadc_dev = dev_get_drvdata(dev);

	tscadc_writel(tscadc_dev, REG_SE, 0x00);
	pm_runtime_put_sync(dev);

	return 0;
}

static int tscadc_resume(struct device *dev)
{
	struct ti_tscadc_dev	*tscadc_dev = dev_get_drvdata(dev);
	unsigned int restore, ctrl;

	pm_runtime_get_sync(dev);

	/* context restore */
	ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_TSCENB |
			CNTRLREG_STEPID | CNTRLREG_4WIRE;
	tscadc_writel(tscadc_dev, REG_CTRL, ctrl);
	tscadc_idle_config(tscadc_dev);
	am335x_tsc_se_update(tscadc_dev);
	restore = tscadc_readl(tscadc_dev, REG_CTRL);
	tscadc_writel(tscadc_dev, REG_CTRL,
			(restore | CNTRLREG_TSCSSENB));

	return 0;
}

static const struct dev_pm_ops tscadc_pm_ops = {
	.suspend = tscadc_suspend,
	.resume = tscadc_resume,
};
#define TSCADC_PM_OPS (&tscadc_pm_ops)
#else
#define TSCADC_PM_OPS NULL
#endif

static const struct of_device_id ti_tscadc_dt_ids[] = {
	{ .compatible = "ti,am3359-tscadc", },
	{ }
};
MODULE_DEVICE_TABLE(of, ti_tscadc_dt_ids);

static struct platform_driver ti_tscadc_driver = {
	.driver = {
		.name   = "ti_am3359-tscadc",
		.owner	= THIS_MODULE,
		.pm	= TSCADC_PM_OPS,
		.of_match_table = of_match_ptr(ti_tscadc_dt_ids),
	},
	.probe	= ti_tscadc_probe,
	.remove	= ti_tscadc_remove,

};

module_platform_driver(ti_tscadc_driver);

MODULE_DESCRIPTION("TI touchscreen / ADC MFD controller driver");
MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
MODULE_LICENSE("GPL");
Commit	Line	Data
01636eb9 PR	1	/*
	2	* TI Touch Screen / ADC MFD driver
	3	*
	4	* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License as
	8	* published by the Free Software Foundation version 2.
	9	*
	10	* This program is distributed "as is" WITHOUT ANY WARRANTY of any
	11	* kind, whether express or implied; without even the implied warranty
	12	* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	* GNU General Public License for more details.
	14	*/
	15
	16	#include <linux/module.h>
	17	#include <linux/init.h>
	18	#include <linux/slab.h>
	19	#include <linux/err.h>
	20	#include <linux/io.h>
	21	#include <linux/clk.h>
	22	#include <linux/regmap.h>
	23	#include <linux/mfd/core.h>
	24	#include <linux/pm_runtime.h>
a6543a1c PR	25	#include <linux/of.h>
a6543a1c PR	26	#include <linux/of_device.h>
01636eb9 PR	27
01636eb9 PR	28	#include <linux/mfd/ti_am335x_tscadc.h>
2b99bafa	29	#include <linux/input/ti_am335x_tsc.h>
5e53a69b	30	#include <linux/platform_data/ti_am335x_adc.h>
01636eb9 PR	31
	32	static unsigned int tscadc_readl(struct ti_tscadc_dev *tsadc, unsigned int reg)
	33	{
	34	unsigned int val;
	35
	36	regmap_read(tsadc->regmap_tscadc, reg, &val);
	37	return val;
	38	}
	39
	40	static void tscadc_writel(struct ti_tscadc_dev *tsadc, unsigned int reg,
	41	unsigned int val)
	42	{
	43	regmap_write(tsadc->regmap_tscadc, reg, val);
	44	}
	45
	46	static const struct regmap_config tscadc_regmap_config = {
	47	.name = "ti_tscadc",
	48	.reg_bits = 32,
	49	.reg_stride = 4,
	50	.val_bits = 32,
	51	};
	52
abeccee4 PR	53	void am335x_tsc_se_update(struct ti_tscadc_dev *tsadc)
	54	{
	55	tscadc_writel(tsadc, REG_SE, tsadc->reg_se_cache);
	56	}
	57	EXPORT_SYMBOL_GPL(am335x_tsc_se_update);
	58
	59	void am335x_tsc_se_set(struct ti_tscadc_dev *tsadc, u32 val)
	60	{
	61	spin_lock(&tsadc->reg_lock);
	62	tsadc->reg_se_cache \|= val;
	63	spin_unlock(&tsadc->reg_lock);
	64
	65	am335x_tsc_se_update(tsadc);
	66	}
	67	EXPORT_SYMBOL_GPL(am335x_tsc_se_set);
	68
	69	void am335x_tsc_se_clr(struct ti_tscadc_dev *tsadc, u32 val)
	70	{
	71	spin_lock(&tsadc->reg_lock);
	72	tsadc->reg_se_cache &= ~val;
	73	spin_unlock(&tsadc->reg_lock);
	74
	75	am335x_tsc_se_update(tsadc);
	76	}
	77	EXPORT_SYMBOL_GPL(am335x_tsc_se_clr);
	78
01636eb9 PR	79	static void tscadc_idle_config(struct ti_tscadc_dev *config)
	80	{
	81	unsigned int idleconfig;
	82
	83	idleconfig = STEPCONFIG_YNN \| STEPCONFIG_INM_ADCREFM \|
	84	STEPCONFIG_INP_ADCREFM \| STEPCONFIG_YPN;
	85
	86	tscadc_writel(config, REG_IDLECONFIG, idleconfig);
	87	}
	88
612b95cd	89	static int ti_tscadc_probe(struct platform_device *pdev)
01636eb9 PR	90	{
	91	struct ti_tscadc_dev *tscadc;
	92	struct resource *res;
	93	struct clk *clk;
	94	struct mfd_tscadc_board *pdata = pdev->dev.platform_data;
a6543a1c	95	struct device_node *node = pdev->dev.of_node;
2b99bafa	96	struct mfd_cell *cell;
01636eb9 PR	97	int err, ctrl;
01636eb9 PR	98	int clk_value, clock_rate;
a6543a1c	99	int tsc_wires = 0, adc_channels = 0, total_channels;
01636eb9	100
a6543a1c	101	if (!pdata && !pdev->dev.of_node) {
01636eb9 PR	102	dev_err(&pdev->dev, "Could not find platform data\n");
	103	return -EINVAL;
	104	}
	105
a6543a1c PR	106	if (pdev->dev.platform_data) {
	107	if (pdata->tsc_init)
	108	tsc_wires = pdata->tsc_init->wires;
	109
	110	if (pdata->adc_init)
	111	adc_channels = pdata->adc_init->adc_channels;
	112	} else {
	113	node = of_get_child_by_name(pdev->dev.of_node, "tsc");
	114	of_property_read_u32(node, "ti,wires", &tsc_wires);
	115
	116	node = of_get_child_by_name(pdev->dev.of_node, "adc");
	117	of_property_read_u32(node, "ti,adc-channels", &adc_channels);
	118	}
5e53a69b	119
5e53a69b PR	120	total_channels = tsc_wires + adc_channels;
	121
	122	if (total_channels > 8) {
	123	dev_err(&pdev->dev, "Number of i/p channels more than 8\n");
	124	return -EINVAL;
	125	}
2b99bafa	126
01636eb9 PR	127	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	128	if (!res) {
	129	dev_err(&pdev->dev, "no memory resource defined.\n");
	130	return -EINVAL;
	131	}
	132
01636eb9 PR	133	/* Allocate memory for device */
	134	tscadc = devm_kzalloc(&pdev->dev,
	135	sizeof(struct ti_tscadc_dev), GFP_KERNEL);
	136	if (!tscadc) {
	137	dev_err(&pdev->dev, "failed to allocate memory.\n");
	138	return -ENOMEM;
	139	}
	140	tscadc->dev = &pdev->dev;
3c39c9c6 PR	141
	142	err = platform_get_irq(pdev, 0);
	143	if (err < 0) {
	144	dev_err(&pdev->dev, "no irq ID is specified.\n");
	145	goto ret;
	146	} else
	147	tscadc->irq = err;
01636eb9 PR	148
	149	res = devm_request_mem_region(&pdev->dev,
	150	res->start, resource_size(res), pdev->name);
	151	if (!res) {
	152	dev_err(&pdev->dev, "failed to reserve registers.\n");
3c39c9c6	153	return -EBUSY;
01636eb9 PR	154	}
	155
	156	tscadc->tscadc_base = devm_ioremap(&pdev->dev,
	157	res->start, resource_size(res));
	158	if (!tscadc->tscadc_base) {
	159	dev_err(&pdev->dev, "failed to map registers.\n");
3c39c9c6	160	return -ENOMEM;
01636eb9 PR	161	}
	162
	163	tscadc->regmap_tscadc = devm_regmap_init_mmio(&pdev->dev,
	164	tscadc->tscadc_base, &tscadc_regmap_config);
	165	if (IS_ERR(tscadc->regmap_tscadc)) {
	166	dev_err(&pdev->dev, "regmap init failed\n");
	167	err = PTR_ERR(tscadc->regmap_tscadc);
3c39c9c6	168	goto ret;
01636eb9 PR	169	}
01636eb9 PR	170
abeccee4	171	spin_lock_init(&tscadc->reg_lock);
01636eb9 PR	172	pm_runtime_enable(&pdev->dev);
	173	pm_runtime_get_sync(&pdev->dev);
	174
	175	/*
	176	* The TSC_ADC_Subsystem has 2 clock domains
	177	* OCP_CLK and ADC_CLK.
	178	* The ADC clock is expected to run at target of 3MHz,
	179	* and expected to capture 12-bit data at a rate of 200 KSPS.
	180	* The TSC_ADC_SS controller design assumes the OCP clock is
	181	* at least 6x faster than the ADC clock.
	182	*/
	183	clk = clk_get(&pdev->dev, "adc_tsc_fck");
	184	if (IS_ERR(clk)) {
	185	dev_err(&pdev->dev, "failed to get TSC fck\n");
	186	err = PTR_ERR(clk);
	187	goto err_disable_clk;
	188	}
	189	clock_rate = clk_get_rate(clk);
	190	clk_put(clk);
	191	clk_value = clock_rate / ADC_CLK;
	192	if (clk_value < MAX_CLK_DIV) {
	193	dev_err(&pdev->dev, "clock input less than min clock requirement\n");
	194	err = -EINVAL;
	195	goto err_disable_clk;
	196	}
	197	/* TSCADC_CLKDIV needs to be configured to the value minus 1 */
	198	clk_value = clk_value - 1;
	199	tscadc_writel(tscadc, REG_CLKDIV, clk_value);
	200
	201	/* Set the control register bits */
	202	ctrl = CNTRLREG_STEPCONFIGWRT \|
	203	CNTRLREG_TSCENB \|
	204	CNTRLREG_STEPID \|
	205	CNTRLREG_4WIRE;
	206	tscadc_writel(tscadc, REG_CTRL, ctrl);
	207
	208	/* Set register bits for Idle Config Mode */
	209	tscadc_idle_config(tscadc);
	210
	211	/* Enable the TSC module enable bit */
	212	ctrl = tscadc_readl(tscadc, REG_CTRL);
	213	ctrl \|= CNTRLREG_TSCSSENB;
	214	tscadc_writel(tscadc, REG_CTRL, ctrl);
	215
2b99bafa PR	216	/* TSC Cell */
	217	cell = &tscadc->cells[TSC_CELL];
	218	cell->name = "tsc";
0396310b	219	cell->of_compatible = "ti,am3359-tsc";
a9bce1b0 SAS	220	cell->platform_data = &tscadc;
a9bce1b0 SAS	221	cell->pdata_size = sizeof(tscadc);
2b99bafa	222
5e53a69b PR	223	/* ADC Cell */
	224	cell = &tscadc->cells[ADC_CELL];
	225	cell->name = "tiadc";
6f39ac4e	226	cell->of_compatible = "ti,am3359-adc";
a9bce1b0 SAS	227	cell->platform_data = &tscadc;
a9bce1b0 SAS	228	cell->pdata_size = sizeof(tscadc);
5e53a69b	229
01636eb9 PR	230	err = mfd_add_devices(&pdev->dev, pdev->id, tscadc->cells,
	231	TSCADC_CELLS, NULL, 0, NULL);
	232	if (err < 0)
	233	goto err_disable_clk;
	234
	235	device_init_wakeup(&pdev->dev, true);
	236	platform_set_drvdata(pdev, tscadc);
	237
	238	return 0;
	239
	240	err_disable_clk:
	241	pm_runtime_put_sync(&pdev->dev);
	242	pm_runtime_disable(&pdev->dev);
3c39c9c6	243	ret:
01636eb9 PR	244	return err;
	245	}
	246
612b95cd	247	static int ti_tscadc_remove(struct platform_device *pdev)
01636eb9 PR	248	{
	249	struct ti_tscadc_dev *tscadc = platform_get_drvdata(pdev);
	250
	251	tscadc_writel(tscadc, REG_SE, 0x00);
	252
	253	pm_runtime_put_sync(&pdev->dev);
	254	pm_runtime_disable(&pdev->dev);
	255
	256	mfd_remove_devices(tscadc->dev);
	257
	258	return 0;
	259	}
	260
	261	#ifdef CONFIG_PM
	262	static int tscadc_suspend(struct device *dev)
	263	{
	264	struct ti_tscadc_dev *tscadc_dev = dev_get_drvdata(dev);
	265
	266	tscadc_writel(tscadc_dev, REG_SE, 0x00);
	267	pm_runtime_put_sync(dev);
	268
	269	return 0;
	270	}
	271
	272	static int tscadc_resume(struct device *dev)
	273	{
	274	struct ti_tscadc_dev *tscadc_dev = dev_get_drvdata(dev);
	275	unsigned int restore, ctrl;
	276
	277	pm_runtime_get_sync(dev);
	278
	279	/* context restore */
	280	ctrl = CNTRLREG_STEPCONFIGWRT \| CNTRLREG_TSCENB \|
	281	CNTRLREG_STEPID \| CNTRLREG_4WIRE;
	282	tscadc_writel(tscadc_dev, REG_CTRL, ctrl);
	283	tscadc_idle_config(tscadc_dev);
abeccee4	284	am335x_tsc_se_update(tscadc_dev);
01636eb9 PR	285	restore = tscadc_readl(tscadc_dev, REG_CTRL);
	286	tscadc_writel(tscadc_dev, REG_CTRL,
	287	(restore \| CNTRLREG_TSCSSENB));
	288
	289	return 0;
	290	}
	291
	292	static const struct dev_pm_ops tscadc_pm_ops = {
	293	.suspend = tscadc_suspend,
	294	.resume = tscadc_resume,
	295	};
	296	#define TSCADC_PM_OPS (&tscadc_pm_ops)
	297	#else
	298	#define TSCADC_PM_OPS NULL
	299	#endif
	300
a6543a1c PR	301	static const struct of_device_id ti_tscadc_dt_ids[] = {
	302	{ .compatible = "ti,am3359-tscadc", },
	303	{ }
	304	};
	305	MODULE_DEVICE_TABLE(of, ti_tscadc_dt_ids);
	306
01636eb9 PR	307	static struct platform_driver ti_tscadc_driver = {
01636eb9 PR	308	.driver = {
a6543a1c	309	.name = "ti_am3359-tscadc",
01636eb9 PR	310	.owner = THIS_MODULE,
01636eb9 PR	311	.pm = TSCADC_PM_OPS,
a6543a1c	312	.of_match_table = of_match_ptr(ti_tscadc_dt_ids),
01636eb9 PR	313	},
01636eb9 PR	314	.probe = ti_tscadc_probe,
612b95cd	315	.remove = ti_tscadc_remove,
01636eb9 PR	316
	317	};
	318
	319	module_platform_driver(ti_tscadc_driver);
	320
	321	MODULE_DESCRIPTION("TI touchscreen / ADC MFD controller driver");
	322	MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
	323	MODULE_LICENSE("GPL");