[linux-2.6-block.git] / drivers / mfd / ti_am335x_tscadc.c

/*
 * TI Touch Screen / ADC MFD driver
 *
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation version 2.
 *
 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
 * kind, whether express or implied; without even the implied warranty
 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/regmap.h>
#include <linux/mfd/core.h>
#include <linux/pm_runtime.h>
#include <linux/of.h>
#include <linux/of_device.h>

#include <linux/mfd/ti_am335x_tscadc.h>

static unsigned int tscadc_readl(struct ti_tscadc_dev *tsadc, unsigned int reg)
{
	unsigned int val;

	regmap_read(tsadc->regmap_tscadc, reg, &val);
	return val;
}

static void tscadc_writel(struct ti_tscadc_dev *tsadc, unsigned int reg,
					unsigned int val)
{
	regmap_write(tsadc->regmap_tscadc, reg, val);
}

static const struct regmap_config tscadc_regmap_config = {
	.name = "ti_tscadc",
	.reg_bits = 32,
	.reg_stride = 4,
	.val_bits = 32,
};

void am335x_tsc_se_update(struct ti_tscadc_dev *tsadc)
{
	tscadc_writel(tsadc, REG_SE, tsadc->reg_se_cache);
}
EXPORT_SYMBOL_GPL(am335x_tsc_se_update);

void am335x_tsc_se_set(struct ti_tscadc_dev *tsadc, u32 val)
{
	spin_lock(&tsadc->reg_lock);
	tsadc->reg_se_cache |= val;
	spin_unlock(&tsadc->reg_lock);

	am335x_tsc_se_update(tsadc);
}
EXPORT_SYMBOL_GPL(am335x_tsc_se_set);

void am335x_tsc_se_clr(struct ti_tscadc_dev *tsadc, u32 val)
{
	spin_lock(&tsadc->reg_lock);
	tsadc->reg_se_cache &= ~val;
	spin_unlock(&tsadc->reg_lock);

	am335x_tsc_se_update(tsadc);
}
EXPORT_SYMBOL_GPL(am335x_tsc_se_clr);

static void tscadc_idle_config(struct ti_tscadc_dev *config)
{
	unsigned int idleconfig;

	idleconfig = STEPCONFIG_YNN | STEPCONFIG_INM_ADCREFM |
			STEPCONFIG_INP_ADCREFM | STEPCONFIG_YPN;

	tscadc_writel(config, REG_IDLECONFIG, idleconfig);
}

static	int ti_tscadc_probe(struct platform_device *pdev)
{
	struct ti_tscadc_dev	*tscadc;
	struct resource		*res;
	struct clk		*clk;
	struct device_node	*node = pdev->dev.of_node;
	struct mfd_cell		*cell;
	int			err, ctrl;
	int			clk_value, clock_rate;
	int			tsc_wires = 0, adc_channels = 0, total_channels;

	if (!pdev->dev.of_node) {
		dev_err(&pdev->dev, "Could not find valid DT data.\n");
		return -EINVAL;
	}

	node = of_get_child_by_name(pdev->dev.of_node, "tsc");
	of_property_read_u32(node, "ti,wires", &tsc_wires);

	node = of_get_child_by_name(pdev->dev.of_node, "adc");
	of_property_read_u32(node, "ti,adc-channels", &adc_channels);

	total_channels = tsc_wires + adc_channels;
	if (total_channels > 8) {
		dev_err(&pdev->dev, "Number of i/p channels more than 8\n");
		return -EINVAL;
	}
	if (total_channels == 0) {
		dev_err(&pdev->dev, "Need atleast one channel.\n");
		return -EINVAL;
	}

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!res) {
		dev_err(&pdev->dev, "no memory resource defined.\n");
		return -EINVAL;
	}

	/* Allocate memory for device */
	tscadc = devm_kzalloc(&pdev->dev,
			sizeof(struct ti_tscadc_dev), GFP_KERNEL);
	if (!tscadc) {
		dev_err(&pdev->dev, "failed to allocate memory.\n");
		return -ENOMEM;
	}
	tscadc->dev = &pdev->dev;

	err = platform_get_irq(pdev, 0);
	if (err < 0) {
		dev_err(&pdev->dev, "no irq ID is specified.\n");
		goto ret;
	} else
		tscadc->irq = err;

	res = devm_request_mem_region(&pdev->dev,
			res->start, resource_size(res), pdev->name);
	if (!res) {
		dev_err(&pdev->dev, "failed to reserve registers.\n");
		return -EBUSY;
	}

	tscadc->tscadc_base = devm_ioremap(&pdev->dev,
			res->start, resource_size(res));
	if (!tscadc->tscadc_base) {
		dev_err(&pdev->dev, "failed to map registers.\n");
		return -ENOMEM;
	}

	tscadc->regmap_tscadc = devm_regmap_init_mmio(&pdev->dev,
			tscadc->tscadc_base, &tscadc_regmap_config);
	if (IS_ERR(tscadc->regmap_tscadc)) {
		dev_err(&pdev->dev, "regmap init failed\n");
		err = PTR_ERR(tscadc->regmap_tscadc);
		goto ret;
	}

	spin_lock_init(&tscadc->reg_lock);
	pm_runtime_enable(&pdev->dev);
	pm_runtime_get_sync(&pdev->dev);

	/*
	 * The TSC_ADC_Subsystem has 2 clock domains
	 * OCP_CLK and ADC_CLK.
	 * The ADC clock is expected to run at target of 3MHz,
	 * and expected to capture 12-bit data at a rate of 200 KSPS.
	 * The TSC_ADC_SS controller design assumes the OCP clock is
	 * at least 6x faster than the ADC clock.
	 */
	clk = clk_get(&pdev->dev, "adc_tsc_fck");
	if (IS_ERR(clk)) {
		dev_err(&pdev->dev, "failed to get TSC fck\n");
		err = PTR_ERR(clk);
		goto err_disable_clk;
	}
	clock_rate = clk_get_rate(clk);
	clk_put(clk);
	clk_value = clock_rate / ADC_CLK;
	if (clk_value < MAX_CLK_DIV) {
		dev_err(&pdev->dev, "clock input less than min clock requirement\n");
		err = -EINVAL;
		goto err_disable_clk;
	}
	/* TSCADC_CLKDIV needs to be configured to the value minus 1 */
	clk_value = clk_value - 1;
	tscadc_writel(tscadc, REG_CLKDIV, clk_value);

	/* Set the control register bits */
	ctrl = CNTRLREG_STEPCONFIGWRT |
			CNTRLREG_TSCENB |
			CNTRLREG_STEPID |
			CNTRLREG_4WIRE;
	tscadc_writel(tscadc, REG_CTRL, ctrl);

	/* Set register bits for Idle Config Mode */
	tscadc_idle_config(tscadc);

	/* Enable the TSC module enable bit */
	ctrl = tscadc_readl(tscadc, REG_CTRL);
	ctrl |= CNTRLREG_TSCSSENB;
	tscadc_writel(tscadc, REG_CTRL, ctrl);

	tscadc->used_cells = 0;
	tscadc->tsc_cell = -1;
	tscadc->adc_cell = -1;

	/* TSC Cell */
	if (tsc_wires > 0) {
		tscadc->tsc_cell = tscadc->used_cells;
		cell = &tscadc->cells[tscadc->used_cells++];
		cell->name = "tsc";
		cell->of_compatible = "ti,am3359-tsc";
		cell->platform_data = &tscadc;
		cell->pdata_size = sizeof(tscadc);
	}

	/* ADC Cell */
	if (adc_channels > 0) {
		tscadc->adc_cell = tscadc->used_cells;
		cell = &tscadc->cells[tscadc->used_cells++];
		cell->name = "tiadc";
		cell->of_compatible = "ti,am3359-adc";
		cell->platform_data = &tscadc;
		cell->pdata_size = sizeof(tscadc);
	}

	err = mfd_add_devices(&pdev->dev, pdev->id, tscadc->cells,
			tscadc->used_cells, NULL, 0, NULL);
	if (err < 0)
		goto err_disable_clk;

	device_init_wakeup(&pdev->dev, true);
	platform_set_drvdata(pdev, tscadc);
	return 0;

err_disable_clk:
	pm_runtime_put_sync(&pdev->dev);
	pm_runtime_disable(&pdev->dev);
ret:
	return err;
}

static int ti_tscadc_remove(struct platform_device *pdev)
{
	struct ti_tscadc_dev	*tscadc = platform_get_drvdata(pdev);

	tscadc_writel(tscadc, REG_SE, 0x00);

	pm_runtime_put_sync(&pdev->dev);
	pm_runtime_disable(&pdev->dev);

	mfd_remove_devices(tscadc->dev);

	return 0;
}

#ifdef CONFIG_PM
static int tscadc_suspend(struct device *dev)
{
	struct ti_tscadc_dev	*tscadc_dev = dev_get_drvdata(dev);

	tscadc_writel(tscadc_dev, REG_SE, 0x00);
	pm_runtime_put_sync(dev);

	return 0;
}

static int tscadc_resume(struct device *dev)
{
	struct ti_tscadc_dev	*tscadc_dev = dev_get_drvdata(dev);
	unsigned int restore, ctrl;

	pm_runtime_get_sync(dev);

	/* context restore */
	ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_TSCENB |
			CNTRLREG_STEPID | CNTRLREG_4WIRE;
	tscadc_writel(tscadc_dev, REG_CTRL, ctrl);
	tscadc_idle_config(tscadc_dev);
	am335x_tsc_se_update(tscadc_dev);
	restore = tscadc_readl(tscadc_dev, REG_CTRL);
	tscadc_writel(tscadc_dev, REG_CTRL,
			(restore | CNTRLREG_TSCSSENB));

	return 0;
}

static const struct dev_pm_ops tscadc_pm_ops = {
	.suspend = tscadc_suspend,
	.resume = tscadc_resume,
};
#define TSCADC_PM_OPS (&tscadc_pm_ops)
#else
#define TSCADC_PM_OPS NULL
#endif

static const struct of_device_id ti_tscadc_dt_ids[] = {
	{ .compatible = "ti,am3359-tscadc", },
	{ }
};
MODULE_DEVICE_TABLE(of, ti_tscadc_dt_ids);

static struct platform_driver ti_tscadc_driver = {
	.driver = {
		.name   = "ti_am3359-tscadc",
		.owner	= THIS_MODULE,
		.pm	= TSCADC_PM_OPS,
		.of_match_table = of_match_ptr(ti_tscadc_dt_ids),
	},
	.probe	= ti_tscadc_probe,
	.remove	= ti_tscadc_remove,

};

module_platform_driver(ti_tscadc_driver);

MODULE_DESCRIPTION("TI touchscreen / ADC MFD controller driver");
MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
MODULE_LICENSE("GPL");
Commit	Line	Data
01636eb9 PR	1	/*
	2	* TI Touch Screen / ADC MFD driver
	3	*
	4	* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License as
	8	* published by the Free Software Foundation version 2.
	9	*
	10	* This program is distributed "as is" WITHOUT ANY WARRANTY of any
	11	* kind, whether express or implied; without even the implied warranty
	12	* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	* GNU General Public License for more details.
	14	*/
	15
	16	#include <linux/module.h>
	17	#include <linux/init.h>
	18	#include <linux/slab.h>
	19	#include <linux/err.h>
	20	#include <linux/io.h>
	21	#include <linux/clk.h>
	22	#include <linux/regmap.h>
	23	#include <linux/mfd/core.h>
	24	#include <linux/pm_runtime.h>
a6543a1c PR	25	#include <linux/of.h>
a6543a1c PR	26	#include <linux/of_device.h>
01636eb9 PR	27
	28	#include <linux/mfd/ti_am335x_tscadc.h>
	29
	30	static unsigned int tscadc_readl(struct ti_tscadc_dev *tsadc, unsigned int reg)
	31	{
	32	unsigned int val;
	33
	34	regmap_read(tsadc->regmap_tscadc, reg, &val);
	35	return val;
	36	}
	37
	38	static void tscadc_writel(struct ti_tscadc_dev *tsadc, unsigned int reg,
	39	unsigned int val)
	40	{
	41	regmap_write(tsadc->regmap_tscadc, reg, val);
	42	}
	43
	44	static const struct regmap_config tscadc_regmap_config = {
	45	.name = "ti_tscadc",
	46	.reg_bits = 32,
	47	.reg_stride = 4,
	48	.val_bits = 32,
	49	};
	50
abeccee4 PR	51	void am335x_tsc_se_update(struct ti_tscadc_dev *tsadc)
	52	{
	53	tscadc_writel(tsadc, REG_SE, tsadc->reg_se_cache);
	54	}
	55	EXPORT_SYMBOL_GPL(am335x_tsc_se_update);
	56
	57	void am335x_tsc_se_set(struct ti_tscadc_dev *tsadc, u32 val)
	58	{
	59	spin_lock(&tsadc->reg_lock);
	60	tsadc->reg_se_cache \|= val;
	61	spin_unlock(&tsadc->reg_lock);
	62
	63	am335x_tsc_se_update(tsadc);
	64	}
	65	EXPORT_SYMBOL_GPL(am335x_tsc_se_set);
	66
	67	void am335x_tsc_se_clr(struct ti_tscadc_dev *tsadc, u32 val)
	68	{
	69	spin_lock(&tsadc->reg_lock);
	70	tsadc->reg_se_cache &= ~val;
	71	spin_unlock(&tsadc->reg_lock);
	72
	73	am335x_tsc_se_update(tsadc);
	74	}
	75	EXPORT_SYMBOL_GPL(am335x_tsc_se_clr);
	76
01636eb9 PR	77	static void tscadc_idle_config(struct ti_tscadc_dev *config)
	78	{
	79	unsigned int idleconfig;
	80
	81	idleconfig = STEPCONFIG_YNN \| STEPCONFIG_INM_ADCREFM \|
	82	STEPCONFIG_INP_ADCREFM \| STEPCONFIG_YPN;
	83
	84	tscadc_writel(config, REG_IDLECONFIG, idleconfig);
	85	}
	86
612b95cd	87	static int ti_tscadc_probe(struct platform_device *pdev)
01636eb9 PR	88	{
	89	struct ti_tscadc_dev *tscadc;
	90	struct resource *res;
	91	struct clk *clk;
a6543a1c	92	struct device_node *node = pdev->dev.of_node;
2b99bafa	93	struct mfd_cell *cell;
01636eb9 PR	94	int err, ctrl;
01636eb9 PR	95	int clk_value, clock_rate;
a6543a1c	96	int tsc_wires = 0, adc_channels = 0, total_channels;
01636eb9	97
9e5775f3 SAS	98	if (!pdev->dev.of_node) {
9e5775f3 SAS	99	dev_err(&pdev->dev, "Could not find valid DT data.\n");
01636eb9 PR	100	return -EINVAL;
	101	}
	102
9e5775f3 SAS	103	node = of_get_child_by_name(pdev->dev.of_node, "tsc");
9e5775f3 SAS	104	of_property_read_u32(node, "ti,wires", &tsc_wires);
a6543a1c	105
9e5775f3 SAS	106	node = of_get_child_by_name(pdev->dev.of_node, "adc");
9e5775f3 SAS	107	of_property_read_u32(node, "ti,adc-channels", &adc_channels);
5e53a69b	108
5e53a69b	109	total_channels = tsc_wires + adc_channels;
5e53a69b PR	110	if (total_channels > 8) {
	111	dev_err(&pdev->dev, "Number of i/p channels more than 8\n");
	112	return -EINVAL;
	113	}
24d5c82f PA	114	if (total_channels == 0) {
	115	dev_err(&pdev->dev, "Need atleast one channel.\n");
	116	return -EINVAL;
	117	}
2b99bafa	118
01636eb9 PR	119	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	120	if (!res) {
	121	dev_err(&pdev->dev, "no memory resource defined.\n");
	122	return -EINVAL;
	123	}
	124
01636eb9 PR	125	/* Allocate memory for device */
	126	tscadc = devm_kzalloc(&pdev->dev,
	127	sizeof(struct ti_tscadc_dev), GFP_KERNEL);
	128	if (!tscadc) {
	129	dev_err(&pdev->dev, "failed to allocate memory.\n");
	130	return -ENOMEM;
	131	}
	132	tscadc->dev = &pdev->dev;
3c39c9c6 PR	133
	134	err = platform_get_irq(pdev, 0);
	135	if (err < 0) {
	136	dev_err(&pdev->dev, "no irq ID is specified.\n");
	137	goto ret;
	138	} else
	139	tscadc->irq = err;
01636eb9 PR	140
	141	res = devm_request_mem_region(&pdev->dev,
	142	res->start, resource_size(res), pdev->name);
	143	if (!res) {
	144	dev_err(&pdev->dev, "failed to reserve registers.\n");
3c39c9c6	145	return -EBUSY;
01636eb9 PR	146	}
	147
	148	tscadc->tscadc_base = devm_ioremap(&pdev->dev,
	149	res->start, resource_size(res));
	150	if (!tscadc->tscadc_base) {
	151	dev_err(&pdev->dev, "failed to map registers.\n");
3c39c9c6	152	return -ENOMEM;
01636eb9 PR	153	}
	154
	155	tscadc->regmap_tscadc = devm_regmap_init_mmio(&pdev->dev,
	156	tscadc->tscadc_base, &tscadc_regmap_config);
	157	if (IS_ERR(tscadc->regmap_tscadc)) {
	158	dev_err(&pdev->dev, "regmap init failed\n");
	159	err = PTR_ERR(tscadc->regmap_tscadc);
3c39c9c6	160	goto ret;
01636eb9 PR	161	}
01636eb9 PR	162
abeccee4	163	spin_lock_init(&tscadc->reg_lock);
01636eb9 PR	164	pm_runtime_enable(&pdev->dev);
	165	pm_runtime_get_sync(&pdev->dev);
	166
	167	/*
	168	* The TSC_ADC_Subsystem has 2 clock domains
	169	* OCP_CLK and ADC_CLK.
	170	* The ADC clock is expected to run at target of 3MHz,
	171	* and expected to capture 12-bit data at a rate of 200 KSPS.
	172	* The TSC_ADC_SS controller design assumes the OCP clock is
	173	* at least 6x faster than the ADC clock.
	174	*/
	175	clk = clk_get(&pdev->dev, "adc_tsc_fck");
	176	if (IS_ERR(clk)) {
	177	dev_err(&pdev->dev, "failed to get TSC fck\n");
	178	err = PTR_ERR(clk);
	179	goto err_disable_clk;
	180	}
	181	clock_rate = clk_get_rate(clk);
	182	clk_put(clk);
	183	clk_value = clock_rate / ADC_CLK;
	184	if (clk_value < MAX_CLK_DIV) {
	185	dev_err(&pdev->dev, "clock input less than min clock requirement\n");
	186	err = -EINVAL;
	187	goto err_disable_clk;
	188	}
	189	/* TSCADC_CLKDIV needs to be configured to the value minus 1 */
	190	clk_value = clk_value - 1;
	191	tscadc_writel(tscadc, REG_CLKDIV, clk_value);
	192
	193	/* Set the control register bits */
	194	ctrl = CNTRLREG_STEPCONFIGWRT \|
	195	CNTRLREG_TSCENB \|
	196	CNTRLREG_STEPID \|
	197	CNTRLREG_4WIRE;
	198	tscadc_writel(tscadc, REG_CTRL, ctrl);
	199
	200	/* Set register bits for Idle Config Mode */
	201	tscadc_idle_config(tscadc);
	202
	203	/* Enable the TSC module enable bit */
	204	ctrl = tscadc_readl(tscadc, REG_CTRL);
	205	ctrl \|= CNTRLREG_TSCSSENB;
	206	tscadc_writel(tscadc, REG_CTRL, ctrl);
	207
24d5c82f PA	208	tscadc->used_cells = 0;
	209	tscadc->tsc_cell = -1;
	210	tscadc->adc_cell = -1;
	211
2b99bafa	212	/* TSC Cell */
24d5c82f PA	213	if (tsc_wires > 0) {
	214	tscadc->tsc_cell = tscadc->used_cells;
	215	cell = &tscadc->cells[tscadc->used_cells++];
	216	cell->name = "tsc";
	217	cell->of_compatible = "ti,am3359-tsc";
	218	cell->platform_data = &tscadc;
	219	cell->pdata_size = sizeof(tscadc);
	220	}
2b99bafa	221
5e53a69b	222	/* ADC Cell */
24d5c82f PA	223	if (adc_channels > 0) {
	224	tscadc->adc_cell = tscadc->used_cells;
	225	cell = &tscadc->cells[tscadc->used_cells++];
	226	cell->name = "tiadc";
	227	cell->of_compatible = "ti,am3359-adc";
	228	cell->platform_data = &tscadc;
	229	cell->pdata_size = sizeof(tscadc);
	230	}
5e53a69b	231
01636eb9	232	err = mfd_add_devices(&pdev->dev, pdev->id, tscadc->cells,
24d5c82f	233	tscadc->used_cells, NULL, 0, NULL);
01636eb9 PR	234	if (err < 0)
	235	goto err_disable_clk;
	236
	237	device_init_wakeup(&pdev->dev, true);
	238	platform_set_drvdata(pdev, tscadc);
01636eb9 PR	239	return 0;
	240
	241	err_disable_clk:
	242	pm_runtime_put_sync(&pdev->dev);
	243	pm_runtime_disable(&pdev->dev);
3c39c9c6	244	ret:
01636eb9 PR	245	return err;
	246	}
	247
612b95cd	248	static int ti_tscadc_remove(struct platform_device *pdev)
01636eb9 PR	249	{
	250	struct ti_tscadc_dev *tscadc = platform_get_drvdata(pdev);
	251
	252	tscadc_writel(tscadc, REG_SE, 0x00);
	253
	254	pm_runtime_put_sync(&pdev->dev);
	255	pm_runtime_disable(&pdev->dev);
	256
	257	mfd_remove_devices(tscadc->dev);
	258
	259	return 0;
	260	}
	261
	262	#ifdef CONFIG_PM
	263	static int tscadc_suspend(struct device *dev)
	264	{
	265	struct ti_tscadc_dev *tscadc_dev = dev_get_drvdata(dev);
	266
	267	tscadc_writel(tscadc_dev, REG_SE, 0x00);
	268	pm_runtime_put_sync(dev);
	269
	270	return 0;
	271	}
	272
	273	static int tscadc_resume(struct device *dev)
	274	{
	275	struct ti_tscadc_dev *tscadc_dev = dev_get_drvdata(dev);
	276	unsigned int restore, ctrl;
	277
	278	pm_runtime_get_sync(dev);
	279
	280	/* context restore */
	281	ctrl = CNTRLREG_STEPCONFIGWRT \| CNTRLREG_TSCENB \|
	282	CNTRLREG_STEPID \| CNTRLREG_4WIRE;
	283	tscadc_writel(tscadc_dev, REG_CTRL, ctrl);
	284	tscadc_idle_config(tscadc_dev);
abeccee4	285	am335x_tsc_se_update(tscadc_dev);
01636eb9 PR	286	restore = tscadc_readl(tscadc_dev, REG_CTRL);
	287	tscadc_writel(tscadc_dev, REG_CTRL,
	288	(restore \| CNTRLREG_TSCSSENB));
	289
	290	return 0;
	291	}
	292
	293	static const struct dev_pm_ops tscadc_pm_ops = {
	294	.suspend = tscadc_suspend,
	295	.resume = tscadc_resume,
	296	};
	297	#define TSCADC_PM_OPS (&tscadc_pm_ops)
	298	#else
	299	#define TSCADC_PM_OPS NULL
	300	#endif
	301
a6543a1c PR	302	static const struct of_device_id ti_tscadc_dt_ids[] = {
	303	{ .compatible = "ti,am3359-tscadc", },
	304	{ }
	305	};
	306	MODULE_DEVICE_TABLE(of, ti_tscadc_dt_ids);
	307
01636eb9 PR	308	static struct platform_driver ti_tscadc_driver = {
01636eb9 PR	309	.driver = {
a6543a1c	310	.name = "ti_am3359-tscadc",
01636eb9 PR	311	.owner = THIS_MODULE,
01636eb9 PR	312	.pm = TSCADC_PM_OPS,
a6543a1c	313	.of_match_table = of_match_ptr(ti_tscadc_dt_ids),
01636eb9 PR	314	},
01636eb9 PR	315	.probe = ti_tscadc_probe,
612b95cd	316	.remove = ti_tscadc_remove,
01636eb9 PR	317
	318	};
	319
	320	module_platform_driver(ti_tscadc_driver);
	321
	322	MODULE_DESCRIPTION("TI touchscreen / ADC MFD controller driver");
	323	MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
	324	MODULE_LICENSE("GPL");