[linux-2.6-block.git] / drivers / mfd / ti_am335x_tscadc.c

/*
 * TI Touch Screen / ADC MFD driver
 *
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation version 2.
 *
 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
 * kind, whether express or implied; without even the implied warranty
 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/regmap.h>
#include <linux/mfd/core.h>
#include <linux/pm_runtime.h>

#include <linux/mfd/ti_am335x_tscadc.h>
#include <linux/input/ti_am335x_tsc.h>
#include <linux/platform_data/ti_am335x_adc.h>

static unsigned int tscadc_readl(struct ti_tscadc_dev *tsadc, unsigned int reg)
{
	unsigned int val;

	regmap_read(tsadc->regmap_tscadc, reg, &val);
	return val;
}

static void tscadc_writel(struct ti_tscadc_dev *tsadc, unsigned int reg,
					unsigned int val)
{
	regmap_write(tsadc->regmap_tscadc, reg, val);
}

static const struct regmap_config tscadc_regmap_config = {
	.name = "ti_tscadc",
	.reg_bits = 32,
	.reg_stride = 4,
	.val_bits = 32,
};

void am335x_tsc_se_update(struct ti_tscadc_dev *tsadc)
{
	tscadc_writel(tsadc, REG_SE, tsadc->reg_se_cache);
}
EXPORT_SYMBOL_GPL(am335x_tsc_se_update);

void am335x_tsc_se_set(struct ti_tscadc_dev *tsadc, u32 val)
{
	spin_lock(&tsadc->reg_lock);
	tsadc->reg_se_cache |= val;
	spin_unlock(&tsadc->reg_lock);

	am335x_tsc_se_update(tsadc);
}
EXPORT_SYMBOL_GPL(am335x_tsc_se_set);

void am335x_tsc_se_clr(struct ti_tscadc_dev *tsadc, u32 val)
{
	spin_lock(&tsadc->reg_lock);
	tsadc->reg_se_cache &= ~val;
	spin_unlock(&tsadc->reg_lock);

	am335x_tsc_se_update(tsadc);
}
EXPORT_SYMBOL_GPL(am335x_tsc_se_clr);

static void tscadc_idle_config(struct ti_tscadc_dev *config)
{
	unsigned int idleconfig;

	idleconfig = STEPCONFIG_YNN | STEPCONFIG_INM_ADCREFM |
			STEPCONFIG_INP_ADCREFM | STEPCONFIG_YPN;

	tscadc_writel(config, REG_IDLECONFIG, idleconfig);
}

static	int ti_tscadc_probe(struct platform_device *pdev)
{
	struct ti_tscadc_dev	*tscadc;
	struct resource		*res;
	struct clk		*clk;
	struct mfd_tscadc_board	*pdata = pdev->dev.platform_data;
	struct mfd_cell		*cell;
	int			err, ctrl;
	int			clk_value, clock_rate;
	int			tsc_wires, adc_channels = 0, total_channels;

	if (!pdata) {
		dev_err(&pdev->dev, "Could not find platform data\n");
		return -EINVAL;
	}

	if (pdata->adc_init)
		adc_channels = pdata->adc_init->adc_channels;

	tsc_wires = pdata->tsc_init->wires;
	total_channels = tsc_wires + adc_channels;

	if (total_channels > 8) {
		dev_err(&pdev->dev, "Number of i/p channels more than 8\n");
		return -EINVAL;
	}

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!res) {
		dev_err(&pdev->dev, "no memory resource defined.\n");
		return -EINVAL;
	}

	/* Allocate memory for device */
	tscadc = devm_kzalloc(&pdev->dev,
			sizeof(struct ti_tscadc_dev), GFP_KERNEL);
	if (!tscadc) {
		dev_err(&pdev->dev, "failed to allocate memory.\n");
		return -ENOMEM;
	}
	tscadc->dev = &pdev->dev;

	err = platform_get_irq(pdev, 0);
	if (err < 0) {
		dev_err(&pdev->dev, "no irq ID is specified.\n");
		goto ret;
	} else
		tscadc->irq = err;

	res = devm_request_mem_region(&pdev->dev,
			res->start, resource_size(res), pdev->name);
	if (!res) {
		dev_err(&pdev->dev, "failed to reserve registers.\n");
		return -EBUSY;
	}

	tscadc->tscadc_base = devm_ioremap(&pdev->dev,
			res->start, resource_size(res));
	if (!tscadc->tscadc_base) {
		dev_err(&pdev->dev, "failed to map registers.\n");
		return -ENOMEM;
	}

	tscadc->regmap_tscadc = devm_regmap_init_mmio(&pdev->dev,
			tscadc->tscadc_base, &tscadc_regmap_config);
	if (IS_ERR(tscadc->regmap_tscadc)) {
		dev_err(&pdev->dev, "regmap init failed\n");
		err = PTR_ERR(tscadc->regmap_tscadc);
		goto ret;
	}

	spin_lock_init(&tscadc->reg_lock);
	pm_runtime_enable(&pdev->dev);
	pm_runtime_get_sync(&pdev->dev);

	/*
	 * The TSC_ADC_Subsystem has 2 clock domains
	 * OCP_CLK and ADC_CLK.
	 * The ADC clock is expected to run at target of 3MHz,
	 * and expected to capture 12-bit data at a rate of 200 KSPS.
	 * The TSC_ADC_SS controller design assumes the OCP clock is
	 * at least 6x faster than the ADC clock.
	 */
	clk = clk_get(&pdev->dev, "adc_tsc_fck");
	if (IS_ERR(clk)) {
		dev_err(&pdev->dev, "failed to get TSC fck\n");
		err = PTR_ERR(clk);
		goto err_disable_clk;
	}
	clock_rate = clk_get_rate(clk);
	clk_put(clk);
	clk_value = clock_rate / ADC_CLK;
	if (clk_value < MAX_CLK_DIV) {
		dev_err(&pdev->dev, "clock input less than min clock requirement\n");
		err = -EINVAL;
		goto err_disable_clk;
	}
	/* TSCADC_CLKDIV needs to be configured to the value minus 1 */
	clk_value = clk_value - 1;
	tscadc_writel(tscadc, REG_CLKDIV, clk_value);

	/* Set the control register bits */
	ctrl = CNTRLREG_STEPCONFIGWRT |
			CNTRLREG_TSCENB |
			CNTRLREG_STEPID |
			CNTRLREG_4WIRE;
	tscadc_writel(tscadc, REG_CTRL, ctrl);

	/* Set register bits for Idle Config Mode */
	tscadc_idle_config(tscadc);

	/* Enable the TSC module enable bit */
	ctrl = tscadc_readl(tscadc, REG_CTRL);
	ctrl |= CNTRLREG_TSCSSENB;
	tscadc_writel(tscadc, REG_CTRL, ctrl);

	/* TSC Cell */
	cell = &tscadc->cells[TSC_CELL];
	cell->name = "tsc";
	cell->of_compatible = "ti,am3359-tsc";
	cell->platform_data = &tscadc;
	cell->pdata_size = sizeof(tscadc);

	/* ADC Cell */
	cell = &tscadc->cells[ADC_CELL];
	cell->name = "tiadc";
	cell->of_compatible = "ti,am3359-adc";
	cell->platform_data = &tscadc;
	cell->pdata_size = sizeof(tscadc);

	err = mfd_add_devices(&pdev->dev, pdev->id, tscadc->cells,
			TSCADC_CELLS, NULL, 0, NULL);
	if (err < 0)
		goto err_disable_clk;

	device_init_wakeup(&pdev->dev, true);
	platform_set_drvdata(pdev, tscadc);

	return 0;

err_disable_clk:
	pm_runtime_put_sync(&pdev->dev);
	pm_runtime_disable(&pdev->dev);
ret:
	return err;
}

static int ti_tscadc_remove(struct platform_device *pdev)
{
	struct ti_tscadc_dev	*tscadc = platform_get_drvdata(pdev);

	tscadc_writel(tscadc, REG_SE, 0x00);

	pm_runtime_put_sync(&pdev->dev);
	pm_runtime_disable(&pdev->dev);

	mfd_remove_devices(tscadc->dev);

	return 0;
}

#ifdef CONFIG_PM
static int tscadc_suspend(struct device *dev)
{
	struct ti_tscadc_dev	*tscadc_dev = dev_get_drvdata(dev);

	tscadc_writel(tscadc_dev, REG_SE, 0x00);
	pm_runtime_put_sync(dev);

	return 0;
}

static int tscadc_resume(struct device *dev)
{
	struct ti_tscadc_dev	*tscadc_dev = dev_get_drvdata(dev);
	unsigned int restore, ctrl;

	pm_runtime_get_sync(dev);

	/* context restore */
	ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_TSCENB |
			CNTRLREG_STEPID | CNTRLREG_4WIRE;
	tscadc_writel(tscadc_dev, REG_CTRL, ctrl);
	tscadc_idle_config(tscadc_dev);
	am335x_tsc_se_update(tscadc_dev);
	restore = tscadc_readl(tscadc_dev, REG_CTRL);
	tscadc_writel(tscadc_dev, REG_CTRL,
			(restore | CNTRLREG_TSCSSENB));

	return 0;
}

static const struct dev_pm_ops tscadc_pm_ops = {
	.suspend = tscadc_suspend,
	.resume = tscadc_resume,
};
#define TSCADC_PM_OPS (&tscadc_pm_ops)
#else
#define TSCADC_PM_OPS NULL
#endif

static struct platform_driver ti_tscadc_driver = {
	.driver = {
		.name   = "ti_tscadc",
		.owner	= THIS_MODULE,
		.pm	= TSCADC_PM_OPS,
	},
	.probe	= ti_tscadc_probe,
	.remove	= ti_tscadc_remove,

};

module_platform_driver(ti_tscadc_driver);

MODULE_DESCRIPTION("TI touchscreen / ADC MFD controller driver");
MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
MODULE_LICENSE("GPL");
Commit	Line	Data
01636eb9 PR	1	/*
	2	* TI Touch Screen / ADC MFD driver
	3	*
	4	* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License as
	8	* published by the Free Software Foundation version 2.
	9	*
	10	* This program is distributed "as is" WITHOUT ANY WARRANTY of any
	11	* kind, whether express or implied; without even the implied warranty
	12	* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	* GNU General Public License for more details.
	14	*/
	15
	16	#include <linux/module.h>
	17	#include <linux/init.h>
	18	#include <linux/slab.h>
	19	#include <linux/err.h>
	20	#include <linux/io.h>
	21	#include <linux/clk.h>
	22	#include <linux/regmap.h>
	23	#include <linux/mfd/core.h>
	24	#include <linux/pm_runtime.h>
	25
	26	#include <linux/mfd/ti_am335x_tscadc.h>
2b99bafa	27	#include <linux/input/ti_am335x_tsc.h>
5e53a69b	28	#include <linux/platform_data/ti_am335x_adc.h>
01636eb9 PR	29
	30	static unsigned int tscadc_readl(struct ti_tscadc_dev *tsadc, unsigned int reg)
	31	{
	32	unsigned int val;
	33
	34	regmap_read(tsadc->regmap_tscadc, reg, &val);
	35	return val;
	36	}
	37
	38	static void tscadc_writel(struct ti_tscadc_dev *tsadc, unsigned int reg,
	39	unsigned int val)
	40	{
	41	regmap_write(tsadc->regmap_tscadc, reg, val);
	42	}
	43
	44	static const struct regmap_config tscadc_regmap_config = {
	45	.name = "ti_tscadc",
	46	.reg_bits = 32,
	47	.reg_stride = 4,
	48	.val_bits = 32,
	49	};
	50
abeccee4 PR	51	void am335x_tsc_se_update(struct ti_tscadc_dev *tsadc)
	52	{
	53	tscadc_writel(tsadc, REG_SE, tsadc->reg_se_cache);
	54	}
	55	EXPORT_SYMBOL_GPL(am335x_tsc_se_update);
	56
	57	void am335x_tsc_se_set(struct ti_tscadc_dev *tsadc, u32 val)
	58	{
	59	spin_lock(&tsadc->reg_lock);
	60	tsadc->reg_se_cache \|= val;
	61	spin_unlock(&tsadc->reg_lock);
	62
	63	am335x_tsc_se_update(tsadc);
	64	}
	65	EXPORT_SYMBOL_GPL(am335x_tsc_se_set);
	66
	67	void am335x_tsc_se_clr(struct ti_tscadc_dev *tsadc, u32 val)
	68	{
	69	spin_lock(&tsadc->reg_lock);
	70	tsadc->reg_se_cache &= ~val;
	71	spin_unlock(&tsadc->reg_lock);
	72
	73	am335x_tsc_se_update(tsadc);
	74	}
	75	EXPORT_SYMBOL_GPL(am335x_tsc_se_clr);
	76
01636eb9 PR	77	static void tscadc_idle_config(struct ti_tscadc_dev *config)
	78	{
	79	unsigned int idleconfig;
	80
	81	idleconfig = STEPCONFIG_YNN \| STEPCONFIG_INM_ADCREFM \|
	82	STEPCONFIG_INP_ADCREFM \| STEPCONFIG_YPN;
	83
	84	tscadc_writel(config, REG_IDLECONFIG, idleconfig);
	85	}
	86
612b95cd	87	static int ti_tscadc_probe(struct platform_device *pdev)
01636eb9 PR	88	{
	89	struct ti_tscadc_dev *tscadc;
	90	struct resource *res;
	91	struct clk *clk;
	92	struct mfd_tscadc_board *pdata = pdev->dev.platform_data;
2b99bafa	93	struct mfd_cell *cell;
01636eb9 PR	94	int err, ctrl;
01636eb9 PR	95	int clk_value, clock_rate;
5e53a69b	96	int tsc_wires, adc_channels = 0, total_channels;
01636eb9 PR	97
	98	if (!pdata) {
	99	dev_err(&pdev->dev, "Could not find platform data\n");
	100	return -EINVAL;
	101	}
	102
5e53a69b PR	103	if (pdata->adc_init)
	104	adc_channels = pdata->adc_init->adc_channels;
	105
2b99bafa	106	tsc_wires = pdata->tsc_init->wires;
5e53a69b PR	107	total_channels = tsc_wires + adc_channels;
	108
	109	if (total_channels > 8) {
	110	dev_err(&pdev->dev, "Number of i/p channels more than 8\n");
	111	return -EINVAL;
	112	}
2b99bafa	113
01636eb9 PR	114	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	115	if (!res) {
	116	dev_err(&pdev->dev, "no memory resource defined.\n");
	117	return -EINVAL;
	118	}
	119
01636eb9 PR	120	/* Allocate memory for device */
	121	tscadc = devm_kzalloc(&pdev->dev,
	122	sizeof(struct ti_tscadc_dev), GFP_KERNEL);
	123	if (!tscadc) {
	124	dev_err(&pdev->dev, "failed to allocate memory.\n");
	125	return -ENOMEM;
	126	}
	127	tscadc->dev = &pdev->dev;
3c39c9c6 PR	128
	129	err = platform_get_irq(pdev, 0);
	130	if (err < 0) {
	131	dev_err(&pdev->dev, "no irq ID is specified.\n");
	132	goto ret;
	133	} else
	134	tscadc->irq = err;
01636eb9 PR	135
	136	res = devm_request_mem_region(&pdev->dev,
	137	res->start, resource_size(res), pdev->name);
	138	if (!res) {
	139	dev_err(&pdev->dev, "failed to reserve registers.\n");
3c39c9c6	140	return -EBUSY;
01636eb9 PR	141	}
	142
	143	tscadc->tscadc_base = devm_ioremap(&pdev->dev,
	144	res->start, resource_size(res));
	145	if (!tscadc->tscadc_base) {
	146	dev_err(&pdev->dev, "failed to map registers.\n");
3c39c9c6	147	return -ENOMEM;
01636eb9 PR	148	}
	149
	150	tscadc->regmap_tscadc = devm_regmap_init_mmio(&pdev->dev,
	151	tscadc->tscadc_base, &tscadc_regmap_config);
	152	if (IS_ERR(tscadc->regmap_tscadc)) {
	153	dev_err(&pdev->dev, "regmap init failed\n");
	154	err = PTR_ERR(tscadc->regmap_tscadc);
3c39c9c6	155	goto ret;
01636eb9 PR	156	}
01636eb9 PR	157
abeccee4	158	spin_lock_init(&tscadc->reg_lock);
01636eb9 PR	159	pm_runtime_enable(&pdev->dev);
	160	pm_runtime_get_sync(&pdev->dev);
	161
	162	/*
	163	* The TSC_ADC_Subsystem has 2 clock domains
	164	* OCP_CLK and ADC_CLK.
	165	* The ADC clock is expected to run at target of 3MHz,
	166	* and expected to capture 12-bit data at a rate of 200 KSPS.
	167	* The TSC_ADC_SS controller design assumes the OCP clock is
	168	* at least 6x faster than the ADC clock.
	169	*/
	170	clk = clk_get(&pdev->dev, "adc_tsc_fck");
	171	if (IS_ERR(clk)) {
	172	dev_err(&pdev->dev, "failed to get TSC fck\n");
	173	err = PTR_ERR(clk);
	174	goto err_disable_clk;
	175	}
	176	clock_rate = clk_get_rate(clk);
	177	clk_put(clk);
	178	clk_value = clock_rate / ADC_CLK;
	179	if (clk_value < MAX_CLK_DIV) {
	180	dev_err(&pdev->dev, "clock input less than min clock requirement\n");
	181	err = -EINVAL;
	182	goto err_disable_clk;
	183	}
	184	/* TSCADC_CLKDIV needs to be configured to the value minus 1 */
	185	clk_value = clk_value - 1;
	186	tscadc_writel(tscadc, REG_CLKDIV, clk_value);
	187
	188	/* Set the control register bits */
	189	ctrl = CNTRLREG_STEPCONFIGWRT \|
	190	CNTRLREG_TSCENB \|
	191	CNTRLREG_STEPID \|
	192	CNTRLREG_4WIRE;
	193	tscadc_writel(tscadc, REG_CTRL, ctrl);
	194
	195	/* Set register bits for Idle Config Mode */
	196	tscadc_idle_config(tscadc);
	197
	198	/* Enable the TSC module enable bit */
	199	ctrl = tscadc_readl(tscadc, REG_CTRL);
	200	ctrl \|= CNTRLREG_TSCSSENB;
	201	tscadc_writel(tscadc, REG_CTRL, ctrl);
	202
2b99bafa PR	203	/* TSC Cell */
	204	cell = &tscadc->cells[TSC_CELL];
	205	cell->name = "tsc";
0396310b	206	cell->of_compatible = "ti,am3359-tsc";
a9bce1b0 SAS	207	cell->platform_data = &tscadc;
a9bce1b0 SAS	208	cell->pdata_size = sizeof(tscadc);
2b99bafa	209
5e53a69b PR	210	/* ADC Cell */
	211	cell = &tscadc->cells[ADC_CELL];
	212	cell->name = "tiadc";
6f39ac4e	213	cell->of_compatible = "ti,am3359-adc";
a9bce1b0 SAS	214	cell->platform_data = &tscadc;
a9bce1b0 SAS	215	cell->pdata_size = sizeof(tscadc);
5e53a69b	216
01636eb9 PR	217	err = mfd_add_devices(&pdev->dev, pdev->id, tscadc->cells,
	218	TSCADC_CELLS, NULL, 0, NULL);
	219	if (err < 0)
	220	goto err_disable_clk;
	221
	222	device_init_wakeup(&pdev->dev, true);
	223	platform_set_drvdata(pdev, tscadc);
	224
	225	return 0;
	226
	227	err_disable_clk:
	228	pm_runtime_put_sync(&pdev->dev);
	229	pm_runtime_disable(&pdev->dev);
3c39c9c6	230	ret:
01636eb9 PR	231	return err;
	232	}
	233
612b95cd	234	static int ti_tscadc_remove(struct platform_device *pdev)
01636eb9 PR	235	{
	236	struct ti_tscadc_dev *tscadc = platform_get_drvdata(pdev);
	237
	238	tscadc_writel(tscadc, REG_SE, 0x00);
	239
	240	pm_runtime_put_sync(&pdev->dev);
	241	pm_runtime_disable(&pdev->dev);
	242
	243	mfd_remove_devices(tscadc->dev);
	244
	245	return 0;
	246	}
	247
	248	#ifdef CONFIG_PM
	249	static int tscadc_suspend(struct device *dev)
	250	{
	251	struct ti_tscadc_dev *tscadc_dev = dev_get_drvdata(dev);
	252
	253	tscadc_writel(tscadc_dev, REG_SE, 0x00);
	254	pm_runtime_put_sync(dev);
	255
	256	return 0;
	257	}
	258
	259	static int tscadc_resume(struct device *dev)
	260	{
	261	struct ti_tscadc_dev *tscadc_dev = dev_get_drvdata(dev);
	262	unsigned int restore, ctrl;
	263
	264	pm_runtime_get_sync(dev);
	265
	266	/* context restore */
	267	ctrl = CNTRLREG_STEPCONFIGWRT \| CNTRLREG_TSCENB \|
	268	CNTRLREG_STEPID \| CNTRLREG_4WIRE;
	269	tscadc_writel(tscadc_dev, REG_CTRL, ctrl);
	270	tscadc_idle_config(tscadc_dev);
abeccee4	271	am335x_tsc_se_update(tscadc_dev);
01636eb9 PR	272	restore = tscadc_readl(tscadc_dev, REG_CTRL);
	273	tscadc_writel(tscadc_dev, REG_CTRL,
	274	(restore \| CNTRLREG_TSCSSENB));
	275
	276	return 0;
	277	}
	278
	279	static const struct dev_pm_ops tscadc_pm_ops = {
	280	.suspend = tscadc_suspend,
	281	.resume = tscadc_resume,
	282	};
	283	#define TSCADC_PM_OPS (&tscadc_pm_ops)
	284	#else
	285	#define TSCADC_PM_OPS NULL
	286	#endif
	287
	288	static struct platform_driver ti_tscadc_driver = {
	289	.driver = {
	290	.name = "ti_tscadc",
	291	.owner = THIS_MODULE,
	292	.pm = TSCADC_PM_OPS,
	293	},
	294	.probe = ti_tscadc_probe,
612b95cd	295	.remove = ti_tscadc_remove,
01636eb9 PR	296
	297	};
	298
	299	module_platform_driver(ti_tscadc_driver);
	300
	301	MODULE_DESCRIPTION("TI touchscreen / ADC MFD controller driver");
	302	MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
	303	MODULE_LICENSE("GPL");