Merge tag 'vfs-6.9.ntfs' of git://git.kernel.org/pub/scm/linux/kernel/git/vfs/vfs
[linux-2.6-block.git] / drivers / mfd / ti_am335x_tscadc.c
CommitLineData
3bda759f 1// SPDX-License-Identifier: GPL-2.0-only
01636eb9
PR
2/*
3 * TI Touch Screen / ADC MFD driver
4 *
4f4ed454 5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
01636eb9
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6 */
7
8#include <linux/module.h>
01636eb9
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9#include <linux/slab.h>
10#include <linux/err.h>
11#include <linux/io.h>
12#include <linux/clk.h>
13#include <linux/regmap.h>
14#include <linux/mfd/core.h>
15#include <linux/pm_runtime.h>
a6543a1c 16#include <linux/of.h>
dc0c386e 17#include <linux/platform_device.h>
7ca6740c 18#include <linux/sched.h>
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19
20#include <linux/mfd/ti_am335x_tscadc.h>
21
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22static const struct regmap_config tscadc_regmap_config = {
23 .name = "ti_tscadc",
24 .reg_bits = 32,
25 .reg_stride = 4,
26 .val_bits = 32,
27};
28
a318b7d0 29void am335x_tsc_se_set_cache(struct ti_tscadc_dev *tscadc, u32 val)
abeccee4 30{
317b2099
SAS
31 unsigned long flags;
32
a318b7d0
AD
33 spin_lock_irqsave(&tscadc->reg_lock, flags);
34 tscadc->reg_se_cache |= val;
35 if (tscadc->adc_waiting)
36 wake_up(&tscadc->reg_se_wait);
37 else if (!tscadc->adc_in_use)
0d3a7cce 38 regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache);
7ca6740c 39
a318b7d0 40 spin_unlock_irqrestore(&tscadc->reg_lock, flags);
abeccee4 41}
7e170c6e
SAS
42EXPORT_SYMBOL_GPL(am335x_tsc_se_set_cache);
43
a318b7d0 44static void am335x_tscadc_need_adc(struct ti_tscadc_dev *tscadc)
7ca6740c
SAS
45{
46 DEFINE_WAIT(wait);
47 u32 reg;
48
0d3a7cce 49 regmap_read(tscadc->regmap, REG_ADCFSM, &reg);
7ca6740c 50 if (reg & SEQ_STATUS) {
a318b7d0
AD
51 tscadc->adc_waiting = true;
52 prepare_to_wait(&tscadc->reg_se_wait, &wait,
7ca6740c 53 TASK_UNINTERRUPTIBLE);
a318b7d0 54 spin_unlock_irq(&tscadc->reg_lock);
7ca6740c
SAS
55
56 schedule();
57
a318b7d0
AD
58 spin_lock_irq(&tscadc->reg_lock);
59 finish_wait(&tscadc->reg_se_wait, &wait);
7ca6740c 60
b10848e6
V
61 /*
62 * Sequencer should either be idle or
63 * busy applying the charge step.
64 */
0d3a7cce 65 regmap_read(tscadc->regmap, REG_ADCFSM, &reg);
b10848e6 66 WARN_ON((reg & SEQ_STATUS) && !(reg & CHARGE_STEP));
a318b7d0 67 tscadc->adc_waiting = false;
7ca6740c 68 }
a318b7d0 69 tscadc->adc_in_use = true;
7ca6740c
SAS
70}
71
a318b7d0 72void am335x_tsc_se_set_once(struct ti_tscadc_dev *tscadc, u32 val)
7ca6740c 73{
a318b7d0
AD
74 spin_lock_irq(&tscadc->reg_lock);
75 am335x_tscadc_need_adc(tscadc);
7ca6740c 76
0d3a7cce 77 regmap_write(tscadc->regmap, REG_SE, val);
a318b7d0 78 spin_unlock_irq(&tscadc->reg_lock);
7ca6740c
SAS
79}
80EXPORT_SYMBOL_GPL(am335x_tsc_se_set_once);
81
a318b7d0 82void am335x_tsc_se_adc_done(struct ti_tscadc_dev *tscadc)
7e170c6e
SAS
83{
84 unsigned long flags;
85
a318b7d0
AD
86 spin_lock_irqsave(&tscadc->reg_lock, flags);
87 tscadc->adc_in_use = false;
0d3a7cce 88 regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache);
a318b7d0 89 spin_unlock_irqrestore(&tscadc->reg_lock, flags);
7e170c6e 90}
7ca6740c 91EXPORT_SYMBOL_GPL(am335x_tsc_se_adc_done);
abeccee4 92
a318b7d0 93void am335x_tsc_se_clr(struct ti_tscadc_dev *tscadc, u32 val)
abeccee4 94{
317b2099
SAS
95 unsigned long flags;
96
a318b7d0
AD
97 spin_lock_irqsave(&tscadc->reg_lock, flags);
98 tscadc->reg_se_cache &= ~val;
0d3a7cce 99 regmap_write(tscadc->regmap, REG_SE, tscadc->reg_se_cache);
a318b7d0 100 spin_unlock_irqrestore(&tscadc->reg_lock, flags);
abeccee4
PR
101}
102EXPORT_SYMBOL_GPL(am335x_tsc_se_clr);
103
a318b7d0 104static void tscadc_idle_config(struct ti_tscadc_dev *tscadc)
01636eb9
PR
105{
106 unsigned int idleconfig;
107
bf0f394c
MR
108 idleconfig = STEPCONFIG_INM_ADCREFM | STEPCONFIG_INP_ADCREFM;
109 if (ti_adc_with_touchscreen(tscadc))
110 idleconfig |= STEPCONFIG_YNN | STEPCONFIG_YPN;
01636eb9 111
0d3a7cce 112 regmap_write(tscadc->regmap, REG_IDLECONFIG, idleconfig);
01636eb9
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113}
114
612b95cd 115static int ti_tscadc_probe(struct platform_device *pdev)
01636eb9 116{
36e48f07
MR
117 struct ti_tscadc_dev *tscadc;
118 struct resource *res;
119 struct clk *clk;
120 struct device_node *node;
121 struct mfd_cell *cell;
122 struct property *prop;
123 const __be32 *cur;
0a123303 124 bool use_tsc = false, use_mag = false;
36e48f07 125 u32 val;
b813f320 126 int err;
430b98fc 127 int tscmag_wires = 0, adc_channels = 0, cell_idx = 0, total_channels;
0a123303 128 int readouts = 0, mag_tracks = 0;
01636eb9 129
61479479
MR
130 /* Allocate memory for device */
131 tscadc = devm_kzalloc(&pdev->dev, sizeof(*tscadc), GFP_KERNEL);
132 if (!tscadc)
133 return -ENOMEM;
134
135 tscadc->dev = &pdev->dev;
136
9e5775f3
SAS
137 if (!pdev->dev.of_node) {
138 dev_err(&pdev->dev, "Could not find valid DT data.\n");
01636eb9
PR
139 return -EINVAL;
140 }
141
f7834843
MR
142 tscadc->data = of_device_get_match_data(&pdev->dev);
143
bf0f394c
MR
144 if (ti_adc_with_touchscreen(tscadc)) {
145 node = of_get_child_by_name(pdev->dev.of_node, "tsc");
146 of_property_read_u32(node, "ti,wires", &tscmag_wires);
90fc6ff4
MR
147 err = of_property_read_u32(node, "ti,coordinate-readouts",
148 &readouts);
149 if (err < 0)
150 of_property_read_u32(node, "ti,coordiante-readouts",
151 &readouts);
152
bf0f394c 153 of_node_put(node);
90fc6ff4 154
bf0f394c
MR
155 if (tscmag_wires)
156 use_tsc = true;
0a123303
MR
157 } else {
158 /*
159 * When adding support for the magnetic stripe reader, here is
160 * the place to look for the number of tracks used from device
161 * tree. Let's default to 0 for now.
162 */
163 mag_tracks = 0;
164 tscmag_wires = mag_tracks * 2;
165 if (tscmag_wires)
166 use_mag = true;
bf0f394c 167 }
a6543a1c 168
9e5775f3 169 node = of_get_child_by_name(pdev->dev.of_node, "adc");
18926ede
SAS
170 of_property_for_each_u32(node, "ti,adc-channels", prop, cur, val) {
171 adc_channels++;
172 if (val > 7) {
173 dev_err(&pdev->dev, " PIN numbers are 0..7 (not %d)\n",
243e3cb9 174 val);
29f95e8b 175 of_node_put(node);
18926ede
SAS
176 return -EINVAL;
177 }
178 }
29f95e8b
MR
179
180 of_node_put(node);
181
430b98fc 182 total_channels = tscmag_wires + adc_channels;
5e53a69b
PR
183 if (total_channels > 8) {
184 dev_err(&pdev->dev, "Number of i/p channels more than 8\n");
185 return -EINVAL;
186 }
243e3cb9 187
24d5c82f 188 if (total_channels == 0) {
ad70c03f 189 dev_err(&pdev->dev, "Need at least one channel.\n");
24d5c82f
PA
190 return -EINVAL;
191 }
2b99bafa 192
2a4e333a 193 if (use_tsc && (readouts * 2 + 2 + adc_channels > 16)) {
18926ede
SAS
194 dev_err(&pdev->dev, "Too many step configurations requested\n");
195 return -EINVAL;
196 }
197
3c39c9c6 198 err = platform_get_irq(pdev, 0);
bc239d8d 199 if (err < 0)
287ee127 200 return err;
bc239d8d 201 else
3c39c9c6 202 tscadc->irq = err;
01636eb9 203
07141cfe 204 tscadc->tscadc_base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
924ff918
JH
205 if (IS_ERR(tscadc->tscadc_base))
206 return PTR_ERR(tscadc->tscadc_base);
01636eb9 207
de98a43e 208 tscadc->tscadc_phys_base = res->start;
0d3a7cce 209 tscadc->regmap = devm_regmap_init_mmio(&pdev->dev,
243e3cb9
MR
210 tscadc->tscadc_base,
211 &tscadc_regmap_config);
0d3a7cce 212 if (IS_ERR(tscadc->regmap)) {
01636eb9 213 dev_err(&pdev->dev, "regmap init failed\n");
287ee127 214 return PTR_ERR(tscadc->regmap);
01636eb9
PR
215 }
216
abeccee4 217 spin_lock_init(&tscadc->reg_lock);
7ca6740c
SAS
218 init_waitqueue_head(&tscadc->reg_se_wait);
219
01636eb9
PR
220 pm_runtime_enable(&pdev->dev);
221 pm_runtime_get_sync(&pdev->dev);
222
223 /*
c4359f75
MR
224 * The TSC_ADC_Subsystem has 2 clock domains: OCP_CLK and ADC_CLK.
225 * ADCs produce a 12-bit sample every 15 ADC_CLK cycles.
226 * am33xx ADCs expect to capture 200ksps.
0a123303
MR
227 * am47xx ADCs expect to capture 867ksps.
228 * We need ADC clocks respectively running at 3MHz and 13MHz.
229 * These frequencies are valid since TSC_ADC_SS controller design
c4359f75 230 * assumes the OCP clock is at least 6x faster than the ADC clock.
01636eb9 231 */
235a96e9 232 clk = devm_clk_get(&pdev->dev, NULL);
01636eb9 233 if (IS_ERR(clk)) {
e40b5971 234 dev_err(&pdev->dev, "failed to get fck\n");
01636eb9
PR
235 err = PTR_ERR(clk);
236 goto err_disable_clk;
237 }
efe3126a 238
f7834843 239 tscadc->clk_div = (clk_get_rate(clk) / tscadc->data->target_clk_rate) - 1;
0d3a7cce 240 regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div);
01636eb9 241
b813f320
MR
242 /*
243 * Set the control register bits. tscadc->ctrl stores the configuration
244 * of the CTRL register but not the subsystem enable bit which must be
245 * added manually when timely.
246 */
bf0f394c
MR
247 tscadc->ctrl = CNTRLREG_STEPID;
248 if (ti_adc_with_touchscreen(tscadc)) {
249 tscadc->ctrl |= CNTRLREG_TSC_STEPCONFIGWRT;
250 if (use_tsc) {
251 tscadc->ctrl |= CNTRLREG_TSC_ENB;
252 if (tscmag_wires == 5)
253 tscadc->ctrl |= CNTRLREG_TSC_5WIRE;
254 else
255 tscadc->ctrl |= CNTRLREG_TSC_4WIRE;
256 }
0a123303
MR
257 } else {
258 tscadc->ctrl |= CNTRLREG_MAG_PREAMP_PWRDOWN |
259 CNTRLREG_MAG_PREAMP_BYPASS;
f0933a60 260 }
b813f320 261 regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl);
01636eb9 262
25b15d04
MR
263 tscadc_idle_config(tscadc);
264
01636eb9 265 /* Enable the TSC module enable bit */
c3e36b5d 266 regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl | CNTRLREG_SSENB);
01636eb9 267
0a123303
MR
268 /* TSC or MAG Cell */
269 if (use_tsc || use_mag) {
7c605802 270 cell = &tscadc->cells[cell_idx++];
f7834843
MR
271 cell->name = tscadc->data->secondary_feature_name;
272 cell->of_compatible = tscadc->data->secondary_feature_compatible;
24d5c82f
PA
273 cell->platform_data = &tscadc;
274 cell->pdata_size = sizeof(tscadc);
275 }
2b99bafa 276
5e53a69b 277 /* ADC Cell */
24d5c82f 278 if (adc_channels > 0) {
7c605802 279 cell = &tscadc->cells[cell_idx++];
f7834843
MR
280 cell->name = tscadc->data->adc_feature_name;
281 cell->of_compatible = tscadc->data->adc_feature_compatible;
24d5c82f
PA
282 cell->platform_data = &tscadc;
283 cell->pdata_size = sizeof(tscadc);
284 }
5e53a69b 285
b40ee006 286 err = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_AUTO,
7c605802 287 tscadc->cells, cell_idx, NULL, 0, NULL);
01636eb9
PR
288 if (err < 0)
289 goto err_disable_clk;
290
01636eb9 291 platform_set_drvdata(pdev, tscadc);
01636eb9
PR
292 return 0;
293
294err_disable_clk:
295 pm_runtime_put_sync(&pdev->dev);
296 pm_runtime_disable(&pdev->dev);
287ee127 297
01636eb9
PR
298 return err;
299}
300
740ad6d1 301static void ti_tscadc_remove(struct platform_device *pdev)
01636eb9 302{
36e48f07 303 struct ti_tscadc_dev *tscadc = platform_get_drvdata(pdev);
01636eb9 304
0d3a7cce 305 regmap_write(tscadc->regmap, REG_SE, 0x00);
01636eb9
PR
306
307 pm_runtime_put_sync(&pdev->dev);
308 pm_runtime_disable(&pdev->dev);
309
310 mfd_remove_devices(tscadc->dev);
01636eb9
PR
311}
312
c974ac77
V
313static int __maybe_unused ti_tscadc_can_wakeup(struct device *dev, void *data)
314{
315 return device_may_wakeup(dev);
316}
317
dae936a0 318static int __maybe_unused tscadc_suspend(struct device *dev)
01636eb9 319{
36e48f07 320 struct ti_tscadc_dev *tscadc = dev_get_drvdata(dev);
01636eb9 321
0d3a7cce 322 regmap_write(tscadc->regmap, REG_SE, 0x00);
c974ac77
V
323 if (device_for_each_child(dev, NULL, ti_tscadc_can_wakeup)) {
324 u32 ctrl;
325
326 regmap_read(tscadc->regmap, REG_CTRL, &ctrl);
327 ctrl &= ~(CNTRLREG_POWERDOWN);
c3e36b5d 328 ctrl |= CNTRLREG_SSENB;
c974ac77
V
329 regmap_write(tscadc->regmap, REG_CTRL, ctrl);
330 }
01636eb9
PR
331 pm_runtime_put_sync(dev);
332
333 return 0;
334}
335
dae936a0 336static int __maybe_unused tscadc_resume(struct device *dev)
01636eb9 337{
36e48f07 338 struct ti_tscadc_dev *tscadc = dev_get_drvdata(dev);
01636eb9
PR
339
340 pm_runtime_get_sync(dev);
341
3dafbe93 342 regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div);
b813f320 343 regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl);
25b15d04 344 tscadc_idle_config(tscadc);
c3e36b5d 345 regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl | CNTRLREG_SSENB);
01636eb9
PR
346
347 return 0;
348}
349
dae936a0 350static SIMPLE_DEV_PM_OPS(tscadc_pm_ops, tscadc_suspend, tscadc_resume);
01636eb9 351
f7834843
MR
352static const struct ti_tscadc_data tscdata = {
353 .adc_feature_name = "TI-am335x-adc",
354 .adc_feature_compatible = "ti,am3359-adc",
355 .secondary_feature_name = "TI-am335x-tsc",
356 .secondary_feature_compatible = "ti,am3359-tsc",
2f89c261 357 .target_clk_rate = TSC_ADC_CLK,
f7834843
MR
358};
359
0a123303
MR
360static const struct ti_tscadc_data magdata = {
361 .adc_feature_name = "TI-am43xx-adc",
362 .adc_feature_compatible = "ti,am4372-adc",
363 .secondary_feature_name = "TI-am43xx-mag",
364 .secondary_feature_compatible = "ti,am4372-mag",
365 .target_clk_rate = MAG_ADC_CLK,
366};
367
a6543a1c 368static const struct of_device_id ti_tscadc_dt_ids[] = {
f7834843 369 { .compatible = "ti,am3359-tscadc", .data = &tscdata },
0a123303 370 { .compatible = "ti,am4372-magadc", .data = &magdata },
a6543a1c
PR
371 { }
372};
373MODULE_DEVICE_TABLE(of, ti_tscadc_dt_ids);
374
01636eb9
PR
375static struct platform_driver ti_tscadc_driver = {
376 .driver = {
a6543a1c 377 .name = "ti_am3359-tscadc",
dae936a0 378 .pm = &tscadc_pm_ops,
131221bc 379 .of_match_table = ti_tscadc_dt_ids,
01636eb9
PR
380 },
381 .probe = ti_tscadc_probe,
740ad6d1 382 .remove_new = ti_tscadc_remove,
01636eb9
PR
383
384};
385
386module_platform_driver(ti_tscadc_driver);
387
0a123303 388MODULE_DESCRIPTION("TI touchscreen/magnetic stripe reader/ADC MFD controller driver");
01636eb9
PR
389MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
390MODULE_LICENSE("GPL");