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67d16a46 WW |
1 | /* Driver for Realtek PCI-Express card reader |
2 | * | |
09fd8678 | 3 | * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved. |
67d16a46 WW |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of the GNU General Public License as published by the | |
7 | * Free Software Foundation; either version 2, or (at your option) any | |
8 | * later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, but | |
11 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
13 | * General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License along | |
16 | * with this program; if not, see <http://www.gnu.org/licenses/>. | |
17 | * | |
18 | * Author: | |
19 | * Wei WANG <wei_wang@realsil.com.cn> | |
67d16a46 WW |
20 | */ |
21 | ||
22 | #ifndef __RTSX_PCR_H | |
23 | #define __RTSX_PCR_H | |
24 | ||
25 | #include <linux/mfd/rtsx_pci.h> | |
26 | ||
eebbe254 WW |
27 | #define MIN_DIV_N_PCR 80 |
28 | #define MAX_DIV_N_PCR 208 | |
29 | ||
663c425f MC |
30 | #define RTS524A_PME_FORCE_CTL 0xFF78 |
31 | #define RTS524A_PM_CTRL3 0xFF7E | |
32 | ||
33 | int __rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val); | |
34 | int __rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val); | |
35 | ||
67d16a46 WW |
36 | void rts5209_init_params(struct rtsx_pcr *pcr); |
37 | void rts5229_init_params(struct rtsx_pcr *pcr); | |
38 | void rtl8411_init_params(struct rtsx_pcr *pcr); | |
56cb3cc1 | 39 | void rtl8402_init_params(struct rtsx_pcr *pcr); |
e1237932 | 40 | void rts5227_init_params(struct rtsx_pcr *pcr); |
4c4b8c10 | 41 | void rts5249_init_params(struct rtsx_pcr *pcr); |
663c425f | 42 | void rts524a_init_params(struct rtsx_pcr *pcr); |
41bc2334 | 43 | void rts525a_init_params(struct rtsx_pcr *pcr); |
9032eabd | 44 | void rtl8411b_init_params(struct rtsx_pcr *pcr); |
67d16a46 | 45 | |
773ccdfd WW |
46 | static inline u8 map_sd_drive(int idx) |
47 | { | |
48 | u8 sd_drive[4] = { | |
49 | 0x01, /* Type D */ | |
50 | 0x02, /* Type C */ | |
51 | 0x05, /* Type A */ | |
52 | 0x03 /* Type B */ | |
53 | }; | |
54 | ||
55 | return sd_drive[idx]; | |
56 | } | |
57 | ||
58 | #define rtsx_vendor_setting_valid(reg) (!((reg) & 0x1000000)) | |
59 | #define rts5209_vendor_setting1_valid(reg) (!((reg) & 0x80)) | |
60 | #define rts5209_vendor_setting2_valid(reg) ((reg) & 0x80) | |
61 | ||
62 | #define rtsx_reg_to_aspm(reg) (((reg) >> 28) & 0x03) | |
63 | #define rtsx_reg_to_sd30_drive_sel_1v8(reg) (((reg) >> 26) & 0x03) | |
64 | #define rtsx_reg_to_sd30_drive_sel_3v3(reg) (((reg) >> 5) & 0x03) | |
65 | #define rtsx_reg_to_card_drive_sel(reg) ((((reg) >> 25) & 0x01) << 6) | |
66 | #define rtsx_reg_check_reverse_socket(reg) ((reg) & 0x4000) | |
67 | #define rts5209_reg_to_aspm(reg) (((reg) >> 5) & 0x03) | |
68 | #define rts5209_reg_check_ms_pmos(reg) (!((reg) & 0x08)) | |
69 | #define rts5209_reg_to_sd30_drive_sel_1v8(reg) (((reg) >> 3) & 0x07) | |
70 | #define rts5209_reg_to_sd30_drive_sel_3v3(reg) ((reg) & 0x07) | |
71 | #define rts5209_reg_to_card_drive_sel(reg) ((reg) >> 8) | |
72 | #define rtl8411_reg_to_sd30_drive_sel_3v3(reg) (((reg) >> 5) & 0x07) | |
73 | #define rtl8411b_reg_to_sd30_drive_sel_3v3(reg) ((reg) & 0x03) | |
74 | ||
0da14eeb MC |
75 | #define set_pull_ctrl_tables(pcr, __device) \ |
76 | do { \ | |
77 | pcr->sd_pull_ctl_enable_tbl = __device##_sd_pull_ctl_enable_tbl; \ | |
78 | pcr->sd_pull_ctl_disable_tbl = __device##_sd_pull_ctl_disable_tbl; \ | |
79 | pcr->ms_pull_ctl_enable_tbl = __device##_ms_pull_ctl_enable_tbl; \ | |
80 | pcr->ms_pull_ctl_disable_tbl = __device##_ms_pull_ctl_disable_tbl; \ | |
81 | } while (0) | |
82 | ||
5cb5d961 MC |
83 | /* generic operations */ |
84 | int rtsx_gops_pm_reset(struct rtsx_pcr *pcr); | |
85 | ||
67d16a46 | 86 | #endif |