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2025cf9e | 1 | // SPDX-License-Identifier: GPL-2.0-only |
f69a7cf7 | 2 | /* |
2eedcbfc | 3 | * MFD core driver for Rockchip RK808/RK818 |
f69a7cf7 CZ |
4 | * |
5 | * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd | |
6 | * | |
7 | * Author: Chris Zhong <zyw@rock-chips.com> | |
8 | * Author: Zhang Qing <zhangqing@rock-chips.com> | |
9 | * | |
2eedcbfc WE |
10 | * Copyright (C) 2016 PHYTEC Messtechnik GmbH |
11 | * | |
12 | * Author: Wadim Egorov <w.egorov@phytec.de> | |
f69a7cf7 CZ |
13 | */ |
14 | ||
15 | #include <linux/i2c.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/mfd/rk808.h> | |
18 | #include <linux/mfd/core.h> | |
19 | #include <linux/module.h> | |
2eedcbfc | 20 | #include <linux/of_device.h> |
f69a7cf7 | 21 | #include <linux/regmap.h> |
56f216d8 | 22 | #include <linux/reboot.h> |
f69a7cf7 CZ |
23 | |
24 | struct rk808_reg_data { | |
25 | int addr; | |
26 | int mask; | |
27 | int value; | |
28 | }; | |
29 | ||
2adb3b8e DA |
30 | static bool rk808_is_volatile_reg(struct device *dev, unsigned int reg) |
31 | { | |
32 | /* | |
33 | * Notes: | |
34 | * - Technically the ROUND_30s bit makes RTC_CTRL_REG volatile, but | |
35 | * we don't use that feature. It's better to cache. | |
36 | * - It's unlikely we care that RK808_DEVCTRL_REG is volatile since | |
37 | * bits are cleared in case when we shutoff anyway, but better safe. | |
38 | */ | |
39 | ||
40 | switch (reg) { | |
41 | case RK808_SECONDS_REG ... RK808_WEEKS_REG: | |
42 | case RK808_RTC_STATUS_REG: | |
43 | case RK808_VB_MON_REG: | |
44 | case RK808_THERMAL_REG: | |
45 | case RK808_DCDC_UV_STS_REG: | |
46 | case RK808_LDO_UV_STS_REG: | |
47 | case RK808_DCDC_PG_REG: | |
48 | case RK808_LDO_PG_REG: | |
49 | case RK808_DEVCTRL_REG: | |
50 | case RK808_INT_STS_REG1: | |
51 | case RK808_INT_STS_REG2: | |
52 | return true; | |
53 | } | |
54 | ||
55 | return false; | |
56 | } | |
57 | ||
586c1b41 TX |
58 | static bool rk817_is_volatile_reg(struct device *dev, unsigned int reg) |
59 | { | |
60 | /* | |
61 | * Notes: | |
62 | * - Technically the ROUND_30s bit makes RTC_CTRL_REG volatile, but | |
63 | * we don't use that feature. It's better to cache. | |
64 | */ | |
65 | ||
66 | switch (reg) { | |
67 | case RK817_SECONDS_REG ... RK817_WEEKS_REG: | |
68 | case RK817_RTC_STATUS_REG: | |
4a1c456a | 69 | case RK817_CODEC_DTOP_LPT_SRST: |
2d48bfca CM |
70 | case RK817_GAS_GAUGE_ADC_CONFIG0 ... RK817_GAS_GAUGE_CUR_ADC_K0: |
71 | case RK817_PMIC_CHRG_STS: | |
72 | case RK817_PMIC_CHRG_OUT: | |
73 | case RK817_PMIC_CHRG_IN: | |
586c1b41 TX |
74 | case RK817_INT_STS_REG0: |
75 | case RK817_INT_STS_REG1: | |
76 | case RK817_INT_STS_REG2: | |
77 | case RK817_SYS_STS: | |
78 | return true; | |
79 | } | |
80 | ||
2d48bfca | 81 | return false; |
586c1b41 TX |
82 | } |
83 | ||
2eedcbfc WE |
84 | static const struct regmap_config rk818_regmap_config = { |
85 | .reg_bits = 8, | |
86 | .val_bits = 8, | |
87 | .max_register = RK818_USB_CTRL_REG, | |
88 | .cache_type = REGCACHE_RBTREE, | |
89 | .volatile_reg = rk808_is_volatile_reg, | |
90 | }; | |
91 | ||
990f05f6 EZ |
92 | static const struct regmap_config rk805_regmap_config = { |
93 | .reg_bits = 8, | |
94 | .val_bits = 8, | |
95 | .max_register = RK805_OFF_SOURCE_REG, | |
96 | .cache_type = REGCACHE_RBTREE, | |
97 | .volatile_reg = rk808_is_volatile_reg, | |
98 | }; | |
99 | ||
f69a7cf7 CZ |
100 | static const struct regmap_config rk808_regmap_config = { |
101 | .reg_bits = 8, | |
102 | .val_bits = 8, | |
103 | .max_register = RK808_IO_POL_REG, | |
2adb3b8e DA |
104 | .cache_type = REGCACHE_RBTREE, |
105 | .volatile_reg = rk808_is_volatile_reg, | |
f69a7cf7 CZ |
106 | }; |
107 | ||
586c1b41 TX |
108 | static const struct regmap_config rk817_regmap_config = { |
109 | .reg_bits = 8, | |
110 | .val_bits = 8, | |
111 | .max_register = RK817_GPIO_INT_CFG, | |
112 | .cache_type = REGCACHE_NONE, | |
113 | .volatile_reg = rk817_is_volatile_reg, | |
114 | }; | |
115 | ||
c4a164f4 | 116 | static const struct resource rtc_resources[] = { |
eeb86ed3 | 117 | DEFINE_RES_IRQ(RK808_IRQ_RTC_ALARM), |
f69a7cf7 CZ |
118 | }; |
119 | ||
c4a164f4 | 120 | static const struct resource rk817_rtc_resources[] = { |
586c1b41 TX |
121 | DEFINE_RES_IRQ(RK817_IRQ_RTC_ALARM), |
122 | }; | |
123 | ||
c4a164f4 | 124 | static const struct resource rk805_key_resources[] = { |
bc85e4ad HS |
125 | DEFINE_RES_IRQ(RK805_IRQ_PWRON_RISE), |
126 | DEFINE_RES_IRQ(RK805_IRQ_PWRON_FALL), | |
f7c22398 JC |
127 | }; |
128 | ||
c4a164f4 | 129 | static const struct resource rk817_pwrkey_resources[] = { |
586c1b41 TX |
130 | DEFINE_RES_IRQ(RK817_IRQ_PWRON_RISE), |
131 | DEFINE_RES_IRQ(RK817_IRQ_PWRON_FALL), | |
132 | }; | |
133 | ||
2d48bfca CM |
134 | static const struct resource rk817_charger_resources[] = { |
135 | DEFINE_RES_IRQ(RK817_IRQ_PLUG_IN), | |
136 | DEFINE_RES_IRQ(RK817_IRQ_PLUG_OUT), | |
137 | }; | |
138 | ||
990f05f6 | 139 | static const struct mfd_cell rk805s[] = { |
3633daac NA |
140 | { .name = "rk808-clkout", .id = PLATFORM_DEVID_NONE, }, |
141 | { .name = "rk808-regulator", .id = PLATFORM_DEVID_NONE, }, | |
142 | { .name = "rk805-pinctrl", .id = PLATFORM_DEVID_NONE, }, | |
990f05f6 EZ |
143 | { |
144 | .name = "rk808-rtc", | |
145 | .num_resources = ARRAY_SIZE(rtc_resources), | |
146 | .resources = &rtc_resources[0], | |
3633daac | 147 | .id = PLATFORM_DEVID_NONE, |
990f05f6 | 148 | }, |
f7c22398 JC |
149 | { .name = "rk805-pwrkey", |
150 | .num_resources = ARRAY_SIZE(rk805_key_resources), | |
151 | .resources = &rk805_key_resources[0], | |
3633daac | 152 | .id = PLATFORM_DEVID_NONE, |
f7c22398 | 153 | }, |
990f05f6 EZ |
154 | }; |
155 | ||
f69a7cf7 | 156 | static const struct mfd_cell rk808s[] = { |
3633daac NA |
157 | { .name = "rk808-clkout", .id = PLATFORM_DEVID_NONE, }, |
158 | { .name = "rk808-regulator", .id = PLATFORM_DEVID_NONE, }, | |
f69a7cf7 CZ |
159 | { |
160 | .name = "rk808-rtc", | |
161 | .num_resources = ARRAY_SIZE(rtc_resources), | |
2eedcbfc | 162 | .resources = rtc_resources, |
3633daac | 163 | .id = PLATFORM_DEVID_NONE, |
f69a7cf7 CZ |
164 | }, |
165 | }; | |
166 | ||
586c1b41 | 167 | static const struct mfd_cell rk817s[] = { |
3633daac NA |
168 | { .name = "rk808-clkout", .id = PLATFORM_DEVID_NONE, }, |
169 | { .name = "rk808-regulator", .id = PLATFORM_DEVID_NONE, }, | |
586c1b41 | 170 | { |
bc85e4ad | 171 | .name = "rk805-pwrkey", |
586c1b41 TX |
172 | .num_resources = ARRAY_SIZE(rk817_pwrkey_resources), |
173 | .resources = &rk817_pwrkey_resources[0], | |
3633daac | 174 | .id = PLATFORM_DEVID_NONE, |
586c1b41 TX |
175 | }, |
176 | { | |
177 | .name = "rk808-rtc", | |
178 | .num_resources = ARRAY_SIZE(rk817_rtc_resources), | |
179 | .resources = &rk817_rtc_resources[0], | |
3633daac | 180 | .id = PLATFORM_DEVID_NONE, |
586c1b41 | 181 | }, |
3633daac | 182 | { .name = "rk817-codec", .id = PLATFORM_DEVID_NONE, }, |
2d48bfca CM |
183 | { |
184 | .name = "rk817-charger", | |
185 | .num_resources = ARRAY_SIZE(rk817_charger_resources), | |
186 | .resources = &rk817_charger_resources[0], | |
3633daac | 187 | .id = PLATFORM_DEVID_NONE, |
2d48bfca | 188 | }, |
586c1b41 TX |
189 | }; |
190 | ||
2eedcbfc | 191 | static const struct mfd_cell rk818s[] = { |
3633daac | 192 | { .name = "rk808-regulator", .id = PLATFORM_DEVID_NONE, }, |
2eedcbfc WE |
193 | { |
194 | .name = "rk808-rtc", | |
195 | .num_resources = ARRAY_SIZE(rtc_resources), | |
196 | .resources = rtc_resources, | |
3633daac | 197 | .id = PLATFORM_DEVID_NONE, |
2eedcbfc WE |
198 | }, |
199 | }; | |
200 | ||
990f05f6 EZ |
201 | static const struct rk808_reg_data rk805_pre_init_reg[] = { |
202 | {RK805_BUCK1_CONFIG_REG, RK805_BUCK1_2_ILMAX_MASK, | |
203 | RK805_BUCK1_2_ILMAX_4000MA}, | |
204 | {RK805_BUCK2_CONFIG_REG, RK805_BUCK1_2_ILMAX_MASK, | |
205 | RK805_BUCK1_2_ILMAX_4000MA}, | |
206 | {RK805_BUCK3_CONFIG_REG, RK805_BUCK3_4_ILMAX_MASK, | |
207 | RK805_BUCK3_ILMAX_3000MA}, | |
208 | {RK805_BUCK4_CONFIG_REG, RK805_BUCK3_4_ILMAX_MASK, | |
209 | RK805_BUCK4_ILMAX_3500MA}, | |
210 | {RK805_BUCK4_CONFIG_REG, BUCK_ILMIN_MASK, BUCK_ILMIN_400MA}, | |
990f05f6 EZ |
211 | {RK805_THERMAL_REG, TEMP_HOTDIE_MSK, TEMP115C}, |
212 | }; | |
213 | ||
2eedcbfc | 214 | static const struct rk808_reg_data rk808_pre_init_reg[] = { |
f69a7cf7 CZ |
215 | { RK808_BUCK3_CONFIG_REG, BUCK_ILMIN_MASK, BUCK_ILMIN_150MA }, |
216 | { RK808_BUCK4_CONFIG_REG, BUCK_ILMIN_MASK, BUCK_ILMIN_200MA }, | |
217 | { RK808_BOOST_CONFIG_REG, BOOST_ILMIN_MASK, BOOST_ILMIN_100MA }, | |
218 | { RK808_BUCK1_CONFIG_REG, BUCK1_RATE_MASK, BUCK_ILMIN_200MA }, | |
219 | { RK808_BUCK2_CONFIG_REG, BUCK2_RATE_MASK, BUCK_ILMIN_200MA }, | |
e19f7428 | 220 | { RK808_DCDC_UV_ACT_REG, BUCK_UV_ACT_MASK, BUCK_UV_ACT_DISABLE}, |
f69a7cf7 CZ |
221 | { RK808_VB_MON_REG, MASK_ALL, VB_LO_ACT | |
222 | VB_LO_SEL_3500MV }, | |
223 | }; | |
224 | ||
586c1b41 TX |
225 | static const struct rk808_reg_data rk817_pre_init_reg[] = { |
226 | {RK817_RTC_CTRL_REG, RTC_STOP, RTC_STOP}, | |
4a1c456a CM |
227 | /* Codec specific registers */ |
228 | { RK817_CODEC_DTOP_VUCTL, MASK_ALL, 0x03 }, | |
229 | { RK817_CODEC_DTOP_VUCTIME, MASK_ALL, 0x00 }, | |
230 | { RK817_CODEC_DTOP_LPT_SRST, MASK_ALL, 0x00 }, | |
231 | { RK817_CODEC_DTOP_DIGEN_CLKE, MASK_ALL, 0x00 }, | |
232 | /* from vendor driver, CODEC_AREF_RTCFG0 not defined in data sheet */ | |
233 | { RK817_CODEC_AREF_RTCFG0, MASK_ALL, 0x00 }, | |
234 | { RK817_CODEC_AREF_RTCFG1, MASK_ALL, 0x06 }, | |
235 | { RK817_CODEC_AADC_CFG0, MASK_ALL, 0xc8 }, | |
236 | /* from vendor driver, CODEC_AADC_CFG1 not defined in data sheet */ | |
237 | { RK817_CODEC_AADC_CFG1, MASK_ALL, 0x00 }, | |
238 | { RK817_CODEC_DADC_VOLL, MASK_ALL, 0x00 }, | |
239 | { RK817_CODEC_DADC_VOLR, MASK_ALL, 0x00 }, | |
240 | { RK817_CODEC_DADC_SR_ACL0, MASK_ALL, 0x00 }, | |
241 | { RK817_CODEC_DADC_ALC1, MASK_ALL, 0x00 }, | |
242 | { RK817_CODEC_DADC_ALC2, MASK_ALL, 0x00 }, | |
243 | { RK817_CODEC_DADC_NG, MASK_ALL, 0x00 }, | |
244 | { RK817_CODEC_DADC_HPF, MASK_ALL, 0x00 }, | |
245 | { RK817_CODEC_DADC_RVOLL, MASK_ALL, 0xff }, | |
246 | { RK817_CODEC_DADC_RVOLR, MASK_ALL, 0xff }, | |
247 | { RK817_CODEC_AMIC_CFG0, MASK_ALL, 0x70 }, | |
248 | { RK817_CODEC_AMIC_CFG1, MASK_ALL, 0x00 }, | |
249 | { RK817_CODEC_DMIC_PGA_GAIN, MASK_ALL, 0x66 }, | |
250 | { RK817_CODEC_DMIC_LMT1, MASK_ALL, 0x00 }, | |
251 | { RK817_CODEC_DMIC_LMT2, MASK_ALL, 0x00 }, | |
252 | { RK817_CODEC_DMIC_NG1, MASK_ALL, 0x00 }, | |
253 | { RK817_CODEC_DMIC_NG2, MASK_ALL, 0x00 }, | |
254 | /* from vendor driver, CODEC_ADAC_CFG0 not defined in data sheet */ | |
255 | { RK817_CODEC_ADAC_CFG0, MASK_ALL, 0x00 }, | |
256 | { RK817_CODEC_ADAC_CFG1, MASK_ALL, 0x07 }, | |
257 | { RK817_CODEC_DDAC_POPD_DACST, MASK_ALL, 0x82 }, | |
258 | { RK817_CODEC_DDAC_VOLL, MASK_ALL, 0x00 }, | |
259 | { RK817_CODEC_DDAC_VOLR, MASK_ALL, 0x00 }, | |
260 | { RK817_CODEC_DDAC_SR_LMT0, MASK_ALL, 0x00 }, | |
261 | { RK817_CODEC_DDAC_LMT1, MASK_ALL, 0x00 }, | |
262 | { RK817_CODEC_DDAC_LMT2, MASK_ALL, 0x00 }, | |
263 | { RK817_CODEC_DDAC_MUTE_MIXCTL, MASK_ALL, 0xa0 }, | |
264 | { RK817_CODEC_DDAC_RVOLL, MASK_ALL, 0xff }, | |
265 | { RK817_CODEC_DADC_RVOLR, MASK_ALL, 0xff }, | |
266 | { RK817_CODEC_AMIC_CFG0, MASK_ALL, 0x70 }, | |
267 | { RK817_CODEC_AMIC_CFG1, MASK_ALL, 0x00 }, | |
268 | { RK817_CODEC_DMIC_PGA_GAIN, MASK_ALL, 0x66 }, | |
269 | { RK817_CODEC_DMIC_LMT1, MASK_ALL, 0x00 }, | |
270 | { RK817_CODEC_DMIC_LMT2, MASK_ALL, 0x00 }, | |
271 | { RK817_CODEC_DMIC_NG1, MASK_ALL, 0x00 }, | |
272 | { RK817_CODEC_DMIC_NG2, MASK_ALL, 0x00 }, | |
273 | /* from vendor driver, CODEC_ADAC_CFG0 not defined in data sheet */ | |
274 | { RK817_CODEC_ADAC_CFG0, MASK_ALL, 0x00 }, | |
275 | { RK817_CODEC_ADAC_CFG1, MASK_ALL, 0x07 }, | |
276 | { RK817_CODEC_DDAC_POPD_DACST, MASK_ALL, 0x82 }, | |
277 | { RK817_CODEC_DDAC_VOLL, MASK_ALL, 0x00 }, | |
278 | { RK817_CODEC_DDAC_VOLR, MASK_ALL, 0x00 }, | |
279 | { RK817_CODEC_DDAC_SR_LMT0, MASK_ALL, 0x00 }, | |
280 | { RK817_CODEC_DDAC_LMT1, MASK_ALL, 0x00 }, | |
281 | { RK817_CODEC_DDAC_LMT2, MASK_ALL, 0x00 }, | |
282 | { RK817_CODEC_DDAC_MUTE_MIXCTL, MASK_ALL, 0xa0 }, | |
283 | { RK817_CODEC_DDAC_RVOLL, MASK_ALL, 0xff }, | |
284 | { RK817_CODEC_DDAC_RVOLR, MASK_ALL, 0xff }, | |
285 | { RK817_CODEC_AHP_ANTI0, MASK_ALL, 0x00 }, | |
286 | { RK817_CODEC_AHP_ANTI1, MASK_ALL, 0x00 }, | |
287 | { RK817_CODEC_AHP_CFG0, MASK_ALL, 0xe0 }, | |
288 | { RK817_CODEC_AHP_CFG1, MASK_ALL, 0x1f }, | |
289 | { RK817_CODEC_AHP_CP, MASK_ALL, 0x09 }, | |
290 | { RK817_CODEC_ACLASSD_CFG1, MASK_ALL, 0x69 }, | |
291 | { RK817_CODEC_ACLASSD_CFG2, MASK_ALL, 0x44 }, | |
292 | { RK817_CODEC_APLL_CFG0, MASK_ALL, 0x04 }, | |
293 | { RK817_CODEC_APLL_CFG1, MASK_ALL, 0x00 }, | |
294 | { RK817_CODEC_APLL_CFG2, MASK_ALL, 0x30 }, | |
295 | { RK817_CODEC_APLL_CFG3, MASK_ALL, 0x19 }, | |
296 | { RK817_CODEC_APLL_CFG4, MASK_ALL, 0x65 }, | |
297 | { RK817_CODEC_APLL_CFG5, MASK_ALL, 0x01 }, | |
298 | { RK817_CODEC_DI2S_CKM, MASK_ALL, 0x01 }, | |
299 | { RK817_CODEC_DI2S_RSD, MASK_ALL, 0x00 }, | |
300 | { RK817_CODEC_DI2S_RXCR1, MASK_ALL, 0x00 }, | |
301 | { RK817_CODEC_DI2S_RXCR2, MASK_ALL, 0x17 }, | |
302 | { RK817_CODEC_DI2S_RXCMD_TSD, MASK_ALL, 0x00 }, | |
303 | { RK817_CODEC_DI2S_TXCR1, MASK_ALL, 0x00 }, | |
304 | { RK817_CODEC_DI2S_TXCR2, MASK_ALL, 0x17 }, | |
305 | { RK817_CODEC_DI2S_TXCR3_TXCMD, MASK_ALL, 0x00 }, | |
dbd16ef5 | 306 | {RK817_GPIO_INT_CFG, RK817_INT_POL_MSK, RK817_INT_POL_L}, |
586c1b41 TX |
307 | {RK817_SYS_CFG(1), RK817_HOTDIE_TEMP_MSK | RK817_TSD_TEMP_MSK, |
308 | RK817_HOTDIE_105 | RK817_TSD_140}, | |
309 | }; | |
310 | ||
2eedcbfc WE |
311 | static const struct rk808_reg_data rk818_pre_init_reg[] = { |
312 | /* improve efficiency */ | |
313 | { RK818_BUCK2_CONFIG_REG, BUCK2_RATE_MASK, BUCK_ILMIN_250MA }, | |
314 | { RK818_BUCK4_CONFIG_REG, BUCK_ILMIN_MASK, BUCK_ILMIN_250MA }, | |
315 | { RK818_BOOST_CONFIG_REG, BOOST_ILMIN_MASK, BOOST_ILMIN_100MA }, | |
316 | { RK818_USB_CTRL_REG, RK818_USB_ILIM_SEL_MASK, | |
317 | RK818_USB_ILMIN_2000MA }, | |
318 | /* close charger when usb lower then 3.4V */ | |
319 | { RK818_USB_CTRL_REG, RK818_USB_CHG_SD_VSEL_MASK, | |
320 | (0x7 << 4) }, | |
321 | /* no action when vref */ | |
322 | { RK818_H5V_EN_REG, BIT(1), RK818_REF_RDY_CTRL }, | |
323 | /* enable HDMI 5V */ | |
324 | { RK818_H5V_EN_REG, BIT(0), RK818_H5V_EN }, | |
325 | { RK808_VB_MON_REG, MASK_ALL, VB_LO_ACT | | |
326 | VB_LO_SEL_3500MV }, | |
327 | }; | |
328 | ||
990f05f6 EZ |
329 | static const struct regmap_irq rk805_irqs[] = { |
330 | [RK805_IRQ_PWRON_RISE] = { | |
331 | .mask = RK805_IRQ_PWRON_RISE_MSK, | |
332 | .reg_offset = 0, | |
333 | }, | |
334 | [RK805_IRQ_VB_LOW] = { | |
335 | .mask = RK805_IRQ_VB_LOW_MSK, | |
336 | .reg_offset = 0, | |
337 | }, | |
338 | [RK805_IRQ_PWRON] = { | |
339 | .mask = RK805_IRQ_PWRON_MSK, | |
340 | .reg_offset = 0, | |
341 | }, | |
342 | [RK805_IRQ_PWRON_LP] = { | |
343 | .mask = RK805_IRQ_PWRON_LP_MSK, | |
344 | .reg_offset = 0, | |
345 | }, | |
346 | [RK805_IRQ_HOTDIE] = { | |
347 | .mask = RK805_IRQ_HOTDIE_MSK, | |
348 | .reg_offset = 0, | |
349 | }, | |
350 | [RK805_IRQ_RTC_ALARM] = { | |
351 | .mask = RK805_IRQ_RTC_ALARM_MSK, | |
352 | .reg_offset = 0, | |
353 | }, | |
354 | [RK805_IRQ_RTC_PERIOD] = { | |
355 | .mask = RK805_IRQ_RTC_PERIOD_MSK, | |
356 | .reg_offset = 0, | |
357 | }, | |
358 | [RK805_IRQ_PWRON_FALL] = { | |
359 | .mask = RK805_IRQ_PWRON_FALL_MSK, | |
360 | .reg_offset = 0, | |
361 | }, | |
362 | }; | |
363 | ||
f69a7cf7 CZ |
364 | static const struct regmap_irq rk808_irqs[] = { |
365 | /* INT_STS */ | |
366 | [RK808_IRQ_VOUT_LO] = { | |
367 | .mask = RK808_IRQ_VOUT_LO_MSK, | |
368 | .reg_offset = 0, | |
369 | }, | |
370 | [RK808_IRQ_VB_LO] = { | |
371 | .mask = RK808_IRQ_VB_LO_MSK, | |
372 | .reg_offset = 0, | |
373 | }, | |
374 | [RK808_IRQ_PWRON] = { | |
375 | .mask = RK808_IRQ_PWRON_MSK, | |
376 | .reg_offset = 0, | |
377 | }, | |
378 | [RK808_IRQ_PWRON_LP] = { | |
379 | .mask = RK808_IRQ_PWRON_LP_MSK, | |
380 | .reg_offset = 0, | |
381 | }, | |
382 | [RK808_IRQ_HOTDIE] = { | |
383 | .mask = RK808_IRQ_HOTDIE_MSK, | |
384 | .reg_offset = 0, | |
385 | }, | |
386 | [RK808_IRQ_RTC_ALARM] = { | |
387 | .mask = RK808_IRQ_RTC_ALARM_MSK, | |
388 | .reg_offset = 0, | |
389 | }, | |
390 | [RK808_IRQ_RTC_PERIOD] = { | |
391 | .mask = RK808_IRQ_RTC_PERIOD_MSK, | |
392 | .reg_offset = 0, | |
393 | }, | |
394 | ||
395 | /* INT_STS2 */ | |
396 | [RK808_IRQ_PLUG_IN_INT] = { | |
397 | .mask = RK808_IRQ_PLUG_IN_INT_MSK, | |
398 | .reg_offset = 1, | |
399 | }, | |
400 | [RK808_IRQ_PLUG_OUT_INT] = { | |
401 | .mask = RK808_IRQ_PLUG_OUT_INT_MSK, | |
402 | .reg_offset = 1, | |
403 | }, | |
404 | }; | |
405 | ||
2eedcbfc WE |
406 | static const struct regmap_irq rk818_irqs[] = { |
407 | /* INT_STS */ | |
408 | [RK818_IRQ_VOUT_LO] = { | |
409 | .mask = RK818_IRQ_VOUT_LO_MSK, | |
410 | .reg_offset = 0, | |
411 | }, | |
412 | [RK818_IRQ_VB_LO] = { | |
413 | .mask = RK818_IRQ_VB_LO_MSK, | |
414 | .reg_offset = 0, | |
415 | }, | |
416 | [RK818_IRQ_PWRON] = { | |
417 | .mask = RK818_IRQ_PWRON_MSK, | |
418 | .reg_offset = 0, | |
419 | }, | |
420 | [RK818_IRQ_PWRON_LP] = { | |
421 | .mask = RK818_IRQ_PWRON_LP_MSK, | |
422 | .reg_offset = 0, | |
423 | }, | |
424 | [RK818_IRQ_HOTDIE] = { | |
425 | .mask = RK818_IRQ_HOTDIE_MSK, | |
426 | .reg_offset = 0, | |
427 | }, | |
428 | [RK818_IRQ_RTC_ALARM] = { | |
429 | .mask = RK818_IRQ_RTC_ALARM_MSK, | |
430 | .reg_offset = 0, | |
431 | }, | |
432 | [RK818_IRQ_RTC_PERIOD] = { | |
433 | .mask = RK818_IRQ_RTC_PERIOD_MSK, | |
434 | .reg_offset = 0, | |
435 | }, | |
436 | [RK818_IRQ_USB_OV] = { | |
437 | .mask = RK818_IRQ_USB_OV_MSK, | |
438 | .reg_offset = 0, | |
439 | }, | |
440 | ||
441 | /* INT_STS2 */ | |
442 | [RK818_IRQ_PLUG_IN] = { | |
443 | .mask = RK818_IRQ_PLUG_IN_MSK, | |
444 | .reg_offset = 1, | |
445 | }, | |
446 | [RK818_IRQ_PLUG_OUT] = { | |
447 | .mask = RK818_IRQ_PLUG_OUT_MSK, | |
448 | .reg_offset = 1, | |
449 | }, | |
450 | [RK818_IRQ_CHG_OK] = { | |
451 | .mask = RK818_IRQ_CHG_OK_MSK, | |
452 | .reg_offset = 1, | |
453 | }, | |
454 | [RK818_IRQ_CHG_TE] = { | |
455 | .mask = RK818_IRQ_CHG_TE_MSK, | |
456 | .reg_offset = 1, | |
457 | }, | |
458 | [RK818_IRQ_CHG_TS1] = { | |
459 | .mask = RK818_IRQ_CHG_TS1_MSK, | |
460 | .reg_offset = 1, | |
461 | }, | |
462 | [RK818_IRQ_TS2] = { | |
463 | .mask = RK818_IRQ_TS2_MSK, | |
464 | .reg_offset = 1, | |
465 | }, | |
466 | [RK818_IRQ_CHG_CVTLIM] = { | |
467 | .mask = RK818_IRQ_CHG_CVTLIM_MSK, | |
468 | .reg_offset = 1, | |
469 | }, | |
470 | [RK818_IRQ_DISCHG_ILIM] = { | |
471 | .mask = RK818_IRQ_DISCHG_ILIM_MSK, | |
472 | .reg_offset = 1, | |
473 | }, | |
474 | }; | |
475 | ||
586c1b41 TX |
476 | static const struct regmap_irq rk817_irqs[RK817_IRQ_END] = { |
477 | REGMAP_IRQ_REG_LINE(0, 8), | |
478 | REGMAP_IRQ_REG_LINE(1, 8), | |
479 | REGMAP_IRQ_REG_LINE(2, 8), | |
480 | REGMAP_IRQ_REG_LINE(3, 8), | |
481 | REGMAP_IRQ_REG_LINE(4, 8), | |
482 | REGMAP_IRQ_REG_LINE(5, 8), | |
483 | REGMAP_IRQ_REG_LINE(6, 8), | |
484 | REGMAP_IRQ_REG_LINE(7, 8), | |
485 | REGMAP_IRQ_REG_LINE(8, 8), | |
486 | REGMAP_IRQ_REG_LINE(9, 8), | |
487 | REGMAP_IRQ_REG_LINE(10, 8), | |
488 | REGMAP_IRQ_REG_LINE(11, 8), | |
489 | REGMAP_IRQ_REG_LINE(12, 8), | |
490 | REGMAP_IRQ_REG_LINE(13, 8), | |
491 | REGMAP_IRQ_REG_LINE(14, 8), | |
492 | REGMAP_IRQ_REG_LINE(15, 8), | |
493 | REGMAP_IRQ_REG_LINE(16, 8), | |
494 | REGMAP_IRQ_REG_LINE(17, 8), | |
495 | REGMAP_IRQ_REG_LINE(18, 8), | |
496 | REGMAP_IRQ_REG_LINE(19, 8), | |
497 | REGMAP_IRQ_REG_LINE(20, 8), | |
498 | REGMAP_IRQ_REG_LINE(21, 8), | |
499 | REGMAP_IRQ_REG_LINE(22, 8), | |
500 | REGMAP_IRQ_REG_LINE(23, 8) | |
501 | }; | |
502 | ||
990f05f6 EZ |
503 | static struct regmap_irq_chip rk805_irq_chip = { |
504 | .name = "rk805", | |
505 | .irqs = rk805_irqs, | |
506 | .num_irqs = ARRAY_SIZE(rk805_irqs), | |
507 | .num_regs = 1, | |
508 | .status_base = RK805_INT_STS_REG, | |
509 | .mask_base = RK805_INT_STS_MSK_REG, | |
510 | .ack_base = RK805_INT_STS_REG, | |
511 | .init_ack_masked = true, | |
512 | }; | |
513 | ||
24e34b9d | 514 | static const struct regmap_irq_chip rk808_irq_chip = { |
f69a7cf7 CZ |
515 | .name = "rk808", |
516 | .irqs = rk808_irqs, | |
517 | .num_irqs = ARRAY_SIZE(rk808_irqs), | |
518 | .num_regs = 2, | |
519 | .irq_reg_stride = 2, | |
520 | .status_base = RK808_INT_STS_REG1, | |
521 | .mask_base = RK808_INT_STS_MSK_REG1, | |
522 | .ack_base = RK808_INT_STS_REG1, | |
523 | .init_ack_masked = true, | |
524 | }; | |
525 | ||
586c1b41 TX |
526 | static struct regmap_irq_chip rk817_irq_chip = { |
527 | .name = "rk817", | |
528 | .irqs = rk817_irqs, | |
529 | .num_irqs = ARRAY_SIZE(rk817_irqs), | |
530 | .num_regs = 3, | |
531 | .irq_reg_stride = 2, | |
532 | .status_base = RK817_INT_STS_REG0, | |
533 | .mask_base = RK817_INT_STS_MSK_REG0, | |
534 | .ack_base = RK817_INT_STS_REG0, | |
535 | .init_ack_masked = true, | |
536 | }; | |
537 | ||
24e34b9d | 538 | static const struct regmap_irq_chip rk818_irq_chip = { |
2eedcbfc WE |
539 | .name = "rk818", |
540 | .irqs = rk818_irqs, | |
541 | .num_irqs = ARRAY_SIZE(rk818_irqs), | |
542 | .num_regs = 2, | |
543 | .irq_reg_stride = 2, | |
544 | .status_base = RK818_INT_STS_REG1, | |
545 | .mask_base = RK818_INT_STS_MSK_REG1, | |
546 | .ack_base = RK818_INT_STS_REG1, | |
547 | .init_ack_masked = true, | |
548 | }; | |
549 | ||
f69a7cf7 | 550 | static struct i2c_client *rk808_i2c_client; |
990f05f6 | 551 | |
7a52cbcc | 552 | static void rk808_pm_power_off(void) |
b2e2c850 JC |
553 | { |
554 | int ret; | |
7a52cbcc | 555 | unsigned int reg, bit; |
b2e2c850 JC |
556 | struct rk808 *rk808 = i2c_get_clientdata(rk808_i2c_client); |
557 | ||
7a52cbcc RM |
558 | switch (rk808->variant) { |
559 | case RK805_ID: | |
560 | reg = RK805_DEV_CTRL_REG; | |
561 | bit = DEV_OFF; | |
562 | break; | |
563 | case RK808_ID: | |
564 | reg = RK808_DEVCTRL_REG, | |
565 | bit = DEV_OFF_RST; | |
566 | break; | |
56f216d8 | 567 | case RK809_ID: |
4d94b98f OJ |
568 | case RK817_ID: |
569 | reg = RK817_SYS_CFG(3); | |
570 | bit = DEV_OFF; | |
571 | break; | |
7a52cbcc RM |
572 | case RK818_ID: |
573 | reg = RK818_DEVCTRL_REG; | |
574 | bit = DEV_OFF; | |
575 | break; | |
576 | default: | |
b2e2c850 | 577 | return; |
7a52cbcc RM |
578 | } |
579 | ret = regmap_update_bits(rk808->regmap, reg, bit, bit); | |
b2e2c850 | 580 | if (ret) |
ac195d94 | 581 | dev_err(&rk808_i2c_client->dev, "Failed to shutdown device!\n"); |
b2e2c850 JC |
582 | } |
583 | ||
56f216d8 PG |
584 | static int rk808_restart_notify(struct notifier_block *this, unsigned long mode, void *cmd) |
585 | { | |
586 | struct rk808 *rk808 = i2c_get_clientdata(rk808_i2c_client); | |
587 | unsigned int reg, bit; | |
588 | int ret; | |
589 | ||
590 | switch (rk808->variant) { | |
591 | case RK809_ID: | |
592 | case RK817_ID: | |
593 | reg = RK817_SYS_CFG(3); | |
594 | bit = DEV_RST; | |
595 | break; | |
596 | ||
597 | default: | |
598 | return NOTIFY_DONE; | |
599 | } | |
600 | ret = regmap_update_bits(rk808->regmap, reg, bit, bit); | |
601 | if (ret) | |
602 | dev_err(&rk808_i2c_client->dev, "Failed to restart device!\n"); | |
603 | ||
604 | return NOTIFY_DONE; | |
605 | } | |
606 | ||
607 | static struct notifier_block rk808_restart_handler = { | |
608 | .notifier_call = rk808_restart_notify, | |
609 | .priority = 192, | |
610 | }; | |
611 | ||
90df3a82 | 612 | static void rk8xx_shutdown(struct i2c_client *client) |
586c1b41 | 613 | { |
90df3a82 | 614 | struct rk808 *rk808 = i2c_get_clientdata(client); |
586c1b41 TX |
615 | int ret; |
616 | ||
90df3a82 | 617 | switch (rk808->variant) { |
42679765 RM |
618 | case RK805_ID: |
619 | ret = regmap_update_bits(rk808->regmap, | |
620 | RK805_GPIO_IO_POL_REG, | |
621 | SLP_SD_MSK, | |
622 | SHUTDOWN_FUN); | |
623 | break; | |
90df3a82 RM |
624 | case RK809_ID: |
625 | case RK817_ID: | |
586c1b41 TX |
626 | ret = regmap_update_bits(rk808->regmap, |
627 | RK817_SYS_CFG(3), | |
628 | RK817_SLPPIN_FUNC_MSK, | |
629 | SLPPIN_DN_FUN); | |
90df3a82 RM |
630 | break; |
631 | default: | |
632 | return; | |
586c1b41 | 633 | } |
90df3a82 RM |
634 | if (ret) |
635 | dev_warn(&client->dev, | |
636 | "Cannot switch to power down function\n"); | |
b2e2c850 JC |
637 | } |
638 | ||
2eedcbfc | 639 | static const struct of_device_id rk808_of_match[] = { |
990f05f6 | 640 | { .compatible = "rockchip,rk805" }, |
2eedcbfc | 641 | { .compatible = "rockchip,rk808" }, |
586c1b41 TX |
642 | { .compatible = "rockchip,rk809" }, |
643 | { .compatible = "rockchip,rk817" }, | |
2eedcbfc WE |
644 | { .compatible = "rockchip,rk818" }, |
645 | { }, | |
646 | }; | |
647 | MODULE_DEVICE_TABLE(of, rk808_of_match); | |
648 | ||
84163609 | 649 | static int rk808_probe(struct i2c_client *client) |
f69a7cf7 CZ |
650 | { |
651 | struct device_node *np = client->dev.of_node; | |
652 | struct rk808 *rk808; | |
2eedcbfc WE |
653 | const struct rk808_reg_data *pre_init_reg; |
654 | const struct mfd_cell *cells; | |
655 | int nr_pre_init_regs; | |
656 | int nr_cells; | |
d8f083a3 | 657 | int msb, lsb; |
586c1b41 | 658 | unsigned char pmic_id_msb, pmic_id_lsb; |
f69a7cf7 CZ |
659 | int ret; |
660 | int i; | |
661 | ||
f69a7cf7 CZ |
662 | rk808 = devm_kzalloc(&client->dev, sizeof(*rk808), GFP_KERNEL); |
663 | if (!rk808) | |
664 | return -ENOMEM; | |
665 | ||
586c1b41 TX |
666 | if (of_device_is_compatible(np, "rockchip,rk817") || |
667 | of_device_is_compatible(np, "rockchip,rk809")) { | |
668 | pmic_id_msb = RK817_ID_MSB; | |
669 | pmic_id_lsb = RK817_ID_LSB; | |
670 | } else { | |
671 | pmic_id_msb = RK808_ID_MSB; | |
672 | pmic_id_lsb = RK808_ID_LSB; | |
673 | } | |
674 | ||
9d6105e1 | 675 | /* Read chip variant */ |
586c1b41 | 676 | msb = i2c_smbus_read_byte_data(client, pmic_id_msb); |
9d6105e1 EZ |
677 | if (msb < 0) { |
678 | dev_err(&client->dev, "failed to read the chip id at 0x%x\n", | |
2eedcbfc | 679 | RK808_ID_MSB); |
9d6105e1 | 680 | return msb; |
2eedcbfc WE |
681 | } |
682 | ||
586c1b41 | 683 | lsb = i2c_smbus_read_byte_data(client, pmic_id_lsb); |
9d6105e1 EZ |
684 | if (lsb < 0) { |
685 | dev_err(&client->dev, "failed to read the chip id at 0x%x\n", | |
686 | RK808_ID_LSB); | |
687 | return lsb; | |
688 | } | |
689 | ||
690 | rk808->variant = ((msb << 8) | lsb) & RK8XX_ID_MSK; | |
691 | dev_info(&client->dev, "chip id: 0x%x\n", (unsigned int)rk808->variant); | |
2eedcbfc WE |
692 | |
693 | switch (rk808->variant) { | |
990f05f6 EZ |
694 | case RK805_ID: |
695 | rk808->regmap_cfg = &rk805_regmap_config; | |
696 | rk808->regmap_irq_chip = &rk805_irq_chip; | |
697 | pre_init_reg = rk805_pre_init_reg; | |
698 | nr_pre_init_regs = ARRAY_SIZE(rk805_pre_init_reg); | |
699 | cells = rk805s; | |
700 | nr_cells = ARRAY_SIZE(rk805s); | |
990f05f6 | 701 | break; |
2eedcbfc WE |
702 | case RK808_ID: |
703 | rk808->regmap_cfg = &rk808_regmap_config; | |
704 | rk808->regmap_irq_chip = &rk808_irq_chip; | |
705 | pre_init_reg = rk808_pre_init_reg; | |
706 | nr_pre_init_regs = ARRAY_SIZE(rk808_pre_init_reg); | |
707 | cells = rk808s; | |
708 | nr_cells = ARRAY_SIZE(rk808s); | |
709 | break; | |
710 | case RK818_ID: | |
711 | rk808->regmap_cfg = &rk818_regmap_config; | |
712 | rk808->regmap_irq_chip = &rk818_irq_chip; | |
713 | pre_init_reg = rk818_pre_init_reg; | |
714 | nr_pre_init_regs = ARRAY_SIZE(rk818_pre_init_reg); | |
715 | cells = rk818s; | |
716 | nr_cells = ARRAY_SIZE(rk818s); | |
717 | break; | |
586c1b41 TX |
718 | case RK809_ID: |
719 | case RK817_ID: | |
720 | rk808->regmap_cfg = &rk817_regmap_config; | |
721 | rk808->regmap_irq_chip = &rk817_irq_chip; | |
722 | pre_init_reg = rk817_pre_init_reg; | |
723 | nr_pre_init_regs = ARRAY_SIZE(rk817_pre_init_reg); | |
724 | cells = rk817s; | |
725 | nr_cells = ARRAY_SIZE(rk817s); | |
2eedcbfc WE |
726 | break; |
727 | default: | |
728 | dev_err(&client->dev, "Unsupported RK8XX ID %lu\n", | |
729 | rk808->variant); | |
730 | return -EINVAL; | |
731 | } | |
732 | ||
733 | rk808->i2c = client; | |
734 | i2c_set_clientdata(client, rk808); | |
735 | ||
736 | rk808->regmap = devm_regmap_init_i2c(client, rk808->regmap_cfg); | |
f69a7cf7 CZ |
737 | if (IS_ERR(rk808->regmap)) { |
738 | dev_err(&client->dev, "regmap initialization failed\n"); | |
739 | return PTR_ERR(rk808->regmap); | |
740 | } | |
741 | ||
2eedcbfc WE |
742 | if (!client->irq) { |
743 | dev_err(&client->dev, "No interrupt support, no core IRQ\n"); | |
744 | return -EINVAL; | |
f69a7cf7 CZ |
745 | } |
746 | ||
747 | ret = regmap_add_irq_chip(rk808->regmap, client->irq, | |
748 | IRQF_ONESHOT, -1, | |
2eedcbfc | 749 | rk808->regmap_irq_chip, &rk808->irq_data); |
f69a7cf7 CZ |
750 | if (ret) { |
751 | dev_err(&client->dev, "Failed to add irq_chip %d\n", ret); | |
752 | return ret; | |
753 | } | |
754 | ||
2eedcbfc WE |
755 | for (i = 0; i < nr_pre_init_regs; i++) { |
756 | ret = regmap_update_bits(rk808->regmap, | |
757 | pre_init_reg[i].addr, | |
758 | pre_init_reg[i].mask, | |
759 | pre_init_reg[i].value); | |
760 | if (ret) { | |
761 | dev_err(&client->dev, | |
762 | "0x%x write err\n", | |
763 | pre_init_reg[i].addr); | |
764 | return ret; | |
765 | } | |
766 | } | |
f69a7cf7 | 767 | |
2eedcbfc WE |
768 | ret = devm_mfd_add_devices(&client->dev, PLATFORM_DEVID_NONE, |
769 | cells, nr_cells, NULL, 0, | |
770 | regmap_irq_get_domain(rk808->irq_data)); | |
f69a7cf7 CZ |
771 | if (ret) { |
772 | dev_err(&client->dev, "failed to add MFD devices %d\n", ret); | |
773 | goto err_irq; | |
774 | } | |
775 | ||
d8f083a3 | 776 | if (of_property_read_bool(np, "rockchip,system-power-controller")) { |
f69a7cf7 | 777 | rk808_i2c_client = client; |
7a52cbcc | 778 | pm_power_off = rk808_pm_power_off; |
56f216d8 PG |
779 | |
780 | switch (rk808->variant) { | |
781 | case RK809_ID: | |
782 | case RK817_ID: | |
783 | ret = register_restart_handler(&rk808_restart_handler); | |
784 | if (ret) | |
785 | dev_warn(&client->dev, "failed to register rst handler, %d\n", ret); | |
786 | break; | |
787 | default: | |
788 | dev_dbg(&client->dev, "pmic controlled board reset not supported\n"); | |
789 | break; | |
790 | } | |
f69a7cf7 CZ |
791 | } |
792 | ||
793 | return 0; | |
794 | ||
795 | err_irq: | |
796 | regmap_del_irq_chip(client->irq, rk808->irq_data); | |
797 | return ret; | |
798 | } | |
799 | ||
ed5c2f5f | 800 | static void rk808_remove(struct i2c_client *client) |
f69a7cf7 CZ |
801 | { |
802 | struct rk808 *rk808 = i2c_get_clientdata(client); | |
803 | ||
804 | regmap_del_irq_chip(client->irq, rk808->irq_data); | |
76304994 SM |
805 | |
806 | /** | |
807 | * pm_power_off may points to a function from another module. | |
808 | * Check if the pointer is set by us and only then overwrite it. | |
809 | */ | |
7a52cbcc | 810 | if (pm_power_off == rk808_pm_power_off) |
76304994 | 811 | pm_power_off = NULL; |
f69a7cf7 | 812 | |
56f216d8 | 813 | unregister_restart_handler(&rk808_restart_handler); |
f69a7cf7 CZ |
814 | } |
815 | ||
5752bc43 | 816 | static int __maybe_unused rk8xx_suspend(struct device *dev) |
586c1b41 | 817 | { |
08e8c0d9 | 818 | struct rk808 *rk808 = i2c_get_clientdata(to_i2c_client(dev)); |
586c1b41 TX |
819 | int ret = 0; |
820 | ||
821 | switch (rk808->variant) { | |
42679765 RM |
822 | case RK805_ID: |
823 | ret = regmap_update_bits(rk808->regmap, | |
824 | RK805_GPIO_IO_POL_REG, | |
825 | SLP_SD_MSK, | |
826 | SLEEP_FUN); | |
827 | break; | |
586c1b41 TX |
828 | case RK809_ID: |
829 | case RK817_ID: | |
830 | ret = regmap_update_bits(rk808->regmap, | |
831 | RK817_SYS_CFG(3), | |
832 | RK817_SLPPIN_FUNC_MSK, | |
833 | SLPPIN_SLP_FUN); | |
834 | break; | |
835 | default: | |
836 | break; | |
837 | } | |
838 | ||
839 | return ret; | |
840 | } | |
841 | ||
5752bc43 | 842 | static int __maybe_unused rk8xx_resume(struct device *dev) |
586c1b41 | 843 | { |
08e8c0d9 | 844 | struct rk808 *rk808 = i2c_get_clientdata(to_i2c_client(dev)); |
586c1b41 TX |
845 | int ret = 0; |
846 | ||
847 | switch (rk808->variant) { | |
848 | case RK809_ID: | |
849 | case RK817_ID: | |
850 | ret = regmap_update_bits(rk808->regmap, | |
851 | RK817_SYS_CFG(3), | |
852 | RK817_SLPPIN_FUNC_MSK, | |
853 | SLPPIN_NULL_FUN); | |
854 | break; | |
855 | default: | |
856 | break; | |
857 | } | |
858 | ||
859 | return ret; | |
860 | } | |
4d82fa67 | 861 | static SIMPLE_DEV_PM_OPS(rk8xx_pm_ops, rk8xx_suspend, rk8xx_resume); |
586c1b41 | 862 | |
f69a7cf7 CZ |
863 | static struct i2c_driver rk808_i2c_driver = { |
864 | .driver = { | |
865 | .name = "rk808", | |
866 | .of_match_table = rk808_of_match, | |
586c1b41 | 867 | .pm = &rk8xx_pm_ops, |
f69a7cf7 | 868 | }, |
84163609 | 869 | .probe_new = rk808_probe, |
f69a7cf7 | 870 | .remove = rk808_remove, |
90df3a82 | 871 | .shutdown = rk8xx_shutdown, |
f69a7cf7 CZ |
872 | }; |
873 | ||
874 | module_i2c_driver(rk808_i2c_driver); | |
875 | ||
876 | MODULE_LICENSE("GPL"); | |
877 | MODULE_AUTHOR("Chris Zhong <zyw@rock-chips.com>"); | |
878 | MODULE_AUTHOR("Zhang Qing <zhangqing@rock-chips.com>"); | |
2eedcbfc WE |
879 | MODULE_AUTHOR("Wadim Egorov <w.egorov@phytec.de>"); |
880 | MODULE_DESCRIPTION("RK808/RK818 PMIC driver"); |