Merge tag 'sound-fix-5.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai...
[linux-2.6-block.git] / drivers / mfd / rk808.c
CommitLineData
2025cf9e 1// SPDX-License-Identifier: GPL-2.0-only
f69a7cf7 2/*
2eedcbfc 3 * MFD core driver for Rockchip RK808/RK818
f69a7cf7
CZ
4 *
5 * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
6 *
7 * Author: Chris Zhong <zyw@rock-chips.com>
8 * Author: Zhang Qing <zhangqing@rock-chips.com>
9 *
2eedcbfc
WE
10 * Copyright (C) 2016 PHYTEC Messtechnik GmbH
11 *
12 * Author: Wadim Egorov <w.egorov@phytec.de>
f69a7cf7
CZ
13 */
14
15#include <linux/i2c.h>
16#include <linux/interrupt.h>
17#include <linux/mfd/rk808.h>
18#include <linux/mfd/core.h>
19#include <linux/module.h>
2eedcbfc 20#include <linux/of_device.h>
f69a7cf7
CZ
21#include <linux/regmap.h>
22
23struct rk808_reg_data {
24 int addr;
25 int mask;
26 int value;
27};
28
2adb3b8e
DA
29static bool rk808_is_volatile_reg(struct device *dev, unsigned int reg)
30{
31 /*
32 * Notes:
33 * - Technically the ROUND_30s bit makes RTC_CTRL_REG volatile, but
34 * we don't use that feature. It's better to cache.
35 * - It's unlikely we care that RK808_DEVCTRL_REG is volatile since
36 * bits are cleared in case when we shutoff anyway, but better safe.
37 */
38
39 switch (reg) {
40 case RK808_SECONDS_REG ... RK808_WEEKS_REG:
41 case RK808_RTC_STATUS_REG:
42 case RK808_VB_MON_REG:
43 case RK808_THERMAL_REG:
44 case RK808_DCDC_UV_STS_REG:
45 case RK808_LDO_UV_STS_REG:
46 case RK808_DCDC_PG_REG:
47 case RK808_LDO_PG_REG:
48 case RK808_DEVCTRL_REG:
49 case RK808_INT_STS_REG1:
50 case RK808_INT_STS_REG2:
51 return true;
52 }
53
54 return false;
55}
56
586c1b41
TX
57static bool rk817_is_volatile_reg(struct device *dev, unsigned int reg)
58{
59 /*
60 * Notes:
61 * - Technically the ROUND_30s bit makes RTC_CTRL_REG volatile, but
62 * we don't use that feature. It's better to cache.
63 */
64
65 switch (reg) {
66 case RK817_SECONDS_REG ... RK817_WEEKS_REG:
67 case RK817_RTC_STATUS_REG:
68 case RK817_INT_STS_REG0:
69 case RK817_INT_STS_REG1:
70 case RK817_INT_STS_REG2:
71 case RK817_SYS_STS:
72 return true;
73 }
74
75 return true;
76}
77
2eedcbfc
WE
78static const struct regmap_config rk818_regmap_config = {
79 .reg_bits = 8,
80 .val_bits = 8,
81 .max_register = RK818_USB_CTRL_REG,
82 .cache_type = REGCACHE_RBTREE,
83 .volatile_reg = rk808_is_volatile_reg,
84};
85
990f05f6
EZ
86static const struct regmap_config rk805_regmap_config = {
87 .reg_bits = 8,
88 .val_bits = 8,
89 .max_register = RK805_OFF_SOURCE_REG,
90 .cache_type = REGCACHE_RBTREE,
91 .volatile_reg = rk808_is_volatile_reg,
92};
93
f69a7cf7
CZ
94static const struct regmap_config rk808_regmap_config = {
95 .reg_bits = 8,
96 .val_bits = 8,
97 .max_register = RK808_IO_POL_REG,
2adb3b8e
DA
98 .cache_type = REGCACHE_RBTREE,
99 .volatile_reg = rk808_is_volatile_reg,
f69a7cf7
CZ
100};
101
586c1b41
TX
102static const struct regmap_config rk817_regmap_config = {
103 .reg_bits = 8,
104 .val_bits = 8,
105 .max_register = RK817_GPIO_INT_CFG,
106 .cache_type = REGCACHE_NONE,
107 .volatile_reg = rk817_is_volatile_reg,
108};
109
f69a7cf7 110static struct resource rtc_resources[] = {
eeb86ed3 111 DEFINE_RES_IRQ(RK808_IRQ_RTC_ALARM),
f69a7cf7
CZ
112};
113
586c1b41
TX
114static struct resource rk817_rtc_resources[] = {
115 DEFINE_RES_IRQ(RK817_IRQ_RTC_ALARM),
116};
117
f7c22398 118static struct resource rk805_key_resources[] = {
bc85e4ad
HS
119 DEFINE_RES_IRQ(RK805_IRQ_PWRON_RISE),
120 DEFINE_RES_IRQ(RK805_IRQ_PWRON_FALL),
f7c22398
JC
121};
122
586c1b41
TX
123static struct resource rk817_pwrkey_resources[] = {
124 DEFINE_RES_IRQ(RK817_IRQ_PWRON_RISE),
125 DEFINE_RES_IRQ(RK817_IRQ_PWRON_FALL),
126};
127
990f05f6
EZ
128static const struct mfd_cell rk805s[] = {
129 { .name = "rk808-clkout", },
130 { .name = "rk808-regulator", },
8d249b67 131 { .name = "rk805-pinctrl", },
990f05f6
EZ
132 {
133 .name = "rk808-rtc",
134 .num_resources = ARRAY_SIZE(rtc_resources),
135 .resources = &rtc_resources[0],
136 },
f7c22398
JC
137 { .name = "rk805-pwrkey",
138 .num_resources = ARRAY_SIZE(rk805_key_resources),
139 .resources = &rk805_key_resources[0],
140 },
990f05f6
EZ
141};
142
f69a7cf7
CZ
143static const struct mfd_cell rk808s[] = {
144 { .name = "rk808-clkout", },
145 { .name = "rk808-regulator", },
146 {
147 .name = "rk808-rtc",
148 .num_resources = ARRAY_SIZE(rtc_resources),
2eedcbfc 149 .resources = rtc_resources,
f69a7cf7
CZ
150 },
151};
152
586c1b41
TX
153static const struct mfd_cell rk817s[] = {
154 { .name = "rk808-clkout",},
155 { .name = "rk808-regulator",},
156 {
bc85e4ad 157 .name = "rk805-pwrkey",
586c1b41
TX
158 .num_resources = ARRAY_SIZE(rk817_pwrkey_resources),
159 .resources = &rk817_pwrkey_resources[0],
160 },
161 {
162 .name = "rk808-rtc",
163 .num_resources = ARRAY_SIZE(rk817_rtc_resources),
164 .resources = &rk817_rtc_resources[0],
165 },
166};
167
2eedcbfc
WE
168static const struct mfd_cell rk818s[] = {
169 { .name = "rk808-clkout", },
170 { .name = "rk808-regulator", },
171 {
172 .name = "rk808-rtc",
173 .num_resources = ARRAY_SIZE(rtc_resources),
174 .resources = rtc_resources,
175 },
176};
177
990f05f6
EZ
178static const struct rk808_reg_data rk805_pre_init_reg[] = {
179 {RK805_BUCK1_CONFIG_REG, RK805_BUCK1_2_ILMAX_MASK,
180 RK805_BUCK1_2_ILMAX_4000MA},
181 {RK805_BUCK2_CONFIG_REG, RK805_BUCK1_2_ILMAX_MASK,
182 RK805_BUCK1_2_ILMAX_4000MA},
183 {RK805_BUCK3_CONFIG_REG, RK805_BUCK3_4_ILMAX_MASK,
184 RK805_BUCK3_ILMAX_3000MA},
185 {RK805_BUCK4_CONFIG_REG, RK805_BUCK3_4_ILMAX_MASK,
186 RK805_BUCK4_ILMAX_3500MA},
187 {RK805_BUCK4_CONFIG_REG, BUCK_ILMIN_MASK, BUCK_ILMIN_400MA},
990f05f6
EZ
188 {RK805_THERMAL_REG, TEMP_HOTDIE_MSK, TEMP115C},
189};
190
2eedcbfc 191static const struct rk808_reg_data rk808_pre_init_reg[] = {
f69a7cf7
CZ
192 { RK808_BUCK3_CONFIG_REG, BUCK_ILMIN_MASK, BUCK_ILMIN_150MA },
193 { RK808_BUCK4_CONFIG_REG, BUCK_ILMIN_MASK, BUCK_ILMIN_200MA },
194 { RK808_BOOST_CONFIG_REG, BOOST_ILMIN_MASK, BOOST_ILMIN_100MA },
195 { RK808_BUCK1_CONFIG_REG, BUCK1_RATE_MASK, BUCK_ILMIN_200MA },
196 { RK808_BUCK2_CONFIG_REG, BUCK2_RATE_MASK, BUCK_ILMIN_200MA },
e19f7428 197 { RK808_DCDC_UV_ACT_REG, BUCK_UV_ACT_MASK, BUCK_UV_ACT_DISABLE},
f69a7cf7
CZ
198 { RK808_VB_MON_REG, MASK_ALL, VB_LO_ACT |
199 VB_LO_SEL_3500MV },
200};
201
586c1b41
TX
202static const struct rk808_reg_data rk817_pre_init_reg[] = {
203 {RK817_RTC_CTRL_REG, RTC_STOP, RTC_STOP},
dbd16ef5 204 {RK817_GPIO_INT_CFG, RK817_INT_POL_MSK, RK817_INT_POL_L},
586c1b41
TX
205 {RK817_SYS_CFG(1), RK817_HOTDIE_TEMP_MSK | RK817_TSD_TEMP_MSK,
206 RK817_HOTDIE_105 | RK817_TSD_140},
207};
208
2eedcbfc
WE
209static const struct rk808_reg_data rk818_pre_init_reg[] = {
210 /* improve efficiency */
211 { RK818_BUCK2_CONFIG_REG, BUCK2_RATE_MASK, BUCK_ILMIN_250MA },
212 { RK818_BUCK4_CONFIG_REG, BUCK_ILMIN_MASK, BUCK_ILMIN_250MA },
213 { RK818_BOOST_CONFIG_REG, BOOST_ILMIN_MASK, BOOST_ILMIN_100MA },
214 { RK818_USB_CTRL_REG, RK818_USB_ILIM_SEL_MASK,
215 RK818_USB_ILMIN_2000MA },
216 /* close charger when usb lower then 3.4V */
217 { RK818_USB_CTRL_REG, RK818_USB_CHG_SD_VSEL_MASK,
218 (0x7 << 4) },
219 /* no action when vref */
220 { RK818_H5V_EN_REG, BIT(1), RK818_REF_RDY_CTRL },
221 /* enable HDMI 5V */
222 { RK818_H5V_EN_REG, BIT(0), RK818_H5V_EN },
223 { RK808_VB_MON_REG, MASK_ALL, VB_LO_ACT |
224 VB_LO_SEL_3500MV },
225};
226
990f05f6
EZ
227static const struct regmap_irq rk805_irqs[] = {
228 [RK805_IRQ_PWRON_RISE] = {
229 .mask = RK805_IRQ_PWRON_RISE_MSK,
230 .reg_offset = 0,
231 },
232 [RK805_IRQ_VB_LOW] = {
233 .mask = RK805_IRQ_VB_LOW_MSK,
234 .reg_offset = 0,
235 },
236 [RK805_IRQ_PWRON] = {
237 .mask = RK805_IRQ_PWRON_MSK,
238 .reg_offset = 0,
239 },
240 [RK805_IRQ_PWRON_LP] = {
241 .mask = RK805_IRQ_PWRON_LP_MSK,
242 .reg_offset = 0,
243 },
244 [RK805_IRQ_HOTDIE] = {
245 .mask = RK805_IRQ_HOTDIE_MSK,
246 .reg_offset = 0,
247 },
248 [RK805_IRQ_RTC_ALARM] = {
249 .mask = RK805_IRQ_RTC_ALARM_MSK,
250 .reg_offset = 0,
251 },
252 [RK805_IRQ_RTC_PERIOD] = {
253 .mask = RK805_IRQ_RTC_PERIOD_MSK,
254 .reg_offset = 0,
255 },
256 [RK805_IRQ_PWRON_FALL] = {
257 .mask = RK805_IRQ_PWRON_FALL_MSK,
258 .reg_offset = 0,
259 },
260};
261
f69a7cf7
CZ
262static const struct regmap_irq rk808_irqs[] = {
263 /* INT_STS */
264 [RK808_IRQ_VOUT_LO] = {
265 .mask = RK808_IRQ_VOUT_LO_MSK,
266 .reg_offset = 0,
267 },
268 [RK808_IRQ_VB_LO] = {
269 .mask = RK808_IRQ_VB_LO_MSK,
270 .reg_offset = 0,
271 },
272 [RK808_IRQ_PWRON] = {
273 .mask = RK808_IRQ_PWRON_MSK,
274 .reg_offset = 0,
275 },
276 [RK808_IRQ_PWRON_LP] = {
277 .mask = RK808_IRQ_PWRON_LP_MSK,
278 .reg_offset = 0,
279 },
280 [RK808_IRQ_HOTDIE] = {
281 .mask = RK808_IRQ_HOTDIE_MSK,
282 .reg_offset = 0,
283 },
284 [RK808_IRQ_RTC_ALARM] = {
285 .mask = RK808_IRQ_RTC_ALARM_MSK,
286 .reg_offset = 0,
287 },
288 [RK808_IRQ_RTC_PERIOD] = {
289 .mask = RK808_IRQ_RTC_PERIOD_MSK,
290 .reg_offset = 0,
291 },
292
293 /* INT_STS2 */
294 [RK808_IRQ_PLUG_IN_INT] = {
295 .mask = RK808_IRQ_PLUG_IN_INT_MSK,
296 .reg_offset = 1,
297 },
298 [RK808_IRQ_PLUG_OUT_INT] = {
299 .mask = RK808_IRQ_PLUG_OUT_INT_MSK,
300 .reg_offset = 1,
301 },
302};
303
2eedcbfc
WE
304static const struct regmap_irq rk818_irqs[] = {
305 /* INT_STS */
306 [RK818_IRQ_VOUT_LO] = {
307 .mask = RK818_IRQ_VOUT_LO_MSK,
308 .reg_offset = 0,
309 },
310 [RK818_IRQ_VB_LO] = {
311 .mask = RK818_IRQ_VB_LO_MSK,
312 .reg_offset = 0,
313 },
314 [RK818_IRQ_PWRON] = {
315 .mask = RK818_IRQ_PWRON_MSK,
316 .reg_offset = 0,
317 },
318 [RK818_IRQ_PWRON_LP] = {
319 .mask = RK818_IRQ_PWRON_LP_MSK,
320 .reg_offset = 0,
321 },
322 [RK818_IRQ_HOTDIE] = {
323 .mask = RK818_IRQ_HOTDIE_MSK,
324 .reg_offset = 0,
325 },
326 [RK818_IRQ_RTC_ALARM] = {
327 .mask = RK818_IRQ_RTC_ALARM_MSK,
328 .reg_offset = 0,
329 },
330 [RK818_IRQ_RTC_PERIOD] = {
331 .mask = RK818_IRQ_RTC_PERIOD_MSK,
332 .reg_offset = 0,
333 },
334 [RK818_IRQ_USB_OV] = {
335 .mask = RK818_IRQ_USB_OV_MSK,
336 .reg_offset = 0,
337 },
338
339 /* INT_STS2 */
340 [RK818_IRQ_PLUG_IN] = {
341 .mask = RK818_IRQ_PLUG_IN_MSK,
342 .reg_offset = 1,
343 },
344 [RK818_IRQ_PLUG_OUT] = {
345 .mask = RK818_IRQ_PLUG_OUT_MSK,
346 .reg_offset = 1,
347 },
348 [RK818_IRQ_CHG_OK] = {
349 .mask = RK818_IRQ_CHG_OK_MSK,
350 .reg_offset = 1,
351 },
352 [RK818_IRQ_CHG_TE] = {
353 .mask = RK818_IRQ_CHG_TE_MSK,
354 .reg_offset = 1,
355 },
356 [RK818_IRQ_CHG_TS1] = {
357 .mask = RK818_IRQ_CHG_TS1_MSK,
358 .reg_offset = 1,
359 },
360 [RK818_IRQ_TS2] = {
361 .mask = RK818_IRQ_TS2_MSK,
362 .reg_offset = 1,
363 },
364 [RK818_IRQ_CHG_CVTLIM] = {
365 .mask = RK818_IRQ_CHG_CVTLIM_MSK,
366 .reg_offset = 1,
367 },
368 [RK818_IRQ_DISCHG_ILIM] = {
369 .mask = RK818_IRQ_DISCHG_ILIM_MSK,
370 .reg_offset = 1,
371 },
372};
373
586c1b41
TX
374static const struct regmap_irq rk817_irqs[RK817_IRQ_END] = {
375 REGMAP_IRQ_REG_LINE(0, 8),
376 REGMAP_IRQ_REG_LINE(1, 8),
377 REGMAP_IRQ_REG_LINE(2, 8),
378 REGMAP_IRQ_REG_LINE(3, 8),
379 REGMAP_IRQ_REG_LINE(4, 8),
380 REGMAP_IRQ_REG_LINE(5, 8),
381 REGMAP_IRQ_REG_LINE(6, 8),
382 REGMAP_IRQ_REG_LINE(7, 8),
383 REGMAP_IRQ_REG_LINE(8, 8),
384 REGMAP_IRQ_REG_LINE(9, 8),
385 REGMAP_IRQ_REG_LINE(10, 8),
386 REGMAP_IRQ_REG_LINE(11, 8),
387 REGMAP_IRQ_REG_LINE(12, 8),
388 REGMAP_IRQ_REG_LINE(13, 8),
389 REGMAP_IRQ_REG_LINE(14, 8),
390 REGMAP_IRQ_REG_LINE(15, 8),
391 REGMAP_IRQ_REG_LINE(16, 8),
392 REGMAP_IRQ_REG_LINE(17, 8),
393 REGMAP_IRQ_REG_LINE(18, 8),
394 REGMAP_IRQ_REG_LINE(19, 8),
395 REGMAP_IRQ_REG_LINE(20, 8),
396 REGMAP_IRQ_REG_LINE(21, 8),
397 REGMAP_IRQ_REG_LINE(22, 8),
398 REGMAP_IRQ_REG_LINE(23, 8)
399};
400
990f05f6
EZ
401static struct regmap_irq_chip rk805_irq_chip = {
402 .name = "rk805",
403 .irqs = rk805_irqs,
404 .num_irqs = ARRAY_SIZE(rk805_irqs),
405 .num_regs = 1,
406 .status_base = RK805_INT_STS_REG,
407 .mask_base = RK805_INT_STS_MSK_REG,
408 .ack_base = RK805_INT_STS_REG,
409 .init_ack_masked = true,
410};
411
24e34b9d 412static const struct regmap_irq_chip rk808_irq_chip = {
f69a7cf7
CZ
413 .name = "rk808",
414 .irqs = rk808_irqs,
415 .num_irqs = ARRAY_SIZE(rk808_irqs),
416 .num_regs = 2,
417 .irq_reg_stride = 2,
418 .status_base = RK808_INT_STS_REG1,
419 .mask_base = RK808_INT_STS_MSK_REG1,
420 .ack_base = RK808_INT_STS_REG1,
421 .init_ack_masked = true,
422};
423
586c1b41
TX
424static struct regmap_irq_chip rk817_irq_chip = {
425 .name = "rk817",
426 .irqs = rk817_irqs,
427 .num_irqs = ARRAY_SIZE(rk817_irqs),
428 .num_regs = 3,
429 .irq_reg_stride = 2,
430 .status_base = RK817_INT_STS_REG0,
431 .mask_base = RK817_INT_STS_MSK_REG0,
432 .ack_base = RK817_INT_STS_REG0,
433 .init_ack_masked = true,
434};
435
24e34b9d 436static const struct regmap_irq_chip rk818_irq_chip = {
2eedcbfc
WE
437 .name = "rk818",
438 .irqs = rk818_irqs,
439 .num_irqs = ARRAY_SIZE(rk818_irqs),
440 .num_regs = 2,
441 .irq_reg_stride = 2,
442 .status_base = RK818_INT_STS_REG1,
443 .mask_base = RK818_INT_STS_MSK_REG1,
444 .ack_base = RK818_INT_STS_REG1,
445 .init_ack_masked = true,
446};
447
f69a7cf7 448static struct i2c_client *rk808_i2c_client;
990f05f6 449
7a52cbcc 450static void rk808_pm_power_off(void)
b2e2c850
JC
451{
452 int ret;
7a52cbcc 453 unsigned int reg, bit;
b2e2c850
JC
454 struct rk808 *rk808 = i2c_get_clientdata(rk808_i2c_client);
455
7a52cbcc
RM
456 switch (rk808->variant) {
457 case RK805_ID:
458 reg = RK805_DEV_CTRL_REG;
459 bit = DEV_OFF;
460 break;
461 case RK808_ID:
462 reg = RK808_DEVCTRL_REG,
463 bit = DEV_OFF_RST;
464 break;
465 case RK818_ID:
466 reg = RK818_DEVCTRL_REG;
467 bit = DEV_OFF;
468 break;
469 default:
b2e2c850 470 return;
7a52cbcc
RM
471 }
472 ret = regmap_update_bits(rk808->regmap, reg, bit, bit);
b2e2c850 473 if (ret)
ac195d94 474 dev_err(&rk808_i2c_client->dev, "Failed to shutdown device!\n");
b2e2c850
JC
475}
476
90df3a82 477static void rk8xx_shutdown(struct i2c_client *client)
586c1b41 478{
90df3a82 479 struct rk808 *rk808 = i2c_get_clientdata(client);
586c1b41
TX
480 int ret;
481
90df3a82 482 switch (rk808->variant) {
42679765
RM
483 case RK805_ID:
484 ret = regmap_update_bits(rk808->regmap,
485 RK805_GPIO_IO_POL_REG,
486 SLP_SD_MSK,
487 SHUTDOWN_FUN);
488 break;
90df3a82
RM
489 case RK809_ID:
490 case RK817_ID:
586c1b41
TX
491 ret = regmap_update_bits(rk808->regmap,
492 RK817_SYS_CFG(3),
493 RK817_SLPPIN_FUNC_MSK,
494 SLPPIN_DN_FUN);
90df3a82
RM
495 break;
496 default:
497 return;
586c1b41 498 }
90df3a82
RM
499 if (ret)
500 dev_warn(&client->dev,
501 "Cannot switch to power down function\n");
b2e2c850
JC
502}
503
2eedcbfc 504static const struct of_device_id rk808_of_match[] = {
990f05f6 505 { .compatible = "rockchip,rk805" },
2eedcbfc 506 { .compatible = "rockchip,rk808" },
586c1b41
TX
507 { .compatible = "rockchip,rk809" },
508 { .compatible = "rockchip,rk817" },
2eedcbfc
WE
509 { .compatible = "rockchip,rk818" },
510 { },
511};
512MODULE_DEVICE_TABLE(of, rk808_of_match);
513
f69a7cf7
CZ
514static int rk808_probe(struct i2c_client *client,
515 const struct i2c_device_id *id)
516{
517 struct device_node *np = client->dev.of_node;
518 struct rk808 *rk808;
2eedcbfc
WE
519 const struct rk808_reg_data *pre_init_reg;
520 const struct mfd_cell *cells;
521 int nr_pre_init_regs;
522 int nr_cells;
d8f083a3 523 int msb, lsb;
586c1b41 524 unsigned char pmic_id_msb, pmic_id_lsb;
f69a7cf7
CZ
525 int ret;
526 int i;
527
f69a7cf7
CZ
528 rk808 = devm_kzalloc(&client->dev, sizeof(*rk808), GFP_KERNEL);
529 if (!rk808)
530 return -ENOMEM;
531
586c1b41
TX
532 if (of_device_is_compatible(np, "rockchip,rk817") ||
533 of_device_is_compatible(np, "rockchip,rk809")) {
534 pmic_id_msb = RK817_ID_MSB;
535 pmic_id_lsb = RK817_ID_LSB;
536 } else {
537 pmic_id_msb = RK808_ID_MSB;
538 pmic_id_lsb = RK808_ID_LSB;
539 }
540
9d6105e1 541 /* Read chip variant */
586c1b41 542 msb = i2c_smbus_read_byte_data(client, pmic_id_msb);
9d6105e1
EZ
543 if (msb < 0) {
544 dev_err(&client->dev, "failed to read the chip id at 0x%x\n",
2eedcbfc 545 RK808_ID_MSB);
9d6105e1 546 return msb;
2eedcbfc
WE
547 }
548
586c1b41 549 lsb = i2c_smbus_read_byte_data(client, pmic_id_lsb);
9d6105e1
EZ
550 if (lsb < 0) {
551 dev_err(&client->dev, "failed to read the chip id at 0x%x\n",
552 RK808_ID_LSB);
553 return lsb;
554 }
555
556 rk808->variant = ((msb << 8) | lsb) & RK8XX_ID_MSK;
557 dev_info(&client->dev, "chip id: 0x%x\n", (unsigned int)rk808->variant);
2eedcbfc
WE
558
559 switch (rk808->variant) {
990f05f6
EZ
560 case RK805_ID:
561 rk808->regmap_cfg = &rk805_regmap_config;
562 rk808->regmap_irq_chip = &rk805_irq_chip;
563 pre_init_reg = rk805_pre_init_reg;
564 nr_pre_init_regs = ARRAY_SIZE(rk805_pre_init_reg);
565 cells = rk805s;
566 nr_cells = ARRAY_SIZE(rk805s);
990f05f6 567 break;
2eedcbfc
WE
568 case RK808_ID:
569 rk808->regmap_cfg = &rk808_regmap_config;
570 rk808->regmap_irq_chip = &rk808_irq_chip;
571 pre_init_reg = rk808_pre_init_reg;
572 nr_pre_init_regs = ARRAY_SIZE(rk808_pre_init_reg);
573 cells = rk808s;
574 nr_cells = ARRAY_SIZE(rk808s);
575 break;
576 case RK818_ID:
577 rk808->regmap_cfg = &rk818_regmap_config;
578 rk808->regmap_irq_chip = &rk818_irq_chip;
579 pre_init_reg = rk818_pre_init_reg;
580 nr_pre_init_regs = ARRAY_SIZE(rk818_pre_init_reg);
581 cells = rk818s;
582 nr_cells = ARRAY_SIZE(rk818s);
583 break;
586c1b41
TX
584 case RK809_ID:
585 case RK817_ID:
586 rk808->regmap_cfg = &rk817_regmap_config;
587 rk808->regmap_irq_chip = &rk817_irq_chip;
588 pre_init_reg = rk817_pre_init_reg;
589 nr_pre_init_regs = ARRAY_SIZE(rk817_pre_init_reg);
590 cells = rk817s;
591 nr_cells = ARRAY_SIZE(rk817s);
2eedcbfc
WE
592 break;
593 default:
594 dev_err(&client->dev, "Unsupported RK8XX ID %lu\n",
595 rk808->variant);
596 return -EINVAL;
597 }
598
599 rk808->i2c = client;
600 i2c_set_clientdata(client, rk808);
601
602 rk808->regmap = devm_regmap_init_i2c(client, rk808->regmap_cfg);
f69a7cf7
CZ
603 if (IS_ERR(rk808->regmap)) {
604 dev_err(&client->dev, "regmap initialization failed\n");
605 return PTR_ERR(rk808->regmap);
606 }
607
2eedcbfc
WE
608 if (!client->irq) {
609 dev_err(&client->dev, "No interrupt support, no core IRQ\n");
610 return -EINVAL;
f69a7cf7
CZ
611 }
612
613 ret = regmap_add_irq_chip(rk808->regmap, client->irq,
614 IRQF_ONESHOT, -1,
2eedcbfc 615 rk808->regmap_irq_chip, &rk808->irq_data);
f69a7cf7
CZ
616 if (ret) {
617 dev_err(&client->dev, "Failed to add irq_chip %d\n", ret);
618 return ret;
619 }
620
2eedcbfc
WE
621 for (i = 0; i < nr_pre_init_regs; i++) {
622 ret = regmap_update_bits(rk808->regmap,
623 pre_init_reg[i].addr,
624 pre_init_reg[i].mask,
625 pre_init_reg[i].value);
626 if (ret) {
627 dev_err(&client->dev,
628 "0x%x write err\n",
629 pre_init_reg[i].addr);
630 return ret;
631 }
632 }
f69a7cf7 633
2eedcbfc
WE
634 ret = devm_mfd_add_devices(&client->dev, PLATFORM_DEVID_NONE,
635 cells, nr_cells, NULL, 0,
636 regmap_irq_get_domain(rk808->irq_data));
f69a7cf7
CZ
637 if (ret) {
638 dev_err(&client->dev, "failed to add MFD devices %d\n", ret);
639 goto err_irq;
640 }
641
d8f083a3 642 if (of_property_read_bool(np, "rockchip,system-power-controller")) {
f69a7cf7 643 rk808_i2c_client = client;
7a52cbcc 644 pm_power_off = rk808_pm_power_off;
f69a7cf7
CZ
645 }
646
647 return 0;
648
649err_irq:
650 regmap_del_irq_chip(client->irq, rk808->irq_data);
651 return ret;
652}
653
654static int rk808_remove(struct i2c_client *client)
655{
656 struct rk808 *rk808 = i2c_get_clientdata(client);
657
658 regmap_del_irq_chip(client->irq, rk808->irq_data);
76304994
SM
659
660 /**
661 * pm_power_off may points to a function from another module.
662 * Check if the pointer is set by us and only then overwrite it.
663 */
7a52cbcc 664 if (pm_power_off == rk808_pm_power_off)
76304994 665 pm_power_off = NULL;
f69a7cf7
CZ
666
667 return 0;
668}
669
5752bc43 670static int __maybe_unused rk8xx_suspend(struct device *dev)
586c1b41 671{
08e8c0d9 672 struct rk808 *rk808 = i2c_get_clientdata(to_i2c_client(dev));
586c1b41
TX
673 int ret = 0;
674
675 switch (rk808->variant) {
42679765
RM
676 case RK805_ID:
677 ret = regmap_update_bits(rk808->regmap,
678 RK805_GPIO_IO_POL_REG,
679 SLP_SD_MSK,
680 SLEEP_FUN);
681 break;
586c1b41
TX
682 case RK809_ID:
683 case RK817_ID:
684 ret = regmap_update_bits(rk808->regmap,
685 RK817_SYS_CFG(3),
686 RK817_SLPPIN_FUNC_MSK,
687 SLPPIN_SLP_FUN);
688 break;
689 default:
690 break;
691 }
692
693 return ret;
694}
695
5752bc43 696static int __maybe_unused rk8xx_resume(struct device *dev)
586c1b41 697{
08e8c0d9 698 struct rk808 *rk808 = i2c_get_clientdata(to_i2c_client(dev));
586c1b41
TX
699 int ret = 0;
700
701 switch (rk808->variant) {
702 case RK809_ID:
703 case RK817_ID:
704 ret = regmap_update_bits(rk808->regmap,
705 RK817_SYS_CFG(3),
706 RK817_SLPPIN_FUNC_MSK,
707 SLPPIN_NULL_FUN);
708 break;
709 default:
710 break;
711 }
712
713 return ret;
714}
4d82fa67 715static SIMPLE_DEV_PM_OPS(rk8xx_pm_ops, rk8xx_suspend, rk8xx_resume);
586c1b41 716
f69a7cf7
CZ
717static struct i2c_driver rk808_i2c_driver = {
718 .driver = {
719 .name = "rk808",
720 .of_match_table = rk808_of_match,
586c1b41 721 .pm = &rk8xx_pm_ops,
f69a7cf7
CZ
722 },
723 .probe = rk808_probe,
724 .remove = rk808_remove,
90df3a82 725 .shutdown = rk8xx_shutdown,
f69a7cf7
CZ
726};
727
728module_i2c_driver(rk808_i2c_driver);
729
730MODULE_LICENSE("GPL");
731MODULE_AUTHOR("Chris Zhong <zyw@rock-chips.com>");
732MODULE_AUTHOR("Zhang Qing <zhangqing@rock-chips.com>");
2eedcbfc
WE
733MODULE_AUTHOR("Wadim Egorov <w.egorov@phytec.de>");
734MODULE_DESCRIPTION("RK808/RK818 PMIC driver");