Merge branch 'next' into for-linus
[linux-block.git] / drivers / mfd / rk808.c
CommitLineData
2025cf9e 1// SPDX-License-Identifier: GPL-2.0-only
f69a7cf7 2/*
2eedcbfc 3 * MFD core driver for Rockchip RK808/RK818
f69a7cf7
CZ
4 *
5 * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
6 *
7 * Author: Chris Zhong <zyw@rock-chips.com>
8 * Author: Zhang Qing <zhangqing@rock-chips.com>
9 *
2eedcbfc
WE
10 * Copyright (C) 2016 PHYTEC Messtechnik GmbH
11 *
12 * Author: Wadim Egorov <w.egorov@phytec.de>
f69a7cf7
CZ
13 */
14
15#include <linux/i2c.h>
16#include <linux/interrupt.h>
17#include <linux/mfd/rk808.h>
18#include <linux/mfd/core.h>
19#include <linux/module.h>
2eedcbfc 20#include <linux/of_device.h>
f69a7cf7
CZ
21#include <linux/regmap.h>
22
23struct rk808_reg_data {
24 int addr;
25 int mask;
26 int value;
27};
28
2adb3b8e
DA
29static bool rk808_is_volatile_reg(struct device *dev, unsigned int reg)
30{
31 /*
32 * Notes:
33 * - Technically the ROUND_30s bit makes RTC_CTRL_REG volatile, but
34 * we don't use that feature. It's better to cache.
35 * - It's unlikely we care that RK808_DEVCTRL_REG is volatile since
36 * bits are cleared in case when we shutoff anyway, but better safe.
37 */
38
39 switch (reg) {
40 case RK808_SECONDS_REG ... RK808_WEEKS_REG:
41 case RK808_RTC_STATUS_REG:
42 case RK808_VB_MON_REG:
43 case RK808_THERMAL_REG:
44 case RK808_DCDC_UV_STS_REG:
45 case RK808_LDO_UV_STS_REG:
46 case RK808_DCDC_PG_REG:
47 case RK808_LDO_PG_REG:
48 case RK808_DEVCTRL_REG:
49 case RK808_INT_STS_REG1:
50 case RK808_INT_STS_REG2:
51 return true;
52 }
53
54 return false;
55}
56
2eedcbfc
WE
57static const struct regmap_config rk818_regmap_config = {
58 .reg_bits = 8,
59 .val_bits = 8,
60 .max_register = RK818_USB_CTRL_REG,
61 .cache_type = REGCACHE_RBTREE,
62 .volatile_reg = rk808_is_volatile_reg,
63};
64
990f05f6
EZ
65static const struct regmap_config rk805_regmap_config = {
66 .reg_bits = 8,
67 .val_bits = 8,
68 .max_register = RK805_OFF_SOURCE_REG,
69 .cache_type = REGCACHE_RBTREE,
70 .volatile_reg = rk808_is_volatile_reg,
71};
72
f69a7cf7
CZ
73static const struct regmap_config rk808_regmap_config = {
74 .reg_bits = 8,
75 .val_bits = 8,
76 .max_register = RK808_IO_POL_REG,
2adb3b8e
DA
77 .cache_type = REGCACHE_RBTREE,
78 .volatile_reg = rk808_is_volatile_reg,
f69a7cf7
CZ
79};
80
81static struct resource rtc_resources[] = {
82 {
83 .start = RK808_IRQ_RTC_ALARM,
84 .end = RK808_IRQ_RTC_ALARM,
85 .flags = IORESOURCE_IRQ,
86 }
87};
88
f7c22398
JC
89static struct resource rk805_key_resources[] = {
90 {
91 .start = RK805_IRQ_PWRON_FALL,
92 .end = RK805_IRQ_PWRON_FALL,
93 .flags = IORESOURCE_IRQ,
94 },
95 {
96 .start = RK805_IRQ_PWRON_RISE,
97 .end = RK805_IRQ_PWRON_RISE,
98 .flags = IORESOURCE_IRQ,
99 }
100};
101
990f05f6
EZ
102static const struct mfd_cell rk805s[] = {
103 { .name = "rk808-clkout", },
104 { .name = "rk808-regulator", },
8d249b67 105 { .name = "rk805-pinctrl", },
990f05f6
EZ
106 {
107 .name = "rk808-rtc",
108 .num_resources = ARRAY_SIZE(rtc_resources),
109 .resources = &rtc_resources[0],
110 },
f7c22398
JC
111 { .name = "rk805-pwrkey",
112 .num_resources = ARRAY_SIZE(rk805_key_resources),
113 .resources = &rk805_key_resources[0],
114 },
990f05f6
EZ
115};
116
f69a7cf7
CZ
117static const struct mfd_cell rk808s[] = {
118 { .name = "rk808-clkout", },
119 { .name = "rk808-regulator", },
120 {
121 .name = "rk808-rtc",
122 .num_resources = ARRAY_SIZE(rtc_resources),
2eedcbfc 123 .resources = rtc_resources,
f69a7cf7
CZ
124 },
125};
126
2eedcbfc
WE
127static const struct mfd_cell rk818s[] = {
128 { .name = "rk808-clkout", },
129 { .name = "rk808-regulator", },
130 {
131 .name = "rk808-rtc",
132 .num_resources = ARRAY_SIZE(rtc_resources),
133 .resources = rtc_resources,
134 },
135};
136
990f05f6
EZ
137static const struct rk808_reg_data rk805_pre_init_reg[] = {
138 {RK805_BUCK1_CONFIG_REG, RK805_BUCK1_2_ILMAX_MASK,
139 RK805_BUCK1_2_ILMAX_4000MA},
140 {RK805_BUCK2_CONFIG_REG, RK805_BUCK1_2_ILMAX_MASK,
141 RK805_BUCK1_2_ILMAX_4000MA},
142 {RK805_BUCK3_CONFIG_REG, RK805_BUCK3_4_ILMAX_MASK,
143 RK805_BUCK3_ILMAX_3000MA},
144 {RK805_BUCK4_CONFIG_REG, RK805_BUCK3_4_ILMAX_MASK,
145 RK805_BUCK4_ILMAX_3500MA},
146 {RK805_BUCK4_CONFIG_REG, BUCK_ILMIN_MASK, BUCK_ILMIN_400MA},
147 {RK805_GPIO_IO_POL_REG, SLP_SD_MSK, SLEEP_FUN},
148 {RK805_THERMAL_REG, TEMP_HOTDIE_MSK, TEMP115C},
149};
150
2eedcbfc 151static const struct rk808_reg_data rk808_pre_init_reg[] = {
f69a7cf7
CZ
152 { RK808_BUCK3_CONFIG_REG, BUCK_ILMIN_MASK, BUCK_ILMIN_150MA },
153 { RK808_BUCK4_CONFIG_REG, BUCK_ILMIN_MASK, BUCK_ILMIN_200MA },
154 { RK808_BOOST_CONFIG_REG, BOOST_ILMIN_MASK, BOOST_ILMIN_100MA },
155 { RK808_BUCK1_CONFIG_REG, BUCK1_RATE_MASK, BUCK_ILMIN_200MA },
156 { RK808_BUCK2_CONFIG_REG, BUCK2_RATE_MASK, BUCK_ILMIN_200MA },
e19f7428 157 { RK808_DCDC_UV_ACT_REG, BUCK_UV_ACT_MASK, BUCK_UV_ACT_DISABLE},
f69a7cf7
CZ
158 { RK808_VB_MON_REG, MASK_ALL, VB_LO_ACT |
159 VB_LO_SEL_3500MV },
160};
161
2eedcbfc
WE
162static const struct rk808_reg_data rk818_pre_init_reg[] = {
163 /* improve efficiency */
164 { RK818_BUCK2_CONFIG_REG, BUCK2_RATE_MASK, BUCK_ILMIN_250MA },
165 { RK818_BUCK4_CONFIG_REG, BUCK_ILMIN_MASK, BUCK_ILMIN_250MA },
166 { RK818_BOOST_CONFIG_REG, BOOST_ILMIN_MASK, BOOST_ILMIN_100MA },
167 { RK818_USB_CTRL_REG, RK818_USB_ILIM_SEL_MASK,
168 RK818_USB_ILMIN_2000MA },
169 /* close charger when usb lower then 3.4V */
170 { RK818_USB_CTRL_REG, RK818_USB_CHG_SD_VSEL_MASK,
171 (0x7 << 4) },
172 /* no action when vref */
173 { RK818_H5V_EN_REG, BIT(1), RK818_REF_RDY_CTRL },
174 /* enable HDMI 5V */
175 { RK818_H5V_EN_REG, BIT(0), RK818_H5V_EN },
176 { RK808_VB_MON_REG, MASK_ALL, VB_LO_ACT |
177 VB_LO_SEL_3500MV },
178};
179
990f05f6
EZ
180static const struct regmap_irq rk805_irqs[] = {
181 [RK805_IRQ_PWRON_RISE] = {
182 .mask = RK805_IRQ_PWRON_RISE_MSK,
183 .reg_offset = 0,
184 },
185 [RK805_IRQ_VB_LOW] = {
186 .mask = RK805_IRQ_VB_LOW_MSK,
187 .reg_offset = 0,
188 },
189 [RK805_IRQ_PWRON] = {
190 .mask = RK805_IRQ_PWRON_MSK,
191 .reg_offset = 0,
192 },
193 [RK805_IRQ_PWRON_LP] = {
194 .mask = RK805_IRQ_PWRON_LP_MSK,
195 .reg_offset = 0,
196 },
197 [RK805_IRQ_HOTDIE] = {
198 .mask = RK805_IRQ_HOTDIE_MSK,
199 .reg_offset = 0,
200 },
201 [RK805_IRQ_RTC_ALARM] = {
202 .mask = RK805_IRQ_RTC_ALARM_MSK,
203 .reg_offset = 0,
204 },
205 [RK805_IRQ_RTC_PERIOD] = {
206 .mask = RK805_IRQ_RTC_PERIOD_MSK,
207 .reg_offset = 0,
208 },
209 [RK805_IRQ_PWRON_FALL] = {
210 .mask = RK805_IRQ_PWRON_FALL_MSK,
211 .reg_offset = 0,
212 },
213};
214
f69a7cf7
CZ
215static const struct regmap_irq rk808_irqs[] = {
216 /* INT_STS */
217 [RK808_IRQ_VOUT_LO] = {
218 .mask = RK808_IRQ_VOUT_LO_MSK,
219 .reg_offset = 0,
220 },
221 [RK808_IRQ_VB_LO] = {
222 .mask = RK808_IRQ_VB_LO_MSK,
223 .reg_offset = 0,
224 },
225 [RK808_IRQ_PWRON] = {
226 .mask = RK808_IRQ_PWRON_MSK,
227 .reg_offset = 0,
228 },
229 [RK808_IRQ_PWRON_LP] = {
230 .mask = RK808_IRQ_PWRON_LP_MSK,
231 .reg_offset = 0,
232 },
233 [RK808_IRQ_HOTDIE] = {
234 .mask = RK808_IRQ_HOTDIE_MSK,
235 .reg_offset = 0,
236 },
237 [RK808_IRQ_RTC_ALARM] = {
238 .mask = RK808_IRQ_RTC_ALARM_MSK,
239 .reg_offset = 0,
240 },
241 [RK808_IRQ_RTC_PERIOD] = {
242 .mask = RK808_IRQ_RTC_PERIOD_MSK,
243 .reg_offset = 0,
244 },
245
246 /* INT_STS2 */
247 [RK808_IRQ_PLUG_IN_INT] = {
248 .mask = RK808_IRQ_PLUG_IN_INT_MSK,
249 .reg_offset = 1,
250 },
251 [RK808_IRQ_PLUG_OUT_INT] = {
252 .mask = RK808_IRQ_PLUG_OUT_INT_MSK,
253 .reg_offset = 1,
254 },
255};
256
2eedcbfc
WE
257static const struct regmap_irq rk818_irqs[] = {
258 /* INT_STS */
259 [RK818_IRQ_VOUT_LO] = {
260 .mask = RK818_IRQ_VOUT_LO_MSK,
261 .reg_offset = 0,
262 },
263 [RK818_IRQ_VB_LO] = {
264 .mask = RK818_IRQ_VB_LO_MSK,
265 .reg_offset = 0,
266 },
267 [RK818_IRQ_PWRON] = {
268 .mask = RK818_IRQ_PWRON_MSK,
269 .reg_offset = 0,
270 },
271 [RK818_IRQ_PWRON_LP] = {
272 .mask = RK818_IRQ_PWRON_LP_MSK,
273 .reg_offset = 0,
274 },
275 [RK818_IRQ_HOTDIE] = {
276 .mask = RK818_IRQ_HOTDIE_MSK,
277 .reg_offset = 0,
278 },
279 [RK818_IRQ_RTC_ALARM] = {
280 .mask = RK818_IRQ_RTC_ALARM_MSK,
281 .reg_offset = 0,
282 },
283 [RK818_IRQ_RTC_PERIOD] = {
284 .mask = RK818_IRQ_RTC_PERIOD_MSK,
285 .reg_offset = 0,
286 },
287 [RK818_IRQ_USB_OV] = {
288 .mask = RK818_IRQ_USB_OV_MSK,
289 .reg_offset = 0,
290 },
291
292 /* INT_STS2 */
293 [RK818_IRQ_PLUG_IN] = {
294 .mask = RK818_IRQ_PLUG_IN_MSK,
295 .reg_offset = 1,
296 },
297 [RK818_IRQ_PLUG_OUT] = {
298 .mask = RK818_IRQ_PLUG_OUT_MSK,
299 .reg_offset = 1,
300 },
301 [RK818_IRQ_CHG_OK] = {
302 .mask = RK818_IRQ_CHG_OK_MSK,
303 .reg_offset = 1,
304 },
305 [RK818_IRQ_CHG_TE] = {
306 .mask = RK818_IRQ_CHG_TE_MSK,
307 .reg_offset = 1,
308 },
309 [RK818_IRQ_CHG_TS1] = {
310 .mask = RK818_IRQ_CHG_TS1_MSK,
311 .reg_offset = 1,
312 },
313 [RK818_IRQ_TS2] = {
314 .mask = RK818_IRQ_TS2_MSK,
315 .reg_offset = 1,
316 },
317 [RK818_IRQ_CHG_CVTLIM] = {
318 .mask = RK818_IRQ_CHG_CVTLIM_MSK,
319 .reg_offset = 1,
320 },
321 [RK818_IRQ_DISCHG_ILIM] = {
322 .mask = RK818_IRQ_DISCHG_ILIM_MSK,
323 .reg_offset = 1,
324 },
325};
326
990f05f6
EZ
327static struct regmap_irq_chip rk805_irq_chip = {
328 .name = "rk805",
329 .irqs = rk805_irqs,
330 .num_irqs = ARRAY_SIZE(rk805_irqs),
331 .num_regs = 1,
332 .status_base = RK805_INT_STS_REG,
333 .mask_base = RK805_INT_STS_MSK_REG,
334 .ack_base = RK805_INT_STS_REG,
335 .init_ack_masked = true,
336};
337
24e34b9d 338static const struct regmap_irq_chip rk808_irq_chip = {
f69a7cf7
CZ
339 .name = "rk808",
340 .irqs = rk808_irqs,
341 .num_irqs = ARRAY_SIZE(rk808_irqs),
342 .num_regs = 2,
343 .irq_reg_stride = 2,
344 .status_base = RK808_INT_STS_REG1,
345 .mask_base = RK808_INT_STS_MSK_REG1,
346 .ack_base = RK808_INT_STS_REG1,
347 .init_ack_masked = true,
348};
349
24e34b9d 350static const struct regmap_irq_chip rk818_irq_chip = {
2eedcbfc
WE
351 .name = "rk818",
352 .irqs = rk818_irqs,
353 .num_irqs = ARRAY_SIZE(rk818_irqs),
354 .num_regs = 2,
355 .irq_reg_stride = 2,
356 .status_base = RK818_INT_STS_REG1,
357 .mask_base = RK818_INT_STS_MSK_REG1,
358 .ack_base = RK818_INT_STS_REG1,
359 .init_ack_masked = true,
360};
361
f69a7cf7 362static struct i2c_client *rk808_i2c_client;
990f05f6
EZ
363
364static void rk805_device_shutdown(void)
365{
366 int ret;
367 struct rk808 *rk808 = i2c_get_clientdata(rk808_i2c_client);
368
369 if (!rk808) {
370 dev_warn(&rk808_i2c_client->dev,
371 "have no rk805, so do nothing here\n");
372 return;
373 }
374
375 ret = regmap_update_bits(rk808->regmap,
376 RK805_DEV_CTRL_REG,
377 DEV_OFF, DEV_OFF);
378 if (ret)
379 dev_err(&rk808_i2c_client->dev, "power off error!\n");
380}
381
f69a7cf7
CZ
382static void rk808_device_shutdown(void)
383{
384 int ret;
385 struct rk808 *rk808 = i2c_get_clientdata(rk808_i2c_client);
386
387 if (!rk808) {
388 dev_warn(&rk808_i2c_client->dev,
389 "have no rk808, so do nothing here\n");
390 return;
391 }
392
393 ret = regmap_update_bits(rk808->regmap,
394 RK808_DEVCTRL_REG,
395 DEV_OFF_RST, DEV_OFF_RST);
396 if (ret)
397 dev_err(&rk808_i2c_client->dev, "power off error!\n");
398}
399
b2e2c850
JC
400static void rk818_device_shutdown(void)
401{
402 int ret;
403 struct rk808 *rk808 = i2c_get_clientdata(rk808_i2c_client);
404
405 if (!rk808) {
406 dev_warn(&rk808_i2c_client->dev,
407 "have no rk818, so do nothing here\n");
408 return;
409 }
410
411 ret = regmap_update_bits(rk808->regmap,
412 RK818_DEVCTRL_REG,
413 DEV_OFF, DEV_OFF);
414 if (ret)
415 dev_err(&rk808_i2c_client->dev, "power off error!\n");
416}
417
2eedcbfc 418static const struct of_device_id rk808_of_match[] = {
990f05f6 419 { .compatible = "rockchip,rk805" },
2eedcbfc
WE
420 { .compatible = "rockchip,rk808" },
421 { .compatible = "rockchip,rk818" },
422 { },
423};
424MODULE_DEVICE_TABLE(of, rk808_of_match);
425
f69a7cf7
CZ
426static int rk808_probe(struct i2c_client *client,
427 const struct i2c_device_id *id)
428{
429 struct device_node *np = client->dev.of_node;
430 struct rk808 *rk808;
2eedcbfc
WE
431 const struct rk808_reg_data *pre_init_reg;
432 const struct mfd_cell *cells;
b2e2c850 433 void (*pm_pwroff_fn)(void);
2eedcbfc
WE
434 int nr_pre_init_regs;
435 int nr_cells;
9d6105e1 436 int pm_off = 0, msb, lsb;
f69a7cf7
CZ
437 int ret;
438 int i;
439
f69a7cf7
CZ
440 rk808 = devm_kzalloc(&client->dev, sizeof(*rk808), GFP_KERNEL);
441 if (!rk808)
442 return -ENOMEM;
443
9d6105e1
EZ
444 /* Read chip variant */
445 msb = i2c_smbus_read_byte_data(client, RK808_ID_MSB);
446 if (msb < 0) {
447 dev_err(&client->dev, "failed to read the chip id at 0x%x\n",
2eedcbfc 448 RK808_ID_MSB);
9d6105e1 449 return msb;
2eedcbfc
WE
450 }
451
9d6105e1
EZ
452 lsb = i2c_smbus_read_byte_data(client, RK808_ID_LSB);
453 if (lsb < 0) {
454 dev_err(&client->dev, "failed to read the chip id at 0x%x\n",
455 RK808_ID_LSB);
456 return lsb;
457 }
458
459 rk808->variant = ((msb << 8) | lsb) & RK8XX_ID_MSK;
460 dev_info(&client->dev, "chip id: 0x%x\n", (unsigned int)rk808->variant);
2eedcbfc
WE
461
462 switch (rk808->variant) {
990f05f6
EZ
463 case RK805_ID:
464 rk808->regmap_cfg = &rk805_regmap_config;
465 rk808->regmap_irq_chip = &rk805_irq_chip;
466 pre_init_reg = rk805_pre_init_reg;
467 nr_pre_init_regs = ARRAY_SIZE(rk805_pre_init_reg);
468 cells = rk805s;
469 nr_cells = ARRAY_SIZE(rk805s);
470 pm_pwroff_fn = rk805_device_shutdown;
471 break;
2eedcbfc
WE
472 case RK808_ID:
473 rk808->regmap_cfg = &rk808_regmap_config;
474 rk808->regmap_irq_chip = &rk808_irq_chip;
475 pre_init_reg = rk808_pre_init_reg;
476 nr_pre_init_regs = ARRAY_SIZE(rk808_pre_init_reg);
477 cells = rk808s;
478 nr_cells = ARRAY_SIZE(rk808s);
b2e2c850 479 pm_pwroff_fn = rk808_device_shutdown;
2eedcbfc
WE
480 break;
481 case RK818_ID:
482 rk808->regmap_cfg = &rk818_regmap_config;
483 rk808->regmap_irq_chip = &rk818_irq_chip;
484 pre_init_reg = rk818_pre_init_reg;
485 nr_pre_init_regs = ARRAY_SIZE(rk818_pre_init_reg);
486 cells = rk818s;
487 nr_cells = ARRAY_SIZE(rk818s);
b2e2c850 488 pm_pwroff_fn = rk818_device_shutdown;
2eedcbfc
WE
489 break;
490 default:
491 dev_err(&client->dev, "Unsupported RK8XX ID %lu\n",
492 rk808->variant);
493 return -EINVAL;
494 }
495
496 rk808->i2c = client;
497 i2c_set_clientdata(client, rk808);
498
499 rk808->regmap = devm_regmap_init_i2c(client, rk808->regmap_cfg);
f69a7cf7
CZ
500 if (IS_ERR(rk808->regmap)) {
501 dev_err(&client->dev, "regmap initialization failed\n");
502 return PTR_ERR(rk808->regmap);
503 }
504
2eedcbfc
WE
505 if (!client->irq) {
506 dev_err(&client->dev, "No interrupt support, no core IRQ\n");
507 return -EINVAL;
f69a7cf7
CZ
508 }
509
510 ret = regmap_add_irq_chip(rk808->regmap, client->irq,
511 IRQF_ONESHOT, -1,
2eedcbfc 512 rk808->regmap_irq_chip, &rk808->irq_data);
f69a7cf7
CZ
513 if (ret) {
514 dev_err(&client->dev, "Failed to add irq_chip %d\n", ret);
515 return ret;
516 }
517
2eedcbfc
WE
518 for (i = 0; i < nr_pre_init_regs; i++) {
519 ret = regmap_update_bits(rk808->regmap,
520 pre_init_reg[i].addr,
521 pre_init_reg[i].mask,
522 pre_init_reg[i].value);
523 if (ret) {
524 dev_err(&client->dev,
525 "0x%x write err\n",
526 pre_init_reg[i].addr);
527 return ret;
528 }
529 }
f69a7cf7 530
2eedcbfc
WE
531 ret = devm_mfd_add_devices(&client->dev, PLATFORM_DEVID_NONE,
532 cells, nr_cells, NULL, 0,
533 regmap_irq_get_domain(rk808->irq_data));
f69a7cf7
CZ
534 if (ret) {
535 dev_err(&client->dev, "failed to add MFD devices %d\n", ret);
536 goto err_irq;
537 }
538
539 pm_off = of_property_read_bool(np,
540 "rockchip,system-power-controller");
541 if (pm_off && !pm_power_off) {
542 rk808_i2c_client = client;
b2e2c850 543 pm_power_off = pm_pwroff_fn;
f69a7cf7
CZ
544 }
545
546 return 0;
547
548err_irq:
549 regmap_del_irq_chip(client->irq, rk808->irq_data);
550 return ret;
551}
552
553static int rk808_remove(struct i2c_client *client)
554{
555 struct rk808 *rk808 = i2c_get_clientdata(client);
556
557 regmap_del_irq_chip(client->irq, rk808->irq_data);
f69a7cf7
CZ
558 pm_power_off = NULL;
559
560 return 0;
561}
562
f69a7cf7
CZ
563static struct i2c_driver rk808_i2c_driver = {
564 .driver = {
565 .name = "rk808",
566 .of_match_table = rk808_of_match,
567 },
568 .probe = rk808_probe,
569 .remove = rk808_remove,
f69a7cf7
CZ
570};
571
572module_i2c_driver(rk808_i2c_driver);
573
574MODULE_LICENSE("GPL");
575MODULE_AUTHOR("Chris Zhong <zyw@rock-chips.com>");
576MODULE_AUTHOR("Zhang Qing <zhangqing@rock-chips.com>");
2eedcbfc
WE
577MODULE_AUTHOR("Wadim Egorov <w.egorov@phytec.de>");
578MODULE_DESCRIPTION("RK808/RK818 PMIC driver");