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f52046b1 BR |
1 | /* NXP PCF50633 Power Management Unit (PMU) driver |
2 | * | |
3 | * (C) 2006-2008 by Openmoko, Inc. | |
4 | * Author: Harald Welte <laforge@openmoko.org> | |
5 | * Balaji Rao <balajirrao@openmoko.org> | |
6 | * All rights reserved. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License as published by the | |
10 | * Free Software Foundation; either version 2 of the License, or (at your | |
11 | * option) any later version. | |
12 | * | |
13 | */ | |
14 | ||
15 | #include <linux/kernel.h> | |
16 | #include <linux/device.h> | |
17 | #include <linux/sysfs.h> | |
f52046b1 BR |
18 | #include <linux/module.h> |
19 | #include <linux/types.h> | |
20 | #include <linux/interrupt.h> | |
21 | #include <linux/workqueue.h> | |
22 | #include <linux/platform_device.h> | |
23 | #include <linux/i2c.h> | |
24 | #include <linux/irq.h> | |
25 | ||
26 | #include <linux/mfd/pcf50633/core.h> | |
27 | ||
28 | /* Two MBCS registers used during cold start */ | |
29 | #define PCF50633_REG_MBCS1 0x4b | |
30 | #define PCF50633_REG_MBCS2 0x4c | |
31 | #define PCF50633_MBCS1_USBPRES 0x01 | |
32 | #define PCF50633_MBCS1_ADAPTPRES 0x01 | |
33 | ||
34 | static int __pcf50633_read(struct pcf50633 *pcf, u8 reg, int num, u8 *data) | |
35 | { | |
36 | int ret; | |
37 | ||
38 | ret = i2c_smbus_read_i2c_block_data(pcf->i2c_client, reg, | |
39 | num, data); | |
40 | if (ret < 0) | |
41 | dev_err(pcf->dev, "Error reading %d regs at %d\n", num, reg); | |
42 | ||
43 | return ret; | |
44 | } | |
45 | ||
46 | static int __pcf50633_write(struct pcf50633 *pcf, u8 reg, int num, u8 *data) | |
47 | { | |
48 | int ret; | |
49 | ||
50 | ret = i2c_smbus_write_i2c_block_data(pcf->i2c_client, reg, | |
51 | num, data); | |
52 | if (ret < 0) | |
53 | dev_err(pcf->dev, "Error writing %d regs at %d\n", num, reg); | |
54 | ||
55 | return ret; | |
56 | ||
57 | } | |
58 | ||
59 | /* Read a block of upto 32 regs */ | |
60 | int pcf50633_read_block(struct pcf50633 *pcf, u8 reg, | |
61 | int nr_regs, u8 *data) | |
62 | { | |
63 | int ret; | |
64 | ||
65 | mutex_lock(&pcf->lock); | |
66 | ret = __pcf50633_read(pcf, reg, nr_regs, data); | |
67 | mutex_unlock(&pcf->lock); | |
68 | ||
69 | return ret; | |
70 | } | |
71 | EXPORT_SYMBOL_GPL(pcf50633_read_block); | |
72 | ||
73 | /* Write a block of upto 32 regs */ | |
74 | int pcf50633_write_block(struct pcf50633 *pcf , u8 reg, | |
75 | int nr_regs, u8 *data) | |
76 | { | |
77 | int ret; | |
78 | ||
79 | mutex_lock(&pcf->lock); | |
80 | ret = __pcf50633_write(pcf, reg, nr_regs, data); | |
81 | mutex_unlock(&pcf->lock); | |
82 | ||
83 | return ret; | |
84 | } | |
85 | EXPORT_SYMBOL_GPL(pcf50633_write_block); | |
86 | ||
87 | u8 pcf50633_reg_read(struct pcf50633 *pcf, u8 reg) | |
88 | { | |
89 | u8 val; | |
90 | ||
91 | mutex_lock(&pcf->lock); | |
92 | __pcf50633_read(pcf, reg, 1, &val); | |
93 | mutex_unlock(&pcf->lock); | |
94 | ||
95 | return val; | |
96 | } | |
97 | EXPORT_SYMBOL_GPL(pcf50633_reg_read); | |
98 | ||
99 | int pcf50633_reg_write(struct pcf50633 *pcf, u8 reg, u8 val) | |
100 | { | |
101 | int ret; | |
102 | ||
103 | mutex_lock(&pcf->lock); | |
104 | ret = __pcf50633_write(pcf, reg, 1, &val); | |
105 | mutex_unlock(&pcf->lock); | |
106 | ||
107 | return ret; | |
108 | } | |
109 | EXPORT_SYMBOL_GPL(pcf50633_reg_write); | |
110 | ||
111 | int pcf50633_reg_set_bit_mask(struct pcf50633 *pcf, u8 reg, u8 mask, u8 val) | |
112 | { | |
113 | int ret; | |
114 | u8 tmp; | |
115 | ||
116 | val &= mask; | |
117 | ||
118 | mutex_lock(&pcf->lock); | |
119 | ret = __pcf50633_read(pcf, reg, 1, &tmp); | |
120 | if (ret < 0) | |
121 | goto out; | |
122 | ||
123 | tmp &= ~mask; | |
124 | tmp |= val; | |
125 | ret = __pcf50633_write(pcf, reg, 1, &tmp); | |
126 | ||
127 | out: | |
128 | mutex_unlock(&pcf->lock); | |
129 | ||
130 | return ret; | |
131 | } | |
132 | EXPORT_SYMBOL_GPL(pcf50633_reg_set_bit_mask); | |
133 | ||
134 | int pcf50633_reg_clear_bits(struct pcf50633 *pcf, u8 reg, u8 val) | |
135 | { | |
136 | int ret; | |
137 | u8 tmp; | |
138 | ||
139 | mutex_lock(&pcf->lock); | |
140 | ret = __pcf50633_read(pcf, reg, 1, &tmp); | |
141 | if (ret < 0) | |
142 | goto out; | |
143 | ||
144 | tmp &= ~val; | |
145 | ret = __pcf50633_write(pcf, reg, 1, &tmp); | |
146 | ||
147 | out: | |
148 | mutex_unlock(&pcf->lock); | |
149 | ||
150 | return ret; | |
151 | } | |
152 | EXPORT_SYMBOL_GPL(pcf50633_reg_clear_bits); | |
153 | ||
154 | /* sysfs attributes */ | |
155 | static ssize_t show_dump_regs(struct device *dev, struct device_attribute *attr, | |
156 | char *buf) | |
157 | { | |
158 | struct pcf50633 *pcf = dev_get_drvdata(dev); | |
159 | u8 dump[16]; | |
160 | int n, n1, idx = 0; | |
161 | char *buf1 = buf; | |
162 | static u8 address_no_read[] = { /* must be ascending */ | |
163 | PCF50633_REG_INT1, | |
164 | PCF50633_REG_INT2, | |
165 | PCF50633_REG_INT3, | |
166 | PCF50633_REG_INT4, | |
167 | PCF50633_REG_INT5, | |
168 | 0 /* terminator */ | |
169 | }; | |
170 | ||
171 | for (n = 0; n < 256; n += sizeof(dump)) { | |
172 | for (n1 = 0; n1 < sizeof(dump); n1++) | |
173 | if (n == address_no_read[idx]) { | |
174 | idx++; | |
175 | dump[n1] = 0x00; | |
176 | } else | |
177 | dump[n1] = pcf50633_reg_read(pcf, n + n1); | |
178 | ||
179 | hex_dump_to_buffer(dump, sizeof(dump), 16, 1, buf1, 128, 0); | |
180 | buf1 += strlen(buf1); | |
181 | *buf1++ = '\n'; | |
182 | *buf1 = '\0'; | |
183 | } | |
184 | ||
185 | return buf1 - buf; | |
186 | } | |
187 | static DEVICE_ATTR(dump_regs, 0400, show_dump_regs, NULL); | |
188 | ||
189 | static ssize_t show_resume_reason(struct device *dev, | |
190 | struct device_attribute *attr, char *buf) | |
191 | { | |
192 | struct pcf50633 *pcf = dev_get_drvdata(dev); | |
193 | int n; | |
194 | ||
195 | n = sprintf(buf, "%02x%02x%02x%02x%02x\n", | |
196 | pcf->resume_reason[0], | |
197 | pcf->resume_reason[1], | |
198 | pcf->resume_reason[2], | |
199 | pcf->resume_reason[3], | |
200 | pcf->resume_reason[4]); | |
201 | ||
202 | return n; | |
203 | } | |
204 | static DEVICE_ATTR(resume_reason, 0400, show_resume_reason, NULL); | |
205 | ||
206 | static struct attribute *pcf_sysfs_entries[] = { | |
207 | &dev_attr_dump_regs.attr, | |
208 | &dev_attr_resume_reason.attr, | |
209 | NULL, | |
210 | }; | |
211 | ||
212 | static struct attribute_group pcf_attr_group = { | |
213 | .name = NULL, /* put in device directory */ | |
214 | .attrs = pcf_sysfs_entries, | |
215 | }; | |
216 | ||
217 | int pcf50633_register_irq(struct pcf50633 *pcf, int irq, | |
218 | void (*handler) (int, void *), void *data) | |
219 | { | |
220 | if (irq < 0 || irq > PCF50633_NUM_IRQ || !handler) | |
221 | return -EINVAL; | |
222 | ||
223 | if (WARN_ON(pcf->irq_handler[irq].handler)) | |
224 | return -EBUSY; | |
225 | ||
226 | mutex_lock(&pcf->lock); | |
227 | pcf->irq_handler[irq].handler = handler; | |
228 | pcf->irq_handler[irq].data = data; | |
229 | mutex_unlock(&pcf->lock); | |
230 | ||
231 | return 0; | |
232 | } | |
233 | EXPORT_SYMBOL_GPL(pcf50633_register_irq); | |
234 | ||
235 | int pcf50633_free_irq(struct pcf50633 *pcf, int irq) | |
236 | { | |
237 | if (irq < 0 || irq > PCF50633_NUM_IRQ) | |
238 | return -EINVAL; | |
239 | ||
240 | mutex_lock(&pcf->lock); | |
241 | pcf->irq_handler[irq].handler = NULL; | |
242 | mutex_unlock(&pcf->lock); | |
243 | ||
244 | return 0; | |
245 | } | |
246 | EXPORT_SYMBOL_GPL(pcf50633_free_irq); | |
247 | ||
248 | static int __pcf50633_irq_mask_set(struct pcf50633 *pcf, int irq, u8 mask) | |
249 | { | |
250 | u8 reg, bits, tmp; | |
251 | int ret = 0, idx; | |
252 | ||
253 | idx = irq >> 3; | |
254 | reg = PCF50633_REG_INT1M + idx; | |
255 | bits = 1 << (irq & 0x07); | |
256 | ||
257 | mutex_lock(&pcf->lock); | |
258 | ||
259 | if (mask) { | |
260 | ret = __pcf50633_read(pcf, reg, 1, &tmp); | |
261 | if (ret < 0) | |
262 | goto out; | |
263 | ||
264 | tmp |= bits; | |
265 | ||
266 | ret = __pcf50633_write(pcf, reg, 1, &tmp); | |
267 | if (ret < 0) | |
268 | goto out; | |
269 | ||
270 | pcf->mask_regs[idx] &= ~bits; | |
271 | pcf->mask_regs[idx] |= bits; | |
272 | } else { | |
273 | ret = __pcf50633_read(pcf, reg, 1, &tmp); | |
274 | if (ret < 0) | |
275 | goto out; | |
276 | ||
277 | tmp &= ~bits; | |
278 | ||
279 | ret = __pcf50633_write(pcf, reg, 1, &tmp); | |
280 | if (ret < 0) | |
281 | goto out; | |
282 | ||
283 | pcf->mask_regs[idx] &= ~bits; | |
284 | } | |
285 | out: | |
286 | mutex_unlock(&pcf->lock); | |
287 | ||
288 | return ret; | |
289 | } | |
290 | ||
291 | int pcf50633_irq_mask(struct pcf50633 *pcf, int irq) | |
292 | { | |
b18fdc4b | 293 | dev_dbg(pcf->dev, "Masking IRQ %d\n", irq); |
f52046b1 BR |
294 | |
295 | return __pcf50633_irq_mask_set(pcf, irq, 1); | |
296 | } | |
297 | EXPORT_SYMBOL_GPL(pcf50633_irq_mask); | |
298 | ||
299 | int pcf50633_irq_unmask(struct pcf50633 *pcf, int irq) | |
300 | { | |
b18fdc4b | 301 | dev_dbg(pcf->dev, "Unmasking IRQ %d\n", irq); |
f52046b1 BR |
302 | |
303 | return __pcf50633_irq_mask_set(pcf, irq, 0); | |
304 | } | |
305 | EXPORT_SYMBOL_GPL(pcf50633_irq_unmask); | |
306 | ||
307 | int pcf50633_irq_mask_get(struct pcf50633 *pcf, int irq) | |
308 | { | |
309 | u8 reg, bits; | |
310 | ||
311 | reg = irq >> 3; | |
312 | bits = 1 << (irq & 0x07); | |
313 | ||
314 | return pcf->mask_regs[reg] & bits; | |
315 | } | |
316 | EXPORT_SYMBOL_GPL(pcf50633_irq_mask_get); | |
317 | ||
318 | static void pcf50633_irq_call_handler(struct pcf50633 *pcf, int irq) | |
319 | { | |
320 | if (pcf->irq_handler[irq].handler) | |
321 | pcf->irq_handler[irq].handler(irq, pcf->irq_handler[irq].data); | |
322 | } | |
323 | ||
324 | /* Maximum amount of time ONKEY is held before emergency action is taken */ | |
325 | #define PCF50633_ONKEY1S_TIMEOUT 8 | |
326 | ||
327 | static void pcf50633_irq_worker(struct work_struct *work) | |
328 | { | |
329 | struct pcf50633 *pcf; | |
330 | int ret, i, j; | |
331 | u8 pcf_int[5], chgstat; | |
332 | ||
333 | pcf = container_of(work, struct pcf50633, irq_work); | |
334 | ||
335 | /* Read the 5 INT regs in one transaction */ | |
336 | ret = pcf50633_read_block(pcf, PCF50633_REG_INT1, | |
337 | ARRAY_SIZE(pcf_int), pcf_int); | |
338 | if (ret != ARRAY_SIZE(pcf_int)) { | |
339 | dev_err(pcf->dev, "Error reading INT registers\n"); | |
340 | ||
341 | /* | |
342 | * If this doesn't ACK the interrupt to the chip, we'll be | |
343 | * called once again as we're level triggered. | |
344 | */ | |
345 | goto out; | |
346 | } | |
347 | ||
06b1cc9c PF |
348 | /* defeat 8s death from lowsys on A5 */ |
349 | pcf50633_reg_write(pcf, PCF50633_REG_OOCSHDWN, 0x04); | |
350 | ||
f52046b1 BR |
351 | /* We immediately read the usb and adapter status. We thus make sure |
352 | * only of USBINS/USBREM IRQ handlers are called */ | |
353 | if (pcf_int[0] & (PCF50633_INT1_USBINS | PCF50633_INT1_USBREM)) { | |
354 | chgstat = pcf50633_reg_read(pcf, PCF50633_REG_MBCS2); | |
355 | if (chgstat & (0x3 << 4)) | |
356 | pcf_int[0] &= ~(1 << PCF50633_INT1_USBREM); | |
357 | else | |
358 | pcf_int[0] &= ~(1 << PCF50633_INT1_USBINS); | |
359 | } | |
360 | ||
361 | /* Make sure only one of ADPINS or ADPREM is set */ | |
362 | if (pcf_int[0] & (PCF50633_INT1_ADPINS | PCF50633_INT1_ADPREM)) { | |
363 | chgstat = pcf50633_reg_read(pcf, PCF50633_REG_MBCS2); | |
364 | if (chgstat & (0x3 << 4)) | |
365 | pcf_int[0] &= ~(1 << PCF50633_INT1_ADPREM); | |
366 | else | |
367 | pcf_int[0] &= ~(1 << PCF50633_INT1_ADPINS); | |
368 | } | |
369 | ||
370 | dev_dbg(pcf->dev, "INT1=0x%02x INT2=0x%02x INT3=0x%02x " | |
371 | "INT4=0x%02x INT5=0x%02x\n", pcf_int[0], | |
372 | pcf_int[1], pcf_int[2], pcf_int[3], pcf_int[4]); | |
373 | ||
374 | /* Some revisions of the chip don't have a 8s standby mode on | |
375 | * ONKEY1S press. We try to manually do it in such cases. */ | |
376 | if ((pcf_int[0] & PCF50633_INT1_SECOND) && pcf->onkey1s_held) { | |
377 | dev_info(pcf->dev, "ONKEY1S held for %d secs\n", | |
378 | pcf->onkey1s_held); | |
379 | if (pcf->onkey1s_held++ == PCF50633_ONKEY1S_TIMEOUT) | |
380 | if (pcf->pdata->force_shutdown) | |
381 | pcf->pdata->force_shutdown(pcf); | |
382 | } | |
383 | ||
384 | if (pcf_int[2] & PCF50633_INT3_ONKEY1S) { | |
385 | dev_info(pcf->dev, "ONKEY1S held\n"); | |
386 | pcf->onkey1s_held = 1 ; | |
387 | ||
388 | /* Unmask IRQ_SECOND */ | |
389 | pcf50633_reg_clear_bits(pcf, PCF50633_REG_INT1M, | |
390 | PCF50633_INT1_SECOND); | |
391 | ||
392 | /* Unmask IRQ_ONKEYR */ | |
393 | pcf50633_reg_clear_bits(pcf, PCF50633_REG_INT2M, | |
394 | PCF50633_INT2_ONKEYR); | |
395 | } | |
396 | ||
397 | if ((pcf_int[1] & PCF50633_INT2_ONKEYR) && pcf->onkey1s_held) { | |
398 | pcf->onkey1s_held = 0; | |
399 | ||
400 | /* Mask SECOND and ONKEYR interrupts */ | |
401 | if (pcf->mask_regs[0] & PCF50633_INT1_SECOND) | |
402 | pcf50633_reg_set_bit_mask(pcf, | |
403 | PCF50633_REG_INT1M, | |
404 | PCF50633_INT1_SECOND, | |
405 | PCF50633_INT1_SECOND); | |
406 | ||
407 | if (pcf->mask_regs[1] & PCF50633_INT2_ONKEYR) | |
408 | pcf50633_reg_set_bit_mask(pcf, | |
409 | PCF50633_REG_INT2M, | |
410 | PCF50633_INT2_ONKEYR, | |
411 | PCF50633_INT2_ONKEYR); | |
412 | } | |
413 | ||
414 | /* Have we just resumed ? */ | |
415 | if (pcf->is_suspended) { | |
416 | pcf->is_suspended = 0; | |
417 | ||
418 | /* Set the resume reason filtering out non resumers */ | |
419 | for (i = 0; i < ARRAY_SIZE(pcf_int); i++) | |
420 | pcf->resume_reason[i] = pcf_int[i] & | |
421 | pcf->pdata->resumers[i]; | |
422 | ||
423 | /* Make sure we don't pass on any ONKEY events to | |
424 | * userspace now */ | |
425 | pcf_int[1] &= ~(PCF50633_INT2_ONKEYR | PCF50633_INT2_ONKEYF); | |
426 | } | |
427 | ||
428 | for (i = 0; i < ARRAY_SIZE(pcf_int); i++) { | |
429 | /* Unset masked interrupts */ | |
430 | pcf_int[i] &= ~pcf->mask_regs[i]; | |
431 | ||
432 | for (j = 0; j < 8 ; j++) | |
433 | if (pcf_int[i] & (1 << j)) | |
434 | pcf50633_irq_call_handler(pcf, (i * 8) + j); | |
435 | } | |
436 | ||
437 | out: | |
438 | put_device(pcf->dev); | |
439 | enable_irq(pcf->irq); | |
440 | } | |
441 | ||
442 | static irqreturn_t pcf50633_irq(int irq, void *data) | |
443 | { | |
444 | struct pcf50633 *pcf = data; | |
445 | ||
446 | dev_dbg(pcf->dev, "pcf50633_irq\n"); | |
447 | ||
448 | get_device(pcf->dev); | |
f43ab901 | 449 | disable_irq_nosync(pcf->irq); |
ed52e62e | 450 | queue_work(pcf->work_queue, &pcf->irq_work); |
f52046b1 BR |
451 | |
452 | return IRQ_HANDLED; | |
453 | } | |
454 | ||
455 | static void | |
456 | pcf50633_client_dev_register(struct pcf50633 *pcf, const char *name, | |
457 | struct platform_device **pdev) | |
458 | { | |
f52046b1 BR |
459 | int ret; |
460 | ||
461 | *pdev = platform_device_alloc(name, -1); | |
462 | if (!*pdev) { | |
463 | dev_err(pcf->dev, "Falied to allocate %s\n", name); | |
464 | return; | |
465 | } | |
466 | ||
f52046b1 BR |
467 | (*pdev)->dev.parent = pcf->dev; |
468 | ||
469 | ret = platform_device_add(*pdev); | |
470 | if (ret) { | |
471 | dev_err(pcf->dev, "Failed to register %s: %d\n", name, ret); | |
472 | platform_device_put(*pdev); | |
473 | *pdev = NULL; | |
474 | } | |
475 | } | |
476 | ||
477 | #ifdef CONFIG_PM | |
25993e4e | 478 | static int pcf50633_suspend(struct i2c_client *client, pm_message_t state) |
f52046b1 BR |
479 | { |
480 | struct pcf50633 *pcf; | |
481 | int ret = 0, i; | |
482 | u8 res[5]; | |
483 | ||
25993e4e | 484 | pcf = i2c_get_clientdata(client); |
f52046b1 BR |
485 | |
486 | /* Make sure our interrupt handlers are not called | |
487 | * henceforth */ | |
488 | disable_irq(pcf->irq); | |
489 | ||
490 | /* Make sure that any running IRQ worker has quit */ | |
491 | cancel_work_sync(&pcf->irq_work); | |
492 | ||
493 | /* Save the masks */ | |
494 | ret = pcf50633_read_block(pcf, PCF50633_REG_INT1M, | |
495 | ARRAY_SIZE(pcf->suspend_irq_masks), | |
496 | pcf->suspend_irq_masks); | |
497 | if (ret < 0) { | |
498 | dev_err(pcf->dev, "error saving irq masks\n"); | |
499 | goto out; | |
500 | } | |
501 | ||
502 | /* Write wakeup irq masks */ | |
503 | for (i = 0; i < ARRAY_SIZE(res); i++) | |
504 | res[i] = ~pcf->pdata->resumers[i]; | |
505 | ||
506 | ret = pcf50633_write_block(pcf, PCF50633_REG_INT1M, | |
507 | ARRAY_SIZE(res), &res[0]); | |
508 | if (ret < 0) { | |
509 | dev_err(pcf->dev, "error writing wakeup irq masks\n"); | |
510 | goto out; | |
511 | } | |
512 | ||
513 | pcf->is_suspended = 1; | |
514 | ||
515 | out: | |
516 | return ret; | |
517 | } | |
518 | ||
25993e4e | 519 | static int pcf50633_resume(struct i2c_client *client) |
f52046b1 BR |
520 | { |
521 | struct pcf50633 *pcf; | |
522 | int ret; | |
523 | ||
25993e4e | 524 | pcf = i2c_get_clientdata(client); |
f52046b1 BR |
525 | |
526 | /* Write the saved mask registers */ | |
527 | ret = pcf50633_write_block(pcf, PCF50633_REG_INT1M, | |
528 | ARRAY_SIZE(pcf->suspend_irq_masks), | |
529 | pcf->suspend_irq_masks); | |
530 | if (ret < 0) | |
531 | dev_err(pcf->dev, "Error restoring saved suspend masks\n"); | |
532 | ||
533 | /* Restore regulators' state */ | |
534 | ||
535 | ||
536 | get_device(pcf->dev); | |
537 | ||
538 | /* | |
539 | * Clear any pending interrupts and set resume reason if any. | |
540 | * This will leave with enable_irq() | |
541 | */ | |
542 | pcf50633_irq_worker(&pcf->irq_work); | |
543 | ||
544 | return 0; | |
545 | } | |
546 | #else | |
547 | #define pcf50633_suspend NULL | |
548 | #define pcf50633_resume NULL | |
549 | #endif | |
550 | ||
551 | static int __devinit pcf50633_probe(struct i2c_client *client, | |
552 | const struct i2c_device_id *ids) | |
553 | { | |
554 | struct pcf50633 *pcf; | |
555 | struct pcf50633_platform_data *pdata = client->dev.platform_data; | |
24213ae1 | 556 | int i, ret; |
f52046b1 BR |
557 | int version, variant; |
558 | ||
24213ae1 LPC |
559 | if (!client->irq) { |
560 | dev_err(&client->dev, "Missing IRQ\n"); | |
561 | return -ENOENT; | |
562 | } | |
563 | ||
f52046b1 BR |
564 | pcf = kzalloc(sizeof(*pcf), GFP_KERNEL); |
565 | if (!pcf) | |
566 | return -ENOMEM; | |
567 | ||
568 | pcf->pdata = pdata; | |
569 | ||
570 | mutex_init(&pcf->lock); | |
571 | ||
572 | i2c_set_clientdata(client, pcf); | |
573 | pcf->dev = &client->dev; | |
574 | pcf->i2c_client = client; | |
575 | pcf->irq = client->irq; | |
ed52e62e | 576 | pcf->work_queue = create_singlethread_workqueue("pcf50633"); |
f52046b1 | 577 | |
24213ae1 LPC |
578 | if (!pcf->work_queue) { |
579 | dev_err(&client->dev, "Failed to alloc workqueue\n"); | |
580 | ret = -ENOMEM; | |
581 | goto err_free; | |
582 | } | |
583 | ||
f52046b1 BR |
584 | INIT_WORK(&pcf->irq_work, pcf50633_irq_worker); |
585 | ||
586 | version = pcf50633_reg_read(pcf, 0); | |
587 | variant = pcf50633_reg_read(pcf, 1); | |
588 | if (version < 0 || variant < 0) { | |
589 | dev_err(pcf->dev, "Unable to probe pcf50633\n"); | |
590 | ret = -ENODEV; | |
24213ae1 | 591 | goto err_destroy_workqueue; |
f52046b1 BR |
592 | } |
593 | ||
594 | dev_info(pcf->dev, "Probed device version %d variant %d\n", | |
595 | version, variant); | |
596 | ||
597 | /* Enable all interrupts except RTC SECOND */ | |
598 | pcf->mask_regs[0] = 0x80; | |
599 | pcf50633_reg_write(pcf, PCF50633_REG_INT1M, pcf->mask_regs[0]); | |
600 | pcf50633_reg_write(pcf, PCF50633_REG_INT2M, 0x00); | |
601 | pcf50633_reg_write(pcf, PCF50633_REG_INT3M, 0x00); | |
602 | pcf50633_reg_write(pcf, PCF50633_REG_INT4M, 0x00); | |
603 | pcf50633_reg_write(pcf, PCF50633_REG_INT5M, 0x00); | |
604 | ||
24213ae1 LPC |
605 | ret = request_irq(client->irq, pcf50633_irq, |
606 | IRQF_TRIGGER_LOW, "pcf50633", pcf); | |
607 | ||
608 | if (ret) { | |
609 | dev_err(pcf->dev, "Failed to request IRQ %d\n", ret); | |
610 | goto err_destroy_workqueue; | |
611 | } | |
612 | ||
f52046b1 BR |
613 | /* Create sub devices */ |
614 | pcf50633_client_dev_register(pcf, "pcf50633-input", | |
615 | &pcf->input_pdev); | |
616 | pcf50633_client_dev_register(pcf, "pcf50633-rtc", | |
617 | &pcf->rtc_pdev); | |
618 | pcf50633_client_dev_register(pcf, "pcf50633-mbc", | |
619 | &pcf->mbc_pdev); | |
620 | pcf50633_client_dev_register(pcf, "pcf50633-adc", | |
621 | &pcf->adc_pdev); | |
622 | ||
623 | for (i = 0; i < PCF50633_NUM_REGULATORS; i++) { | |
624 | struct platform_device *pdev; | |
625 | ||
626 | pdev = platform_device_alloc("pcf50633-regltr", i); | |
627 | if (!pdev) { | |
24213ae1 | 628 | dev_err(pcf->dev, "Cannot create regulator %d\n", i); |
f52046b1 BR |
629 | continue; |
630 | } | |
631 | ||
632 | pdev->dev.parent = pcf->dev; | |
bbb2e496 LPC |
633 | platform_device_add_data(pdev, &pdata->reg_init_data[i], |
634 | sizeof(pdata->reg_init_data[i])); | |
f52046b1 BR |
635 | pcf->regulator_pdev[i] = pdev; |
636 | ||
637 | platform_device_add(pdev); | |
638 | } | |
639 | ||
f52046b1 BR |
640 | if (enable_irq_wake(client->irq) < 0) |
641 | dev_err(pcf->dev, "IRQ %u cannot be enabled as wake-up source" | |
642 | "in this hardware revision", client->irq); | |
643 | ||
644 | ret = sysfs_create_group(&client->dev.kobj, &pcf_attr_group); | |
645 | if (ret) | |
646 | dev_err(pcf->dev, "error creating sysfs entries\n"); | |
647 | ||
648 | if (pdata->probe_done) | |
649 | pdata->probe_done(pcf); | |
650 | ||
651 | return 0; | |
652 | ||
24213ae1 | 653 | err_destroy_workqueue: |
ed52e62e | 654 | destroy_workqueue(pcf->work_queue); |
24213ae1 LPC |
655 | err_free: |
656 | i2c_set_clientdata(client, NULL); | |
f52046b1 | 657 | kfree(pcf); |
24213ae1 | 658 | |
f52046b1 BR |
659 | return ret; |
660 | } | |
661 | ||
662 | static int __devexit pcf50633_remove(struct i2c_client *client) | |
663 | { | |
664 | struct pcf50633 *pcf = i2c_get_clientdata(client); | |
665 | int i; | |
666 | ||
667 | free_irq(pcf->irq, pcf); | |
ed52e62e | 668 | destroy_workqueue(pcf->work_queue); |
f52046b1 BR |
669 | |
670 | platform_device_unregister(pcf->input_pdev); | |
671 | platform_device_unregister(pcf->rtc_pdev); | |
672 | platform_device_unregister(pcf->mbc_pdev); | |
673 | platform_device_unregister(pcf->adc_pdev); | |
674 | ||
675 | for (i = 0; i < PCF50633_NUM_REGULATORS; i++) | |
676 | platform_device_unregister(pcf->regulator_pdev[i]); | |
677 | ||
678 | kfree(pcf); | |
679 | ||
680 | return 0; | |
681 | } | |
682 | ||
683 | static struct i2c_device_id pcf50633_id_table[] = { | |
684 | {"pcf50633", 0x73}, | |
8915e540 | 685 | {/* end of list */} |
f52046b1 BR |
686 | }; |
687 | ||
688 | static struct i2c_driver pcf50633_driver = { | |
689 | .driver = { | |
690 | .name = "pcf50633", | |
f52046b1 BR |
691 | }, |
692 | .id_table = pcf50633_id_table, | |
693 | .probe = pcf50633_probe, | |
694 | .remove = __devexit_p(pcf50633_remove), | |
25993e4e LPC |
695 | .suspend = pcf50633_suspend, |
696 | .resume = pcf50633_resume, | |
f52046b1 BR |
697 | }; |
698 | ||
699 | static int __init pcf50633_init(void) | |
700 | { | |
701 | return i2c_add_driver(&pcf50633_driver); | |
702 | } | |
703 | ||
704 | static void __exit pcf50633_exit(void) | |
705 | { | |
706 | i2c_del_driver(&pcf50633_driver); | |
707 | } | |
708 | ||
709 | MODULE_DESCRIPTION("I2C chip driver for NXP PCF50633 PMU"); | |
710 | MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>"); | |
711 | MODULE_LICENSE("GPL"); | |
712 | ||
2021de87 | 713 | subsys_initcall(pcf50633_init); |
f52046b1 | 714 | module_exit(pcf50633_exit); |