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0c4a59fe TL |
1 | /* |
2 | * Copyright (C) 2004 Texas Instruments, Inc. | |
3 | * | |
4 | * Some parts based tps65010.c: | |
5 | * Copyright (C) 2004 Texas Instruments and | |
6 | * Copyright (C) 2004-2005 David Brownell | |
7 | * | |
8 | * Some parts based on tlv320aic24.c: | |
9 | * Copyright (C) by Kai Svahn <kai.svahn@nokia.com> | |
10 | * | |
11 | * Changes for interrupt handling and clean-up by | |
12 | * Tony Lindgren <tony@atomide.com> and Imre Deak <imre.deak@nokia.com> | |
13 | * Cleanup and generalized support for voltage setting by | |
14 | * Juha Yrjola | |
15 | * Added support for controlling VCORE and regulator sleep states, | |
16 | * Amit Kucheria <amit.kucheria@nokia.com> | |
17 | * Copyright (C) 2005, 2006 Nokia Corporation | |
18 | * | |
19 | * This program is free software; you can redistribute it and/or modify | |
20 | * it under the terms of the GNU General Public License as published by | |
21 | * the Free Software Foundation; either version 2 of the License, or | |
22 | * (at your option) any later version. | |
23 | * | |
24 | * This program is distributed in the hope that it will be useful, | |
25 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
26 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
27 | * GNU General Public License for more details. | |
28 | * | |
29 | * You should have received a copy of the GNU General Public License | |
30 | * along with this program; if not, write to the Free Software | |
31 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
32 | */ | |
33 | ||
34 | #include <linux/module.h> | |
35 | #include <linux/i2c.h> | |
36 | #include <linux/interrupt.h> | |
37 | #include <linux/sched.h> | |
38 | #include <linux/mutex.h> | |
39 | #include <linux/workqueue.h> | |
40 | #include <linux/delay.h> | |
41 | #include <linux/rtc.h> | |
42 | #include <linux/bcd.h> | |
5a0e3ad6 | 43 | #include <linux/slab.h> |
0c4a59fe | 44 | |
0c4a59fe TL |
45 | #include <asm/mach/irq.h> |
46 | ||
a09e64fb | 47 | #include <mach/gpio.h> |
ce491cf8 | 48 | #include <plat/menelaus.h> |
0c4a59fe TL |
49 | |
50 | #define DRIVER_NAME "menelaus" | |
51 | ||
0c4a59fe TL |
52 | #define MENELAUS_I2C_ADDRESS 0x72 |
53 | ||
54 | #define MENELAUS_REV 0x01 | |
55 | #define MENELAUS_VCORE_CTRL1 0x02 | |
56 | #define MENELAUS_VCORE_CTRL2 0x03 | |
57 | #define MENELAUS_VCORE_CTRL3 0x04 | |
58 | #define MENELAUS_VCORE_CTRL4 0x05 | |
59 | #define MENELAUS_VCORE_CTRL5 0x06 | |
60 | #define MENELAUS_DCDC_CTRL1 0x07 | |
61 | #define MENELAUS_DCDC_CTRL2 0x08 | |
62 | #define MENELAUS_DCDC_CTRL3 0x09 | |
63 | #define MENELAUS_LDO_CTRL1 0x0A | |
64 | #define MENELAUS_LDO_CTRL2 0x0B | |
65 | #define MENELAUS_LDO_CTRL3 0x0C | |
66 | #define MENELAUS_LDO_CTRL4 0x0D | |
67 | #define MENELAUS_LDO_CTRL5 0x0E | |
68 | #define MENELAUS_LDO_CTRL6 0x0F | |
69 | #define MENELAUS_LDO_CTRL7 0x10 | |
70 | #define MENELAUS_LDO_CTRL8 0x11 | |
71 | #define MENELAUS_SLEEP_CTRL1 0x12 | |
72 | #define MENELAUS_SLEEP_CTRL2 0x13 | |
73 | #define MENELAUS_DEVICE_OFF 0x14 | |
74 | #define MENELAUS_OSC_CTRL 0x15 | |
75 | #define MENELAUS_DETECT_CTRL 0x16 | |
76 | #define MENELAUS_INT_MASK1 0x17 | |
77 | #define MENELAUS_INT_MASK2 0x18 | |
78 | #define MENELAUS_INT_STATUS1 0x19 | |
79 | #define MENELAUS_INT_STATUS2 0x1A | |
80 | #define MENELAUS_INT_ACK1 0x1B | |
81 | #define MENELAUS_INT_ACK2 0x1C | |
82 | #define MENELAUS_GPIO_CTRL 0x1D | |
83 | #define MENELAUS_GPIO_IN 0x1E | |
84 | #define MENELAUS_GPIO_OUT 0x1F | |
85 | #define MENELAUS_BBSMS 0x20 | |
86 | #define MENELAUS_RTC_CTRL 0x21 | |
87 | #define MENELAUS_RTC_UPDATE 0x22 | |
88 | #define MENELAUS_RTC_SEC 0x23 | |
89 | #define MENELAUS_RTC_MIN 0x24 | |
90 | #define MENELAUS_RTC_HR 0x25 | |
91 | #define MENELAUS_RTC_DAY 0x26 | |
92 | #define MENELAUS_RTC_MON 0x27 | |
93 | #define MENELAUS_RTC_YR 0x28 | |
94 | #define MENELAUS_RTC_WKDAY 0x29 | |
95 | #define MENELAUS_RTC_AL_SEC 0x2A | |
96 | #define MENELAUS_RTC_AL_MIN 0x2B | |
97 | #define MENELAUS_RTC_AL_HR 0x2C | |
98 | #define MENELAUS_RTC_AL_DAY 0x2D | |
99 | #define MENELAUS_RTC_AL_MON 0x2E | |
100 | #define MENELAUS_RTC_AL_YR 0x2F | |
101 | #define MENELAUS_RTC_COMP_MSB 0x30 | |
102 | #define MENELAUS_RTC_COMP_LSB 0x31 | |
103 | #define MENELAUS_S1_PULL_EN 0x32 | |
104 | #define MENELAUS_S1_PULL_DIR 0x33 | |
105 | #define MENELAUS_S2_PULL_EN 0x34 | |
106 | #define MENELAUS_S2_PULL_DIR 0x35 | |
107 | #define MENELAUS_MCT_CTRL1 0x36 | |
108 | #define MENELAUS_MCT_CTRL2 0x37 | |
109 | #define MENELAUS_MCT_CTRL3 0x38 | |
110 | #define MENELAUS_MCT_PIN_ST 0x39 | |
111 | #define MENELAUS_DEBOUNCE1 0x3A | |
112 | ||
113 | #define IH_MENELAUS_IRQS 12 | |
114 | #define MENELAUS_MMC_S1CD_IRQ 0 /* MMC slot 1 card change */ | |
115 | #define MENELAUS_MMC_S2CD_IRQ 1 /* MMC slot 2 card change */ | |
116 | #define MENELAUS_MMC_S1D1_IRQ 2 /* MMC DAT1 low in slot 1 */ | |
117 | #define MENELAUS_MMC_S2D1_IRQ 3 /* MMC DAT1 low in slot 2 */ | |
118 | #define MENELAUS_LOWBAT_IRQ 4 /* Low battery */ | |
119 | #define MENELAUS_HOTDIE_IRQ 5 /* Hot die detect */ | |
120 | #define MENELAUS_UVLO_IRQ 6 /* UVLO detect */ | |
121 | #define MENELAUS_TSHUT_IRQ 7 /* Thermal shutdown */ | |
122 | #define MENELAUS_RTCTMR_IRQ 8 /* RTC timer */ | |
123 | #define MENELAUS_RTCALM_IRQ 9 /* RTC alarm */ | |
124 | #define MENELAUS_RTCERR_IRQ 10 /* RTC error */ | |
125 | #define MENELAUS_PSHBTN_IRQ 11 /* Push button */ | |
126 | #define MENELAUS_RESERVED12_IRQ 12 /* Reserved */ | |
127 | #define MENELAUS_RESERVED13_IRQ 13 /* Reserved */ | |
128 | #define MENELAUS_RESERVED14_IRQ 14 /* Reserved */ | |
129 | #define MENELAUS_RESERVED15_IRQ 15 /* Reserved */ | |
130 | ||
1c888e2e JN |
131 | /* VCORE_CTRL1 register */ |
132 | #define VCORE_CTRL1_BYP_COMP (1 << 5) | |
133 | #define VCORE_CTRL1_HW_NSW (1 << 7) | |
134 | ||
135 | /* GPIO_CTRL register */ | |
136 | #define GPIO_CTRL_SLOTSELEN (1 << 5) | |
137 | #define GPIO_CTRL_SLPCTLEN (1 << 6) | |
138 | #define GPIO1_DIR_INPUT (1 << 0) | |
139 | #define GPIO2_DIR_INPUT (1 << 1) | |
140 | #define GPIO3_DIR_INPUT (1 << 2) | |
141 | ||
142 | /* MCT_CTRL1 register */ | |
143 | #define MCT_CTRL1_S1_CMD_OD (1 << 2) | |
144 | #define MCT_CTRL1_S2_CMD_OD (1 << 3) | |
145 | ||
146 | /* MCT_CTRL2 register */ | |
147 | #define MCT_CTRL2_VS2_SEL_D0 (1 << 0) | |
148 | #define MCT_CTRL2_VS2_SEL_D1 (1 << 1) | |
149 | #define MCT_CTRL2_S1CD_BUFEN (1 << 4) | |
150 | #define MCT_CTRL2_S2CD_BUFEN (1 << 5) | |
151 | #define MCT_CTRL2_S1CD_DBEN (1 << 6) | |
152 | #define MCT_CTRL2_S2CD_BEN (1 << 7) | |
153 | ||
154 | /* MCT_CTRL3 register */ | |
155 | #define MCT_CTRL3_SLOT1_EN (1 << 0) | |
156 | #define MCT_CTRL3_SLOT2_EN (1 << 1) | |
157 | #define MCT_CTRL3_S1_AUTO_EN (1 << 2) | |
158 | #define MCT_CTRL3_S2_AUTO_EN (1 << 3) | |
159 | ||
160 | /* MCT_PIN_ST register */ | |
161 | #define MCT_PIN_ST_S1_CD_ST (1 << 0) | |
162 | #define MCT_PIN_ST_S2_CD_ST (1 << 1) | |
163 | ||
0c4a59fe TL |
164 | static void menelaus_work(struct work_struct *_menelaus); |
165 | ||
166 | struct menelaus_chip { | |
167 | struct mutex lock; | |
168 | struct i2c_client *client; | |
169 | struct work_struct work; | |
170 | #ifdef CONFIG_RTC_DRV_TWL92330 | |
171 | struct rtc_device *rtc; | |
172 | u8 rtc_control; | |
173 | unsigned uie:1; | |
174 | #endif | |
175 | unsigned vcore_hw_mode:1; | |
176 | u8 mask1, mask2; | |
177 | void (*handlers[16])(struct menelaus_chip *); | |
178 | void (*mmc_callback)(void *data, u8 mask); | |
179 | void *mmc_callback_data; | |
180 | }; | |
181 | ||
182 | static struct menelaus_chip *the_menelaus; | |
183 | ||
184 | static int menelaus_write_reg(int reg, u8 value) | |
185 | { | |
186 | int val = i2c_smbus_write_byte_data(the_menelaus->client, reg, value); | |
187 | ||
188 | if (val < 0) { | |
1f7c8234 | 189 | pr_err(DRIVER_NAME ": write error"); |
0c4a59fe TL |
190 | return val; |
191 | } | |
192 | ||
193 | return 0; | |
194 | } | |
195 | ||
196 | static int menelaus_read_reg(int reg) | |
197 | { | |
198 | int val = i2c_smbus_read_byte_data(the_menelaus->client, reg); | |
199 | ||
200 | if (val < 0) | |
1f7c8234 | 201 | pr_err(DRIVER_NAME ": read error"); |
0c4a59fe TL |
202 | |
203 | return val; | |
204 | } | |
205 | ||
206 | static int menelaus_enable_irq(int irq) | |
207 | { | |
208 | if (irq > 7) { | |
209 | irq -= 8; | |
210 | the_menelaus->mask2 &= ~(1 << irq); | |
211 | return menelaus_write_reg(MENELAUS_INT_MASK2, | |
212 | the_menelaus->mask2); | |
213 | } else { | |
214 | the_menelaus->mask1 &= ~(1 << irq); | |
215 | return menelaus_write_reg(MENELAUS_INT_MASK1, | |
216 | the_menelaus->mask1); | |
217 | } | |
218 | } | |
219 | ||
220 | static int menelaus_disable_irq(int irq) | |
221 | { | |
222 | if (irq > 7) { | |
223 | irq -= 8; | |
224 | the_menelaus->mask2 |= (1 << irq); | |
225 | return menelaus_write_reg(MENELAUS_INT_MASK2, | |
226 | the_menelaus->mask2); | |
227 | } else { | |
228 | the_menelaus->mask1 |= (1 << irq); | |
229 | return menelaus_write_reg(MENELAUS_INT_MASK1, | |
230 | the_menelaus->mask1); | |
231 | } | |
232 | } | |
233 | ||
234 | static int menelaus_ack_irq(int irq) | |
235 | { | |
236 | if (irq > 7) | |
237 | return menelaus_write_reg(MENELAUS_INT_ACK2, 1 << (irq - 8)); | |
238 | else | |
239 | return menelaus_write_reg(MENELAUS_INT_ACK1, 1 << irq); | |
240 | } | |
241 | ||
242 | /* Adds a handler for an interrupt. Does not run in interrupt context */ | |
243 | static int menelaus_add_irq_work(int irq, | |
244 | void (*handler)(struct menelaus_chip *)) | |
245 | { | |
246 | int ret = 0; | |
247 | ||
248 | mutex_lock(&the_menelaus->lock); | |
249 | the_menelaus->handlers[irq] = handler; | |
250 | ret = menelaus_enable_irq(irq); | |
251 | mutex_unlock(&the_menelaus->lock); | |
252 | ||
253 | return ret; | |
254 | } | |
255 | ||
256 | /* Removes handler for an interrupt */ | |
257 | static int menelaus_remove_irq_work(int irq) | |
258 | { | |
259 | int ret = 0; | |
260 | ||
261 | mutex_lock(&the_menelaus->lock); | |
262 | ret = menelaus_disable_irq(irq); | |
263 | the_menelaus->handlers[irq] = NULL; | |
264 | mutex_unlock(&the_menelaus->lock); | |
265 | ||
266 | return ret; | |
267 | } | |
268 | ||
269 | /* | |
270 | * Gets scheduled when a card detect interrupt happens. Note that in some cases | |
271 | * this line is wired to card cover switch rather than the card detect switch | |
272 | * in each slot. In this case the cards are not seen by menelaus. | |
273 | * FIXME: Add handling for D1 too | |
274 | */ | |
275 | static void menelaus_mmc_cd_work(struct menelaus_chip *menelaus_hw) | |
276 | { | |
277 | int reg; | |
278 | unsigned char card_mask = 0; | |
279 | ||
280 | reg = menelaus_read_reg(MENELAUS_MCT_PIN_ST); | |
281 | if (reg < 0) | |
282 | return; | |
283 | ||
284 | if (!(reg & 0x1)) | |
1c888e2e | 285 | card_mask |= MCT_PIN_ST_S1_CD_ST; |
0c4a59fe TL |
286 | |
287 | if (!(reg & 0x2)) | |
1c888e2e | 288 | card_mask |= MCT_PIN_ST_S2_CD_ST; |
0c4a59fe TL |
289 | |
290 | if (menelaus_hw->mmc_callback) | |
291 | menelaus_hw->mmc_callback(menelaus_hw->mmc_callback_data, | |
292 | card_mask); | |
293 | } | |
294 | ||
295 | /* | |
296 | * Toggles the MMC slots between open-drain and push-pull mode. | |
297 | */ | |
298 | int menelaus_set_mmc_opendrain(int slot, int enable) | |
299 | { | |
300 | int ret, val; | |
301 | ||
302 | if (slot != 1 && slot != 2) | |
303 | return -EINVAL; | |
304 | mutex_lock(&the_menelaus->lock); | |
305 | ret = menelaus_read_reg(MENELAUS_MCT_CTRL1); | |
306 | if (ret < 0) { | |
307 | mutex_unlock(&the_menelaus->lock); | |
308 | return ret; | |
309 | } | |
310 | val = ret; | |
311 | if (slot == 1) { | |
312 | if (enable) | |
1c888e2e | 313 | val |= MCT_CTRL1_S1_CMD_OD; |
0c4a59fe | 314 | else |
1c888e2e | 315 | val &= ~MCT_CTRL1_S1_CMD_OD; |
0c4a59fe TL |
316 | } else { |
317 | if (enable) | |
1c888e2e | 318 | val |= MCT_CTRL1_S2_CMD_OD; |
0c4a59fe | 319 | else |
1c888e2e | 320 | val &= ~MCT_CTRL1_S2_CMD_OD; |
0c4a59fe TL |
321 | } |
322 | ret = menelaus_write_reg(MENELAUS_MCT_CTRL1, val); | |
323 | mutex_unlock(&the_menelaus->lock); | |
324 | ||
325 | return ret; | |
326 | } | |
327 | EXPORT_SYMBOL(menelaus_set_mmc_opendrain); | |
328 | ||
329 | int menelaus_set_slot_sel(int enable) | |
330 | { | |
331 | int ret; | |
332 | ||
333 | mutex_lock(&the_menelaus->lock); | |
334 | ret = menelaus_read_reg(MENELAUS_GPIO_CTRL); | |
335 | if (ret < 0) | |
336 | goto out; | |
1c888e2e | 337 | ret |= GPIO2_DIR_INPUT; |
0c4a59fe | 338 | if (enable) |
1c888e2e | 339 | ret |= GPIO_CTRL_SLOTSELEN; |
0c4a59fe | 340 | else |
1c888e2e | 341 | ret &= ~GPIO_CTRL_SLOTSELEN; |
0c4a59fe TL |
342 | ret = menelaus_write_reg(MENELAUS_GPIO_CTRL, ret); |
343 | out: | |
344 | mutex_unlock(&the_menelaus->lock); | |
345 | return ret; | |
346 | } | |
347 | EXPORT_SYMBOL(menelaus_set_slot_sel); | |
348 | ||
349 | int menelaus_set_mmc_slot(int slot, int enable, int power, int cd_en) | |
350 | { | |
351 | int ret, val; | |
352 | ||
353 | if (slot != 1 && slot != 2) | |
354 | return -EINVAL; | |
355 | if (power >= 3) | |
356 | return -EINVAL; | |
357 | ||
358 | mutex_lock(&the_menelaus->lock); | |
359 | ||
360 | ret = menelaus_read_reg(MENELAUS_MCT_CTRL2); | |
361 | if (ret < 0) | |
362 | goto out; | |
363 | val = ret; | |
364 | if (slot == 1) { | |
365 | if (cd_en) | |
1c888e2e | 366 | val |= MCT_CTRL2_S1CD_BUFEN | MCT_CTRL2_S1CD_DBEN; |
0c4a59fe | 367 | else |
1c888e2e | 368 | val &= ~(MCT_CTRL2_S1CD_BUFEN | MCT_CTRL2_S1CD_DBEN); |
0c4a59fe TL |
369 | } else { |
370 | if (cd_en) | |
1c888e2e | 371 | val |= MCT_CTRL2_S2CD_BUFEN | MCT_CTRL2_S2CD_BEN; |
0c4a59fe | 372 | else |
1c888e2e | 373 | val &= ~(MCT_CTRL2_S2CD_BUFEN | MCT_CTRL2_S2CD_BEN); |
0c4a59fe TL |
374 | } |
375 | ret = menelaus_write_reg(MENELAUS_MCT_CTRL2, val); | |
376 | if (ret < 0) | |
377 | goto out; | |
378 | ||
379 | ret = menelaus_read_reg(MENELAUS_MCT_CTRL3); | |
380 | if (ret < 0) | |
381 | goto out; | |
382 | val = ret; | |
383 | if (slot == 1) { | |
384 | if (enable) | |
1c888e2e | 385 | val |= MCT_CTRL3_SLOT1_EN; |
0c4a59fe | 386 | else |
1c888e2e | 387 | val &= ~MCT_CTRL3_SLOT1_EN; |
0c4a59fe TL |
388 | } else { |
389 | int b; | |
390 | ||
391 | if (enable) | |
1c888e2e | 392 | val |= MCT_CTRL3_SLOT2_EN; |
0c4a59fe | 393 | else |
1c888e2e | 394 | val &= ~MCT_CTRL3_SLOT2_EN; |
0c4a59fe | 395 | b = menelaus_read_reg(MENELAUS_MCT_CTRL2); |
1c888e2e | 396 | b &= ~(MCT_CTRL2_VS2_SEL_D0 | MCT_CTRL2_VS2_SEL_D1); |
0c4a59fe TL |
397 | b |= power; |
398 | ret = menelaus_write_reg(MENELAUS_MCT_CTRL2, b); | |
399 | if (ret < 0) | |
400 | goto out; | |
401 | } | |
402 | /* Disable autonomous shutdown */ | |
1c888e2e | 403 | val &= ~(MCT_CTRL3_S1_AUTO_EN | MCT_CTRL3_S2_AUTO_EN); |
0c4a59fe TL |
404 | ret = menelaus_write_reg(MENELAUS_MCT_CTRL3, val); |
405 | out: | |
406 | mutex_unlock(&the_menelaus->lock); | |
407 | return ret; | |
408 | } | |
409 | EXPORT_SYMBOL(menelaus_set_mmc_slot); | |
410 | ||
411 | int menelaus_register_mmc_callback(void (*callback)(void *data, u8 card_mask), | |
412 | void *data) | |
413 | { | |
414 | int ret = 0; | |
415 | ||
416 | the_menelaus->mmc_callback_data = data; | |
417 | the_menelaus->mmc_callback = callback; | |
418 | ret = menelaus_add_irq_work(MENELAUS_MMC_S1CD_IRQ, | |
419 | menelaus_mmc_cd_work); | |
420 | if (ret < 0) | |
421 | return ret; | |
422 | ret = menelaus_add_irq_work(MENELAUS_MMC_S2CD_IRQ, | |
423 | menelaus_mmc_cd_work); | |
424 | if (ret < 0) | |
425 | return ret; | |
426 | ret = menelaus_add_irq_work(MENELAUS_MMC_S1D1_IRQ, | |
427 | menelaus_mmc_cd_work); | |
428 | if (ret < 0) | |
429 | return ret; | |
430 | ret = menelaus_add_irq_work(MENELAUS_MMC_S2D1_IRQ, | |
431 | menelaus_mmc_cd_work); | |
432 | ||
433 | return ret; | |
434 | } | |
435 | EXPORT_SYMBOL(menelaus_register_mmc_callback); | |
436 | ||
437 | void menelaus_unregister_mmc_callback(void) | |
438 | { | |
439 | menelaus_remove_irq_work(MENELAUS_MMC_S1CD_IRQ); | |
440 | menelaus_remove_irq_work(MENELAUS_MMC_S2CD_IRQ); | |
441 | menelaus_remove_irq_work(MENELAUS_MMC_S1D1_IRQ); | |
442 | menelaus_remove_irq_work(MENELAUS_MMC_S2D1_IRQ); | |
443 | ||
444 | the_menelaus->mmc_callback = NULL; | |
445 | the_menelaus->mmc_callback_data = 0; | |
446 | } | |
447 | EXPORT_SYMBOL(menelaus_unregister_mmc_callback); | |
448 | ||
449 | struct menelaus_vtg { | |
450 | const char *name; | |
451 | u8 vtg_reg; | |
452 | u8 vtg_shift; | |
453 | u8 vtg_bits; | |
454 | u8 mode_reg; | |
455 | }; | |
456 | ||
457 | struct menelaus_vtg_value { | |
458 | u16 vtg; | |
459 | u16 val; | |
460 | }; | |
461 | ||
462 | static int menelaus_set_voltage(const struct menelaus_vtg *vtg, int mV, | |
463 | int vtg_val, int mode) | |
464 | { | |
465 | int val, ret; | |
466 | struct i2c_client *c = the_menelaus->client; | |
467 | ||
468 | mutex_lock(&the_menelaus->lock); | |
469 | if (vtg == 0) | |
470 | goto set_voltage; | |
471 | ||
472 | ret = menelaus_read_reg(vtg->vtg_reg); | |
473 | if (ret < 0) | |
474 | goto out; | |
475 | val = ret & ~(((1 << vtg->vtg_bits) - 1) << vtg->vtg_shift); | |
476 | val |= vtg_val << vtg->vtg_shift; | |
477 | ||
478 | dev_dbg(&c->dev, "Setting voltage '%s'" | |
479 | "to %d mV (reg 0x%02x, val 0x%02x)\n", | |
480 | vtg->name, mV, vtg->vtg_reg, val); | |
481 | ||
482 | ret = menelaus_write_reg(vtg->vtg_reg, val); | |
483 | if (ret < 0) | |
484 | goto out; | |
485 | set_voltage: | |
486 | ret = menelaus_write_reg(vtg->mode_reg, mode); | |
487 | out: | |
488 | mutex_unlock(&the_menelaus->lock); | |
489 | if (ret == 0) { | |
490 | /* Wait for voltage to stabilize */ | |
491 | msleep(1); | |
492 | } | |
493 | return ret; | |
494 | } | |
495 | ||
496 | static int menelaus_get_vtg_value(int vtg, const struct menelaus_vtg_value *tbl, | |
497 | int n) | |
498 | { | |
499 | int i; | |
500 | ||
501 | for (i = 0; i < n; i++, tbl++) | |
502 | if (tbl->vtg == vtg) | |
503 | return tbl->val; | |
504 | return -EINVAL; | |
505 | } | |
506 | ||
507 | /* | |
508 | * Vcore can be programmed in two ways: | |
509 | * SW-controlled: Required voltage is programmed into VCORE_CTRL1 | |
510 | * HW-controlled: Required range (roof-floor) is programmed into VCORE_CTRL3 | |
511 | * and VCORE_CTRL4 | |
512 | * | |
513 | * Call correct 'set' function accordingly | |
514 | */ | |
515 | ||
516 | static const struct menelaus_vtg_value vcore_values[] = { | |
517 | { 1000, 0 }, | |
518 | { 1025, 1 }, | |
519 | { 1050, 2 }, | |
520 | { 1075, 3 }, | |
521 | { 1100, 4 }, | |
522 | { 1125, 5 }, | |
523 | { 1150, 6 }, | |
524 | { 1175, 7 }, | |
525 | { 1200, 8 }, | |
526 | { 1225, 9 }, | |
527 | { 1250, 10 }, | |
528 | { 1275, 11 }, | |
529 | { 1300, 12 }, | |
530 | { 1325, 13 }, | |
531 | { 1350, 14 }, | |
532 | { 1375, 15 }, | |
533 | { 1400, 16 }, | |
534 | { 1425, 17 }, | |
535 | { 1450, 18 }, | |
536 | }; | |
537 | ||
538 | int menelaus_set_vcore_sw(unsigned int mV) | |
539 | { | |
540 | int val, ret; | |
541 | struct i2c_client *c = the_menelaus->client; | |
542 | ||
543 | val = menelaus_get_vtg_value(mV, vcore_values, | |
544 | ARRAY_SIZE(vcore_values)); | |
545 | if (val < 0) | |
546 | return -EINVAL; | |
547 | ||
548 | dev_dbg(&c->dev, "Setting VCORE to %d mV (val 0x%02x)\n", mV, val); | |
549 | ||
550 | /* Set SW mode and the voltage in one go. */ | |
551 | mutex_lock(&the_menelaus->lock); | |
552 | ret = menelaus_write_reg(MENELAUS_VCORE_CTRL1, val); | |
553 | if (ret == 0) | |
554 | the_menelaus->vcore_hw_mode = 0; | |
555 | mutex_unlock(&the_menelaus->lock); | |
556 | msleep(1); | |
557 | ||
558 | return ret; | |
559 | } | |
560 | ||
561 | int menelaus_set_vcore_hw(unsigned int roof_mV, unsigned int floor_mV) | |
562 | { | |
563 | int fval, rval, val, ret; | |
564 | struct i2c_client *c = the_menelaus->client; | |
565 | ||
566 | rval = menelaus_get_vtg_value(roof_mV, vcore_values, | |
567 | ARRAY_SIZE(vcore_values)); | |
568 | if (rval < 0) | |
569 | return -EINVAL; | |
570 | fval = menelaus_get_vtg_value(floor_mV, vcore_values, | |
571 | ARRAY_SIZE(vcore_values)); | |
572 | if (fval < 0) | |
573 | return -EINVAL; | |
574 | ||
575 | dev_dbg(&c->dev, "Setting VCORE FLOOR to %d mV and ROOF to %d mV\n", | |
576 | floor_mV, roof_mV); | |
577 | ||
578 | mutex_lock(&the_menelaus->lock); | |
579 | ret = menelaus_write_reg(MENELAUS_VCORE_CTRL3, fval); | |
580 | if (ret < 0) | |
581 | goto out; | |
582 | ret = menelaus_write_reg(MENELAUS_VCORE_CTRL4, rval); | |
583 | if (ret < 0) | |
584 | goto out; | |
585 | if (!the_menelaus->vcore_hw_mode) { | |
586 | val = menelaus_read_reg(MENELAUS_VCORE_CTRL1); | |
587 | /* HW mode, turn OFF byte comparator */ | |
1c888e2e | 588 | val |= (VCORE_CTRL1_HW_NSW | VCORE_CTRL1_BYP_COMP); |
0c4a59fe TL |
589 | ret = menelaus_write_reg(MENELAUS_VCORE_CTRL1, val); |
590 | the_menelaus->vcore_hw_mode = 1; | |
591 | } | |
592 | msleep(1); | |
593 | out: | |
594 | mutex_unlock(&the_menelaus->lock); | |
595 | return ret; | |
596 | } | |
597 | ||
598 | static const struct menelaus_vtg vmem_vtg = { | |
599 | .name = "VMEM", | |
600 | .vtg_reg = MENELAUS_LDO_CTRL1, | |
601 | .vtg_shift = 0, | |
602 | .vtg_bits = 2, | |
603 | .mode_reg = MENELAUS_LDO_CTRL3, | |
604 | }; | |
605 | ||
606 | static const struct menelaus_vtg_value vmem_values[] = { | |
607 | { 1500, 0 }, | |
608 | { 1800, 1 }, | |
609 | { 1900, 2 }, | |
610 | { 2500, 3 }, | |
611 | }; | |
612 | ||
613 | int menelaus_set_vmem(unsigned int mV) | |
614 | { | |
615 | int val; | |
616 | ||
617 | if (mV == 0) | |
618 | return menelaus_set_voltage(&vmem_vtg, 0, 0, 0); | |
619 | ||
620 | val = menelaus_get_vtg_value(mV, vmem_values, ARRAY_SIZE(vmem_values)); | |
621 | if (val < 0) | |
622 | return -EINVAL; | |
623 | return menelaus_set_voltage(&vmem_vtg, mV, val, 0x02); | |
624 | } | |
625 | EXPORT_SYMBOL(menelaus_set_vmem); | |
626 | ||
627 | static const struct menelaus_vtg vio_vtg = { | |
628 | .name = "VIO", | |
629 | .vtg_reg = MENELAUS_LDO_CTRL1, | |
630 | .vtg_shift = 2, | |
631 | .vtg_bits = 2, | |
632 | .mode_reg = MENELAUS_LDO_CTRL4, | |
633 | }; | |
634 | ||
635 | static const struct menelaus_vtg_value vio_values[] = { | |
636 | { 1500, 0 }, | |
637 | { 1800, 1 }, | |
638 | { 2500, 2 }, | |
639 | { 2800, 3 }, | |
640 | }; | |
641 | ||
642 | int menelaus_set_vio(unsigned int mV) | |
643 | { | |
644 | int val; | |
645 | ||
646 | if (mV == 0) | |
647 | return menelaus_set_voltage(&vio_vtg, 0, 0, 0); | |
648 | ||
649 | val = menelaus_get_vtg_value(mV, vio_values, ARRAY_SIZE(vio_values)); | |
650 | if (val < 0) | |
651 | return -EINVAL; | |
652 | return menelaus_set_voltage(&vio_vtg, mV, val, 0x02); | |
653 | } | |
654 | EXPORT_SYMBOL(menelaus_set_vio); | |
655 | ||
656 | static const struct menelaus_vtg_value vdcdc_values[] = { | |
657 | { 1500, 0 }, | |
658 | { 1800, 1 }, | |
659 | { 2000, 2 }, | |
660 | { 2200, 3 }, | |
661 | { 2400, 4 }, | |
662 | { 2800, 5 }, | |
663 | { 3000, 6 }, | |
664 | { 3300, 7 }, | |
665 | }; | |
666 | ||
667 | static const struct menelaus_vtg vdcdc2_vtg = { | |
668 | .name = "VDCDC2", | |
669 | .vtg_reg = MENELAUS_DCDC_CTRL1, | |
670 | .vtg_shift = 0, | |
671 | .vtg_bits = 3, | |
672 | .mode_reg = MENELAUS_DCDC_CTRL2, | |
673 | }; | |
674 | ||
675 | static const struct menelaus_vtg vdcdc3_vtg = { | |
676 | .name = "VDCDC3", | |
677 | .vtg_reg = MENELAUS_DCDC_CTRL1, | |
678 | .vtg_shift = 3, | |
679 | .vtg_bits = 3, | |
680 | .mode_reg = MENELAUS_DCDC_CTRL3, | |
681 | }; | |
682 | ||
683 | int menelaus_set_vdcdc(int dcdc, unsigned int mV) | |
684 | { | |
685 | const struct menelaus_vtg *vtg; | |
686 | int val; | |
687 | ||
688 | if (dcdc != 2 && dcdc != 3) | |
689 | return -EINVAL; | |
690 | if (dcdc == 2) | |
691 | vtg = &vdcdc2_vtg; | |
692 | else | |
693 | vtg = &vdcdc3_vtg; | |
694 | ||
695 | if (mV == 0) | |
696 | return menelaus_set_voltage(vtg, 0, 0, 0); | |
697 | ||
698 | val = menelaus_get_vtg_value(mV, vdcdc_values, | |
699 | ARRAY_SIZE(vdcdc_values)); | |
700 | if (val < 0) | |
701 | return -EINVAL; | |
702 | return menelaus_set_voltage(vtg, mV, val, 0x03); | |
703 | } | |
704 | ||
705 | static const struct menelaus_vtg_value vmmc_values[] = { | |
706 | { 1850, 0 }, | |
707 | { 2800, 1 }, | |
708 | { 3000, 2 }, | |
709 | { 3100, 3 }, | |
710 | }; | |
711 | ||
712 | static const struct menelaus_vtg vmmc_vtg = { | |
713 | .name = "VMMC", | |
714 | .vtg_reg = MENELAUS_LDO_CTRL1, | |
715 | .vtg_shift = 6, | |
716 | .vtg_bits = 2, | |
717 | .mode_reg = MENELAUS_LDO_CTRL7, | |
718 | }; | |
719 | ||
720 | int menelaus_set_vmmc(unsigned int mV) | |
721 | { | |
722 | int val; | |
723 | ||
724 | if (mV == 0) | |
725 | return menelaus_set_voltage(&vmmc_vtg, 0, 0, 0); | |
726 | ||
727 | val = menelaus_get_vtg_value(mV, vmmc_values, ARRAY_SIZE(vmmc_values)); | |
728 | if (val < 0) | |
729 | return -EINVAL; | |
730 | return menelaus_set_voltage(&vmmc_vtg, mV, val, 0x02); | |
731 | } | |
732 | EXPORT_SYMBOL(menelaus_set_vmmc); | |
733 | ||
734 | ||
735 | static const struct menelaus_vtg_value vaux_values[] = { | |
736 | { 1500, 0 }, | |
737 | { 1800, 1 }, | |
738 | { 2500, 2 }, | |
739 | { 2800, 3 }, | |
740 | }; | |
741 | ||
742 | static const struct menelaus_vtg vaux_vtg = { | |
743 | .name = "VAUX", | |
744 | .vtg_reg = MENELAUS_LDO_CTRL1, | |
745 | .vtg_shift = 4, | |
746 | .vtg_bits = 2, | |
747 | .mode_reg = MENELAUS_LDO_CTRL6, | |
748 | }; | |
749 | ||
750 | int menelaus_set_vaux(unsigned int mV) | |
751 | { | |
752 | int val; | |
753 | ||
754 | if (mV == 0) | |
755 | return menelaus_set_voltage(&vaux_vtg, 0, 0, 0); | |
756 | ||
757 | val = menelaus_get_vtg_value(mV, vaux_values, ARRAY_SIZE(vaux_values)); | |
758 | if (val < 0) | |
759 | return -EINVAL; | |
760 | return menelaus_set_voltage(&vaux_vtg, mV, val, 0x02); | |
761 | } | |
762 | EXPORT_SYMBOL(menelaus_set_vaux); | |
763 | ||
764 | int menelaus_get_slot_pin_states(void) | |
765 | { | |
766 | return menelaus_read_reg(MENELAUS_MCT_PIN_ST); | |
767 | } | |
768 | EXPORT_SYMBOL(menelaus_get_slot_pin_states); | |
769 | ||
770 | int menelaus_set_regulator_sleep(int enable, u32 val) | |
771 | { | |
772 | int t, ret; | |
773 | struct i2c_client *c = the_menelaus->client; | |
774 | ||
775 | mutex_lock(&the_menelaus->lock); | |
776 | ret = menelaus_write_reg(MENELAUS_SLEEP_CTRL2, val); | |
777 | if (ret < 0) | |
778 | goto out; | |
779 | ||
780 | dev_dbg(&c->dev, "regulator sleep configuration: %02x\n", val); | |
781 | ||
782 | ret = menelaus_read_reg(MENELAUS_GPIO_CTRL); | |
783 | if (ret < 0) | |
784 | goto out; | |
1c888e2e | 785 | t = (GPIO_CTRL_SLPCTLEN | GPIO3_DIR_INPUT); |
0c4a59fe TL |
786 | if (enable) |
787 | ret |= t; | |
788 | else | |
789 | ret &= ~t; | |
790 | ret = menelaus_write_reg(MENELAUS_GPIO_CTRL, ret); | |
791 | out: | |
792 | mutex_unlock(&the_menelaus->lock); | |
793 | return ret; | |
794 | } | |
795 | ||
796 | /*-----------------------------------------------------------------------*/ | |
797 | ||
798 | /* Handles Menelaus interrupts. Does not run in interrupt context */ | |
799 | static void menelaus_work(struct work_struct *_menelaus) | |
800 | { | |
801 | struct menelaus_chip *menelaus = | |
802 | container_of(_menelaus, struct menelaus_chip, work); | |
803 | void (*handler)(struct menelaus_chip *menelaus); | |
804 | ||
805 | while (1) { | |
806 | unsigned isr; | |
807 | ||
808 | isr = (menelaus_read_reg(MENELAUS_INT_STATUS2) | |
809 | & ~menelaus->mask2) << 8; | |
810 | isr |= menelaus_read_reg(MENELAUS_INT_STATUS1) | |
811 | & ~menelaus->mask1; | |
812 | if (!isr) | |
813 | break; | |
814 | ||
815 | while (isr) { | |
816 | int irq = fls(isr) - 1; | |
817 | isr &= ~(1 << irq); | |
818 | ||
819 | mutex_lock(&menelaus->lock); | |
820 | menelaus_disable_irq(irq); | |
821 | menelaus_ack_irq(irq); | |
822 | handler = menelaus->handlers[irq]; | |
823 | if (handler) | |
824 | handler(menelaus); | |
825 | menelaus_enable_irq(irq); | |
826 | mutex_unlock(&menelaus->lock); | |
827 | } | |
828 | } | |
829 | enable_irq(menelaus->client->irq); | |
830 | } | |
831 | ||
832 | /* | |
833 | * We cannot use I2C in interrupt context, so we just schedule work. | |
834 | */ | |
835 | static irqreturn_t menelaus_irq(int irq, void *_menelaus) | |
836 | { | |
837 | struct menelaus_chip *menelaus = _menelaus; | |
838 | ||
839 | disable_irq_nosync(irq); | |
840 | (void)schedule_work(&menelaus->work); | |
841 | ||
842 | return IRQ_HANDLED; | |
843 | } | |
844 | ||
845 | /*-----------------------------------------------------------------------*/ | |
846 | ||
847 | /* | |
848 | * The RTC needs to be set once, then it runs on backup battery power. | |
849 | * It supports alarms, including system wake alarms (from some modes); | |
850 | * and 1/second IRQs if requested. | |
851 | */ | |
852 | #ifdef CONFIG_RTC_DRV_TWL92330 | |
853 | ||
854 | #define RTC_CTRL_RTC_EN (1 << 0) | |
855 | #define RTC_CTRL_AL_EN (1 << 1) | |
856 | #define RTC_CTRL_MODE12 (1 << 2) | |
857 | #define RTC_CTRL_EVERY_MASK (3 << 3) | |
858 | #define RTC_CTRL_EVERY_SEC (0 << 3) | |
859 | #define RTC_CTRL_EVERY_MIN (1 << 3) | |
860 | #define RTC_CTRL_EVERY_HR (2 << 3) | |
861 | #define RTC_CTRL_EVERY_DAY (3 << 3) | |
862 | ||
863 | #define RTC_UPDATE_EVERY 0x08 | |
864 | ||
865 | #define RTC_HR_PM (1 << 7) | |
866 | ||
867 | static void menelaus_to_time(char *regs, struct rtc_time *t) | |
868 | { | |
e4d33969 AB |
869 | t->tm_sec = bcd2bin(regs[0]); |
870 | t->tm_min = bcd2bin(regs[1]); | |
0c4a59fe | 871 | if (the_menelaus->rtc_control & RTC_CTRL_MODE12) { |
e4d33969 | 872 | t->tm_hour = bcd2bin(regs[2] & 0x1f) - 1; |
0c4a59fe TL |
873 | if (regs[2] & RTC_HR_PM) |
874 | t->tm_hour += 12; | |
875 | } else | |
e4d33969 AB |
876 | t->tm_hour = bcd2bin(regs[2] & 0x3f); |
877 | t->tm_mday = bcd2bin(regs[3]); | |
878 | t->tm_mon = bcd2bin(regs[4]) - 1; | |
879 | t->tm_year = bcd2bin(regs[5]) + 100; | |
0c4a59fe TL |
880 | } |
881 | ||
882 | static int time_to_menelaus(struct rtc_time *t, int regnum) | |
883 | { | |
884 | int hour, status; | |
885 | ||
e4d33969 | 886 | status = menelaus_write_reg(regnum++, bin2bcd(t->tm_sec)); |
0c4a59fe TL |
887 | if (status < 0) |
888 | goto fail; | |
889 | ||
e4d33969 | 890 | status = menelaus_write_reg(regnum++, bin2bcd(t->tm_min)); |
0c4a59fe TL |
891 | if (status < 0) |
892 | goto fail; | |
893 | ||
894 | if (the_menelaus->rtc_control & RTC_CTRL_MODE12) { | |
895 | hour = t->tm_hour + 1; | |
896 | if (hour > 12) | |
e4d33969 | 897 | hour = RTC_HR_PM | bin2bcd(hour - 12); |
0c4a59fe | 898 | else |
e4d33969 | 899 | hour = bin2bcd(hour); |
0c4a59fe | 900 | } else |
e4d33969 | 901 | hour = bin2bcd(t->tm_hour); |
0c4a59fe TL |
902 | status = menelaus_write_reg(regnum++, hour); |
903 | if (status < 0) | |
904 | goto fail; | |
905 | ||
e4d33969 | 906 | status = menelaus_write_reg(regnum++, bin2bcd(t->tm_mday)); |
0c4a59fe TL |
907 | if (status < 0) |
908 | goto fail; | |
909 | ||
e4d33969 | 910 | status = menelaus_write_reg(regnum++, bin2bcd(t->tm_mon + 1)); |
0c4a59fe TL |
911 | if (status < 0) |
912 | goto fail; | |
913 | ||
e4d33969 | 914 | status = menelaus_write_reg(regnum++, bin2bcd(t->tm_year - 100)); |
0c4a59fe TL |
915 | if (status < 0) |
916 | goto fail; | |
917 | ||
918 | return 0; | |
919 | fail: | |
920 | dev_err(&the_menelaus->client->dev, "rtc write reg %02x, err %d\n", | |
921 | --regnum, status); | |
922 | return status; | |
923 | } | |
924 | ||
925 | static int menelaus_read_time(struct device *dev, struct rtc_time *t) | |
926 | { | |
927 | struct i2c_msg msg[2]; | |
928 | char regs[7]; | |
929 | int status; | |
930 | ||
931 | /* block read date and time registers */ | |
932 | regs[0] = MENELAUS_RTC_SEC; | |
933 | ||
934 | msg[0].addr = MENELAUS_I2C_ADDRESS; | |
935 | msg[0].flags = 0; | |
936 | msg[0].len = 1; | |
937 | msg[0].buf = regs; | |
938 | ||
939 | msg[1].addr = MENELAUS_I2C_ADDRESS; | |
940 | msg[1].flags = I2C_M_RD; | |
941 | msg[1].len = sizeof(regs); | |
942 | msg[1].buf = regs; | |
943 | ||
944 | status = i2c_transfer(the_menelaus->client->adapter, msg, 2); | |
945 | if (status != 2) { | |
946 | dev_err(dev, "%s error %d\n", "read", status); | |
947 | return -EIO; | |
948 | } | |
949 | ||
950 | menelaus_to_time(regs, t); | |
e4d33969 | 951 | t->tm_wday = bcd2bin(regs[6]); |
0c4a59fe TL |
952 | |
953 | return 0; | |
954 | } | |
955 | ||
956 | static int menelaus_set_time(struct device *dev, struct rtc_time *t) | |
957 | { | |
958 | int status; | |
959 | ||
960 | /* write date and time registers */ | |
961 | status = time_to_menelaus(t, MENELAUS_RTC_SEC); | |
962 | if (status < 0) | |
963 | return status; | |
e4d33969 | 964 | status = menelaus_write_reg(MENELAUS_RTC_WKDAY, bin2bcd(t->tm_wday)); |
0c4a59fe | 965 | if (status < 0) { |
c1147cc6 | 966 | dev_err(&the_menelaus->client->dev, "rtc write reg %02x " |
0c4a59fe TL |
967 | "err %d\n", MENELAUS_RTC_WKDAY, status); |
968 | return status; | |
969 | } | |
970 | ||
971 | /* now commit the write */ | |
972 | status = menelaus_write_reg(MENELAUS_RTC_UPDATE, RTC_UPDATE_EVERY); | |
973 | if (status < 0) | |
974 | dev_err(&the_menelaus->client->dev, "rtc commit time, err %d\n", | |
975 | status); | |
976 | ||
977 | return 0; | |
978 | } | |
979 | ||
980 | static int menelaus_read_alarm(struct device *dev, struct rtc_wkalrm *w) | |
981 | { | |
982 | struct i2c_msg msg[2]; | |
983 | char regs[6]; | |
984 | int status; | |
985 | ||
986 | /* block read alarm registers */ | |
987 | regs[0] = MENELAUS_RTC_AL_SEC; | |
988 | ||
989 | msg[0].addr = MENELAUS_I2C_ADDRESS; | |
990 | msg[0].flags = 0; | |
991 | msg[0].len = 1; | |
992 | msg[0].buf = regs; | |
993 | ||
994 | msg[1].addr = MENELAUS_I2C_ADDRESS; | |
995 | msg[1].flags = I2C_M_RD; | |
996 | msg[1].len = sizeof(regs); | |
997 | msg[1].buf = regs; | |
998 | ||
999 | status = i2c_transfer(the_menelaus->client->adapter, msg, 2); | |
1000 | if (status != 2) { | |
1001 | dev_err(dev, "%s error %d\n", "alarm read", status); | |
1002 | return -EIO; | |
1003 | } | |
1004 | ||
1005 | menelaus_to_time(regs, &w->time); | |
1006 | ||
1007 | w->enabled = !!(the_menelaus->rtc_control & RTC_CTRL_AL_EN); | |
1008 | ||
1009 | /* NOTE we *could* check if actually pending... */ | |
1010 | w->pending = 0; | |
1011 | ||
1012 | return 0; | |
1013 | } | |
1014 | ||
1015 | static int menelaus_set_alarm(struct device *dev, struct rtc_wkalrm *w) | |
1016 | { | |
1017 | int status; | |
1018 | ||
1019 | if (the_menelaus->client->irq <= 0 && w->enabled) | |
1020 | return -ENODEV; | |
1021 | ||
1022 | /* clear previous alarm enable */ | |
1023 | if (the_menelaus->rtc_control & RTC_CTRL_AL_EN) { | |
1024 | the_menelaus->rtc_control &= ~RTC_CTRL_AL_EN; | |
1025 | status = menelaus_write_reg(MENELAUS_RTC_CTRL, | |
1026 | the_menelaus->rtc_control); | |
1027 | if (status < 0) | |
1028 | return status; | |
1029 | } | |
1030 | ||
1031 | /* write alarm registers */ | |
1032 | status = time_to_menelaus(&w->time, MENELAUS_RTC_AL_SEC); | |
1033 | if (status < 0) | |
1034 | return status; | |
1035 | ||
1036 | /* enable alarm if requested */ | |
1037 | if (w->enabled) { | |
1038 | the_menelaus->rtc_control |= RTC_CTRL_AL_EN; | |
1039 | status = menelaus_write_reg(MENELAUS_RTC_CTRL, | |
1040 | the_menelaus->rtc_control); | |
1041 | } | |
1042 | ||
1043 | return status; | |
1044 | } | |
1045 | ||
1046 | #ifdef CONFIG_RTC_INTF_DEV | |
1047 | ||
1048 | static void menelaus_rtc_update_work(struct menelaus_chip *m) | |
1049 | { | |
1050 | /* report 1/sec update */ | |
1051 | local_irq_disable(); | |
1052 | rtc_update_irq(m->rtc, 1, RTC_IRQF | RTC_UF); | |
1053 | local_irq_enable(); | |
1054 | } | |
1055 | ||
1056 | static int menelaus_ioctl(struct device *dev, unsigned cmd, unsigned long arg) | |
1057 | { | |
1058 | int status; | |
1059 | ||
1060 | if (the_menelaus->client->irq <= 0) | |
1061 | return -ENOIOCTLCMD; | |
1062 | ||
1063 | switch (cmd) { | |
1064 | /* alarm IRQ */ | |
1065 | case RTC_AIE_ON: | |
1066 | if (the_menelaus->rtc_control & RTC_CTRL_AL_EN) | |
1067 | return 0; | |
1068 | the_menelaus->rtc_control |= RTC_CTRL_AL_EN; | |
1069 | break; | |
1070 | case RTC_AIE_OFF: | |
1071 | if (!(the_menelaus->rtc_control & RTC_CTRL_AL_EN)) | |
1072 | return 0; | |
1073 | the_menelaus->rtc_control &= ~RTC_CTRL_AL_EN; | |
1074 | break; | |
1075 | /* 1/second "update" IRQ */ | |
1076 | case RTC_UIE_ON: | |
1077 | if (the_menelaus->uie) | |
1078 | return 0; | |
1079 | status = menelaus_remove_irq_work(MENELAUS_RTCTMR_IRQ); | |
1080 | status = menelaus_add_irq_work(MENELAUS_RTCTMR_IRQ, | |
1081 | menelaus_rtc_update_work); | |
1082 | if (status == 0) | |
1083 | the_menelaus->uie = 1; | |
1084 | return status; | |
1085 | case RTC_UIE_OFF: | |
1086 | if (!the_menelaus->uie) | |
1087 | return 0; | |
1088 | status = menelaus_remove_irq_work(MENELAUS_RTCTMR_IRQ); | |
1089 | if (status == 0) | |
1090 | the_menelaus->uie = 0; | |
1091 | return status; | |
1092 | default: | |
1093 | return -ENOIOCTLCMD; | |
1094 | } | |
1095 | return menelaus_write_reg(MENELAUS_RTC_CTRL, the_menelaus->rtc_control); | |
1096 | } | |
1097 | ||
1098 | #else | |
1099 | #define menelaus_ioctl NULL | |
1100 | #endif | |
1101 | ||
1102 | /* REVISIT no compensation register support ... */ | |
1103 | ||
1104 | static const struct rtc_class_ops menelaus_rtc_ops = { | |
1105 | .ioctl = menelaus_ioctl, | |
1106 | .read_time = menelaus_read_time, | |
1107 | .set_time = menelaus_set_time, | |
1108 | .read_alarm = menelaus_read_alarm, | |
1109 | .set_alarm = menelaus_set_alarm, | |
1110 | }; | |
1111 | ||
1112 | static void menelaus_rtc_alarm_work(struct menelaus_chip *m) | |
1113 | { | |
1114 | /* report alarm */ | |
1115 | local_irq_disable(); | |
1116 | rtc_update_irq(m->rtc, 1, RTC_IRQF | RTC_AF); | |
1117 | local_irq_enable(); | |
1118 | ||
1119 | /* then disable it; alarms are oneshot */ | |
1120 | the_menelaus->rtc_control &= ~RTC_CTRL_AL_EN; | |
1121 | menelaus_write_reg(MENELAUS_RTC_CTRL, the_menelaus->rtc_control); | |
1122 | } | |
1123 | ||
1124 | static inline void menelaus_rtc_init(struct menelaus_chip *m) | |
1125 | { | |
1126 | int alarm = (m->client->irq > 0); | |
1127 | ||
1128 | /* assume 32KDETEN pin is pulled high */ | |
1129 | if (!(menelaus_read_reg(MENELAUS_OSC_CTRL) & 0x80)) { | |
1130 | dev_dbg(&m->client->dev, "no 32k oscillator\n"); | |
1131 | return; | |
1132 | } | |
1133 | ||
1134 | /* support RTC alarm; it can issue wakeups */ | |
1135 | if (alarm) { | |
1136 | if (menelaus_add_irq_work(MENELAUS_RTCALM_IRQ, | |
1137 | menelaus_rtc_alarm_work) < 0) { | |
1138 | dev_err(&m->client->dev, "can't handle RTC alarm\n"); | |
1139 | return; | |
1140 | } | |
1141 | device_init_wakeup(&m->client->dev, 1); | |
1142 | } | |
1143 | ||
1144 | /* be sure RTC is enabled; allow 1/sec irqs; leave 12hr mode alone */ | |
1145 | m->rtc_control = menelaus_read_reg(MENELAUS_RTC_CTRL); | |
1146 | if (!(m->rtc_control & RTC_CTRL_RTC_EN) | |
1147 | || (m->rtc_control & RTC_CTRL_AL_EN) | |
1148 | || (m->rtc_control & RTC_CTRL_EVERY_MASK)) { | |
1149 | if (!(m->rtc_control & RTC_CTRL_RTC_EN)) { | |
1150 | dev_warn(&m->client->dev, "rtc clock needs setting\n"); | |
1151 | m->rtc_control |= RTC_CTRL_RTC_EN; | |
1152 | } | |
1153 | m->rtc_control &= ~RTC_CTRL_EVERY_MASK; | |
1154 | m->rtc_control &= ~RTC_CTRL_AL_EN; | |
1155 | menelaus_write_reg(MENELAUS_RTC_CTRL, m->rtc_control); | |
1156 | } | |
1157 | ||
1158 | m->rtc = rtc_device_register(DRIVER_NAME, | |
1159 | &m->client->dev, | |
1160 | &menelaus_rtc_ops, THIS_MODULE); | |
1161 | if (IS_ERR(m->rtc)) { | |
1162 | if (alarm) { | |
1163 | menelaus_remove_irq_work(MENELAUS_RTCALM_IRQ); | |
1164 | device_init_wakeup(&m->client->dev, 0); | |
1165 | } | |
1166 | dev_err(&m->client->dev, "can't register RTC: %d\n", | |
1167 | (int) PTR_ERR(m->rtc)); | |
1168 | the_menelaus->rtc = NULL; | |
1169 | } | |
1170 | } | |
1171 | ||
1172 | #else | |
1173 | ||
1174 | static inline void menelaus_rtc_init(struct menelaus_chip *m) | |
1175 | { | |
1176 | /* nothing */ | |
1177 | } | |
1178 | ||
1179 | #endif | |
1180 | ||
1181 | /*-----------------------------------------------------------------------*/ | |
1182 | ||
1183 | static struct i2c_driver menelaus_i2c_driver; | |
1184 | ||
d2653e92 JD |
1185 | static int menelaus_probe(struct i2c_client *client, |
1186 | const struct i2c_device_id *id) | |
0c4a59fe TL |
1187 | { |
1188 | struct menelaus_chip *menelaus; | |
1189 | int rev = 0, val; | |
1190 | int err = 0; | |
1191 | struct menelaus_platform_data *menelaus_pdata = | |
1192 | client->dev.platform_data; | |
1193 | ||
1194 | if (the_menelaus) { | |
1195 | dev_dbg(&client->dev, "only one %s for now\n", | |
1196 | DRIVER_NAME); | |
1197 | return -ENODEV; | |
1198 | } | |
1199 | ||
1200 | menelaus = kzalloc(sizeof *menelaus, GFP_KERNEL); | |
1201 | if (!menelaus) | |
1202 | return -ENOMEM; | |
1203 | ||
1204 | i2c_set_clientdata(client, menelaus); | |
1205 | ||
1206 | the_menelaus = menelaus; | |
1207 | menelaus->client = client; | |
1208 | ||
1209 | /* If a true probe check the device */ | |
1210 | rev = menelaus_read_reg(MENELAUS_REV); | |
1211 | if (rev < 0) { | |
1f7c8234 | 1212 | pr_err(DRIVER_NAME ": device not found"); |
0c4a59fe TL |
1213 | err = -ENODEV; |
1214 | goto fail1; | |
1215 | } | |
1216 | ||
1217 | /* Ack and disable all Menelaus interrupts */ | |
1218 | menelaus_write_reg(MENELAUS_INT_ACK1, 0xff); | |
1219 | menelaus_write_reg(MENELAUS_INT_ACK2, 0xff); | |
1220 | menelaus_write_reg(MENELAUS_INT_MASK1, 0xff); | |
1221 | menelaus_write_reg(MENELAUS_INT_MASK2, 0xff); | |
1222 | menelaus->mask1 = 0xff; | |
1223 | menelaus->mask2 = 0xff; | |
1224 | ||
1225 | /* Set output buffer strengths */ | |
1226 | menelaus_write_reg(MENELAUS_MCT_CTRL1, 0x73); | |
1227 | ||
1228 | if (client->irq > 0) { | |
1229 | err = request_irq(client->irq, menelaus_irq, IRQF_DISABLED, | |
1230 | DRIVER_NAME, menelaus); | |
1231 | if (err) { | |
898eb71c | 1232 | dev_dbg(&client->dev, "can't get IRQ %d, err %d\n", |
0c4a59fe TL |
1233 | client->irq, err); |
1234 | goto fail1; | |
1235 | } | |
1236 | } | |
1237 | ||
1238 | mutex_init(&menelaus->lock); | |
1239 | INIT_WORK(&menelaus->work, menelaus_work); | |
1240 | ||
1241 | pr_info("Menelaus rev %d.%d\n", rev >> 4, rev & 0x0f); | |
1242 | ||
1243 | val = menelaus_read_reg(MENELAUS_VCORE_CTRL1); | |
1244 | if (val < 0) | |
1245 | goto fail2; | |
1246 | if (val & (1 << 7)) | |
1247 | menelaus->vcore_hw_mode = 1; | |
1248 | else | |
1249 | menelaus->vcore_hw_mode = 0; | |
1250 | ||
1251 | if (menelaus_pdata != NULL && menelaus_pdata->late_init != NULL) { | |
1252 | err = menelaus_pdata->late_init(&client->dev); | |
1253 | if (err < 0) | |
1254 | goto fail2; | |
1255 | } | |
1256 | ||
1257 | menelaus_rtc_init(menelaus); | |
1258 | ||
1259 | return 0; | |
1260 | fail2: | |
1261 | free_irq(client->irq, menelaus); | |
1262 | flush_scheduled_work(); | |
1263 | fail1: | |
1264 | kfree(menelaus); | |
1265 | return err; | |
1266 | } | |
1267 | ||
1268 | static int __exit menelaus_remove(struct i2c_client *client) | |
1269 | { | |
1270 | struct menelaus_chip *menelaus = i2c_get_clientdata(client); | |
1271 | ||
1272 | free_irq(client->irq, menelaus); | |
f322d5f0 | 1273 | kfree(menelaus); |
0c4a59fe TL |
1274 | the_menelaus = NULL; |
1275 | return 0; | |
1276 | } | |
1277 | ||
3760f736 JD |
1278 | static const struct i2c_device_id menelaus_id[] = { |
1279 | { "menelaus", 0 }, | |
1280 | { } | |
1281 | }; | |
1282 | MODULE_DEVICE_TABLE(i2c, menelaus_id); | |
1283 | ||
0c4a59fe TL |
1284 | static struct i2c_driver menelaus_i2c_driver = { |
1285 | .driver = { | |
1286 | .name = DRIVER_NAME, | |
1287 | }, | |
1288 | .probe = menelaus_probe, | |
1289 | .remove = __exit_p(menelaus_remove), | |
3760f736 | 1290 | .id_table = menelaus_id, |
0c4a59fe TL |
1291 | }; |
1292 | ||
1293 | static int __init menelaus_init(void) | |
1294 | { | |
1295 | int res; | |
1296 | ||
1297 | res = i2c_add_driver(&menelaus_i2c_driver); | |
1298 | if (res < 0) { | |
1f7c8234 | 1299 | pr_err(DRIVER_NAME ": driver registration failed\n"); |
0c4a59fe TL |
1300 | return res; |
1301 | } | |
1302 | ||
1303 | return 0; | |
1304 | } | |
1305 | ||
1306 | static void __exit menelaus_exit(void) | |
1307 | { | |
1308 | i2c_del_driver(&menelaus_i2c_driver); | |
1309 | ||
1310 | /* FIXME: Shutdown menelaus parts that can be shut down */ | |
1311 | } | |
1312 | ||
1313 | MODULE_AUTHOR("Texas Instruments, Inc. (and others)"); | |
1314 | MODULE_DESCRIPTION("I2C interface for Menelaus."); | |
1315 | MODULE_LICENSE("GPL"); | |
1316 | ||
1317 | module_init(menelaus_init); | |
1318 | module_exit(menelaus_exit); |