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d2912cb1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
8e005935 UKK |
2 | /* |
3 | * Copyright 2009-2010 Pengutronix | |
4 | * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> | |
5 | * | |
6 | * loosely based on an earlier driver that has | |
7 | * Copyright 2009 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de> | |
8e005935 | 8 | */ |
8e005935 | 9 | |
8e005935 | 10 | #include <linux/module.h> |
876989d5 SG |
11 | #include <linux/of.h> |
12 | #include <linux/of_device.h> | |
10f9edae AS |
13 | #include <linux/platform_device.h> |
14 | #include <linux/mfd/core.h> | |
8e005935 | 15 | |
a0c7c1d4 | 16 | #include "mc13xxx.h" |
8e005935 | 17 | |
8e005935 | 18 | #define MC13XXX_IRQSTAT0 0 |
8e005935 | 19 | #define MC13XXX_IRQMASK0 1 |
8e005935 | 20 | #define MC13XXX_IRQSTAT1 3 |
8e005935 | 21 | #define MC13XXX_IRQMASK1 4 |
8e005935 UKK |
22 | |
23 | #define MC13XXX_REVISION 7 | |
24 | #define MC13XXX_REVISION_REVMETAL (0x07 << 0) | |
25 | #define MC13XXX_REVISION_REVFULL (0x03 << 3) | |
26 | #define MC13XXX_REVISION_ICID (0x07 << 6) | |
27 | #define MC13XXX_REVISION_FIN (0x03 << 9) | |
28 | #define MC13XXX_REVISION_FAB (0x03 << 11) | |
29 | #define MC13XXX_REVISION_ICIDCODE (0x3f << 13) | |
30 | ||
0312e024 UKK |
31 | #define MC34708_REVISION_REVMETAL (0x07 << 0) |
32 | #define MC34708_REVISION_REVFULL (0x07 << 3) | |
33 | #define MC34708_REVISION_FIN (0x07 << 6) | |
34 | #define MC34708_REVISION_FAB (0x07 << 9) | |
35 | ||
34a4958e MP |
36 | #define MC13XXX_PWRCTRL 15 |
37 | #define MC13XXX_PWRCTRL_WDIRESET (1 << 12) | |
38 | ||
fec316d6 UKK |
39 | #define MC13XXX_ADC1 44 |
40 | #define MC13XXX_ADC1_ADEN (1 << 0) | |
41 | #define MC13XXX_ADC1_RAND (1 << 1) | |
42 | #define MC13XXX_ADC1_ADSEL (1 << 3) | |
43 | #define MC13XXX_ADC1_ASC (1 << 20) | |
44 | #define MC13XXX_ADC1_ADTRIGIGN (1 << 21) | |
8e005935 | 45 | |
fec316d6 | 46 | #define MC13XXX_ADC2 45 |
8e005935 | 47 | |
8e005935 UKK |
48 | void mc13xxx_lock(struct mc13xxx *mc13xxx) |
49 | { | |
50 | if (!mutex_trylock(&mc13xxx->lock)) { | |
5d5a7bff | 51 | dev_dbg(mc13xxx->dev, "wait for %s from %ps\n", |
8e005935 UKK |
52 | __func__, __builtin_return_address(0)); |
53 | ||
54 | mutex_lock(&mc13xxx->lock); | |
55 | } | |
5d5a7bff | 56 | dev_dbg(mc13xxx->dev, "%s from %ps\n", |
8e005935 UKK |
57 | __func__, __builtin_return_address(0)); |
58 | } | |
59 | EXPORT_SYMBOL(mc13xxx_lock); | |
60 | ||
61 | void mc13xxx_unlock(struct mc13xxx *mc13xxx) | |
62 | { | |
5d5a7bff | 63 | dev_dbg(mc13xxx->dev, "%s from %ps\n", |
8e005935 UKK |
64 | __func__, __builtin_return_address(0)); |
65 | mutex_unlock(&mc13xxx->lock); | |
66 | } | |
67 | EXPORT_SYMBOL(mc13xxx_unlock); | |
68 | ||
8e005935 UKK |
69 | int mc13xxx_reg_read(struct mc13xxx *mc13xxx, unsigned int offset, u32 *val) |
70 | { | |
8e005935 UKK |
71 | int ret; |
72 | ||
91b5e741 | 73 | ret = regmap_read(mc13xxx->regmap, offset, val); |
5006fe54 | 74 | dev_vdbg(mc13xxx->dev, "[0x%02x] -> 0x%06x\n", offset, *val); |
8e005935 | 75 | |
5006fe54 | 76 | return ret; |
8e005935 UKK |
77 | } |
78 | EXPORT_SYMBOL(mc13xxx_reg_read); | |
79 | ||
80 | int mc13xxx_reg_write(struct mc13xxx *mc13xxx, unsigned int offset, u32 val) | |
81 | { | |
5006fe54 | 82 | dev_vdbg(mc13xxx->dev, "[0x%02x] <- 0x%06x\n", offset, val); |
8e005935 | 83 | |
328fe79c | 84 | if (val >= BIT(24)) |
8e005935 UKK |
85 | return -EINVAL; |
86 | ||
91b5e741 | 87 | return regmap_write(mc13xxx->regmap, offset, val); |
8e005935 UKK |
88 | } |
89 | EXPORT_SYMBOL(mc13xxx_reg_write); | |
90 | ||
91 | int mc13xxx_reg_rmw(struct mc13xxx *mc13xxx, unsigned int offset, | |
92 | u32 mask, u32 val) | |
93 | { | |
8e005935 | 94 | BUG_ON(val & ~mask); |
91b5e741 MR |
95 | dev_vdbg(mc13xxx->dev, "[0x%02x] <- 0x%06x (mask: 0x%06x)\n", |
96 | offset, val, mask); | |
8e005935 | 97 | |
91b5e741 | 98 | return regmap_update_bits(mc13xxx->regmap, offset, mask, val); |
8e005935 UKK |
99 | } |
100 | EXPORT_SYMBOL(mc13xxx_reg_rmw); | |
101 | ||
102 | int mc13xxx_irq_mask(struct mc13xxx *mc13xxx, int irq) | |
103 | { | |
10f9edae | 104 | int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq); |
8e005935 | 105 | |
10f9edae | 106 | disable_irq_nosync(virq); |
8e005935 | 107 | |
10f9edae | 108 | return 0; |
8e005935 UKK |
109 | } |
110 | EXPORT_SYMBOL(mc13xxx_irq_mask); | |
111 | ||
112 | int mc13xxx_irq_unmask(struct mc13xxx *mc13xxx, int irq) | |
113 | { | |
10f9edae | 114 | int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq); |
8e005935 | 115 | |
10f9edae | 116 | enable_irq(virq); |
8e005935 | 117 | |
10f9edae | 118 | return 0; |
8e005935 UKK |
119 | } |
120 | EXPORT_SYMBOL(mc13xxx_irq_unmask); | |
121 | ||
122 | int mc13xxx_irq_status(struct mc13xxx *mc13xxx, int irq, | |
123 | int *enabled, int *pending) | |
124 | { | |
125 | int ret; | |
126 | unsigned int offmask = irq < 24 ? MC13XXX_IRQMASK0 : MC13XXX_IRQMASK1; | |
127 | unsigned int offstat = irq < 24 ? MC13XXX_IRQSTAT0 : MC13XXX_IRQSTAT1; | |
128 | u32 irqbit = 1 << (irq < 24 ? irq : irq - 24); | |
129 | ||
10f9edae | 130 | if (irq < 0 || irq >= ARRAY_SIZE(mc13xxx->irqs)) |
8e005935 UKK |
131 | return -EINVAL; |
132 | ||
133 | if (enabled) { | |
134 | u32 mask; | |
135 | ||
136 | ret = mc13xxx_reg_read(mc13xxx, offmask, &mask); | |
137 | if (ret) | |
138 | return ret; | |
139 | ||
140 | *enabled = mask & irqbit; | |
141 | } | |
142 | ||
143 | if (pending) { | |
144 | u32 stat; | |
145 | ||
146 | ret = mc13xxx_reg_read(mc13xxx, offstat, &stat); | |
147 | if (ret) | |
148 | return ret; | |
149 | ||
150 | *pending = stat & irqbit; | |
151 | } | |
152 | ||
153 | return 0; | |
154 | } | |
155 | EXPORT_SYMBOL(mc13xxx_irq_status); | |
156 | ||
8e005935 UKK |
157 | int mc13xxx_irq_request(struct mc13xxx *mc13xxx, int irq, |
158 | irq_handler_t handler, const char *name, void *dev) | |
159 | { | |
10f9edae | 160 | int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq); |
8e005935 | 161 | |
10f9edae | 162 | return devm_request_threaded_irq(mc13xxx->dev, virq, NULL, handler, |
0b182c28 | 163 | IRQF_ONESHOT, name, dev); |
8e005935 UKK |
164 | } |
165 | EXPORT_SYMBOL(mc13xxx_irq_request); | |
166 | ||
167 | int mc13xxx_irq_free(struct mc13xxx *mc13xxx, int irq, void *dev) | |
168 | { | |
10f9edae | 169 | int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq); |
8e005935 | 170 | |
10f9edae | 171 | devm_free_irq(mc13xxx->dev, virq, dev); |
8e005935 UKK |
172 | |
173 | return 0; | |
174 | } | |
175 | EXPORT_SYMBOL(mc13xxx_irq_free); | |
176 | ||
8e005935 | 177 | #define maskval(reg, mask) (((reg) & (mask)) >> __ffs(mask)) |
cd0f34b0 | 178 | static void mc13xxx_print_revision(struct mc13xxx *mc13xxx, u32 revision) |
8e005935 | 179 | { |
cd0f34b0 UKK |
180 | dev_info(mc13xxx->dev, "%s: rev: %d.%d, " |
181 | "fin: %d, fab: %d, icid: %d/%d\n", | |
182 | mc13xxx->variant->name, | |
183 | maskval(revision, MC13XXX_REVISION_REVFULL), | |
184 | maskval(revision, MC13XXX_REVISION_REVMETAL), | |
185 | maskval(revision, MC13XXX_REVISION_FIN), | |
186 | maskval(revision, MC13XXX_REVISION_FAB), | |
187 | maskval(revision, MC13XXX_REVISION_ICID), | |
188 | maskval(revision, MC13XXX_REVISION_ICIDCODE)); | |
189 | } | |
8e005935 | 190 | |
0312e024 UKK |
191 | static void mc34708_print_revision(struct mc13xxx *mc13xxx, u32 revision) |
192 | { | |
193 | dev_info(mc13xxx->dev, "%s: rev %d.%d, fin: %d, fab: %d\n", | |
194 | mc13xxx->variant->name, | |
195 | maskval(revision, MC34708_REVISION_REVFULL), | |
196 | maskval(revision, MC34708_REVISION_REVMETAL), | |
197 | maskval(revision, MC34708_REVISION_FIN), | |
198 | maskval(revision, MC34708_REVISION_FAB)); | |
199 | } | |
200 | ||
cd0f34b0 UKK |
201 | /* These are only exported for mc13xxx-i2c and mc13xxx-spi */ |
202 | struct mc13xxx_variant mc13xxx_variant_mc13783 = { | |
203 | .name = "mc13783", | |
204 | .print_revision = mc13xxx_print_revision, | |
205 | }; | |
206 | EXPORT_SYMBOL_GPL(mc13xxx_variant_mc13783); | |
8e005935 | 207 | |
cd0f34b0 UKK |
208 | struct mc13xxx_variant mc13xxx_variant_mc13892 = { |
209 | .name = "mc13892", | |
210 | .print_revision = mc13xxx_print_revision, | |
211 | }; | |
212 | EXPORT_SYMBOL_GPL(mc13xxx_variant_mc13892); | |
8e005935 | 213 | |
0312e024 UKK |
214 | struct mc13xxx_variant mc13xxx_variant_mc34708 = { |
215 | .name = "mc34708", | |
216 | .print_revision = mc34708_print_revision, | |
217 | }; | |
218 | EXPORT_SYMBOL_GPL(mc13xxx_variant_mc34708); | |
219 | ||
8e005935 UKK |
220 | static const char *mc13xxx_get_chipname(struct mc13xxx *mc13xxx) |
221 | { | |
cd0f34b0 | 222 | return mc13xxx->variant->name; |
8e005935 UKK |
223 | } |
224 | ||
8e005935 UKK |
225 | int mc13xxx_get_flags(struct mc13xxx *mc13xxx) |
226 | { | |
876989d5 | 227 | return mc13xxx->flags; |
8e005935 UKK |
228 | } |
229 | EXPORT_SYMBOL(mc13xxx_get_flags); | |
230 | ||
fec316d6 UKK |
231 | #define MC13XXX_ADC1_CHAN0_SHIFT 5 |
232 | #define MC13XXX_ADC1_CHAN1_SHIFT 8 | |
1039d762 MT |
233 | #define MC13783_ADC1_ATO_SHIFT 11 |
234 | #define MC13783_ADC1_ATOX (1 << 19) | |
8e005935 UKK |
235 | |
236 | struct mc13xxx_adcdone_data { | |
237 | struct mc13xxx *mc13xxx; | |
238 | struct completion done; | |
239 | }; | |
240 | ||
fec316d6 | 241 | static irqreturn_t mc13xxx_handler_adcdone(int irq, void *data) |
8e005935 UKK |
242 | { |
243 | struct mc13xxx_adcdone_data *adcdone_data = data; | |
244 | ||
8e005935 UKK |
245 | complete_all(&adcdone_data->done); |
246 | ||
247 | return IRQ_HANDLED; | |
248 | } | |
249 | ||
fec316d6 | 250 | #define MC13XXX_ADC_WORKING (1 << 0) |
8e005935 | 251 | |
fec316d6 | 252 | int mc13xxx_adc_do_conversion(struct mc13xxx *mc13xxx, unsigned int mode, |
1039d762 MT |
253 | unsigned int channel, u8 ato, bool atox, |
254 | unsigned int *sample) | |
8e005935 | 255 | { |
8e005935 UKK |
256 | u32 adc0, adc1, old_adc0; |
257 | int i, ret; | |
258 | struct mc13xxx_adcdone_data adcdone_data = { | |
259 | .mc13xxx = mc13xxx, | |
260 | }; | |
261 | init_completion(&adcdone_data.done); | |
262 | ||
5006fe54 | 263 | dev_dbg(mc13xxx->dev, "%s\n", __func__); |
8e005935 UKK |
264 | |
265 | mc13xxx_lock(mc13xxx); | |
266 | ||
fec316d6 | 267 | if (mc13xxx->adcflags & MC13XXX_ADC_WORKING) { |
8e005935 UKK |
268 | ret = -EBUSY; |
269 | goto out; | |
270 | } | |
271 | ||
fec316d6 | 272 | mc13xxx->adcflags |= MC13XXX_ADC_WORKING; |
8e005935 | 273 | |
9e28989d KL |
274 | ret = mc13xxx_reg_read(mc13xxx, MC13XXX_ADC0, &old_adc0); |
275 | if (ret) | |
276 | goto out; | |
8e005935 | 277 | |
55143439 FE |
278 | adc0 = MC13XXX_ADC0_ADINC1 | MC13XXX_ADC0_ADINC2 | |
279 | MC13XXX_ADC0_CHRGRAWDIV; | |
fec316d6 | 280 | adc1 = MC13XXX_ADC1_ADEN | MC13XXX_ADC1_ADTRIGIGN | MC13XXX_ADC1_ASC; |
8e005935 | 281 | |
ed645ccc AG |
282 | /* |
283 | * Channels mapped through ADIN7: | |
284 | * 7 - General purpose ADIN7 | |
285 | * 16 - UID | |
286 | * 17 - Die temperature | |
287 | */ | |
288 | if (channel > 7 && channel < 16) { | |
fec316d6 | 289 | adc1 |= MC13XXX_ADC1_ADSEL; |
ed645ccc AG |
290 | } else if (channel == 16) { |
291 | adc0 |= MC13XXX_ADC0_ADIN7SEL_UID; | |
292 | channel = 7; | |
293 | } else if (channel == 17) { | |
294 | adc0 |= MC13XXX_ADC0_ADIN7SEL_DIE; | |
295 | channel = 7; | |
296 | } | |
8e005935 UKK |
297 | |
298 | switch (mode) { | |
fec316d6 UKK |
299 | case MC13XXX_ADC_MODE_TS: |
300 | adc0 |= MC13XXX_ADC0_ADREFEN | MC13XXX_ADC0_TSMOD0 | | |
301 | MC13XXX_ADC0_TSMOD1; | |
302 | adc1 |= 4 << MC13XXX_ADC1_CHAN1_SHIFT; | |
8e005935 UKK |
303 | break; |
304 | ||
fec316d6 | 305 | case MC13XXX_ADC_MODE_SINGLE_CHAN: |
2161891a | 306 | adc0 |= old_adc0 & MC13XXX_ADC0_CONFIG_MASK; |
fec316d6 UKK |
307 | adc1 |= (channel & 0x7) << MC13XXX_ADC1_CHAN0_SHIFT; |
308 | adc1 |= MC13XXX_ADC1_RAND; | |
8e005935 UKK |
309 | break; |
310 | ||
fec316d6 | 311 | case MC13XXX_ADC_MODE_MULT_CHAN: |
2161891a | 312 | adc0 |= old_adc0 & MC13XXX_ADC0_CONFIG_MASK; |
fec316d6 | 313 | adc1 |= 4 << MC13XXX_ADC1_CHAN1_SHIFT; |
8e005935 UKK |
314 | break; |
315 | ||
316 | default: | |
fec316d6 | 317 | mc13xxx_unlock(mc13xxx); |
8e005935 UKK |
318 | return -EINVAL; |
319 | } | |
320 | ||
1039d762 MT |
321 | adc1 |= ato << MC13783_ADC1_ATO_SHIFT; |
322 | if (atox) | |
323 | adc1 |= MC13783_ADC1_ATOX; | |
5006fe54 MR |
324 | |
325 | dev_dbg(mc13xxx->dev, "%s: request irq\n", __func__); | |
fec316d6 UKK |
326 | mc13xxx_irq_request(mc13xxx, MC13XXX_IRQ_ADCDONE, |
327 | mc13xxx_handler_adcdone, __func__, &adcdone_data); | |
8e005935 | 328 | |
fec316d6 UKK |
329 | mc13xxx_reg_write(mc13xxx, MC13XXX_ADC0, adc0); |
330 | mc13xxx_reg_write(mc13xxx, MC13XXX_ADC1, adc1); | |
8e005935 UKK |
331 | |
332 | mc13xxx_unlock(mc13xxx); | |
333 | ||
334 | ret = wait_for_completion_interruptible_timeout(&adcdone_data.done, HZ); | |
335 | ||
336 | if (!ret) | |
337 | ret = -ETIMEDOUT; | |
338 | ||
339 | mc13xxx_lock(mc13xxx); | |
340 | ||
fec316d6 | 341 | mc13xxx_irq_free(mc13xxx, MC13XXX_IRQ_ADCDONE, &adcdone_data); |
8e005935 UKK |
342 | |
343 | if (ret > 0) | |
344 | for (i = 0; i < 4; ++i) { | |
345 | ret = mc13xxx_reg_read(mc13xxx, | |
fec316d6 | 346 | MC13XXX_ADC2, &sample[i]); |
8e005935 UKK |
347 | if (ret) |
348 | break; | |
349 | } | |
350 | ||
fec316d6 | 351 | if (mode == MC13XXX_ADC_MODE_TS) |
8e005935 | 352 | /* restore TSMOD */ |
fec316d6 | 353 | mc13xxx_reg_write(mc13xxx, MC13XXX_ADC0, old_adc0); |
8e005935 | 354 | |
fec316d6 | 355 | mc13xxx->adcflags &= ~MC13XXX_ADC_WORKING; |
8e005935 UKK |
356 | out: |
357 | mc13xxx_unlock(mc13xxx); | |
358 | ||
359 | return ret; | |
360 | } | |
fec316d6 | 361 | EXPORT_SYMBOL_GPL(mc13xxx_adc_do_conversion); |
8e005935 UKK |
362 | |
363 | static int mc13xxx_add_subdevice_pdata(struct mc13xxx *mc13xxx, | |
c8a03c96 | 364 | const char *format, void *pdata, size_t pdata_size) |
8e005935 UKK |
365 | { |
366 | char buf[30]; | |
367 | const char *name = mc13xxx_get_chipname(mc13xxx); | |
368 | ||
369 | struct mfd_cell cell = { | |
c8a03c96 SO |
370 | .platform_data = pdata, |
371 | .pdata_size = pdata_size, | |
8e005935 UKK |
372 | }; |
373 | ||
374 | /* there is no asnprintf in the kernel :-( */ | |
375 | if (snprintf(buf, sizeof(buf), format, name) > sizeof(buf)) | |
376 | return -E2BIG; | |
377 | ||
378 | cell.name = kmemdup(buf, strlen(buf) + 1, GFP_KERNEL); | |
379 | if (!cell.name) | |
380 | return -ENOMEM; | |
381 | ||
10f9edae AS |
382 | return mfd_add_devices(mc13xxx->dev, -1, &cell, 1, NULL, 0, |
383 | regmap_irq_get_domain(mc13xxx->irq_data)); | |
8e005935 UKK |
384 | } |
385 | ||
386 | static int mc13xxx_add_subdevice(struct mc13xxx *mc13xxx, const char *format) | |
387 | { | |
c8a03c96 | 388 | return mc13xxx_add_subdevice_pdata(mc13xxx, format, NULL, 0); |
8e005935 UKK |
389 | } |
390 | ||
876989d5 SG |
391 | #ifdef CONFIG_OF |
392 | static int mc13xxx_probe_flags_dt(struct mc13xxx *mc13xxx) | |
393 | { | |
91b5e741 | 394 | struct device_node *np = mc13xxx->dev->of_node; |
876989d5 SG |
395 | |
396 | if (!np) | |
397 | return -ENODEV; | |
398 | ||
505b9e57 | 399 | if (of_property_read_bool(np, "fsl,mc13xxx-uses-adc")) |
876989d5 SG |
400 | mc13xxx->flags |= MC13XXX_USE_ADC; |
401 | ||
505b9e57 | 402 | if (of_property_read_bool(np, "fsl,mc13xxx-uses-codec")) |
876989d5 SG |
403 | mc13xxx->flags |= MC13XXX_USE_CODEC; |
404 | ||
505b9e57 | 405 | if (of_property_read_bool(np, "fsl,mc13xxx-uses-rtc")) |
876989d5 SG |
406 | mc13xxx->flags |= MC13XXX_USE_RTC; |
407 | ||
505b9e57 | 408 | if (of_property_read_bool(np, "fsl,mc13xxx-uses-touch")) |
876989d5 SG |
409 | mc13xxx->flags |= MC13XXX_USE_TOUCHSCREEN; |
410 | ||
411 | return 0; | |
412 | } | |
413 | #else | |
414 | static inline int mc13xxx_probe_flags_dt(struct mc13xxx *mc13xxx) | |
415 | { | |
416 | return -ENODEV; | |
417 | } | |
418 | #endif | |
419 | ||
db9ef449 | 420 | int mc13xxx_common_init(struct device *dev) |
8e005935 | 421 | { |
db9ef449 AS |
422 | struct mc13xxx_platform_data *pdata = dev_get_platdata(dev); |
423 | struct mc13xxx *mc13xxx = dev_get_drvdata(dev); | |
cd0f34b0 | 424 | u32 revision; |
10f9edae | 425 | int i, ret; |
8e005935 | 426 | |
db9ef449 | 427 | mc13xxx->dev = dev; |
8e005935 | 428 | |
cd0f34b0 | 429 | ret = mc13xxx_reg_read(mc13xxx, MC13XXX_REVISION, &revision); |
5006fe54 | 430 | if (ret) |
db9ef449 | 431 | return ret; |
8e005935 | 432 | |
cd0f34b0 UKK |
433 | mc13xxx->variant->print_revision(mc13xxx, revision); |
434 | ||
34a4958e MP |
435 | ret = mc13xxx_reg_rmw(mc13xxx, MC13XXX_PWRCTRL, |
436 | MC13XXX_PWRCTRL_WDIRESET, MC13XXX_PWRCTRL_WDIRESET); | |
437 | if (ret) | |
438 | return ret; | |
439 | ||
10f9edae AS |
440 | for (i = 0; i < ARRAY_SIZE(mc13xxx->irqs); i++) { |
441 | mc13xxx->irqs[i].reg_offset = i / MC13XXX_IRQ_PER_REG; | |
442 | mc13xxx->irqs[i].mask = BIT(i % MC13XXX_IRQ_PER_REG); | |
443 | } | |
8e005935 | 444 | |
10f9edae AS |
445 | mc13xxx->irq_chip.name = dev_name(dev); |
446 | mc13xxx->irq_chip.status_base = MC13XXX_IRQSTAT0; | |
447 | mc13xxx->irq_chip.mask_base = MC13XXX_IRQMASK0; | |
448 | mc13xxx->irq_chip.ack_base = MC13XXX_IRQSTAT0; | |
449 | mc13xxx->irq_chip.irq_reg_stride = MC13XXX_IRQSTAT1 - MC13XXX_IRQSTAT0; | |
450 | mc13xxx->irq_chip.init_ack_masked = true; | |
451 | mc13xxx->irq_chip.use_ack = true; | |
452 | mc13xxx->irq_chip.num_regs = MC13XXX_IRQ_REG_CNT; | |
453 | mc13xxx->irq_chip.irqs = mc13xxx->irqs; | |
454 | mc13xxx->irq_chip.num_irqs = ARRAY_SIZE(mc13xxx->irqs); | |
455 | ||
456 | ret = regmap_add_irq_chip(mc13xxx->regmap, mc13xxx->irq, IRQF_ONESHOT, | |
457 | 0, &mc13xxx->irq_chip, &mc13xxx->irq_data); | |
8e005935 | 458 | if (ret) |
db9ef449 | 459 | return ret; |
8e005935 | 460 | |
48ca9a52 FE |
461 | mutex_init(&mc13xxx->lock); |
462 | ||
876989d5 SG |
463 | if (mc13xxx_probe_flags_dt(mc13xxx) < 0 && pdata) |
464 | mc13xxx->flags = pdata->flags; | |
465 | ||
876989d5 SG |
466 | if (pdata) { |
467 | mc13xxx_add_subdevice_pdata(mc13xxx, "%s-regulator", | |
468 | &pdata->regulators, sizeof(pdata->regulators)); | |
c8a03c96 SO |
469 | mc13xxx_add_subdevice_pdata(mc13xxx, "%s-led", |
470 | pdata->leds, sizeof(*pdata->leds)); | |
30fc7ac3 PR |
471 | mc13xxx_add_subdevice_pdata(mc13xxx, "%s-pwrbutton", |
472 | pdata->buttons, sizeof(*pdata->buttons)); | |
a2ff8459 AS |
473 | if (mc13xxx->flags & MC13XXX_USE_CODEC) |
474 | mc13xxx_add_subdevice_pdata(mc13xxx, "%s-codec", | |
475 | pdata->codec, sizeof(*pdata->codec)); | |
476 | if (mc13xxx->flags & MC13XXX_USE_TOUCHSCREEN) | |
477 | mc13xxx_add_subdevice_pdata(mc13xxx, "%s-ts", | |
478 | &pdata->touch, sizeof(pdata->touch)); | |
876989d5 SG |
479 | } else { |
480 | mc13xxx_add_subdevice(mc13xxx, "%s-regulator"); | |
481 | mc13xxx_add_subdevice(mc13xxx, "%s-led"); | |
482 | mc13xxx_add_subdevice(mc13xxx, "%s-pwrbutton"); | |
a2ff8459 AS |
483 | if (mc13xxx->flags & MC13XXX_USE_CODEC) |
484 | mc13xxx_add_subdevice(mc13xxx, "%s-codec"); | |
485 | if (mc13xxx->flags & MC13XXX_USE_TOUCHSCREEN) | |
486 | mc13xxx_add_subdevice(mc13xxx, "%s-ts"); | |
876989d5 | 487 | } |
30fc7ac3 | 488 | |
10f9edae AS |
489 | if (mc13xxx->flags & MC13XXX_USE_ADC) |
490 | mc13xxx_add_subdevice(mc13xxx, "%s-adc"); | |
491 | ||
492 | if (mc13xxx->flags & MC13XXX_USE_RTC) | |
493 | mc13xxx_add_subdevice(mc13xxx, "%s-rtc"); | |
494 | ||
8e005935 UKK |
495 | return 0; |
496 | } | |
a0c7c1d4 | 497 | EXPORT_SYMBOL_GPL(mc13xxx_common_init); |
8e005935 | 498 | |
db9ef449 | 499 | int mc13xxx_common_exit(struct device *dev) |
8e005935 | 500 | { |
db9ef449 AS |
501 | struct mc13xxx *mc13xxx = dev_get_drvdata(dev); |
502 | ||
db9ef449 | 503 | mfd_remove_devices(dev); |
10f9edae | 504 | regmap_del_irq_chip(mc13xxx->irq, mc13xxx->irq_data); |
db9ef449 | 505 | mutex_destroy(&mc13xxx->lock); |
8e005935 | 506 | |
db9ef449 | 507 | return 0; |
8e005935 | 508 | } |
db9ef449 | 509 | EXPORT_SYMBOL_GPL(mc13xxx_common_exit); |
8e005935 UKK |
510 | |
511 | MODULE_DESCRIPTION("Core driver for Freescale MC13XXX PMIC"); | |
512 | MODULE_AUTHOR("Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>"); | |
513 | MODULE_LICENSE("GPL v2"); |