[linux-block.git] / drivers / mfd / intel_quark_i2c_gpio.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Intel Quark MFD PCI driver for I2C & GPIO
 *
 * Copyright(c) 2014 Intel Corporation.
 *
 * Intel Quark PCI device for I2C and GPIO controller sharing the same
 * PCI function. This PCI driver will split the 2 devices into their
 * respective drivers.
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/mfd/core.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/dmi.h>
#include <linux/platform_data/gpio-dwapb.h>
#include <linux/platform_data/i2c-designware.h>

/* PCI BAR for register base address */
#define MFD_I2C_BAR		0
#define MFD_GPIO_BAR		1

/* ACPI _ADR value to match the child node */
#define MFD_ACPI_MATCH_GPIO	0ULL
#define MFD_ACPI_MATCH_I2C	1ULL

/* The base GPIO number under GPIOLIB framework */
#define INTEL_QUARK_MFD_GPIO_BASE	8

/* The default number of South-Cluster GPIO on Quark. */
#define INTEL_QUARK_MFD_NGPIO		8

/* The DesignWare GPIO ports on Quark. */
#define INTEL_QUARK_GPIO_NPORTS	1

#define INTEL_QUARK_IORES_MEM	0
#define INTEL_QUARK_IORES_IRQ	1

#define INTEL_QUARK_I2C_CONTROLLER_CLK "i2c_designware.0"

/* The Quark I2C controller source clock */
#define INTEL_QUARK_I2C_CLK_HZ	33000000

struct intel_quark_mfd {
	struct device		*dev;
	struct clk		*i2c_clk;
	struct clk_lookup	*i2c_clk_lookup;
};

static const struct dmi_system_id dmi_platform_info[] = {
	{
		.matches = {
			DMI_EXACT_MATCH(DMI_BOARD_NAME, "Galileo"),
		},
		.driver_data = (void *)100000,
	},
	{
		.matches = {
			DMI_EXACT_MATCH(DMI_BOARD_NAME, "GalileoGen2"),
		},
		.driver_data = (void *)400000,
	},
	{
		.matches = {
			DMI_EXACT_MATCH(DMI_BOARD_NAME, "SIMATIC IOT2000"),
		},
		.driver_data = (void *)400000,
	},
	{}
};

static struct resource intel_quark_i2c_res[] = {
	[INTEL_QUARK_IORES_MEM] = {
		.flags = IORESOURCE_MEM,
	},
	[INTEL_QUARK_IORES_IRQ] = {
		.flags = IORESOURCE_IRQ,
	},
};

static struct mfd_cell_acpi_match intel_quark_acpi_match_i2c = {
	.adr = MFD_ACPI_MATCH_I2C,
};

static struct resource intel_quark_gpio_res[] = {
	[INTEL_QUARK_IORES_MEM] = {
		.flags = IORESOURCE_MEM,
	},
};

static struct mfd_cell_acpi_match intel_quark_acpi_match_gpio = {
	.adr = MFD_ACPI_MATCH_GPIO,
};

static struct mfd_cell intel_quark_mfd_cells[] = {
	{
		.id = MFD_GPIO_BAR,
		.name = "gpio-dwapb",
		.acpi_match = &intel_quark_acpi_match_gpio,
		.num_resources = ARRAY_SIZE(intel_quark_gpio_res),
		.resources = intel_quark_gpio_res,
		.ignore_resource_conflicts = true,
	},
	{
		.id = MFD_I2C_BAR,
		.name = "i2c_designware",
		.acpi_match = &intel_quark_acpi_match_i2c,
		.num_resources = ARRAY_SIZE(intel_quark_i2c_res),
		.resources = intel_quark_i2c_res,
		.ignore_resource_conflicts = true,
	},
};

static const struct pci_device_id intel_quark_mfd_ids[] = {
	{ PCI_VDEVICE(INTEL, 0x0934), },
	{},
};
MODULE_DEVICE_TABLE(pci, intel_quark_mfd_ids);

static int intel_quark_register_i2c_clk(struct device *dev)
{
	struct intel_quark_mfd *quark_mfd = dev_get_drvdata(dev);
	struct clk *i2c_clk;

	i2c_clk = clk_register_fixed_rate(dev,
					  INTEL_QUARK_I2C_CONTROLLER_CLK, NULL,
					  0, INTEL_QUARK_I2C_CLK_HZ);
	if (IS_ERR(i2c_clk))
		return PTR_ERR(i2c_clk);

	quark_mfd->i2c_clk = i2c_clk;
	quark_mfd->i2c_clk_lookup = clkdev_create(i2c_clk, NULL,
						INTEL_QUARK_I2C_CONTROLLER_CLK);

	if (!quark_mfd->i2c_clk_lookup) {
		clk_unregister(quark_mfd->i2c_clk);
		dev_err(dev, "Fixed clk register failed\n");
		return -ENOMEM;
	}

	return 0;
}

static void intel_quark_unregister_i2c_clk(struct device *dev)
{
	struct intel_quark_mfd *quark_mfd = dev_get_drvdata(dev);

	if (!quark_mfd->i2c_clk_lookup)
		return;

	clkdev_drop(quark_mfd->i2c_clk_lookup);
	clk_unregister(quark_mfd->i2c_clk);
}

static int intel_quark_i2c_setup(struct pci_dev *pdev, struct mfd_cell *cell)
{
	const struct dmi_system_id *dmi_id;
	struct dw_i2c_platform_data *pdata;
	struct resource *res = (struct resource *)cell->resources;
	struct device *dev = &pdev->dev;

	res[INTEL_QUARK_IORES_MEM].start =
		pci_resource_start(pdev, MFD_I2C_BAR);
	res[INTEL_QUARK_IORES_MEM].end =
		pci_resource_end(pdev, MFD_I2C_BAR);

	res[INTEL_QUARK_IORES_IRQ].start = pdev->irq;
	res[INTEL_QUARK_IORES_IRQ].end = pdev->irq;

	pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
	if (!pdata)
		return -ENOMEM;

	/* Normal mode by default */
	pdata->i2c_scl_freq = 100000;

	dmi_id = dmi_first_match(dmi_platform_info);
	if (dmi_id)
		pdata->i2c_scl_freq = (uintptr_t)dmi_id->driver_data;

	cell->platform_data = pdata;
	cell->pdata_size = sizeof(*pdata);

	return 0;
}

static int intel_quark_gpio_setup(struct pci_dev *pdev, struct mfd_cell *cell)
{
	struct dwapb_platform_data *pdata;
	struct resource *res = (struct resource *)cell->resources;
	struct device *dev = &pdev->dev;

	res[INTEL_QUARK_IORES_MEM].start =
		pci_resource_start(pdev, MFD_GPIO_BAR);
	res[INTEL_QUARK_IORES_MEM].end =
		pci_resource_end(pdev, MFD_GPIO_BAR);

	pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
	if (!pdata)
		return -ENOMEM;

	/* For intel quark x1000, it has only one port: portA */
	pdata->nports = INTEL_QUARK_GPIO_NPORTS;
	pdata->properties = devm_kcalloc(dev, pdata->nports,
					 sizeof(*pdata->properties),
					 GFP_KERNEL);
	if (!pdata->properties)
		return -ENOMEM;

	/* Set the properties for portA */
	pdata->properties->fwnode	= NULL;
	pdata->properties->idx		= 0;
	pdata->properties->ngpio	= INTEL_QUARK_MFD_NGPIO;
	pdata->properties->gpio_base	= INTEL_QUARK_MFD_GPIO_BASE;
	pdata->properties->irq[0]	= pdev->irq;
	pdata->properties->has_irq	= true;
	pdata->properties->irq_shared	= true;

	cell->platform_data = pdata;
	cell->pdata_size = sizeof(*pdata);

	return 0;
}

static int intel_quark_mfd_probe(struct pci_dev *pdev,
				 const struct pci_device_id *id)
{
	struct intel_quark_mfd *quark_mfd;
	int ret;

	ret = pcim_enable_device(pdev);
	if (ret)
		return ret;

	quark_mfd = devm_kzalloc(&pdev->dev, sizeof(*quark_mfd), GFP_KERNEL);
	if (!quark_mfd)
		return -ENOMEM;

	quark_mfd->dev = &pdev->dev;
	dev_set_drvdata(&pdev->dev, quark_mfd);

	ret = intel_quark_register_i2c_clk(&pdev->dev);
	if (ret)
		return ret;

	ret = intel_quark_i2c_setup(pdev, &intel_quark_mfd_cells[1]);
	if (ret)
		goto err_unregister_i2c_clk;

	ret = intel_quark_gpio_setup(pdev, &intel_quark_mfd_cells[0]);
	if (ret)
		goto err_unregister_i2c_clk;

	ret = mfd_add_devices(&pdev->dev, 0, intel_quark_mfd_cells,
			      ARRAY_SIZE(intel_quark_mfd_cells), NULL, 0,
			      NULL);
	if (ret)
		goto err_unregister_i2c_clk;

	return 0;

err_unregister_i2c_clk:
	intel_quark_unregister_i2c_clk(&pdev->dev);
	return ret;
}

static void intel_quark_mfd_remove(struct pci_dev *pdev)
{
	intel_quark_unregister_i2c_clk(&pdev->dev);
	mfd_remove_devices(&pdev->dev);
}

static struct pci_driver intel_quark_mfd_driver = {
	.name		= "intel_quark_mfd_i2c_gpio",
	.id_table	= intel_quark_mfd_ids,
	.probe		= intel_quark_mfd_probe,
	.remove		= intel_quark_mfd_remove,
};

module_pci_driver(intel_quark_mfd_driver);

MODULE_AUTHOR("Raymond Tan <raymond.tan@intel.com>");
MODULE_DESCRIPTION("Intel Quark MFD PCI driver for I2C & GPIO");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
2025cf9e	1	// SPDX-License-Identifier: GPL-2.0-only
60ae5b9f RT	2	/*
	3	* Intel Quark MFD PCI driver for I2C & GPIO
	4	*
	5	* Copyright(c) 2014 Intel Corporation.
	6	*
60ae5b9f RT	7	* Intel Quark PCI device for I2C and GPIO controller sharing the same
	8	* PCI function. This PCI driver will split the 2 devices into their
	9	* respective drivers.
	10	*/
	11
	12	#include <linux/kernel.h>
	13	#include <linux/module.h>
	14	#include <linux/pci.h>
	15	#include <linux/mfd/core.h>
	16	#include <linux/clkdev.h>
	17	#include <linux/clk-provider.h>
	18	#include <linux/dmi.h>
	19	#include <linux/platform_data/gpio-dwapb.h>
	20	#include <linux/platform_data/i2c-designware.h>
	21
	22	/* PCI BAR for register base address */
	23	#define MFD_I2C_BAR 0
	24	#define MFD_GPIO_BAR 1
	25
918fe70c AS	26	/* ACPI _ADR value to match the child node */
	27	#define MFD_ACPI_MATCH_GPIO 0ULL
	28	#define MFD_ACPI_MATCH_I2C 1ULL
	29
60ae5b9f RT	30	/* The base GPIO number under GPIOLIB framework */
	31	#define INTEL_QUARK_MFD_GPIO_BASE 8
	32
	33	/* The default number of South-Cluster GPIO on Quark. */
	34	#define INTEL_QUARK_MFD_NGPIO 8
	35
	36	/* The DesignWare GPIO ports on Quark. */
	37	#define INTEL_QUARK_GPIO_NPORTS 1
	38
	39	#define INTEL_QUARK_IORES_MEM 0
	40	#define INTEL_QUARK_IORES_IRQ 1
	41
	42	#define INTEL_QUARK_I2C_CONTROLLER_CLK "i2c_designware.0"
	43
	44	/* The Quark I2C controller source clock */
	45	#define INTEL_QUARK_I2C_CLK_HZ 33000000
	46
60ae5b9f	47	struct intel_quark_mfd {
9caac886	48	struct device *dev;
60ae5b9f RT	49	struct clk *i2c_clk;
	50	struct clk_lookup *i2c_clk_lookup;
	51	};
	52
b518d4ad	53	static const struct dmi_system_id dmi_platform_info[] = {
60ae5b9f	54	{
b518d4ad JK	55	.matches = {
	56	DMI_EXACT_MATCH(DMI_BOARD_NAME, "Galileo"),
	57	},
	58	.driver_data = (void *)100000,
60ae5b9f RT	59	},
60ae5b9f RT	60	{
b518d4ad JK	61	.matches = {
	62	DMI_EXACT_MATCH(DMI_BOARD_NAME, "GalileoGen2"),
	63	},
	64	.driver_data = (void *)400000,
60ae5b9f	65	},
842086d2 JK	66	{
	67	.matches = {
	68	DMI_EXACT_MATCH(DMI_BOARD_NAME, "SIMATIC IOT2000"),
842086d2 JK	69	},
	70	.driver_data = (void *)400000,
	71	},
bafc1fac	72	{}
60ae5b9f RT	73	};
	74
	75	static struct resource intel_quark_i2c_res[] = {
	76	[INTEL_QUARK_IORES_MEM] = {
	77	.flags = IORESOURCE_MEM,
	78	},
	79	[INTEL_QUARK_IORES_IRQ] = {
	80	.flags = IORESOURCE_IRQ,
	81	},
	82	};
	83
918fe70c AS	84	static struct mfd_cell_acpi_match intel_quark_acpi_match_i2c = {
	85	.adr = MFD_ACPI_MATCH_I2C,
	86	};
	87
60ae5b9f RT	88	static struct resource intel_quark_gpio_res[] = {
	89	[INTEL_QUARK_IORES_MEM] = {
	90	.flags = IORESOURCE_MEM,
	91	},
	92	};
	93
918fe70c AS	94	static struct mfd_cell_acpi_match intel_quark_acpi_match_gpio = {
	95	.adr = MFD_ACPI_MATCH_GPIO,
	96	};
	97
60ae5b9f	98	static struct mfd_cell intel_quark_mfd_cells[] = {
60ae5b9f RT	99	{
	100	.id = MFD_GPIO_BAR,
	101	.name = "gpio-dwapb",
918fe70c	102	.acpi_match = &intel_quark_acpi_match_gpio,
60ae5b9f RT	103	.num_resources = ARRAY_SIZE(intel_quark_gpio_res),
	104	.resources = intel_quark_gpio_res,
	105	.ignore_resource_conflicts = true,
	106	},
236fd469 AS	107	{
	108	.id = MFD_I2C_BAR,
	109	.name = "i2c_designware",
918fe70c	110	.acpi_match = &intel_quark_acpi_match_i2c,
236fd469 AS	111	.num_resources = ARRAY_SIZE(intel_quark_i2c_res),
	112	.resources = intel_quark_i2c_res,
	113	.ignore_resource_conflicts = true,
	114	},
60ae5b9f RT	115	};
	116
	117	static const struct pci_device_id intel_quark_mfd_ids[] = {
	118	{ PCI_VDEVICE(INTEL, 0x0934), },
	119	{},
	120	};
	121	MODULE_DEVICE_TABLE(pci, intel_quark_mfd_ids);
	122
9caac886	123	static int intel_quark_register_i2c_clk(struct device *dev)
60ae5b9f	124	{
9caac886	125	struct intel_quark_mfd *quark_mfd = dev_get_drvdata(dev);
60ae5b9f	126	struct clk *i2c_clk;
60ae5b9f	127
9caac886	128	i2c_clk = clk_register_fixed_rate(dev,
60ae5b9f	129	INTEL_QUARK_I2C_CONTROLLER_CLK, NULL,
36a0c088	130	0, INTEL_QUARK_I2C_CLK_HZ);
c4726abc SB	131	if (IS_ERR(i2c_clk))
c4726abc SB	132	return PTR_ERR(i2c_clk);
60ae5b9f	133
60ae5b9f	134	quark_mfd->i2c_clk = i2c_clk;
c4726abc SB	135	quark_mfd->i2c_clk_lookup = clkdev_create(i2c_clk, NULL,
c4726abc SB	136	INTEL_QUARK_I2C_CONTROLLER_CLK);
60ae5b9f	137
c4726abc	138	if (!quark_mfd->i2c_clk_lookup) {
7f0c5ae1	139	clk_unregister(quark_mfd->i2c_clk);
9caac886	140	dev_err(dev, "Fixed clk register failed\n");
c4726abc SB	141	return -ENOMEM;
c4726abc SB	142	}
60ae5b9f	143
c4726abc	144	return 0;
60ae5b9f RT	145	}
60ae5b9f RT	146
9caac886	147	static void intel_quark_unregister_i2c_clk(struct device *dev)
60ae5b9f	148	{
9caac886	149	struct intel_quark_mfd *quark_mfd = dev_get_drvdata(dev);
60ae5b9f	150
7f0c5ae1	151	if (!quark_mfd->i2c_clk_lookup)
60ae5b9f RT	152	return;
	153
	154	clkdev_drop(quark_mfd->i2c_clk_lookup);
	155	clk_unregister(quark_mfd->i2c_clk);
	156	}
	157
	158	static int intel_quark_i2c_setup(struct pci_dev pdev, struct mfd_cell cell)
	159	{
b518d4ad	160	const struct dmi_system_id *dmi_id;
60ae5b9f RT	161	struct dw_i2c_platform_data *pdata;
	162	struct resource res = (struct resource )cell->resources;
	163	struct device *dev = &pdev->dev;
60ae5b9f RT	164
	165	res[INTEL_QUARK_IORES_MEM].start =
	166	pci_resource_start(pdev, MFD_I2C_BAR);
	167	res[INTEL_QUARK_IORES_MEM].end =
	168	pci_resource_end(pdev, MFD_I2C_BAR);
	169
	170	res[INTEL_QUARK_IORES_IRQ].start = pdev->irq;
	171	res[INTEL_QUARK_IORES_IRQ].end = pdev->irq;
	172
	173	pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
	174	if (!pdata)
	175	return -ENOMEM;
	176
bafc1fac AS	177	/* Normal mode by default */
	178	pdata->i2c_scl_freq = 100000;
	179
b518d4ad JK	180	dmi_id = dmi_first_match(dmi_platform_info);
	181	if (dmi_id)
	182	pdata->i2c_scl_freq = (uintptr_t)dmi_id->driver_data;
60ae5b9f RT	183
	184	cell->platform_data = pdata;
	185	cell->pdata_size = sizeof(*pdata);
	186
	187	return 0;
	188	}
	189
	190	static int intel_quark_gpio_setup(struct pci_dev pdev, struct mfd_cell cell)
	191	{
	192	struct dwapb_platform_data *pdata;
	193	struct resource res = (struct resource )cell->resources;
	194	struct device *dev = &pdev->dev;
	195
	196	res[INTEL_QUARK_IORES_MEM].start =
	197	pci_resource_start(pdev, MFD_GPIO_BAR);
	198	res[INTEL_QUARK_IORES_MEM].end =
	199	pci_resource_end(pdev, MFD_GPIO_BAR);
	200
	201	pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
	202	if (!pdata)
	203	return -ENOMEM;
	204
	205	/* For intel quark x1000, it has only one port: portA */
	206	pdata->nports = INTEL_QUARK_GPIO_NPORTS;
	207	pdata->properties = devm_kcalloc(dev, pdata->nports,
	208	sizeof(*pdata->properties),
	209	GFP_KERNEL);
	210	if (!pdata->properties)
	211	return -ENOMEM;
	212
	213	/* Set the properties for portA */
4ba8cfa7	214	pdata->properties->fwnode = NULL;
60ae5b9f RT	215	pdata->properties->idx = 0;
	216	pdata->properties->ngpio = INTEL_QUARK_MFD_NGPIO;
	217	pdata->properties->gpio_base = INTEL_QUARK_MFD_GPIO_BASE;
e6ca26ab PE	218	pdata->properties->irq[0] = pdev->irq;
e6ca26ab PE	219	pdata->properties->has_irq = true;
60ae5b9f RT	220	pdata->properties->irq_shared = true;
	221
	222	cell->platform_data = pdata;
	223	cell->pdata_size = sizeof(*pdata);
	224
	225	return 0;
	226	}
	227
	228	static int intel_quark_mfd_probe(struct pci_dev *pdev,
	229	const struct pci_device_id *id)
	230	{
	231	struct intel_quark_mfd *quark_mfd;
	232	int ret;
	233
	234	ret = pcim_enable_device(pdev);
	235	if (ret)
	236	return ret;
	237
	238	quark_mfd = devm_kzalloc(&pdev->dev, sizeof(*quark_mfd), GFP_KERNEL);
	239	if (!quark_mfd)
	240	return -ENOMEM;
60ae5b9f	241
9caac886	242	quark_mfd->dev = &pdev->dev;
7f0c5ae1	243	dev_set_drvdata(&pdev->dev, quark_mfd);
60ae5b9f	244
9caac886	245	ret = intel_quark_register_i2c_clk(&pdev->dev);
60ae5b9f RT	246	if (ret)
	247	return ret;
	248
236fd469	249	ret = intel_quark_i2c_setup(pdev, &intel_quark_mfd_cells[1]);
60ae5b9f	250	if (ret)
7f0c5ae1	251	goto err_unregister_i2c_clk;
60ae5b9f	252
236fd469	253	ret = intel_quark_gpio_setup(pdev, &intel_quark_mfd_cells[0]);
60ae5b9f	254	if (ret)
7f0c5ae1	255	goto err_unregister_i2c_clk;
60ae5b9f	256
7f0c5ae1 AS	257	ret = mfd_add_devices(&pdev->dev, 0, intel_quark_mfd_cells,
	258	ARRAY_SIZE(intel_quark_mfd_cells), NULL, 0,
	259	NULL);
	260	if (ret)
	261	goto err_unregister_i2c_clk;
	262
	263	return 0;
60ae5b9f	264
7f0c5ae1	265	err_unregister_i2c_clk:
9caac886	266	intel_quark_unregister_i2c_clk(&pdev->dev);
7f0c5ae1	267	return ret;
60ae5b9f RT	268	}
	269
	270	static void intel_quark_mfd_remove(struct pci_dev *pdev)
	271	{
9caac886	272	intel_quark_unregister_i2c_clk(&pdev->dev);
60ae5b9f RT	273	mfd_remove_devices(&pdev->dev);
	274	}
	275
	276	static struct pci_driver intel_quark_mfd_driver = {
	277	.name = "intel_quark_mfd_i2c_gpio",
	278	.id_table = intel_quark_mfd_ids,
	279	.probe = intel_quark_mfd_probe,
	280	.remove = intel_quark_mfd_remove,
	281	};
	282
	283	module_pci_driver(intel_quark_mfd_driver);
	284
	285	MODULE_AUTHOR("Raymond Tan <raymond.tan@intel.com>");
	286	MODULE_DESCRIPTION("Intel Quark MFD PCI driver for I2C & GPIO");
	287	MODULE_LICENSE("GPL v2");