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60ae5b9f RT |
1 | /* |
2 | * Intel Quark MFD PCI driver for I2C & GPIO | |
3 | * | |
4 | * Copyright(c) 2014 Intel Corporation. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms and conditions of the GNU General Public License, | |
8 | * version 2, as published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope it will be useful, but WITHOUT | |
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | * more details. | |
14 | * | |
15 | * Intel Quark PCI device for I2C and GPIO controller sharing the same | |
16 | * PCI function. This PCI driver will split the 2 devices into their | |
17 | * respective drivers. | |
18 | */ | |
19 | ||
20 | #include <linux/kernel.h> | |
21 | #include <linux/module.h> | |
22 | #include <linux/pci.h> | |
23 | #include <linux/mfd/core.h> | |
24 | #include <linux/clkdev.h> | |
25 | #include <linux/clk-provider.h> | |
26 | #include <linux/dmi.h> | |
27 | #include <linux/platform_data/gpio-dwapb.h> | |
28 | #include <linux/platform_data/i2c-designware.h> | |
29 | ||
30 | /* PCI BAR for register base address */ | |
31 | #define MFD_I2C_BAR 0 | |
32 | #define MFD_GPIO_BAR 1 | |
33 | ||
918fe70c AS |
34 | /* ACPI _ADR value to match the child node */ |
35 | #define MFD_ACPI_MATCH_GPIO 0ULL | |
36 | #define MFD_ACPI_MATCH_I2C 1ULL | |
37 | ||
60ae5b9f RT |
38 | /* The base GPIO number under GPIOLIB framework */ |
39 | #define INTEL_QUARK_MFD_GPIO_BASE 8 | |
40 | ||
41 | /* The default number of South-Cluster GPIO on Quark. */ | |
42 | #define INTEL_QUARK_MFD_NGPIO 8 | |
43 | ||
44 | /* The DesignWare GPIO ports on Quark. */ | |
45 | #define INTEL_QUARK_GPIO_NPORTS 1 | |
46 | ||
47 | #define INTEL_QUARK_IORES_MEM 0 | |
48 | #define INTEL_QUARK_IORES_IRQ 1 | |
49 | ||
50 | #define INTEL_QUARK_I2C_CONTROLLER_CLK "i2c_designware.0" | |
51 | ||
52 | /* The Quark I2C controller source clock */ | |
53 | #define INTEL_QUARK_I2C_CLK_HZ 33000000 | |
54 | ||
60ae5b9f | 55 | struct intel_quark_mfd { |
9caac886 | 56 | struct device *dev; |
60ae5b9f RT |
57 | struct clk *i2c_clk; |
58 | struct clk_lookup *i2c_clk_lookup; | |
59 | }; | |
60 | ||
b518d4ad | 61 | static const struct dmi_system_id dmi_platform_info[] = { |
60ae5b9f | 62 | { |
b518d4ad JK |
63 | .matches = { |
64 | DMI_EXACT_MATCH(DMI_BOARD_NAME, "Galileo"), | |
65 | }, | |
66 | .driver_data = (void *)100000, | |
60ae5b9f RT |
67 | }, |
68 | { | |
b518d4ad JK |
69 | .matches = { |
70 | DMI_EXACT_MATCH(DMI_BOARD_NAME, "GalileoGen2"), | |
71 | }, | |
72 | .driver_data = (void *)400000, | |
60ae5b9f | 73 | }, |
842086d2 JK |
74 | { |
75 | .matches = { | |
76 | DMI_EXACT_MATCH(DMI_BOARD_NAME, "SIMATIC IOT2000"), | |
842086d2 JK |
77 | }, |
78 | .driver_data = (void *)400000, | |
79 | }, | |
bafc1fac | 80 | {} |
60ae5b9f RT |
81 | }; |
82 | ||
83 | static struct resource intel_quark_i2c_res[] = { | |
84 | [INTEL_QUARK_IORES_MEM] = { | |
85 | .flags = IORESOURCE_MEM, | |
86 | }, | |
87 | [INTEL_QUARK_IORES_IRQ] = { | |
88 | .flags = IORESOURCE_IRQ, | |
89 | }, | |
90 | }; | |
91 | ||
918fe70c AS |
92 | static struct mfd_cell_acpi_match intel_quark_acpi_match_i2c = { |
93 | .adr = MFD_ACPI_MATCH_I2C, | |
94 | }; | |
95 | ||
60ae5b9f RT |
96 | static struct resource intel_quark_gpio_res[] = { |
97 | [INTEL_QUARK_IORES_MEM] = { | |
98 | .flags = IORESOURCE_MEM, | |
99 | }, | |
100 | }; | |
101 | ||
918fe70c AS |
102 | static struct mfd_cell_acpi_match intel_quark_acpi_match_gpio = { |
103 | .adr = MFD_ACPI_MATCH_GPIO, | |
104 | }; | |
105 | ||
60ae5b9f | 106 | static struct mfd_cell intel_quark_mfd_cells[] = { |
60ae5b9f RT |
107 | { |
108 | .id = MFD_GPIO_BAR, | |
109 | .name = "gpio-dwapb", | |
918fe70c | 110 | .acpi_match = &intel_quark_acpi_match_gpio, |
60ae5b9f RT |
111 | .num_resources = ARRAY_SIZE(intel_quark_gpio_res), |
112 | .resources = intel_quark_gpio_res, | |
113 | .ignore_resource_conflicts = true, | |
114 | }, | |
236fd469 AS |
115 | { |
116 | .id = MFD_I2C_BAR, | |
117 | .name = "i2c_designware", | |
918fe70c | 118 | .acpi_match = &intel_quark_acpi_match_i2c, |
236fd469 AS |
119 | .num_resources = ARRAY_SIZE(intel_quark_i2c_res), |
120 | .resources = intel_quark_i2c_res, | |
121 | .ignore_resource_conflicts = true, | |
122 | }, | |
60ae5b9f RT |
123 | }; |
124 | ||
125 | static const struct pci_device_id intel_quark_mfd_ids[] = { | |
126 | { PCI_VDEVICE(INTEL, 0x0934), }, | |
127 | {}, | |
128 | }; | |
129 | MODULE_DEVICE_TABLE(pci, intel_quark_mfd_ids); | |
130 | ||
9caac886 | 131 | static int intel_quark_register_i2c_clk(struct device *dev) |
60ae5b9f | 132 | { |
9caac886 | 133 | struct intel_quark_mfd *quark_mfd = dev_get_drvdata(dev); |
60ae5b9f | 134 | struct clk *i2c_clk; |
60ae5b9f | 135 | |
9caac886 | 136 | i2c_clk = clk_register_fixed_rate(dev, |
60ae5b9f | 137 | INTEL_QUARK_I2C_CONTROLLER_CLK, NULL, |
36a0c088 | 138 | 0, INTEL_QUARK_I2C_CLK_HZ); |
c4726abc SB |
139 | if (IS_ERR(i2c_clk)) |
140 | return PTR_ERR(i2c_clk); | |
60ae5b9f | 141 | |
60ae5b9f | 142 | quark_mfd->i2c_clk = i2c_clk; |
c4726abc SB |
143 | quark_mfd->i2c_clk_lookup = clkdev_create(i2c_clk, NULL, |
144 | INTEL_QUARK_I2C_CONTROLLER_CLK); | |
60ae5b9f | 145 | |
c4726abc | 146 | if (!quark_mfd->i2c_clk_lookup) { |
7f0c5ae1 | 147 | clk_unregister(quark_mfd->i2c_clk); |
9caac886 | 148 | dev_err(dev, "Fixed clk register failed\n"); |
c4726abc SB |
149 | return -ENOMEM; |
150 | } | |
60ae5b9f | 151 | |
c4726abc | 152 | return 0; |
60ae5b9f RT |
153 | } |
154 | ||
9caac886 | 155 | static void intel_quark_unregister_i2c_clk(struct device *dev) |
60ae5b9f | 156 | { |
9caac886 | 157 | struct intel_quark_mfd *quark_mfd = dev_get_drvdata(dev); |
60ae5b9f | 158 | |
7f0c5ae1 | 159 | if (!quark_mfd->i2c_clk_lookup) |
60ae5b9f RT |
160 | return; |
161 | ||
162 | clkdev_drop(quark_mfd->i2c_clk_lookup); | |
163 | clk_unregister(quark_mfd->i2c_clk); | |
164 | } | |
165 | ||
166 | static int intel_quark_i2c_setup(struct pci_dev *pdev, struct mfd_cell *cell) | |
167 | { | |
b518d4ad | 168 | const struct dmi_system_id *dmi_id; |
60ae5b9f RT |
169 | struct dw_i2c_platform_data *pdata; |
170 | struct resource *res = (struct resource *)cell->resources; | |
171 | struct device *dev = &pdev->dev; | |
60ae5b9f RT |
172 | |
173 | res[INTEL_QUARK_IORES_MEM].start = | |
174 | pci_resource_start(pdev, MFD_I2C_BAR); | |
175 | res[INTEL_QUARK_IORES_MEM].end = | |
176 | pci_resource_end(pdev, MFD_I2C_BAR); | |
177 | ||
178 | res[INTEL_QUARK_IORES_IRQ].start = pdev->irq; | |
179 | res[INTEL_QUARK_IORES_IRQ].end = pdev->irq; | |
180 | ||
181 | pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); | |
182 | if (!pdata) | |
183 | return -ENOMEM; | |
184 | ||
bafc1fac AS |
185 | /* Normal mode by default */ |
186 | pdata->i2c_scl_freq = 100000; | |
187 | ||
b518d4ad JK |
188 | dmi_id = dmi_first_match(dmi_platform_info); |
189 | if (dmi_id) | |
190 | pdata->i2c_scl_freq = (uintptr_t)dmi_id->driver_data; | |
60ae5b9f RT |
191 | |
192 | cell->platform_data = pdata; | |
193 | cell->pdata_size = sizeof(*pdata); | |
194 | ||
195 | return 0; | |
196 | } | |
197 | ||
198 | static int intel_quark_gpio_setup(struct pci_dev *pdev, struct mfd_cell *cell) | |
199 | { | |
200 | struct dwapb_platform_data *pdata; | |
201 | struct resource *res = (struct resource *)cell->resources; | |
202 | struct device *dev = &pdev->dev; | |
203 | ||
204 | res[INTEL_QUARK_IORES_MEM].start = | |
205 | pci_resource_start(pdev, MFD_GPIO_BAR); | |
206 | res[INTEL_QUARK_IORES_MEM].end = | |
207 | pci_resource_end(pdev, MFD_GPIO_BAR); | |
208 | ||
209 | pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); | |
210 | if (!pdata) | |
211 | return -ENOMEM; | |
212 | ||
213 | /* For intel quark x1000, it has only one port: portA */ | |
214 | pdata->nports = INTEL_QUARK_GPIO_NPORTS; | |
215 | pdata->properties = devm_kcalloc(dev, pdata->nports, | |
216 | sizeof(*pdata->properties), | |
217 | GFP_KERNEL); | |
218 | if (!pdata->properties) | |
219 | return -ENOMEM; | |
220 | ||
221 | /* Set the properties for portA */ | |
4ba8cfa7 | 222 | pdata->properties->fwnode = NULL; |
60ae5b9f RT |
223 | pdata->properties->idx = 0; |
224 | pdata->properties->ngpio = INTEL_QUARK_MFD_NGPIO; | |
225 | pdata->properties->gpio_base = INTEL_QUARK_MFD_GPIO_BASE; | |
e6ca26ab PE |
226 | pdata->properties->irq[0] = pdev->irq; |
227 | pdata->properties->has_irq = true; | |
60ae5b9f RT |
228 | pdata->properties->irq_shared = true; |
229 | ||
230 | cell->platform_data = pdata; | |
231 | cell->pdata_size = sizeof(*pdata); | |
232 | ||
233 | return 0; | |
234 | } | |
235 | ||
236 | static int intel_quark_mfd_probe(struct pci_dev *pdev, | |
237 | const struct pci_device_id *id) | |
238 | { | |
239 | struct intel_quark_mfd *quark_mfd; | |
240 | int ret; | |
241 | ||
242 | ret = pcim_enable_device(pdev); | |
243 | if (ret) | |
244 | return ret; | |
245 | ||
246 | quark_mfd = devm_kzalloc(&pdev->dev, sizeof(*quark_mfd), GFP_KERNEL); | |
247 | if (!quark_mfd) | |
248 | return -ENOMEM; | |
60ae5b9f | 249 | |
9caac886 | 250 | quark_mfd->dev = &pdev->dev; |
7f0c5ae1 | 251 | dev_set_drvdata(&pdev->dev, quark_mfd); |
60ae5b9f | 252 | |
9caac886 | 253 | ret = intel_quark_register_i2c_clk(&pdev->dev); |
60ae5b9f RT |
254 | if (ret) |
255 | return ret; | |
256 | ||
236fd469 | 257 | ret = intel_quark_i2c_setup(pdev, &intel_quark_mfd_cells[1]); |
60ae5b9f | 258 | if (ret) |
7f0c5ae1 | 259 | goto err_unregister_i2c_clk; |
60ae5b9f | 260 | |
236fd469 | 261 | ret = intel_quark_gpio_setup(pdev, &intel_quark_mfd_cells[0]); |
60ae5b9f | 262 | if (ret) |
7f0c5ae1 | 263 | goto err_unregister_i2c_clk; |
60ae5b9f | 264 | |
7f0c5ae1 AS |
265 | ret = mfd_add_devices(&pdev->dev, 0, intel_quark_mfd_cells, |
266 | ARRAY_SIZE(intel_quark_mfd_cells), NULL, 0, | |
267 | NULL); | |
268 | if (ret) | |
269 | goto err_unregister_i2c_clk; | |
270 | ||
271 | return 0; | |
60ae5b9f | 272 | |
7f0c5ae1 | 273 | err_unregister_i2c_clk: |
9caac886 | 274 | intel_quark_unregister_i2c_clk(&pdev->dev); |
7f0c5ae1 | 275 | return ret; |
60ae5b9f RT |
276 | } |
277 | ||
278 | static void intel_quark_mfd_remove(struct pci_dev *pdev) | |
279 | { | |
9caac886 | 280 | intel_quark_unregister_i2c_clk(&pdev->dev); |
60ae5b9f RT |
281 | mfd_remove_devices(&pdev->dev); |
282 | } | |
283 | ||
284 | static struct pci_driver intel_quark_mfd_driver = { | |
285 | .name = "intel_quark_mfd_i2c_gpio", | |
286 | .id_table = intel_quark_mfd_ids, | |
287 | .probe = intel_quark_mfd_probe, | |
288 | .remove = intel_quark_mfd_remove, | |
289 | }; | |
290 | ||
291 | module_pci_driver(intel_quark_mfd_driver); | |
292 | ||
293 | MODULE_AUTHOR("Raymond Tan <raymond.tan@intel.com>"); | |
294 | MODULE_DESCRIPTION("Intel Quark MFD PCI driver for I2C & GPIO"); | |
295 | MODULE_LICENSE("GPL v2"); |