Commit | Line | Data |
---|---|---|
4b45efe8 AS |
1 | /* |
2 | * Intel LPSS PCI support. | |
3 | * | |
4 | * Copyright (C) 2015, Intel Corporation | |
5 | * | |
6 | * Authors: Andy Shevchenko <andriy.shevchenko@linux.intel.com> | |
7 | * Mika Westerberg <mika.westerberg@linux.intel.com> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
13 | ||
14 | #include <linux/ioport.h> | |
15 | #include <linux/kernel.h> | |
16 | #include <linux/module.h> | |
17 | #include <linux/pci.h> | |
18 | #include <linux/pm.h> | |
19 | #include <linux/pm_runtime.h> | |
028af594 | 20 | #include <linux/property.h> |
4b45efe8 AS |
21 | |
22 | #include "intel-lpss.h" | |
23 | ||
24 | static int intel_lpss_pci_probe(struct pci_dev *pdev, | |
25 | const struct pci_device_id *id) | |
26 | { | |
27 | struct intel_lpss_platform_info *info; | |
28 | int ret; | |
29 | ||
30 | ret = pcim_enable_device(pdev); | |
31 | if (ret) | |
32 | return ret; | |
33 | ||
34 | info = devm_kmemdup(&pdev->dev, (void *)id->driver_data, sizeof(*info), | |
35 | GFP_KERNEL); | |
36 | if (!info) | |
37 | return -ENOMEM; | |
38 | ||
39 | info->mem = &pdev->resource[0]; | |
40 | info->irq = pdev->irq; | |
41 | ||
42 | /* Probably it is enough to set this for iDMA capable devices only */ | |
43 | pci_set_master(pdev); | |
44 | ||
45 | ret = intel_lpss_probe(&pdev->dev, info); | |
46 | if (ret) | |
47 | return ret; | |
48 | ||
49 | pm_runtime_put(&pdev->dev); | |
50 | pm_runtime_allow(&pdev->dev); | |
51 | ||
52 | return 0; | |
53 | } | |
54 | ||
55 | static void intel_lpss_pci_remove(struct pci_dev *pdev) | |
56 | { | |
57 | pm_runtime_forbid(&pdev->dev); | |
58 | pm_runtime_get_sync(&pdev->dev); | |
59 | ||
60 | intel_lpss_remove(&pdev->dev); | |
61 | } | |
62 | ||
63 | static INTEL_LPSS_PM_OPS(intel_lpss_pci_pm_ops); | |
64 | ||
65 | static const struct intel_lpss_platform_info spt_info = { | |
66 | .clk_rate = 120000000, | |
67 | }; | |
68 | ||
028af594 MW |
69 | static struct property_entry spt_i2c_properties[] = { |
70 | PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 230), | |
71 | { }, | |
72 | }; | |
73 | ||
028af594 MW |
74 | static const struct intel_lpss_platform_info spt_i2c_info = { |
75 | .clk_rate = 120000000, | |
f4d05266 | 76 | .properties = spt_i2c_properties, |
028af594 MW |
77 | }; |
78 | ||
ec14c539 AS |
79 | static struct property_entry uart_properties[] = { |
80 | PROPERTY_ENTRY_U32("reg-io-width", 4), | |
81 | PROPERTY_ENTRY_U32("reg-shift", 2), | |
82 | PROPERTY_ENTRY_BOOL("snps,uart-16550-compatible"), | |
83 | { }, | |
84 | }; | |
85 | ||
4b45efe8 AS |
86 | static const struct intel_lpss_platform_info spt_uart_info = { |
87 | .clk_rate = 120000000, | |
88 | .clk_con_id = "baudclk", | |
f4d05266 | 89 | .properties = uart_properties, |
4b45efe8 AS |
90 | }; |
91 | ||
ff0a04a6 AS |
92 | static const struct intel_lpss_platform_info bxt_info = { |
93 | .clk_rate = 100000000, | |
94 | }; | |
95 | ||
96 | static const struct intel_lpss_platform_info bxt_uart_info = { | |
97 | .clk_rate = 100000000, | |
98 | .clk_con_id = "baudclk", | |
f4d05266 | 99 | .properties = uart_properties, |
ff0a04a6 AS |
100 | }; |
101 | ||
0343b2f4 MW |
102 | static struct property_entry bxt_i2c_properties[] = { |
103 | PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 42), | |
104 | PROPERTY_ENTRY_U32("i2c-sda-falling-time-ns", 171), | |
105 | PROPERTY_ENTRY_U32("i2c-scl-falling-time-ns", 208), | |
106 | { }, | |
107 | }; | |
108 | ||
ff0a04a6 AS |
109 | static const struct intel_lpss_platform_info bxt_i2c_info = { |
110 | .clk_rate = 133000000, | |
f4d05266 | 111 | .properties = bxt_i2c_properties, |
ff0a04a6 AS |
112 | }; |
113 | ||
c50cdd62 JN |
114 | static struct property_entry apl_i2c_properties[] = { |
115 | PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 207), | |
116 | PROPERTY_ENTRY_U32("i2c-sda-falling-time-ns", 171), | |
117 | PROPERTY_ENTRY_U32("i2c-scl-falling-time-ns", 208), | |
118 | { }, | |
119 | }; | |
120 | ||
121 | static const struct intel_lpss_platform_info apl_i2c_info = { | |
122 | .clk_rate = 133000000, | |
123 | .properties = apl_i2c_properties, | |
124 | }; | |
125 | ||
77fc5ff6 MW |
126 | static const struct intel_lpss_platform_info kbl_info = { |
127 | .clk_rate = 120000000, | |
128 | }; | |
129 | ||
130 | static const struct intel_lpss_platform_info kbl_uart_info = { | |
131 | .clk_rate = 120000000, | |
132 | .clk_con_id = "baudclk", | |
133 | }; | |
134 | ||
135 | static const struct intel_lpss_platform_info kbl_i2c_info = { | |
136 | .clk_rate = 133000000, | |
137 | }; | |
138 | ||
4b45efe8 | 139 | static const struct pci_device_id intel_lpss_pci_ids[] = { |
023269cc | 140 | /* BXT A-Step */ |
ff0a04a6 AS |
141 | { PCI_VDEVICE(INTEL, 0x0aac), (kernel_ulong_t)&bxt_i2c_info }, |
142 | { PCI_VDEVICE(INTEL, 0x0aae), (kernel_ulong_t)&bxt_i2c_info }, | |
143 | { PCI_VDEVICE(INTEL, 0x0ab0), (kernel_ulong_t)&bxt_i2c_info }, | |
144 | { PCI_VDEVICE(INTEL, 0x0ab2), (kernel_ulong_t)&bxt_i2c_info }, | |
145 | { PCI_VDEVICE(INTEL, 0x0ab4), (kernel_ulong_t)&bxt_i2c_info }, | |
146 | { PCI_VDEVICE(INTEL, 0x0ab6), (kernel_ulong_t)&bxt_i2c_info }, | |
147 | { PCI_VDEVICE(INTEL, 0x0ab8), (kernel_ulong_t)&bxt_i2c_info }, | |
148 | { PCI_VDEVICE(INTEL, 0x0aba), (kernel_ulong_t)&bxt_i2c_info }, | |
149 | { PCI_VDEVICE(INTEL, 0x0abc), (kernel_ulong_t)&bxt_uart_info }, | |
150 | { PCI_VDEVICE(INTEL, 0x0abe), (kernel_ulong_t)&bxt_uart_info }, | |
151 | { PCI_VDEVICE(INTEL, 0x0ac0), (kernel_ulong_t)&bxt_uart_info }, | |
152 | { PCI_VDEVICE(INTEL, 0x0ac2), (kernel_ulong_t)&bxt_info }, | |
153 | { PCI_VDEVICE(INTEL, 0x0ac4), (kernel_ulong_t)&bxt_info }, | |
154 | { PCI_VDEVICE(INTEL, 0x0ac6), (kernel_ulong_t)&bxt_info }, | |
155 | { PCI_VDEVICE(INTEL, 0x0aee), (kernel_ulong_t)&bxt_uart_info }, | |
023269cc HZ |
156 | /* BXT B-Step */ |
157 | { PCI_VDEVICE(INTEL, 0x1aac), (kernel_ulong_t)&bxt_i2c_info }, | |
158 | { PCI_VDEVICE(INTEL, 0x1aae), (kernel_ulong_t)&bxt_i2c_info }, | |
159 | { PCI_VDEVICE(INTEL, 0x1ab0), (kernel_ulong_t)&bxt_i2c_info }, | |
160 | { PCI_VDEVICE(INTEL, 0x1ab2), (kernel_ulong_t)&bxt_i2c_info }, | |
161 | { PCI_VDEVICE(INTEL, 0x1ab4), (kernel_ulong_t)&bxt_i2c_info }, | |
162 | { PCI_VDEVICE(INTEL, 0x1ab6), (kernel_ulong_t)&bxt_i2c_info }, | |
163 | { PCI_VDEVICE(INTEL, 0x1ab8), (kernel_ulong_t)&bxt_i2c_info }, | |
164 | { PCI_VDEVICE(INTEL, 0x1aba), (kernel_ulong_t)&bxt_i2c_info }, | |
165 | { PCI_VDEVICE(INTEL, 0x1abc), (kernel_ulong_t)&bxt_uart_info }, | |
166 | { PCI_VDEVICE(INTEL, 0x1abe), (kernel_ulong_t)&bxt_uart_info }, | |
167 | { PCI_VDEVICE(INTEL, 0x1ac0), (kernel_ulong_t)&bxt_uart_info }, | |
168 | { PCI_VDEVICE(INTEL, 0x1ac2), (kernel_ulong_t)&bxt_info }, | |
169 | { PCI_VDEVICE(INTEL, 0x1ac4), (kernel_ulong_t)&bxt_info }, | |
170 | { PCI_VDEVICE(INTEL, 0x1ac6), (kernel_ulong_t)&bxt_info }, | |
171 | { PCI_VDEVICE(INTEL, 0x1aee), (kernel_ulong_t)&bxt_uart_info }, | |
172 | ||
ff0a04a6 | 173 | /* APL */ |
c50cdd62 JN |
174 | { PCI_VDEVICE(INTEL, 0x5aac), (kernel_ulong_t)&apl_i2c_info }, |
175 | { PCI_VDEVICE(INTEL, 0x5aae), (kernel_ulong_t)&apl_i2c_info }, | |
176 | { PCI_VDEVICE(INTEL, 0x5ab0), (kernel_ulong_t)&apl_i2c_info }, | |
177 | { PCI_VDEVICE(INTEL, 0x5ab2), (kernel_ulong_t)&apl_i2c_info }, | |
178 | { PCI_VDEVICE(INTEL, 0x5ab4), (kernel_ulong_t)&apl_i2c_info }, | |
179 | { PCI_VDEVICE(INTEL, 0x5ab6), (kernel_ulong_t)&apl_i2c_info }, | |
180 | { PCI_VDEVICE(INTEL, 0x5ab8), (kernel_ulong_t)&apl_i2c_info }, | |
181 | { PCI_VDEVICE(INTEL, 0x5aba), (kernel_ulong_t)&apl_i2c_info }, | |
ff0a04a6 AS |
182 | { PCI_VDEVICE(INTEL, 0x5abc), (kernel_ulong_t)&bxt_uart_info }, |
183 | { PCI_VDEVICE(INTEL, 0x5abe), (kernel_ulong_t)&bxt_uart_info }, | |
184 | { PCI_VDEVICE(INTEL, 0x5ac0), (kernel_ulong_t)&bxt_uart_info }, | |
185 | { PCI_VDEVICE(INTEL, 0x5ac2), (kernel_ulong_t)&bxt_info }, | |
186 | { PCI_VDEVICE(INTEL, 0x5ac4), (kernel_ulong_t)&bxt_info }, | |
187 | { PCI_VDEVICE(INTEL, 0x5ac6), (kernel_ulong_t)&bxt_info }, | |
188 | { PCI_VDEVICE(INTEL, 0x5aee), (kernel_ulong_t)&bxt_uart_info }, | |
4b45efe8 AS |
189 | /* SPT-LP */ |
190 | { PCI_VDEVICE(INTEL, 0x9d27), (kernel_ulong_t)&spt_uart_info }, | |
191 | { PCI_VDEVICE(INTEL, 0x9d28), (kernel_ulong_t)&spt_uart_info }, | |
192 | { PCI_VDEVICE(INTEL, 0x9d29), (kernel_ulong_t)&spt_info }, | |
193 | { PCI_VDEVICE(INTEL, 0x9d2a), (kernel_ulong_t)&spt_info }, | |
028af594 MW |
194 | { PCI_VDEVICE(INTEL, 0x9d60), (kernel_ulong_t)&spt_i2c_info }, |
195 | { PCI_VDEVICE(INTEL, 0x9d61), (kernel_ulong_t)&spt_i2c_info }, | |
196 | { PCI_VDEVICE(INTEL, 0x9d62), (kernel_ulong_t)&spt_i2c_info }, | |
197 | { PCI_VDEVICE(INTEL, 0x9d63), (kernel_ulong_t)&spt_i2c_info }, | |
198 | { PCI_VDEVICE(INTEL, 0x9d64), (kernel_ulong_t)&spt_i2c_info }, | |
199 | { PCI_VDEVICE(INTEL, 0x9d65), (kernel_ulong_t)&spt_i2c_info }, | |
4b45efe8 AS |
200 | { PCI_VDEVICE(INTEL, 0x9d66), (kernel_ulong_t)&spt_uart_info }, |
201 | /* SPT-H */ | |
202 | { PCI_VDEVICE(INTEL, 0xa127), (kernel_ulong_t)&spt_uart_info }, | |
203 | { PCI_VDEVICE(INTEL, 0xa128), (kernel_ulong_t)&spt_uart_info }, | |
204 | { PCI_VDEVICE(INTEL, 0xa129), (kernel_ulong_t)&spt_info }, | |
205 | { PCI_VDEVICE(INTEL, 0xa12a), (kernel_ulong_t)&spt_info }, | |
028af594 MW |
206 | { PCI_VDEVICE(INTEL, 0xa160), (kernel_ulong_t)&spt_i2c_info }, |
207 | { PCI_VDEVICE(INTEL, 0xa161), (kernel_ulong_t)&spt_i2c_info }, | |
4b45efe8 | 208 | { PCI_VDEVICE(INTEL, 0xa166), (kernel_ulong_t)&spt_uart_info }, |
77fc5ff6 MW |
209 | /* KBL-H */ |
210 | { PCI_VDEVICE(INTEL, 0xa2a7), (kernel_ulong_t)&kbl_uart_info }, | |
211 | { PCI_VDEVICE(INTEL, 0xa2a8), (kernel_ulong_t)&kbl_uart_info }, | |
212 | { PCI_VDEVICE(INTEL, 0xa2a9), (kernel_ulong_t)&kbl_info }, | |
213 | { PCI_VDEVICE(INTEL, 0xa2aa), (kernel_ulong_t)&kbl_info }, | |
214 | { PCI_VDEVICE(INTEL, 0xa2e0), (kernel_ulong_t)&kbl_i2c_info }, | |
215 | { PCI_VDEVICE(INTEL, 0xa2e1), (kernel_ulong_t)&kbl_i2c_info }, | |
216 | { PCI_VDEVICE(INTEL, 0xa2e2), (kernel_ulong_t)&kbl_i2c_info }, | |
217 | { PCI_VDEVICE(INTEL, 0xa2e3), (kernel_ulong_t)&kbl_i2c_info }, | |
218 | { PCI_VDEVICE(INTEL, 0xa2e6), (kernel_ulong_t)&kbl_uart_info }, | |
4b45efe8 AS |
219 | { } |
220 | }; | |
221 | MODULE_DEVICE_TABLE(pci, intel_lpss_pci_ids); | |
222 | ||
223 | static struct pci_driver intel_lpss_pci_driver = { | |
224 | .name = "intel-lpss", | |
225 | .id_table = intel_lpss_pci_ids, | |
226 | .probe = intel_lpss_pci_probe, | |
227 | .remove = intel_lpss_pci_remove, | |
228 | .driver = { | |
229 | .pm = &intel_lpss_pci_pm_ops, | |
230 | }, | |
231 | }; | |
232 | ||
233 | module_pci_driver(intel_lpss_pci_driver); | |
234 | ||
235 | MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>"); | |
236 | MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>"); | |
237 | MODULE_DESCRIPTION("Intel LPSS PCI driver"); | |
238 | MODULE_LICENSE("GPL v2"); |