[linux-block.git] / drivers / mfd / cs42l43-sdw.c

// SPDX-License-Identifier: GPL-2.0
/*
 * CS42L43 SoundWire driver
 *
 * Copyright (C) 2022-2023 Cirrus Logic, Inc. and
 *                         Cirrus Logic International Semiconductor Ltd.
 */

#include <linux/device.h>
#include <linux/err.h>
#include <linux/errno.h>
#include <linux/mfd/cs42l43-regs.h>
#include <linux/module.h>
#include <linux/soundwire/sdw.h>
#include <linux/soundwire/sdw_registers.h>
#include <linux/soundwire/sdw_type.h>

#include "cs42l43.h"

#define CS42L43_SDW_PORT(port, chans) { \
	.num = port, \
	.max_ch = chans, \
	.type = SDW_DPN_FULL, \
	.max_word = 24, \
}

static const struct regmap_config cs42l43_sdw_regmap = {
	.reg_bits		= 32,
	.reg_stride		= 4,
	.val_bits		= 32,
	.reg_format_endian	= REGMAP_ENDIAN_LITTLE,
	.val_format_endian	= REGMAP_ENDIAN_LITTLE,

	.max_register		= CS42L43_MCU_RAM_MAX,
	.readable_reg		= cs42l43_readable_register,
	.volatile_reg		= cs42l43_volatile_register,
	.precious_reg		= cs42l43_precious_register,

	.cache_type		= REGCACHE_MAPLE,
	.reg_defaults		= cs42l43_reg_default,
	.num_reg_defaults	= ARRAY_SIZE(cs42l43_reg_default),
};

static const struct sdw_dpn_prop cs42l43_src_port_props[] = {
	CS42L43_SDW_PORT(1, 4),
	CS42L43_SDW_PORT(2, 2),
	CS42L43_SDW_PORT(3, 2),
	CS42L43_SDW_PORT(4, 2),
};

static const struct sdw_dpn_prop cs42l43_sink_port_props[] = {
	CS42L43_SDW_PORT(5, 2),
	CS42L43_SDW_PORT(6, 2),
	CS42L43_SDW_PORT(7, 2),
};

static int cs42l43_read_prop(struct sdw_slave *sdw)
{
	struct sdw_slave_prop *prop = &sdw->prop;
	struct device *dev = &sdw->dev;
	int i;

	prop->use_domain_irq = true;
	prop->paging_support = true;
	prop->wake_capable = true;
	prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;
	prop->scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY |
			      SDW_SCP_INT1_IMPL_DEF;

	for (i = 0; i < ARRAY_SIZE(cs42l43_src_port_props); i++)
		prop->source_ports |= BIT(cs42l43_src_port_props[i].num);

	prop->src_dpn_prop = devm_kmemdup(dev, cs42l43_src_port_props,
					  sizeof(cs42l43_src_port_props), GFP_KERNEL);
	if (!prop->src_dpn_prop)
		return -ENOMEM;

	for (i = 0; i < ARRAY_SIZE(cs42l43_sink_port_props); i++)
		prop->sink_ports |= BIT(cs42l43_sink_port_props[i].num);

	prop->sink_dpn_prop = devm_kmemdup(dev, cs42l43_sink_port_props,
					   sizeof(cs42l43_sink_port_props), GFP_KERNEL);
	if (!prop->sink_dpn_prop)
		return -ENOMEM;

	return 0;
}

static int cs42l43_sdw_update_status(struct sdw_slave *sdw, enum sdw_slave_status status)
{
	struct cs42l43 *cs42l43 = dev_get_drvdata(&sdw->dev);

	switch (status) {
	case SDW_SLAVE_ATTACHED:
		dev_dbg(cs42l43->dev, "Device attach\n");

		sdw_write_no_pm(sdw, CS42L43_GEN_INT_MASK_1,
				CS42L43_INT_STAT_GEN1_MASK);

		cs42l43->attached = true;

		complete(&cs42l43->device_attach);
		break;
	case SDW_SLAVE_UNATTACHED:
		dev_dbg(cs42l43->dev, "Device detach\n");

		cs42l43->attached = false;

		reinit_completion(&cs42l43->device_attach);
		complete(&cs42l43->device_detach);
		break;
	default:
		break;
	}

	return 0;
}

static int cs42l43_sdw_interrupt(struct sdw_slave *sdw,
				 struct sdw_slave_intr_status *status)
{
	/*
	 * The IRQ itself was handled through the regmap_irq handler, this is
	 * just clearing up the additional Cirrus SoundWire registers that are
	 * not covered by the SoundWire framework or the IRQ handler itself.
	 * There is only a single bit in GEN_INT_STAT_1 and it doesn't clear if
	 * IRQs are still pending so doing a read/write here after handling the
	 * IRQ is fine.
	 */
	sdw_read_no_pm(sdw, CS42L43_GEN_INT_STAT_1);
	sdw_write_no_pm(sdw, CS42L43_GEN_INT_STAT_1, CS42L43_INT_STAT_GEN1_MASK);

	return 0;
}

static int cs42l43_sdw_bus_config(struct sdw_slave *sdw,
				  struct sdw_bus_params *params)
{
	struct cs42l43 *cs42l43 = dev_get_drvdata(&sdw->dev);
	int ret = 0;

	mutex_lock(&cs42l43->pll_lock);

	if (cs42l43->sdw_freq != params->curr_dr_freq / 2) {
		if (cs42l43->sdw_pll_active) {
			dev_err(cs42l43->dev,
				"PLL active can't change SoundWire bus clock\n");
			ret = -EBUSY;
		} else {
			cs42l43->sdw_freq = params->curr_dr_freq / 2;
		}
	}

	mutex_unlock(&cs42l43->pll_lock);

	return ret;
}

static const struct sdw_slave_ops cs42l43_sdw_ops = {
	.read_prop		= cs42l43_read_prop,
	.update_status		= cs42l43_sdw_update_status,
	.interrupt_callback	= cs42l43_sdw_interrupt,
	.bus_config		= cs42l43_sdw_bus_config,
};

static int cs42l43_sdw_probe(struct sdw_slave *sdw, const struct sdw_device_id *id)
{
	struct cs42l43 *cs42l43;
	struct device *dev = &sdw->dev;
	int ret;

	cs42l43 = devm_kzalloc(dev, sizeof(*cs42l43), GFP_KERNEL);
	if (!cs42l43)
		return -ENOMEM;

	cs42l43->dev = dev;
	cs42l43->sdw = sdw;

	cs42l43->regmap = devm_regmap_init_sdw(sdw, &cs42l43_sdw_regmap);
	if (IS_ERR(cs42l43->regmap)) {
		ret = PTR_ERR(cs42l43->regmap);
		dev_err(cs42l43->dev, "Failed to allocate regmap: %d\n", ret);
		return ret;
	}

	return cs42l43_dev_probe(cs42l43);
}

static int cs42l43_sdw_remove(struct sdw_slave *sdw)
{
	struct cs42l43 *cs42l43 = dev_get_drvdata(&sdw->dev);

	cs42l43_dev_remove(cs42l43);

	return 0;
}

static const struct sdw_device_id cs42l43_sdw_id[] = {
	SDW_SLAVE_ENTRY(0x01FA, 0x4243, 0),
	{}
};
MODULE_DEVICE_TABLE(sdw, cs42l43_sdw_id);

static struct sdw_driver cs42l43_sdw_driver = {
	.driver = {
		.name		= "cs42l43",
		.pm		= pm_ptr(&cs42l43_pm_ops),
	},

	.probe		= cs42l43_sdw_probe,
	.remove		= cs42l43_sdw_remove,
	.id_table	= cs42l43_sdw_id,
	.ops		= &cs42l43_sdw_ops,
};
module_sdw_driver(cs42l43_sdw_driver);

MODULE_IMPORT_NS(MFD_CS42L43);

MODULE_DESCRIPTION("CS42L43 SoundWire Driver");
MODULE_AUTHOR("Lucas Tanure <tanureal@opensource.cirrus.com>");
MODULE_LICENSE("GPL");
Commit	Line	Data
ace6d144 CK	1	// SPDX-License-Identifier: GPL-2.0
	2	/*
	3	* CS42L43 SoundWire driver
	4	*
	5	* Copyright (C) 2022-2023 Cirrus Logic, Inc. and
	6	* Cirrus Logic International Semiconductor Ltd.
	7	*/
	8
db763745	9	#include <linux/device.h>
ace6d144 CK	10	#include <linux/err.h>
	11	#include <linux/errno.h>
	12	#include <linux/mfd/cs42l43-regs.h>
	13	#include <linux/module.h>
ace6d144 CK	14	#include <linux/soundwire/sdw.h>
	15	#include <linux/soundwire/sdw_registers.h>
	16	#include <linux/soundwire/sdw_type.h>
	17
	18	#include "cs42l43.h"
	19
47b1b03d CK	20	#define CS42L43_SDW_PORT(port, chans) { \
	21	.num = port, \
	22	.max_ch = chans, \
	23	.type = SDW_DPN_FULL, \
	24	.max_word = 24, \
	25	}
ace6d144 CK	26
	27	static const struct regmap_config cs42l43_sdw_regmap = {
	28	.reg_bits = 32,
	29	.reg_stride = 4,
	30	.val_bits = 32,
	31	.reg_format_endian = REGMAP_ENDIAN_LITTLE,
	32	.val_format_endian = REGMAP_ENDIAN_LITTLE,
	33
	34	.max_register = CS42L43_MCU_RAM_MAX,
	35	.readable_reg = cs42l43_readable_register,
	36	.volatile_reg = cs42l43_volatile_register,
	37	.precious_reg = cs42l43_precious_register,
	38
	39	.cache_type = REGCACHE_MAPLE,
	40	.reg_defaults = cs42l43_reg_default,
	41	.num_reg_defaults = ARRAY_SIZE(cs42l43_reg_default),
	42	};
	43
47b1b03d CK	44	static const struct sdw_dpn_prop cs42l43_src_port_props[] = {
	45	CS42L43_SDW_PORT(1, 4),
	46	CS42L43_SDW_PORT(2, 2),
	47	CS42L43_SDW_PORT(3, 2),
	48	CS42L43_SDW_PORT(4, 2),
	49	};
	50
	51	static const struct sdw_dpn_prop cs42l43_sink_port_props[] = {
	52	CS42L43_SDW_PORT(5, 2),
	53	CS42L43_SDW_PORT(6, 2),
	54	CS42L43_SDW_PORT(7, 2),
	55	};
	56
ace6d144 CK	57	static int cs42l43_read_prop(struct sdw_slave *sdw)
	58	{
	59	struct sdw_slave_prop *prop = &sdw->prop;
	60	struct device *dev = &sdw->dev;
ace6d144	61	int i;
ace6d144 CK	62
	63	prop->use_domain_irq = true;
	64	prop->paging_support = true;
	65	prop->wake_capable = true;
ace6d144 CK	66	prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;
	67	prop->scp_int1_mask = SDW_SCP_INT1_BUS_CLASH \| SDW_SCP_INT1_PARITY \|
	68	SDW_SCP_INT1_IMPL_DEF;
	69
47b1b03d CK	70	for (i = 0; i < ARRAY_SIZE(cs42l43_src_port_props); i++)
	71	prop->source_ports \|= BIT(cs42l43_src_port_props[i].num);
	72
	73	prop->src_dpn_prop = devm_kmemdup(dev, cs42l43_src_port_props,
	74	sizeof(cs42l43_src_port_props), GFP_KERNEL);
ace6d144 CK	75	if (!prop->src_dpn_prop)
	76	return -ENOMEM;
	77
47b1b03d CK	78	for (i = 0; i < ARRAY_SIZE(cs42l43_sink_port_props); i++)
	79	prop->sink_ports \|= BIT(cs42l43_sink_port_props[i].num);
	80
	81	prop->sink_dpn_prop = devm_kmemdup(dev, cs42l43_sink_port_props,
	82	sizeof(cs42l43_sink_port_props), GFP_KERNEL);
ace6d144 CK	83	if (!prop->sink_dpn_prop)
	84	return -ENOMEM;
	85
ace6d144 CK	86	return 0;
	87	}
	88
	89	static int cs42l43_sdw_update_status(struct sdw_slave *sdw, enum sdw_slave_status status)
	90	{
	91	struct cs42l43 *cs42l43 = dev_get_drvdata(&sdw->dev);
	92
	93	switch (status) {
	94	case SDW_SLAVE_ATTACHED:
	95	dev_dbg(cs42l43->dev, "Device attach\n");
	96
	97	sdw_write_no_pm(sdw, CS42L43_GEN_INT_MASK_1,
	98	CS42L43_INT_STAT_GEN1_MASK);
	99
	100	cs42l43->attached = true;
	101
	102	complete(&cs42l43->device_attach);
	103	break;
	104	case SDW_SLAVE_UNATTACHED:
	105	dev_dbg(cs42l43->dev, "Device detach\n");
	106
	107	cs42l43->attached = false;
	108
	109	reinit_completion(&cs42l43->device_attach);
	110	complete(&cs42l43->device_detach);
	111	break;
	112	default:
	113	break;
	114	}
	115
	116	return 0;
	117	}
	118
	119	static int cs42l43_sdw_interrupt(struct sdw_slave *sdw,
	120	struct sdw_slave_intr_status *status)
	121	{
	122	/*
	123	* The IRQ itself was handled through the regmap_irq handler, this is
	124	* just clearing up the additional Cirrus SoundWire registers that are
	125	* not covered by the SoundWire framework or the IRQ handler itself.
	126	* There is only a single bit in GEN_INT_STAT_1 and it doesn't clear if
	127	* IRQs are still pending so doing a read/write here after handling the
	128	* IRQ is fine.
	129	*/
	130	sdw_read_no_pm(sdw, CS42L43_GEN_INT_STAT_1);
	131	sdw_write_no_pm(sdw, CS42L43_GEN_INT_STAT_1, CS42L43_INT_STAT_GEN1_MASK);
	132
	133	return 0;
	134	}
	135
	136	static int cs42l43_sdw_bus_config(struct sdw_slave *sdw,
	137	struct sdw_bus_params *params)
	138	{
	139	struct cs42l43 *cs42l43 = dev_get_drvdata(&sdw->dev);
	140	int ret = 0;
	141
	142	mutex_lock(&cs42l43->pll_lock);
	143
	144	if (cs42l43->sdw_freq != params->curr_dr_freq / 2) {
	145	if (cs42l43->sdw_pll_active) {
	146	dev_err(cs42l43->dev,
	147	"PLL active can't change SoundWire bus clock\n");
	148	ret = -EBUSY;
	149	} else {
150	cs42l43->sdw_freq = params->curr_dr_freq / 2;
151	}
152	}
153
154	mutex_unlock(&cs42l43->pll_lock);
155
156	return ret;
157	}
158
159	static const struct sdw_slave_ops cs42l43_sdw_ops = {
160	.read_prop = cs42l43_read_prop,
161	.update_status = cs42l43_sdw_update_status,
162	.interrupt_callback = cs42l43_sdw_interrupt,
163	.bus_config = cs42l43_sdw_bus_config,
164	};
165
166	static int cs42l43_sdw_probe(struct sdw_slave sdw, const struct sdw_device_id id)
167	{
168	struct cs42l43 *cs42l43;
169	struct device *dev = &sdw->dev;
170	int ret;
171
172	cs42l43 = devm_kzalloc(dev, sizeof(*cs42l43), GFP_KERNEL);
173	if (!cs42l43)
174	return -ENOMEM;
175
176	cs42l43->dev = dev;
177	cs42l43->sdw = sdw;
178
179	cs42l43->regmap = devm_regmap_init_sdw(sdw, &cs42l43_sdw_regmap);
180	if (IS_ERR(cs42l43->regmap)) {
181	ret = PTR_ERR(cs42l43->regmap);
182	dev_err(cs42l43->dev, "Failed to allocate regmap: %d\n", ret);
183	return ret;
184	}
185
186	return cs42l43_dev_probe(cs42l43);
187	}
188
189	static int cs42l43_sdw_remove(struct sdw_slave *sdw)
190	{
191	struct cs42l43 *cs42l43 = dev_get_drvdata(&sdw->dev);
192
193	cs42l43_dev_remove(cs42l43);
194
195	return 0;
196	}
197
198	static const struct sdw_device_id cs42l43_sdw_id[] = {
199	SDW_SLAVE_ENTRY(0x01FA, 0x4243, 0),
200	{}
201	};
202	MODULE_DEVICE_TABLE(sdw, cs42l43_sdw_id);
203
204	static struct sdw_driver cs42l43_sdw_driver = {
205	.driver = {
206	.name = "cs42l43",
207	.pm = pm_ptr(&cs42l43_pm_ops),
208	},
209
210	.probe = cs42l43_sdw_probe,
211	.remove = cs42l43_sdw_remove,
212	.id_table = cs42l43_sdw_id,
213	.ops = &cs42l43_sdw_ops,
214	};
215	module_sdw_driver(cs42l43_sdw_driver);
216
217	MODULE_IMPORT_NS(MFD_CS42L43);
218
219	MODULE_DESCRIPTION("CS42L43 SoundWire Driver");
220	MODULE_AUTHOR("Lucas Tanure <tanureal@opensource.cirrus.com>");
221	MODULE_LICENSE("GPL");