PM / AVS: rockchip-io: add io selectors and supplies for rk3399
[linux-2.6-block.git] / drivers / mfd / cros_ec_spi.c
CommitLineData
a17d94f0
SG
1/*
2 * ChromeOS EC multi-function device (SPI)
3 *
4 * Copyright (C) 2012 Google, Inc
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <linux/delay.h>
17#include <linux/kernel.h>
18#include <linux/module.h>
19#include <linux/mfd/cros_ec.h>
20#include <linux/mfd/cros_ec_commands.h>
01e73c89 21#include <linux/of.h>
a17d94f0
SG
22#include <linux/platform_device.h>
23#include <linux/slab.h>
24#include <linux/spi/spi.h>
25
26
27/* The header byte, which follows the preamble */
28#define EC_MSG_HEADER 0xec
29
30/*
31 * Number of EC preamble bytes we read at a time. Since it takes
32 * about 400-500us for the EC to respond there is not a lot of
33 * point in tuning this. If the EC could respond faster then
34 * we could increase this so that might expect the preamble and
35 * message to occur in a single transaction. However, the maximum
36 * SPI transfer size is 256 bytes, so at 5MHz we need a response
37 * time of perhaps <320us (200 bytes / 1600 bits).
38 */
39#define EC_MSG_PREAMBLE_COUNT 32
40
41/*
9c0b54a1
DA
42 * Allow for a long time for the EC to respond. We support i2c
43 * tunneling and support fairly long messages for the tunnel (249
44 * bytes long at the moment). If we're talking to a 100 kHz device
45 * on the other end and need to transfer ~256 bytes, then we need:
46 * 10 us/bit * ~10 bits/byte * ~256 bytes = ~25ms
47 *
48 * We'll wait 4 times that to handle clock stretching and other
49 * paranoia.
50 *
51 * It's pretty unlikely that we'll really see a 249 byte tunnel in
52 * anything other than testing. If this was more common we might
53 * consider having slow commands like this require a GET_STATUS
54 * wait loop. The 'flash write' command would be another candidate
55 * for this, clocking in at 2-3ms.
56 */
57#define EC_MSG_DEADLINE_MS 100
a17d94f0
SG
58
59/*
60 * Time between raising the SPI chip select (for the end of a
61 * transaction) and dropping it again (for the next transaction).
49f91ac3
DB
62 * If we go too fast, the EC will miss the transaction. We know that we
63 * need at least 70 us with the 16 MHz STM32 EC, so go with 200 us to be
64 * safe.
a17d94f0 65 */
49f91ac3 66#define EC_SPI_RECOVERY_TIME_NS (200 * 1000)
a17d94f0
SG
67
68/**
69 * struct cros_ec_spi - information about a SPI-connected EC
70 *
71 * @spi: SPI device we are connected to
72 * @last_transfer_ns: time that we last finished a transfer, or 0 if there
73 * if no record
ff4378f4
AS
74 * @start_of_msg_delay: used to set the delay_usecs on the spi_transfer that
75 * is sent when we want to turn on CS at the start of a transaction.
01e73c89
RK
76 * @end_of_msg_delay: used to set the delay_usecs on the spi_transfer that
77 * is sent when we want to turn off CS at the end of a transaction.
a17d94f0
SG
78 */
79struct cros_ec_spi {
80 struct spi_device *spi;
81 s64 last_transfer_ns;
ff4378f4 82 unsigned int start_of_msg_delay;
01e73c89 83 unsigned int end_of_msg_delay;
a17d94f0
SG
84};
85
86static void debug_packet(struct device *dev, const char *name, u8 *ptr,
d3654070 87 int len)
a17d94f0
SG
88{
89#ifdef DEBUG
90 int i;
91
92 dev_dbg(dev, "%s: ", name);
93 for (i = 0; i < len; i++)
9e146f43
TR
94 pr_cont(" %02x", ptr[i]);
95
96 pr_cont("\n");
a17d94f0
SG
97#endif
98}
99
d3654070
SB
100static int terminate_request(struct cros_ec_device *ec_dev)
101{
102 struct cros_ec_spi *ec_spi = ec_dev->priv;
103 struct spi_message msg;
104 struct spi_transfer trans;
105 int ret;
106
107 /*
108 * Turn off CS, possibly adding a delay to ensure the rising edge
109 * doesn't come too soon after the end of the data.
110 */
111 spi_message_init(&msg);
112 memset(&trans, 0, sizeof(trans));
113 trans.delay_usecs = ec_spi->end_of_msg_delay;
114 spi_message_add_tail(&trans, &msg);
115
6d6e44a9 116 ret = spi_sync_locked(ec_spi->spi, &msg);
d3654070
SB
117
118 /* Reset end-of-response timer */
119 ec_spi->last_transfer_ns = ktime_get_ns();
120 if (ret < 0) {
121 dev_err(ec_dev->dev,
122 "cs-deassert spi transfer failed: %d\n",
123 ret);
124 }
125
126 return ret;
127}
128
129/**
130 * receive_n_bytes - receive n bytes from the EC.
131 *
132 * Assumes buf is a pointer into the ec_dev->din buffer
133 */
134static int receive_n_bytes(struct cros_ec_device *ec_dev, u8 *buf, int n)
135{
136 struct cros_ec_spi *ec_spi = ec_dev->priv;
137 struct spi_transfer trans;
138 struct spi_message msg;
139 int ret;
140
141 BUG_ON(buf - ec_dev->din + n > ec_dev->din_size);
142
143 memset(&trans, 0, sizeof(trans));
144 trans.cs_change = 1;
145 trans.rx_buf = buf;
146 trans.len = n;
147
148 spi_message_init(&msg);
149 spi_message_add_tail(&trans, &msg);
6d6e44a9 150 ret = spi_sync_locked(ec_spi->spi, &msg);
d3654070
SB
151 if (ret < 0)
152 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
153
154 return ret;
155}
156
157/**
158 * cros_ec_spi_receive_packet - Receive a packet from the EC.
159 *
160 * This function has two phases: reading the preamble bytes (since if we read
161 * data from the EC before it is ready to send, we just get preamble) and
162 * reading the actual message.
163 *
164 * The received data is placed into ec_dev->din.
165 *
166 * @ec_dev: ChromeOS EC device
167 * @need_len: Number of message bytes we need to read
168 */
169static int cros_ec_spi_receive_packet(struct cros_ec_device *ec_dev,
170 int need_len)
171{
172 struct ec_host_response *response;
173 u8 *ptr, *end;
174 int ret;
175 unsigned long deadline;
176 int todo;
177
8827a642 178 BUG_ON(ec_dev->din_size < EC_MSG_PREAMBLE_COUNT);
d3654070
SB
179
180 /* Receive data until we see the header byte */
181 deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS);
182 while (true) {
183 unsigned long start_jiffies = jiffies;
184
185 ret = receive_n_bytes(ec_dev,
186 ec_dev->din,
187 EC_MSG_PREAMBLE_COUNT);
188 if (ret < 0)
189 return ret;
190
191 ptr = ec_dev->din;
192 for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) {
193 if (*ptr == EC_SPI_FRAME_START) {
194 dev_dbg(ec_dev->dev, "msg found at %zd\n",
195 ptr - ec_dev->din);
196 break;
197 }
198 }
199 if (ptr != end)
200 break;
201
202 /*
203 * Use the time at the start of the loop as a timeout. This
204 * gives us one last shot at getting the transfer and is useful
205 * in case we got context switched out for a while.
206 */
207 if (time_after(start_jiffies, deadline)) {
208 dev_warn(ec_dev->dev, "EC failed to respond in time\n");
209 return -ETIMEDOUT;
210 }
211 }
212
213 /*
214 * ptr now points to the header byte. Copy any valid data to the
215 * start of our buffer
216 */
217 todo = end - ++ptr;
218 BUG_ON(todo < 0 || todo > ec_dev->din_size);
219 todo = min(todo, need_len);
220 memmove(ec_dev->din, ptr, todo);
221 ptr = ec_dev->din + todo;
222 dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n",
223 need_len, todo);
224 need_len -= todo;
225
226 /* If the entire response struct wasn't read, get the rest of it. */
227 if (todo < sizeof(*response)) {
228 ret = receive_n_bytes(ec_dev, ptr, sizeof(*response) - todo);
229 if (ret < 0)
230 return -EBADMSG;
231 ptr += (sizeof(*response) - todo);
232 todo = sizeof(*response);
233 }
234
235 response = (struct ec_host_response *)ec_dev->din;
236
237 /* Abort if data_len is too large. */
238 if (response->data_len > ec_dev->din_size)
239 return -EMSGSIZE;
240
241 /* Receive data until we have it all */
242 while (need_len > 0) {
243 /*
244 * We can't support transfers larger than the SPI FIFO size
245 * unless we have DMA. We don't have DMA on the ISP SPI ports
246 * for Exynos. We need a way of asking SPI driver for
247 * maximum-supported transfer size.
248 */
249 todo = min(need_len, 256);
250 dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n",
251 todo, need_len, ptr - ec_dev->din);
252
253 ret = receive_n_bytes(ec_dev, ptr, todo);
254 if (ret < 0)
255 return ret;
256
257 ptr += todo;
258 need_len -= todo;
259 }
260
261 dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din);
262
263 return 0;
264}
265
a17d94f0
SG
266/**
267 * cros_ec_spi_receive_response - Receive a response from the EC.
268 *
269 * This function has two phases: reading the preamble bytes (since if we read
270 * data from the EC before it is ready to send, we just get preamble) and
271 * reading the actual message.
272 *
273 * The received data is placed into ec_dev->din.
274 *
275 * @ec_dev: ChromeOS EC device
276 * @need_len: Number of message bytes we need to read
277 */
278static int cros_ec_spi_receive_response(struct cros_ec_device *ec_dev,
279 int need_len)
280{
a17d94f0
SG
281 u8 *ptr, *end;
282 int ret;
283 unsigned long deadline;
284 int todo;
285
8827a642 286 BUG_ON(ec_dev->din_size < EC_MSG_PREAMBLE_COUNT);
d3654070 287
a17d94f0
SG
288 /* Receive data until we see the header byte */
289 deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS);
c9a81d67
DA
290 while (true) {
291 unsigned long start_jiffies = jiffies;
292
d3654070
SB
293 ret = receive_n_bytes(ec_dev,
294 ec_dev->din,
295 EC_MSG_PREAMBLE_COUNT);
296 if (ret < 0)
a17d94f0 297 return ret;
a17d94f0 298
d3654070 299 ptr = ec_dev->din;
a17d94f0 300 for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) {
d3654070 301 if (*ptr == EC_SPI_FRAME_START) {
c34924b9 302 dev_dbg(ec_dev->dev, "msg found at %zd\n",
a17d94f0
SG
303 ptr - ec_dev->din);
304 break;
305 }
306 }
c9a81d67
DA
307 if (ptr != end)
308 break;
a17d94f0 309
c9a81d67
DA
310 /*
311 * Use the time at the start of the loop as a timeout. This
312 * gives us one last shot at getting the transfer and is useful
313 * in case we got context switched out for a while.
314 */
315 if (time_after(start_jiffies, deadline)) {
a17d94f0
SG
316 dev_warn(ec_dev->dev, "EC failed to respond in time\n");
317 return -ETIMEDOUT;
318 }
c9a81d67 319 }
a17d94f0
SG
320
321 /*
322 * ptr now points to the header byte. Copy any valid data to the
323 * start of our buffer
324 */
325 todo = end - ++ptr;
326 BUG_ON(todo < 0 || todo > ec_dev->din_size);
327 todo = min(todo, need_len);
328 memmove(ec_dev->din, ptr, todo);
329 ptr = ec_dev->din + todo;
330 dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n",
331 need_len, todo);
332 need_len -= todo;
333
334 /* Receive data until we have it all */
335 while (need_len > 0) {
336 /*
337 * We can't support transfers larger than the SPI FIFO size
338 * unless we have DMA. We don't have DMA on the ISP SPI ports
339 * for Exynos. We need a way of asking SPI driver for
340 * maximum-supported transfer size.
341 */
342 todo = min(need_len, 256);
c34924b9 343 dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n",
a17d94f0
SG
344 todo, need_len, ptr - ec_dev->din);
345
d3654070
SB
346 ret = receive_n_bytes(ec_dev, ptr, todo);
347 if (ret < 0)
a17d94f0 348 return ret;
a17d94f0
SG
349
350 debug_packet(ec_dev->dev, "interim", ptr, todo);
351 ptr += todo;
352 need_len -= todo;
353 }
354
c34924b9 355 dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din);
a17d94f0
SG
356
357 return 0;
358}
359
d3654070
SB
360/**
361 * cros_ec_pkt_xfer_spi - Transfer a packet over SPI and receive the reply
362 *
363 * @ec_dev: ChromeOS EC device
364 * @ec_msg: Message to transfer
365 */
366static int cros_ec_pkt_xfer_spi(struct cros_ec_device *ec_dev,
367 struct cros_ec_command *ec_msg)
368{
369 struct ec_host_request *request;
370 struct ec_host_response *response;
371 struct cros_ec_spi *ec_spi = ec_dev->priv;
ff4378f4 372 struct spi_transfer trans, trans_delay;
d3654070
SB
373 struct spi_message msg;
374 int i, len;
375 u8 *ptr;
376 u8 *rx_buf;
377 u8 sum;
378 int ret = 0, final_ret;
379
380 len = cros_ec_prepare_tx(ec_dev, ec_msg);
381 request = (struct ec_host_request *)ec_dev->dout;
382 dev_dbg(ec_dev->dev, "prepared, len=%d\n", len);
383
384 /* If it's too soon to do another transaction, wait */
385 if (ec_spi->last_transfer_ns) {
386 unsigned long delay; /* The delay completed so far */
387
388 delay = ktime_get_ns() - ec_spi->last_transfer_ns;
389 if (delay < EC_SPI_RECOVERY_TIME_NS)
390 ndelay(EC_SPI_RECOVERY_TIME_NS - delay);
391 }
392
393 rx_buf = kzalloc(len, GFP_KERNEL);
6d6e44a9
NB
394 if (!rx_buf)
395 return -ENOMEM;
396
397 spi_bus_lock(ec_spi->spi->master);
d3654070 398
ff4378f4
AS
399 /*
400 * Leave a gap between CS assertion and clocking of data to allow the
401 * EC time to wakeup.
402 */
403 spi_message_init(&msg);
404 if (ec_spi->start_of_msg_delay) {
405 memset(&trans_delay, 0, sizeof(trans_delay));
406 trans_delay.delay_usecs = ec_spi->start_of_msg_delay;
407 spi_message_add_tail(&trans_delay, &msg);
408 }
409
d3654070
SB
410 /* Transmit phase - send our message */
411 memset(&trans, 0, sizeof(trans));
412 trans.tx_buf = ec_dev->dout;
413 trans.rx_buf = rx_buf;
414 trans.len = len;
415 trans.cs_change = 1;
d3654070 416 spi_message_add_tail(&trans, &msg);
6d6e44a9 417 ret = spi_sync_locked(ec_spi->spi, &msg);
d3654070
SB
418
419 /* Get the response */
420 if (!ret) {
421 /* Verify that EC can process command */
422 for (i = 0; i < len; i++) {
423 switch (rx_buf[i]) {
424 case EC_SPI_PAST_END:
425 case EC_SPI_RX_BAD_DATA:
426 case EC_SPI_NOT_READY:
427 ret = -EAGAIN;
428 ec_msg->result = EC_RES_IN_PROGRESS;
429 default:
430 break;
431 }
432 if (ret)
433 break;
434 }
435 if (!ret)
436 ret = cros_ec_spi_receive_packet(ec_dev,
437 ec_msg->insize + sizeof(*response));
438 } else {
439 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
440 }
441
442 final_ret = terminate_request(ec_dev);
6d6e44a9
NB
443
444 spi_bus_unlock(ec_spi->spi->master);
445
d3654070
SB
446 if (!ret)
447 ret = final_ret;
448 if (ret < 0)
449 goto exit;
450
451 ptr = ec_dev->din;
452
453 /* check response error code */
454 response = (struct ec_host_response *)ptr;
455 ec_msg->result = response->result;
456
457 ret = cros_ec_check_result(ec_dev, ec_msg);
458 if (ret)
459 goto exit;
460
461 len = response->data_len;
462 sum = 0;
463 if (len > ec_msg->insize) {
464 dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)",
465 len, ec_msg->insize);
466 ret = -EMSGSIZE;
467 goto exit;
468 }
469
470 for (i = 0; i < sizeof(*response); i++)
471 sum += ptr[i];
472
473 /* copy response packet payload and compute checksum */
474 memcpy(ec_msg->data, ptr + sizeof(*response), len);
475 for (i = 0; i < len; i++)
476 sum += ec_msg->data[i];
477
478 if (sum) {
479 dev_err(ec_dev->dev,
480 "bad packet checksum, calculated %x\n",
481 sum);
482 ret = -EBADMSG;
483 goto exit;
484 }
485
486 ret = len;
487exit:
488 kfree(rx_buf);
489 if (ec_msg->command == EC_CMD_REBOOT_EC)
490 msleep(EC_REBOOT_DELAY_MS);
491
492 return ret;
493}
494
a17d94f0 495/**
7e6cb5b4 496 * cros_ec_cmd_xfer_spi - Transfer a message over SPI and receive the reply
a17d94f0
SG
497 *
498 * @ec_dev: ChromeOS EC device
499 * @ec_msg: Message to transfer
500 */
7e6cb5b4 501static int cros_ec_cmd_xfer_spi(struct cros_ec_device *ec_dev,
5d4773e2 502 struct cros_ec_command *ec_msg)
a17d94f0
SG
503{
504 struct cros_ec_spi *ec_spi = ec_dev->priv;
505 struct spi_transfer trans;
506 struct spi_message msg;
507 int i, len;
508 u8 *ptr;
d3654070 509 u8 *rx_buf;
a17d94f0
SG
510 int sum;
511 int ret = 0, final_ret;
a17d94f0
SG
512
513 len = cros_ec_prepare_tx(ec_dev, ec_msg);
514 dev_dbg(ec_dev->dev, "prepared, len=%d\n", len);
515
516 /* If it's too soon to do another transaction, wait */
517 if (ec_spi->last_transfer_ns) {
a17d94f0
SG
518 unsigned long delay; /* The delay completed so far */
519
154adc14 520 delay = ktime_get_ns() - ec_spi->last_transfer_ns;
a17d94f0 521 if (delay < EC_SPI_RECOVERY_TIME_NS)
1fe36866 522 ndelay(EC_SPI_RECOVERY_TIME_NS - delay);
a17d94f0
SG
523 }
524
d3654070 525 rx_buf = kzalloc(len, GFP_KERNEL);
6d6e44a9
NB
526 if (!rx_buf)
527 return -ENOMEM;
528
529 spi_bus_lock(ec_spi->spi->master);
d3654070 530
a17d94f0
SG
531 /* Transmit phase - send our message */
532 debug_packet(ec_dev->dev, "out", ec_dev->dout, len);
daf93d22 533 memset(&trans, 0, sizeof(trans));
a17d94f0 534 trans.tx_buf = ec_dev->dout;
d3654070 535 trans.rx_buf = rx_buf;
a17d94f0
SG
536 trans.len = len;
537 trans.cs_change = 1;
538 spi_message_init(&msg);
539 spi_message_add_tail(&trans, &msg);
6d6e44a9 540 ret = spi_sync_locked(ec_spi->spi, &msg);
a17d94f0
SG
541
542 /* Get the response */
543 if (!ret) {
d3654070
SB
544 /* Verify that EC can process command */
545 for (i = 0; i < len; i++) {
546 switch (rx_buf[i]) {
547 case EC_SPI_PAST_END:
548 case EC_SPI_RX_BAD_DATA:
549 case EC_SPI_NOT_READY:
550 ret = -EAGAIN;
551 ec_msg->result = EC_RES_IN_PROGRESS;
552 default:
553 break;
554 }
555 if (ret)
556 break;
557 }
558 if (!ret)
559 ret = cros_ec_spi_receive_response(ec_dev,
560 ec_msg->insize + EC_MSG_TX_PROTO_BYTES);
a17d94f0
SG
561 } else {
562 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
563 }
564
d3654070 565 final_ret = terminate_request(ec_dev);
6d6e44a9
NB
566
567 spi_bus_unlock(ec_spi->spi->master);
568
a17d94f0
SG
569 if (!ret)
570 ret = final_ret;
d3654070 571 if (ret < 0)
362196e5 572 goto exit;
a17d94f0 573
a17d94f0 574 ptr = ec_dev->din;
6db07b63
BR
575
576 /* check response error code */
577 ec_msg->result = ptr[0];
578 ret = cros_ec_check_result(ec_dev, ec_msg);
579 if (ret)
362196e5 580 goto exit;
6db07b63 581
a17d94f0
SG
582 len = ptr[1];
583 sum = ptr[0] + ptr[1];
5d4773e2 584 if (len > ec_msg->insize) {
a17d94f0 585 dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)",
5d4773e2 586 len, ec_msg->insize);
362196e5
DA
587 ret = -ENOSPC;
588 goto exit;
a17d94f0
SG
589 }
590
591 /* copy response packet payload and compute checksum */
592 for (i = 0; i < len; i++) {
593 sum += ptr[i + 2];
5d4773e2 594 if (ec_msg->insize)
a8411784 595 ec_msg->data[i] = ptr[i + 2];
a17d94f0
SG
596 }
597 sum &= 0xff;
598
599 debug_packet(ec_dev->dev, "in", ptr, len + 3);
600
601 if (sum != ptr[len + 2]) {
602 dev_err(ec_dev->dev,
603 "bad packet checksum, expected %02x, got %02x\n",
604 sum, ptr[len + 2]);
362196e5
DA
605 ret = -EBADMSG;
606 goto exit;
a17d94f0
SG
607 }
608
12ebc8a5 609 ret = len;
362196e5 610exit:
d3654070 611 kfree(rx_buf);
659e142b
DA
612 if (ec_msg->command == EC_CMD_REBOOT_EC)
613 msleep(EC_REBOOT_DELAY_MS);
614
362196e5 615 return ret;
a17d94f0
SG
616}
617
01e73c89
RK
618static void cros_ec_spi_dt_probe(struct cros_ec_spi *ec_spi, struct device *dev)
619{
620 struct device_node *np = dev->of_node;
621 u32 val;
622 int ret;
623
ff4378f4
AS
624 ret = of_property_read_u32(np, "google,cros-ec-spi-pre-delay", &val);
625 if (!ret)
626 ec_spi->start_of_msg_delay = val;
627
01e73c89
RK
628 ret = of_property_read_u32(np, "google,cros-ec-spi-msg-delay", &val);
629 if (!ret)
630 ec_spi->end_of_msg_delay = val;
631}
632
9922b412 633static int cros_ec_spi_probe(struct spi_device *spi)
a17d94f0
SG
634{
635 struct device *dev = &spi->dev;
636 struct cros_ec_device *ec_dev;
637 struct cros_ec_spi *ec_spi;
638 int err;
639
640 spi->bits_per_word = 8;
641 spi->mode = SPI_MODE_0;
642 err = spi_setup(spi);
643 if (err < 0)
644 return err;
645
646 ec_spi = devm_kzalloc(dev, sizeof(*ec_spi), GFP_KERNEL);
647 if (ec_spi == NULL)
648 return -ENOMEM;
649 ec_spi->spi = spi;
650 ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL);
651 if (!ec_dev)
652 return -ENOMEM;
653
01e73c89
RK
654 /* Check for any DT properties */
655 cros_ec_spi_dt_probe(ec_spi, dev);
656
a17d94f0 657 spi_set_drvdata(spi, ec_dev);
a17d94f0
SG
658 ec_dev->dev = dev;
659 ec_dev->priv = ec_spi;
660 ec_dev->irq = spi->irq;
7e6cb5b4 661 ec_dev->cmd_xfer = cros_ec_cmd_xfer_spi;
d3654070 662 ec_dev->pkt_xfer = cros_ec_pkt_xfer_spi;
a17d94f0 663 ec_dev->phys_name = dev_name(&ec_spi->spi->dev);
2c7589af
SB
664 ec_dev->din_size = EC_MSG_PREAMBLE_COUNT +
665 sizeof(struct ec_host_response) +
666 sizeof(struct ec_response_get_protocol_info);
667 ec_dev->dout_size = sizeof(struct ec_host_request);
a17d94f0 668
d3654070 669
a17d94f0
SG
670 err = cros_ec_register(ec_dev);
671 if (err) {
672 dev_err(dev, "cannot register EC\n");
673 return err;
674 }
675
fb50497c
P
676 device_init_wakeup(&spi->dev, true);
677
a17d94f0
SG
678 return 0;
679}
680
9922b412 681static int cros_ec_spi_remove(struct spi_device *spi)
a17d94f0
SG
682{
683 struct cros_ec_device *ec_dev;
684
685 ec_dev = spi_get_drvdata(spi);
686 cros_ec_remove(ec_dev);
687
688 return 0;
689}
690
691#ifdef CONFIG_PM_SLEEP
692static int cros_ec_spi_suspend(struct device *dev)
693{
694 struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
695
696 return cros_ec_suspend(ec_dev);
697}
698
699static int cros_ec_spi_resume(struct device *dev)
700{
701 struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
702
703 return cros_ec_resume(ec_dev);
704}
705#endif
706
707static SIMPLE_DEV_PM_OPS(cros_ec_spi_pm_ops, cros_ec_spi_suspend,
708 cros_ec_spi_resume);
709
a78ea195
JMC
710static const struct of_device_id cros_ec_spi_of_match[] = {
711 { .compatible = "google,cros-ec-spi", },
712 { /* sentinel */ },
713};
714MODULE_DEVICE_TABLE(of, cros_ec_spi_of_match);
715
a17d94f0
SG
716static const struct spi_device_id cros_ec_spi_id[] = {
717 { "cros-ec-spi", 0 },
718 { }
719};
720MODULE_DEVICE_TABLE(spi, cros_ec_spi_id);
721
722static struct spi_driver cros_ec_driver_spi = {
723 .driver = {
724 .name = "cros-ec-spi",
a78ea195 725 .of_match_table = of_match_ptr(cros_ec_spi_of_match),
a17d94f0
SG
726 .pm = &cros_ec_spi_pm_ops,
727 },
9922b412
TR
728 .probe = cros_ec_spi_probe,
729 .remove = cros_ec_spi_remove,
a17d94f0
SG
730 .id_table = cros_ec_spi_id,
731};
732
733module_spi_driver(cros_ec_driver_spi);
734
ea0f8b0b 735MODULE_LICENSE("GPL v2");
a17d94f0 736MODULE_DESCRIPTION("ChromeOS EC multi function device (SPI)");