Merge tag 'powerpc-4.17-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc...
[linux-block.git] / drivers / mfd / cros_ec_spi.c
CommitLineData
a17d94f0
SG
1/*
2 * ChromeOS EC multi-function device (SPI)
3 *
4 * Copyright (C) 2012 Google, Inc
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <linux/delay.h>
17#include <linux/kernel.h>
18#include <linux/module.h>
19#include <linux/mfd/cros_ec.h>
20#include <linux/mfd/cros_ec_commands.h>
01e73c89 21#include <linux/of.h>
a17d94f0
SG
22#include <linux/platform_device.h>
23#include <linux/slab.h>
24#include <linux/spi/spi.h>
25
26
27/* The header byte, which follows the preamble */
28#define EC_MSG_HEADER 0xec
29
30/*
31 * Number of EC preamble bytes we read at a time. Since it takes
32 * about 400-500us for the EC to respond there is not a lot of
33 * point in tuning this. If the EC could respond faster then
34 * we could increase this so that might expect the preamble and
35 * message to occur in a single transaction. However, the maximum
36 * SPI transfer size is 256 bytes, so at 5MHz we need a response
37 * time of perhaps <320us (200 bytes / 1600 bits).
38 */
39#define EC_MSG_PREAMBLE_COUNT 32
40
41/*
9c0b54a1
DA
42 * Allow for a long time for the EC to respond. We support i2c
43 * tunneling and support fairly long messages for the tunnel (249
44 * bytes long at the moment). If we're talking to a 100 kHz device
45 * on the other end and need to transfer ~256 bytes, then we need:
46 * 10 us/bit * ~10 bits/byte * ~256 bytes = ~25ms
47 *
ca691f71
DA
48 * We'll wait 8 times that to handle clock stretching and other
49 * paranoia. Note that some battery gas gauge ICs claim to have a
50 * clock stretch of 144ms in rare situations. That's incentive for
51 * not directly passing i2c through, but it's too late for that for
52 * existing hardware.
9c0b54a1
DA
53 *
54 * It's pretty unlikely that we'll really see a 249 byte tunnel in
55 * anything other than testing. If this was more common we might
56 * consider having slow commands like this require a GET_STATUS
57 * wait loop. The 'flash write' command would be another candidate
58 * for this, clocking in at 2-3ms.
59 */
ca691f71 60#define EC_MSG_DEADLINE_MS 200
a17d94f0
SG
61
62/*
63 * Time between raising the SPI chip select (for the end of a
64 * transaction) and dropping it again (for the next transaction).
49f91ac3
DB
65 * If we go too fast, the EC will miss the transaction. We know that we
66 * need at least 70 us with the 16 MHz STM32 EC, so go with 200 us to be
67 * safe.
a17d94f0 68 */
49f91ac3 69#define EC_SPI_RECOVERY_TIME_NS (200 * 1000)
a17d94f0
SG
70
71/**
72 * struct cros_ec_spi - information about a SPI-connected EC
73 *
74 * @spi: SPI device we are connected to
d501ff90 75 * @last_transfer_ns: time that we last finished a transfer.
ff4378f4
AS
76 * @start_of_msg_delay: used to set the delay_usecs on the spi_transfer that
77 * is sent when we want to turn on CS at the start of a transaction.
01e73c89
RK
78 * @end_of_msg_delay: used to set the delay_usecs on the spi_transfer that
79 * is sent when we want to turn off CS at the end of a transaction.
a17d94f0
SG
80 */
81struct cros_ec_spi {
82 struct spi_device *spi;
83 s64 last_transfer_ns;
ff4378f4 84 unsigned int start_of_msg_delay;
01e73c89 85 unsigned int end_of_msg_delay;
a17d94f0
SG
86};
87
88static void debug_packet(struct device *dev, const char *name, u8 *ptr,
d3654070 89 int len)
a17d94f0
SG
90{
91#ifdef DEBUG
92 int i;
93
94 dev_dbg(dev, "%s: ", name);
95 for (i = 0; i < len; i++)
9e146f43
TR
96 pr_cont(" %02x", ptr[i]);
97
98 pr_cont("\n");
a17d94f0
SG
99#endif
100}
101
d3654070
SB
102static int terminate_request(struct cros_ec_device *ec_dev)
103{
104 struct cros_ec_spi *ec_spi = ec_dev->priv;
105 struct spi_message msg;
106 struct spi_transfer trans;
107 int ret;
108
109 /*
110 * Turn off CS, possibly adding a delay to ensure the rising edge
111 * doesn't come too soon after the end of the data.
112 */
113 spi_message_init(&msg);
114 memset(&trans, 0, sizeof(trans));
115 trans.delay_usecs = ec_spi->end_of_msg_delay;
116 spi_message_add_tail(&trans, &msg);
117
6d6e44a9 118 ret = spi_sync_locked(ec_spi->spi, &msg);
d3654070
SB
119
120 /* Reset end-of-response timer */
121 ec_spi->last_transfer_ns = ktime_get_ns();
122 if (ret < 0) {
123 dev_err(ec_dev->dev,
124 "cs-deassert spi transfer failed: %d\n",
125 ret);
126 }
127
128 return ret;
129}
130
131/**
132 * receive_n_bytes - receive n bytes from the EC.
133 *
134 * Assumes buf is a pointer into the ec_dev->din buffer
135 */
136static int receive_n_bytes(struct cros_ec_device *ec_dev, u8 *buf, int n)
137{
138 struct cros_ec_spi *ec_spi = ec_dev->priv;
139 struct spi_transfer trans;
140 struct spi_message msg;
141 int ret;
142
143 BUG_ON(buf - ec_dev->din + n > ec_dev->din_size);
144
145 memset(&trans, 0, sizeof(trans));
146 trans.cs_change = 1;
147 trans.rx_buf = buf;
148 trans.len = n;
149
150 spi_message_init(&msg);
151 spi_message_add_tail(&trans, &msg);
6d6e44a9 152 ret = spi_sync_locked(ec_spi->spi, &msg);
d3654070
SB
153 if (ret < 0)
154 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
155
156 return ret;
157}
158
159/**
160 * cros_ec_spi_receive_packet - Receive a packet from the EC.
161 *
162 * This function has two phases: reading the preamble bytes (since if we read
163 * data from the EC before it is ready to send, we just get preamble) and
164 * reading the actual message.
165 *
166 * The received data is placed into ec_dev->din.
167 *
168 * @ec_dev: ChromeOS EC device
169 * @need_len: Number of message bytes we need to read
170 */
171static int cros_ec_spi_receive_packet(struct cros_ec_device *ec_dev,
172 int need_len)
173{
174 struct ec_host_response *response;
175 u8 *ptr, *end;
176 int ret;
177 unsigned long deadline;
178 int todo;
179
8827a642 180 BUG_ON(ec_dev->din_size < EC_MSG_PREAMBLE_COUNT);
d3654070
SB
181
182 /* Receive data until we see the header byte */
183 deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS);
184 while (true) {
185 unsigned long start_jiffies = jiffies;
186
187 ret = receive_n_bytes(ec_dev,
188 ec_dev->din,
189 EC_MSG_PREAMBLE_COUNT);
190 if (ret < 0)
191 return ret;
192
193 ptr = ec_dev->din;
194 for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) {
195 if (*ptr == EC_SPI_FRAME_START) {
196 dev_dbg(ec_dev->dev, "msg found at %zd\n",
197 ptr - ec_dev->din);
198 break;
199 }
200 }
201 if (ptr != end)
202 break;
203
204 /*
205 * Use the time at the start of the loop as a timeout. This
206 * gives us one last shot at getting the transfer and is useful
207 * in case we got context switched out for a while.
208 */
209 if (time_after(start_jiffies, deadline)) {
210 dev_warn(ec_dev->dev, "EC failed to respond in time\n");
211 return -ETIMEDOUT;
212 }
213 }
214
215 /*
216 * ptr now points to the header byte. Copy any valid data to the
217 * start of our buffer
218 */
219 todo = end - ++ptr;
220 BUG_ON(todo < 0 || todo > ec_dev->din_size);
221 todo = min(todo, need_len);
222 memmove(ec_dev->din, ptr, todo);
223 ptr = ec_dev->din + todo;
224 dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n",
225 need_len, todo);
226 need_len -= todo;
227
228 /* If the entire response struct wasn't read, get the rest of it. */
229 if (todo < sizeof(*response)) {
230 ret = receive_n_bytes(ec_dev, ptr, sizeof(*response) - todo);
231 if (ret < 0)
232 return -EBADMSG;
233 ptr += (sizeof(*response) - todo);
234 todo = sizeof(*response);
235 }
236
237 response = (struct ec_host_response *)ec_dev->din;
238
239 /* Abort if data_len is too large. */
240 if (response->data_len > ec_dev->din_size)
241 return -EMSGSIZE;
242
243 /* Receive data until we have it all */
244 while (need_len > 0) {
245 /*
246 * We can't support transfers larger than the SPI FIFO size
247 * unless we have DMA. We don't have DMA on the ISP SPI ports
248 * for Exynos. We need a way of asking SPI driver for
249 * maximum-supported transfer size.
250 */
251 todo = min(need_len, 256);
252 dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n",
253 todo, need_len, ptr - ec_dev->din);
254
255 ret = receive_n_bytes(ec_dev, ptr, todo);
256 if (ret < 0)
257 return ret;
258
259 ptr += todo;
260 need_len -= todo;
261 }
262
263 dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din);
264
265 return 0;
266}
267
a17d94f0
SG
268/**
269 * cros_ec_spi_receive_response - Receive a response from the EC.
270 *
271 * This function has two phases: reading the preamble bytes (since if we read
272 * data from the EC before it is ready to send, we just get preamble) and
273 * reading the actual message.
274 *
275 * The received data is placed into ec_dev->din.
276 *
277 * @ec_dev: ChromeOS EC device
278 * @need_len: Number of message bytes we need to read
279 */
280static int cros_ec_spi_receive_response(struct cros_ec_device *ec_dev,
281 int need_len)
282{
a17d94f0
SG
283 u8 *ptr, *end;
284 int ret;
285 unsigned long deadline;
286 int todo;
287
8827a642 288 BUG_ON(ec_dev->din_size < EC_MSG_PREAMBLE_COUNT);
d3654070 289
a17d94f0
SG
290 /* Receive data until we see the header byte */
291 deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS);
c9a81d67
DA
292 while (true) {
293 unsigned long start_jiffies = jiffies;
294
d3654070
SB
295 ret = receive_n_bytes(ec_dev,
296 ec_dev->din,
297 EC_MSG_PREAMBLE_COUNT);
298 if (ret < 0)
a17d94f0 299 return ret;
a17d94f0 300
d3654070 301 ptr = ec_dev->din;
a17d94f0 302 for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) {
d3654070 303 if (*ptr == EC_SPI_FRAME_START) {
c34924b9 304 dev_dbg(ec_dev->dev, "msg found at %zd\n",
a17d94f0
SG
305 ptr - ec_dev->din);
306 break;
307 }
308 }
c9a81d67
DA
309 if (ptr != end)
310 break;
a17d94f0 311
c9a81d67
DA
312 /*
313 * Use the time at the start of the loop as a timeout. This
314 * gives us one last shot at getting the transfer and is useful
315 * in case we got context switched out for a while.
316 */
317 if (time_after(start_jiffies, deadline)) {
a17d94f0
SG
318 dev_warn(ec_dev->dev, "EC failed to respond in time\n");
319 return -ETIMEDOUT;
320 }
c9a81d67 321 }
a17d94f0
SG
322
323 /*
324 * ptr now points to the header byte. Copy any valid data to the
325 * start of our buffer
326 */
327 todo = end - ++ptr;
328 BUG_ON(todo < 0 || todo > ec_dev->din_size);
329 todo = min(todo, need_len);
330 memmove(ec_dev->din, ptr, todo);
331 ptr = ec_dev->din + todo;
332 dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n",
333 need_len, todo);
334 need_len -= todo;
335
336 /* Receive data until we have it all */
337 while (need_len > 0) {
338 /*
339 * We can't support transfers larger than the SPI FIFO size
340 * unless we have DMA. We don't have DMA on the ISP SPI ports
341 * for Exynos. We need a way of asking SPI driver for
342 * maximum-supported transfer size.
343 */
344 todo = min(need_len, 256);
c34924b9 345 dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n",
a17d94f0
SG
346 todo, need_len, ptr - ec_dev->din);
347
d3654070
SB
348 ret = receive_n_bytes(ec_dev, ptr, todo);
349 if (ret < 0)
a17d94f0 350 return ret;
a17d94f0
SG
351
352 debug_packet(ec_dev->dev, "interim", ptr, todo);
353 ptr += todo;
354 need_len -= todo;
355 }
356
c34924b9 357 dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din);
a17d94f0
SG
358
359 return 0;
360}
361
d3654070
SB
362/**
363 * cros_ec_pkt_xfer_spi - Transfer a packet over SPI and receive the reply
364 *
365 * @ec_dev: ChromeOS EC device
366 * @ec_msg: Message to transfer
367 */
368static int cros_ec_pkt_xfer_spi(struct cros_ec_device *ec_dev,
369 struct cros_ec_command *ec_msg)
370{
d3654070
SB
371 struct ec_host_response *response;
372 struct cros_ec_spi *ec_spi = ec_dev->priv;
ff4378f4 373 struct spi_transfer trans, trans_delay;
d3654070
SB
374 struct spi_message msg;
375 int i, len;
376 u8 *ptr;
377 u8 *rx_buf;
378 u8 sum;
001dde94 379 u8 rx_byte;
d3654070 380 int ret = 0, final_ret;
d501ff90 381 unsigned long delay;
d3654070
SB
382
383 len = cros_ec_prepare_tx(ec_dev, ec_msg);
d3654070
SB
384 dev_dbg(ec_dev->dev, "prepared, len=%d\n", len);
385
386 /* If it's too soon to do another transaction, wait */
d501ff90
JH
387 delay = ktime_get_ns() - ec_spi->last_transfer_ns;
388 if (delay < EC_SPI_RECOVERY_TIME_NS)
389 ndelay(EC_SPI_RECOVERY_TIME_NS - delay);
d3654070
SB
390
391 rx_buf = kzalloc(len, GFP_KERNEL);
6d6e44a9
NB
392 if (!rx_buf)
393 return -ENOMEM;
394
395 spi_bus_lock(ec_spi->spi->master);
d3654070 396
ff4378f4
AS
397 /*
398 * Leave a gap between CS assertion and clocking of data to allow the
399 * EC time to wakeup.
400 */
401 spi_message_init(&msg);
402 if (ec_spi->start_of_msg_delay) {
403 memset(&trans_delay, 0, sizeof(trans_delay));
404 trans_delay.delay_usecs = ec_spi->start_of_msg_delay;
405 spi_message_add_tail(&trans_delay, &msg);
406 }
407
d3654070
SB
408 /* Transmit phase - send our message */
409 memset(&trans, 0, sizeof(trans));
410 trans.tx_buf = ec_dev->dout;
411 trans.rx_buf = rx_buf;
412 trans.len = len;
413 trans.cs_change = 1;
d3654070 414 spi_message_add_tail(&trans, &msg);
6d6e44a9 415 ret = spi_sync_locked(ec_spi->spi, &msg);
d3654070
SB
416
417 /* Get the response */
418 if (!ret) {
419 /* Verify that EC can process command */
420 for (i = 0; i < len; i++) {
001dde94
SN
421 rx_byte = rx_buf[i];
422 if (rx_byte == EC_SPI_PAST_END ||
423 rx_byte == EC_SPI_RX_BAD_DATA ||
424 rx_byte == EC_SPI_NOT_READY) {
425 ret = -EREMOTEIO;
d3654070
SB
426 break;
427 }
d3654070 428 }
d3654070
SB
429 }
430
001dde94
SN
431 if (!ret)
432 ret = cros_ec_spi_receive_packet(ec_dev,
433 ec_msg->insize + sizeof(*response));
434 else
435 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
436
d3654070 437 final_ret = terminate_request(ec_dev);
6d6e44a9
NB
438
439 spi_bus_unlock(ec_spi->spi->master);
440
d3654070
SB
441 if (!ret)
442 ret = final_ret;
443 if (ret < 0)
444 goto exit;
445
446 ptr = ec_dev->din;
447
448 /* check response error code */
449 response = (struct ec_host_response *)ptr;
450 ec_msg->result = response->result;
451
452 ret = cros_ec_check_result(ec_dev, ec_msg);
453 if (ret)
454 goto exit;
455
456 len = response->data_len;
457 sum = 0;
458 if (len > ec_msg->insize) {
459 dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)",
460 len, ec_msg->insize);
461 ret = -EMSGSIZE;
462 goto exit;
463 }
464
465 for (i = 0; i < sizeof(*response); i++)
466 sum += ptr[i];
467
468 /* copy response packet payload and compute checksum */
469 memcpy(ec_msg->data, ptr + sizeof(*response), len);
470 for (i = 0; i < len; i++)
471 sum += ec_msg->data[i];
472
473 if (sum) {
474 dev_err(ec_dev->dev,
475 "bad packet checksum, calculated %x\n",
476 sum);
477 ret = -EBADMSG;
478 goto exit;
479 }
480
481 ret = len;
482exit:
483 kfree(rx_buf);
484 if (ec_msg->command == EC_CMD_REBOOT_EC)
485 msleep(EC_REBOOT_DELAY_MS);
486
487 return ret;
488}
489
a17d94f0 490/**
7e6cb5b4 491 * cros_ec_cmd_xfer_spi - Transfer a message over SPI and receive the reply
a17d94f0
SG
492 *
493 * @ec_dev: ChromeOS EC device
494 * @ec_msg: Message to transfer
495 */
7e6cb5b4 496static int cros_ec_cmd_xfer_spi(struct cros_ec_device *ec_dev,
5d4773e2 497 struct cros_ec_command *ec_msg)
a17d94f0
SG
498{
499 struct cros_ec_spi *ec_spi = ec_dev->priv;
500 struct spi_transfer trans;
501 struct spi_message msg;
502 int i, len;
503 u8 *ptr;
d3654070 504 u8 *rx_buf;
001dde94 505 u8 rx_byte;
a17d94f0
SG
506 int sum;
507 int ret = 0, final_ret;
d501ff90 508 unsigned long delay;
a17d94f0
SG
509
510 len = cros_ec_prepare_tx(ec_dev, ec_msg);
511 dev_dbg(ec_dev->dev, "prepared, len=%d\n", len);
512
513 /* If it's too soon to do another transaction, wait */
d501ff90
JH
514 delay = ktime_get_ns() - ec_spi->last_transfer_ns;
515 if (delay < EC_SPI_RECOVERY_TIME_NS)
516 ndelay(EC_SPI_RECOVERY_TIME_NS - delay);
a17d94f0 517
d3654070 518 rx_buf = kzalloc(len, GFP_KERNEL);
6d6e44a9
NB
519 if (!rx_buf)
520 return -ENOMEM;
521
522 spi_bus_lock(ec_spi->spi->master);
d3654070 523
a17d94f0
SG
524 /* Transmit phase - send our message */
525 debug_packet(ec_dev->dev, "out", ec_dev->dout, len);
daf93d22 526 memset(&trans, 0, sizeof(trans));
a17d94f0 527 trans.tx_buf = ec_dev->dout;
d3654070 528 trans.rx_buf = rx_buf;
a17d94f0
SG
529 trans.len = len;
530 trans.cs_change = 1;
531 spi_message_init(&msg);
532 spi_message_add_tail(&trans, &msg);
6d6e44a9 533 ret = spi_sync_locked(ec_spi->spi, &msg);
a17d94f0
SG
534
535 /* Get the response */
536 if (!ret) {
d3654070
SB
537 /* Verify that EC can process command */
538 for (i = 0; i < len; i++) {
001dde94
SN
539 rx_byte = rx_buf[i];
540 if (rx_byte == EC_SPI_PAST_END ||
541 rx_byte == EC_SPI_RX_BAD_DATA ||
542 rx_byte == EC_SPI_NOT_READY) {
543 ret = -EREMOTEIO;
d3654070
SB
544 break;
545 }
d3654070 546 }
a17d94f0
SG
547 }
548
001dde94
SN
549 if (!ret)
550 ret = cros_ec_spi_receive_response(ec_dev,
551 ec_msg->insize + EC_MSG_TX_PROTO_BYTES);
552 else
553 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
554
d3654070 555 final_ret = terminate_request(ec_dev);
6d6e44a9
NB
556
557 spi_bus_unlock(ec_spi->spi->master);
558
a17d94f0
SG
559 if (!ret)
560 ret = final_ret;
d3654070 561 if (ret < 0)
362196e5 562 goto exit;
a17d94f0 563
a17d94f0 564 ptr = ec_dev->din;
6db07b63
BR
565
566 /* check response error code */
567 ec_msg->result = ptr[0];
568 ret = cros_ec_check_result(ec_dev, ec_msg);
569 if (ret)
362196e5 570 goto exit;
6db07b63 571
a17d94f0
SG
572 len = ptr[1];
573 sum = ptr[0] + ptr[1];
5d4773e2 574 if (len > ec_msg->insize) {
a17d94f0 575 dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)",
5d4773e2 576 len, ec_msg->insize);
362196e5
DA
577 ret = -ENOSPC;
578 goto exit;
a17d94f0
SG
579 }
580
581 /* copy response packet payload and compute checksum */
582 for (i = 0; i < len; i++) {
583 sum += ptr[i + 2];
5d4773e2 584 if (ec_msg->insize)
a8411784 585 ec_msg->data[i] = ptr[i + 2];
a17d94f0
SG
586 }
587 sum &= 0xff;
588
589 debug_packet(ec_dev->dev, "in", ptr, len + 3);
590
591 if (sum != ptr[len + 2]) {
592 dev_err(ec_dev->dev,
593 "bad packet checksum, expected %02x, got %02x\n",
594 sum, ptr[len + 2]);
362196e5
DA
595 ret = -EBADMSG;
596 goto exit;
a17d94f0
SG
597 }
598
12ebc8a5 599 ret = len;
362196e5 600exit:
d3654070 601 kfree(rx_buf);
659e142b
DA
602 if (ec_msg->command == EC_CMD_REBOOT_EC)
603 msleep(EC_REBOOT_DELAY_MS);
604
362196e5 605 return ret;
a17d94f0
SG
606}
607
01e73c89
RK
608static void cros_ec_spi_dt_probe(struct cros_ec_spi *ec_spi, struct device *dev)
609{
610 struct device_node *np = dev->of_node;
611 u32 val;
612 int ret;
613
ff4378f4
AS
614 ret = of_property_read_u32(np, "google,cros-ec-spi-pre-delay", &val);
615 if (!ret)
616 ec_spi->start_of_msg_delay = val;
617
01e73c89
RK
618 ret = of_property_read_u32(np, "google,cros-ec-spi-msg-delay", &val);
619 if (!ret)
620 ec_spi->end_of_msg_delay = val;
621}
622
9922b412 623static int cros_ec_spi_probe(struct spi_device *spi)
a17d94f0
SG
624{
625 struct device *dev = &spi->dev;
626 struct cros_ec_device *ec_dev;
627 struct cros_ec_spi *ec_spi;
628 int err;
629
630 spi->bits_per_word = 8;
631 spi->mode = SPI_MODE_0;
632 err = spi_setup(spi);
633 if (err < 0)
634 return err;
635
636 ec_spi = devm_kzalloc(dev, sizeof(*ec_spi), GFP_KERNEL);
637 if (ec_spi == NULL)
638 return -ENOMEM;
639 ec_spi->spi = spi;
640 ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL);
641 if (!ec_dev)
642 return -ENOMEM;
643
01e73c89
RK
644 /* Check for any DT properties */
645 cros_ec_spi_dt_probe(ec_spi, dev);
646
a17d94f0 647 spi_set_drvdata(spi, ec_dev);
a17d94f0
SG
648 ec_dev->dev = dev;
649 ec_dev->priv = ec_spi;
650 ec_dev->irq = spi->irq;
7e6cb5b4 651 ec_dev->cmd_xfer = cros_ec_cmd_xfer_spi;
d3654070 652 ec_dev->pkt_xfer = cros_ec_pkt_xfer_spi;
a17d94f0 653 ec_dev->phys_name = dev_name(&ec_spi->spi->dev);
2c7589af
SB
654 ec_dev->din_size = EC_MSG_PREAMBLE_COUNT +
655 sizeof(struct ec_host_response) +
656 sizeof(struct ec_response_get_protocol_info);
657 ec_dev->dout_size = sizeof(struct ec_host_request);
a17d94f0 658
15d83748 659 ec_spi->last_transfer_ns = ktime_get_ns();
d3654070 660
a17d94f0
SG
661 err = cros_ec_register(ec_dev);
662 if (err) {
663 dev_err(dev, "cannot register EC\n");
664 return err;
665 }
666
fb50497c
P
667 device_init_wakeup(&spi->dev, true);
668
a17d94f0
SG
669 return 0;
670}
671
9922b412 672static int cros_ec_spi_remove(struct spi_device *spi)
a17d94f0
SG
673{
674 struct cros_ec_device *ec_dev;
675
676 ec_dev = spi_get_drvdata(spi);
677 cros_ec_remove(ec_dev);
678
679 return 0;
680}
681
682#ifdef CONFIG_PM_SLEEP
683static int cros_ec_spi_suspend(struct device *dev)
684{
685 struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
686
687 return cros_ec_suspend(ec_dev);
688}
689
690static int cros_ec_spi_resume(struct device *dev)
691{
692 struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
693
694 return cros_ec_resume(ec_dev);
695}
696#endif
697
698static SIMPLE_DEV_PM_OPS(cros_ec_spi_pm_ops, cros_ec_spi_suspend,
699 cros_ec_spi_resume);
700
a78ea195
JMC
701static const struct of_device_id cros_ec_spi_of_match[] = {
702 { .compatible = "google,cros-ec-spi", },
703 { /* sentinel */ },
704};
705MODULE_DEVICE_TABLE(of, cros_ec_spi_of_match);
706
a17d94f0
SG
707static const struct spi_device_id cros_ec_spi_id[] = {
708 { "cros-ec-spi", 0 },
709 { }
710};
711MODULE_DEVICE_TABLE(spi, cros_ec_spi_id);
712
713static struct spi_driver cros_ec_driver_spi = {
714 .driver = {
715 .name = "cros-ec-spi",
a78ea195 716 .of_match_table = of_match_ptr(cros_ec_spi_of_match),
a17d94f0
SG
717 .pm = &cros_ec_spi_pm_ops,
718 },
9922b412
TR
719 .probe = cros_ec_spi_probe,
720 .remove = cros_ec_spi_remove,
a17d94f0
SG
721 .id_table = cros_ec_spi_id,
722};
723
724module_spi_driver(cros_ec_driver_spi);
725
ea0f8b0b 726MODULE_LICENSE("GPL v2");
a17d94f0 727MODULE_DESCRIPTION("ChromeOS EC multi function device (SPI)");