Commit | Line | Data |
---|---|---|
d2912cb1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
3cc72986 MB |
2 | /* |
3 | * Arizona core driver | |
4 | * | |
5 | * Copyright 2012 Wolfson Microelectronics plc | |
6 | * | |
7 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
3cc72986 MB |
8 | */ |
9 | ||
cdd8da8c | 10 | #include <linux/clk.h> |
3cc72986 | 11 | #include <linux/delay.h> |
59db9691 | 12 | #include <linux/err.h> |
c1860466 | 13 | #include <linux/gpio/consumer.h> |
3cc72986 MB |
14 | #include <linux/interrupt.h> |
15 | #include <linux/mfd/core.h> | |
16 | #include <linux/module.h> | |
d781009c | 17 | #include <linux/of.h> |
3cc72986 MB |
18 | #include <linux/pm_runtime.h> |
19 | #include <linux/regmap.h> | |
20 | #include <linux/regulator/consumer.h> | |
5927467d | 21 | #include <linux/regulator/machine.h> |
3cc72986 | 22 | #include <linux/slab.h> |
f99fea94 | 23 | #include <linux/ktime.h> |
ae05ea36 | 24 | #include <linux/platform_device.h> |
3cc72986 MB |
25 | |
26 | #include <linux/mfd/arizona/core.h> | |
27 | #include <linux/mfd/arizona/registers.h> | |
28 | ||
29 | #include "arizona.h" | |
30 | ||
3762aede | 31 | static const char * const wm5102_core_supplies[] = { |
3cc72986 MB |
32 | "AVDD", |
33 | "DBVDD1", | |
3cc72986 MB |
34 | }; |
35 | ||
36 | int arizona_clk32k_enable(struct arizona *arizona) | |
37 | { | |
38 | int ret = 0; | |
39 | ||
40 | mutex_lock(&arizona->clk_lock); | |
41 | ||
42 | arizona->clk32k_ref++; | |
43 | ||
247fa192 MB |
44 | if (arizona->clk32k_ref == 1) { |
45 | switch (arizona->pdata.clk32k_src) { | |
46 | case ARIZONA_32KZ_MCLK1: | |
4414a7ab | 47 | ret = pm_runtime_resume_and_get(arizona->dev); |
247fa192 | 48 | if (ret != 0) |
cdd8da8c SN |
49 | goto err_ref; |
50 | ret = clk_prepare_enable(arizona->mclk[ARIZONA_MCLK1]); | |
6b269a41 SB |
51 | if (ret != 0) { |
52 | pm_runtime_put_sync(arizona->dev); | |
53 | goto err_ref; | |
54 | } | |
cdd8da8c SN |
55 | break; |
56 | case ARIZONA_32KZ_MCLK2: | |
57 | ret = clk_prepare_enable(arizona->mclk[ARIZONA_MCLK2]); | |
58 | if (ret != 0) | |
59 | goto err_ref; | |
247fa192 MB |
60 | break; |
61 | } | |
62 | ||
3cc72986 MB |
63 | ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, |
64 | ARIZONA_CLK_32K_ENA, | |
65 | ARIZONA_CLK_32K_ENA); | |
247fa192 | 66 | } |
3cc72986 | 67 | |
cdd8da8c | 68 | err_ref: |
3cc72986 MB |
69 | if (ret != 0) |
70 | arizona->clk32k_ref--; | |
71 | ||
72 | mutex_unlock(&arizona->clk_lock); | |
73 | ||
74 | return ret; | |
75 | } | |
76 | EXPORT_SYMBOL_GPL(arizona_clk32k_enable); | |
77 | ||
78 | int arizona_clk32k_disable(struct arizona *arizona) | |
79 | { | |
3cc72986 MB |
80 | mutex_lock(&arizona->clk_lock); |
81 | ||
14024cc9 | 82 | WARN_ON(arizona->clk32k_ref <= 0); |
3cc72986 MB |
83 | |
84 | arizona->clk32k_ref--; | |
85 | ||
247fa192 | 86 | if (arizona->clk32k_ref == 0) { |
3cc72986 MB |
87 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, |
88 | ARIZONA_CLK_32K_ENA, 0); | |
89 | ||
247fa192 MB |
90 | switch (arizona->pdata.clk32k_src) { |
91 | case ARIZONA_32KZ_MCLK1: | |
92 | pm_runtime_put_sync(arizona->dev); | |
cdd8da8c SN |
93 | clk_disable_unprepare(arizona->mclk[ARIZONA_MCLK1]); |
94 | break; | |
95 | case ARIZONA_32KZ_MCLK2: | |
96 | clk_disable_unprepare(arizona->mclk[ARIZONA_MCLK2]); | |
247fa192 MB |
97 | break; |
98 | } | |
99 | } | |
100 | ||
3cc72986 MB |
101 | mutex_unlock(&arizona->clk_lock); |
102 | ||
a260fba1 | 103 | return 0; |
3cc72986 MB |
104 | } |
105 | EXPORT_SYMBOL_GPL(arizona_clk32k_disable); | |
106 | ||
107 | static irqreturn_t arizona_clkgen_err(int irq, void *data) | |
108 | { | |
109 | struct arizona *arizona = data; | |
110 | ||
111 | dev_err(arizona->dev, "CLKGEN error\n"); | |
112 | ||
113 | return IRQ_HANDLED; | |
114 | } | |
115 | ||
116 | static irqreturn_t arizona_underclocked(int irq, void *data) | |
117 | { | |
118 | struct arizona *arizona = data; | |
119 | unsigned int val; | |
120 | int ret; | |
121 | ||
122 | ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8, | |
123 | &val); | |
124 | if (ret != 0) { | |
125 | dev_err(arizona->dev, "Failed to read underclock status: %d\n", | |
126 | ret); | |
127 | return IRQ_NONE; | |
128 | } | |
129 | ||
3cc72986 MB |
130 | if (val & ARIZONA_AIF3_UNDERCLOCKED_STS) |
131 | dev_err(arizona->dev, "AIF3 underclocked\n"); | |
132 | if (val & ARIZONA_AIF2_UNDERCLOCKED_STS) | |
3ebef34d CK |
133 | dev_err(arizona->dev, "AIF2 underclocked\n"); |
134 | if (val & ARIZONA_AIF1_UNDERCLOCKED_STS) | |
3cc72986 | 135 | dev_err(arizona->dev, "AIF1 underclocked\n"); |
6e440d27 CK |
136 | if (val & ARIZONA_ISRC3_UNDERCLOCKED_STS) |
137 | dev_err(arizona->dev, "ISRC3 underclocked\n"); | |
3cc72986 MB |
138 | if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS) |
139 | dev_err(arizona->dev, "ISRC2 underclocked\n"); | |
140 | if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS) | |
141 | dev_err(arizona->dev, "ISRC1 underclocked\n"); | |
142 | if (val & ARIZONA_FX_UNDERCLOCKED_STS) | |
143 | dev_err(arizona->dev, "FX underclocked\n"); | |
144 | if (val & ARIZONA_ASRC_UNDERCLOCKED_STS) | |
145 | dev_err(arizona->dev, "ASRC underclocked\n"); | |
146 | if (val & ARIZONA_DAC_UNDERCLOCKED_STS) | |
147 | dev_err(arizona->dev, "DAC underclocked\n"); | |
148 | if (val & ARIZONA_ADC_UNDERCLOCKED_STS) | |
149 | dev_err(arizona->dev, "ADC underclocked\n"); | |
150 | if (val & ARIZONA_MIXER_UNDERCLOCKED_STS) | |
648a9880 | 151 | dev_err(arizona->dev, "Mixer dropped sample\n"); |
3cc72986 MB |
152 | |
153 | return IRQ_HANDLED; | |
154 | } | |
155 | ||
156 | static irqreturn_t arizona_overclocked(int irq, void *data) | |
157 | { | |
158 | struct arizona *arizona = data; | |
6887b042 | 159 | unsigned int val[3]; |
3cc72986 | 160 | int ret; |
3762aede | 161 | |
3cc72986 | 162 | ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6, |
6887b042 | 163 | &val[0], 3); |
3cc72986 MB |
164 | if (ret != 0) { |
165 | dev_err(arizona->dev, "Failed to read overclock status: %d\n", | |
166 | ret); | |
167 | return IRQ_NONE; | |
168 | } | |
169 | ||
6887b042 RF |
170 | switch (arizona->type) { |
171 | case WM8998: | |
172 | case WM1814: | |
173 | /* Some bits are shifted on WM8998, | |
174 | * rearrange to match the standard bit layout | |
175 | */ | |
176 | val[0] = ((val[0] & 0x60e0) >> 1) | | |
177 | ((val[0] & 0x1e00) >> 2) | | |
178 | (val[0] & 0x000f); | |
179 | break; | |
180 | default: | |
181 | break; | |
182 | } | |
183 | ||
3cc72986 MB |
184 | if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS) |
185 | dev_err(arizona->dev, "PWM overclocked\n"); | |
186 | if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS) | |
187 | dev_err(arizona->dev, "FX core overclocked\n"); | |
188 | if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS) | |
189 | dev_err(arizona->dev, "DAC SYS overclocked\n"); | |
190 | if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS) | |
191 | dev_err(arizona->dev, "DAC WARP overclocked\n"); | |
192 | if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS) | |
193 | dev_err(arizona->dev, "ADC overclocked\n"); | |
194 | if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS) | |
195 | dev_err(arizona->dev, "Mixer overclocked\n"); | |
196 | if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS) | |
197 | dev_err(arizona->dev, "AIF3 overclocked\n"); | |
198 | if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS) | |
199 | dev_err(arizona->dev, "AIF2 overclocked\n"); | |
200 | if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS) | |
201 | dev_err(arizona->dev, "AIF1 overclocked\n"); | |
202 | if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS) | |
203 | dev_err(arizona->dev, "Pad control overclocked\n"); | |
204 | ||
205 | if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS) | |
206 | dev_err(arizona->dev, "Slimbus subsystem overclocked\n"); | |
207 | if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS) | |
208 | dev_err(arizona->dev, "Slimbus async overclocked\n"); | |
209 | if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS) | |
210 | dev_err(arizona->dev, "Slimbus sync overclocked\n"); | |
211 | if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS) | |
212 | dev_err(arizona->dev, "ASRC async system overclocked\n"); | |
213 | if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS) | |
214 | dev_err(arizona->dev, "ASRC async WARP overclocked\n"); | |
215 | if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS) | |
216 | dev_err(arizona->dev, "ASRC sync system overclocked\n"); | |
217 | if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS) | |
218 | dev_err(arizona->dev, "ASRC sync WARP overclocked\n"); | |
219 | if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS) | |
220 | dev_err(arizona->dev, "DSP1 overclocked\n"); | |
6e440d27 CK |
221 | if (val[1] & ARIZONA_ISRC3_OVERCLOCKED_STS) |
222 | dev_err(arizona->dev, "ISRC3 overclocked\n"); | |
3cc72986 MB |
223 | if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS) |
224 | dev_err(arizona->dev, "ISRC2 overclocked\n"); | |
225 | if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS) | |
226 | dev_err(arizona->dev, "ISRC1 overclocked\n"); | |
227 | ||
6887b042 RF |
228 | if (val[2] & ARIZONA_SPDIF_OVERCLOCKED_STS) |
229 | dev_err(arizona->dev, "SPDIF overclocked\n"); | |
230 | ||
3cc72986 MB |
231 | return IRQ_HANDLED; |
232 | } | |
233 | ||
ef84f885 CK |
234 | #define ARIZONA_REG_POLL_DELAY_US 7500 |
235 | ||
f99fea94 CK |
236 | static inline bool arizona_poll_reg_delay(ktime_t timeout) |
237 | { | |
238 | if (ktime_compare(ktime_get(), timeout) > 0) | |
239 | return false; | |
240 | ||
241 | usleep_range(ARIZONA_REG_POLL_DELAY_US / 2, ARIZONA_REG_POLL_DELAY_US); | |
242 | ||
243 | return true; | |
244 | } | |
245 | ||
9d53dfdc | 246 | static int arizona_poll_reg(struct arizona *arizona, |
ef84f885 | 247 | int timeout_ms, unsigned int reg, |
9d53dfdc | 248 | unsigned int mask, unsigned int target) |
3cc72986 | 249 | { |
f99fea94 | 250 | ktime_t timeout = ktime_add_us(ktime_get(), timeout_ms * USEC_PER_MSEC); |
9d53dfdc | 251 | unsigned int val = 0; |
ef84f885 | 252 | int ret; |
9d53dfdc | 253 | |
f99fea94 CK |
254 | do { |
255 | ret = regmap_read(arizona->regmap, reg, &val); | |
3cc72986 | 256 | |
f99fea94 CK |
257 | if ((val & mask) == target) |
258 | return 0; | |
259 | } while (arizona_poll_reg_delay(timeout)); | |
260 | ||
261 | if (ret) { | |
262 | dev_err(arizona->dev, "Failed polling reg 0x%x: %d\n", | |
263 | reg, ret); | |
264 | return ret; | |
265 | } | |
266 | ||
267 | dev_err(arizona->dev, "Polling reg 0x%x timed out: %x\n", reg, val); | |
268 | return -ETIMEDOUT; | |
9d53dfdc CK |
269 | } |
270 | ||
271 | static int arizona_wait_for_boot(struct arizona *arizona) | |
272 | { | |
273 | int ret; | |
274 | ||
275 | /* | |
276 | * We can't use an interrupt as we need to runtime resume to do so, | |
277 | * we won't race with the interrupt handler as it'll be blocked on | |
278 | * runtime resume. | |
279 | */ | |
ef84f885 | 280 | ret = arizona_poll_reg(arizona, 30, ARIZONA_INTERRUPT_RAW_STATUS_5, |
9d53dfdc CK |
281 | ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS); |
282 | ||
283 | if (!ret) | |
3cc72986 MB |
284 | regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5, |
285 | ARIZONA_BOOT_DONE_STS); | |
3cc72986 MB |
286 | |
287 | pm_runtime_mark_last_busy(arizona->dev); | |
288 | ||
9d53dfdc | 289 | return ret; |
3cc72986 MB |
290 | } |
291 | ||
2229875d CK |
292 | static inline void arizona_enable_reset(struct arizona *arizona) |
293 | { | |
294 | if (arizona->pdata.reset) | |
c1860466 | 295 | gpiod_set_raw_value_cansleep(arizona->pdata.reset, 0); |
2229875d CK |
296 | } |
297 | ||
298 | static void arizona_disable_reset(struct arizona *arizona) | |
299 | { | |
300 | if (arizona->pdata.reset) { | |
121c075c CK |
301 | switch (arizona->type) { |
302 | case WM5110: | |
303 | case WM8280: | |
304 | /* Meet requirements for minimum reset duration */ | |
b79a980f | 305 | usleep_range(5000, 10000); |
121c075c CK |
306 | break; |
307 | default: | |
308 | break; | |
309 | } | |
310 | ||
c1860466 | 311 | gpiod_set_raw_value_cansleep(arizona->pdata.reset, 1); |
b79a980f | 312 | usleep_range(1000, 5000); |
2229875d CK |
313 | } |
314 | } | |
315 | ||
3850e3ee CK |
316 | struct arizona_sysclk_state { |
317 | unsigned int fll; | |
318 | unsigned int sysclk; | |
319 | }; | |
320 | ||
321 | static int arizona_enable_freerun_sysclk(struct arizona *arizona, | |
322 | struct arizona_sysclk_state *state) | |
e80436bb | 323 | { |
e80436bb CK |
324 | int ret, err; |
325 | ||
e80436bb | 326 | /* Cache existing FLL and SYSCLK settings */ |
3850e3ee | 327 | ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &state->fll); |
0be068a0 | 328 | if (ret) { |
e80436bb CK |
329 | dev_err(arizona->dev, "Failed to cache FLL settings: %d\n", |
330 | ret); | |
331 | return ret; | |
332 | } | |
3850e3ee CK |
333 | ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, |
334 | &state->sysclk); | |
0be068a0 | 335 | if (ret) { |
e80436bb CK |
336 | dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n", |
337 | ret); | |
338 | return ret; | |
339 | } | |
340 | ||
341 | /* Start up SYSCLK using the FLL in free running mode */ | |
342 | ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, | |
343 | ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN); | |
0be068a0 | 344 | if (ret) { |
e80436bb CK |
345 | dev_err(arizona->dev, |
346 | "Failed to start FLL in freerunning mode: %d\n", | |
347 | ret); | |
348 | return ret; | |
349 | } | |
ef84f885 | 350 | ret = arizona_poll_reg(arizona, 180, ARIZONA_INTERRUPT_RAW_STATUS_5, |
e80436bb CK |
351 | ARIZONA_FLL1_CLOCK_OK_STS, |
352 | ARIZONA_FLL1_CLOCK_OK_STS); | |
de4ea10a | 353 | if (ret) |
e80436bb | 354 | goto err_fll; |
e80436bb CK |
355 | |
356 | ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144); | |
0be068a0 | 357 | if (ret) { |
e80436bb CK |
358 | dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret); |
359 | goto err_fll; | |
360 | } | |
361 | ||
3850e3ee CK |
362 | return 0; |
363 | ||
364 | err_fll: | |
365 | err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll); | |
366 | if (err) | |
367 | dev_err(arizona->dev, | |
368 | "Failed to re-apply old FLL settings: %d\n", err); | |
369 | ||
370 | return ret; | |
371 | } | |
372 | ||
373 | static int arizona_disable_freerun_sysclk(struct arizona *arizona, | |
374 | struct arizona_sysclk_state *state) | |
375 | { | |
376 | int ret; | |
377 | ||
378 | ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, | |
379 | state->sysclk); | |
380 | if (ret) { | |
381 | dev_err(arizona->dev, | |
382 | "Failed to re-apply old SYSCLK settings: %d\n", ret); | |
383 | return ret; | |
384 | } | |
385 | ||
386 | ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll); | |
387 | if (ret) { | |
388 | dev_err(arizona->dev, | |
389 | "Failed to re-apply old FLL settings: %d\n", ret); | |
390 | return ret; | |
391 | } | |
392 | ||
393 | return 0; | |
394 | } | |
395 | ||
396 | static int wm5102_apply_hardware_patch(struct arizona *arizona) | |
397 | { | |
398 | struct arizona_sysclk_state state; | |
399 | int err, ret; | |
400 | ||
401 | ret = arizona_enable_freerun_sysclk(arizona, &state); | |
402 | if (ret) | |
403 | return ret; | |
404 | ||
e80436bb CK |
405 | /* Start the write sequencer and wait for it to finish */ |
406 | ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, | |
0be068a0 CK |
407 | ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160); |
408 | if (ret) { | |
e80436bb CK |
409 | dev_err(arizona->dev, "Failed to start write sequencer: %d\n", |
410 | ret); | |
3850e3ee | 411 | goto err; |
e80436bb | 412 | } |
3850e3ee | 413 | |
ef84f885 | 414 | ret = arizona_poll_reg(arizona, 30, ARIZONA_WRITE_SEQUENCER_CTRL_1, |
e80436bb | 415 | ARIZONA_WSEQ_BUSY, 0); |
de4ea10a | 416 | if (ret) |
e80436bb | 417 | regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, |
0be068a0 | 418 | ARIZONA_WSEQ_ABORT); |
e80436bb | 419 | |
3850e3ee CK |
420 | err: |
421 | err = arizona_disable_freerun_sysclk(arizona, &state); | |
e80436bb | 422 | |
0be068a0 | 423 | return ret ?: err; |
e80436bb CK |
424 | } |
425 | ||
882bc468 CK |
426 | /* |
427 | * Register patch to some of the CODECs internal write sequences | |
428 | * to ensure a clean exit from the low power sleep state. | |
429 | */ | |
8019ff6c | 430 | static const struct reg_sequence wm5110_sleep_patch[] = { |
882bc468 CK |
431 | { 0x337A, 0xC100 }, |
432 | { 0x337B, 0x0041 }, | |
433 | { 0x3300, 0xA210 }, | |
434 | { 0x3301, 0x050C }, | |
435 | }; | |
436 | ||
437 | static int wm5110_apply_sleep_patch(struct arizona *arizona) | |
438 | { | |
439 | struct arizona_sysclk_state state; | |
440 | int err, ret; | |
441 | ||
442 | ret = arizona_enable_freerun_sysclk(arizona, &state); | |
443 | if (ret) | |
444 | return ret; | |
445 | ||
446 | ret = regmap_multi_reg_write_bypassed(arizona->regmap, | |
447 | wm5110_sleep_patch, | |
448 | ARRAY_SIZE(wm5110_sleep_patch)); | |
449 | ||
450 | err = arizona_disable_freerun_sysclk(arizona, &state); | |
451 | ||
452 | return ret ?: err; | |
453 | } | |
454 | ||
1c1c6bba CK |
455 | static int wm5102_clear_write_sequencer(struct arizona *arizona) |
456 | { | |
457 | int ret; | |
458 | ||
459 | ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_3, | |
460 | 0x0); | |
461 | if (ret) { | |
462 | dev_err(arizona->dev, | |
463 | "Failed to clear write sequencer state: %d\n", ret); | |
464 | return ret; | |
465 | } | |
466 | ||
467 | arizona_enable_reset(arizona); | |
468 | regulator_disable(arizona->dcvdd); | |
469 | ||
470 | msleep(20); | |
471 | ||
472 | ret = regulator_enable(arizona->dcvdd); | |
473 | if (ret) { | |
474 | dev_err(arizona->dev, "Failed to re-enable DCVDD: %d\n", ret); | |
475 | return ret; | |
476 | } | |
477 | arizona_disable_reset(arizona); | |
478 | ||
479 | return 0; | |
480 | } | |
481 | ||
e7811147 RF |
482 | static int arizona_isolate_dcvdd(struct arizona *arizona) |
483 | { | |
484 | int ret; | |
485 | ||
486 | ret = regmap_update_bits(arizona->regmap, | |
487 | ARIZONA_ISOLATION_CONTROL, | |
488 | ARIZONA_ISOLATE_DCVDD1, | |
489 | ARIZONA_ISOLATE_DCVDD1); | |
490 | if (ret != 0) | |
491 | dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n", ret); | |
492 | ||
493 | return ret; | |
494 | } | |
495 | ||
496 | static int arizona_connect_dcvdd(struct arizona *arizona) | |
497 | { | |
498 | int ret; | |
499 | ||
500 | ret = regmap_update_bits(arizona->regmap, | |
501 | ARIZONA_ISOLATION_CONTROL, | |
502 | ARIZONA_ISOLATE_DCVDD1, 0); | |
503 | if (ret != 0) | |
504 | dev_err(arizona->dev, "Failed to connect DCVDD: %d\n", ret); | |
505 | ||
506 | return ret; | |
507 | } | |
508 | ||
e3424273 RF |
509 | static int arizona_is_jack_det_active(struct arizona *arizona) |
510 | { | |
511 | unsigned int val; | |
512 | int ret; | |
513 | ||
514 | ret = regmap_read(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, &val); | |
515 | if (ret) { | |
516 | dev_err(arizona->dev, | |
517 | "Failed to check jack det status: %d\n", ret); | |
518 | return ret; | |
519 | } else if (val & ARIZONA_JD1_ENA) { | |
520 | return 1; | |
521 | } else { | |
522 | return 0; | |
523 | } | |
524 | } | |
525 | ||
3cc72986 MB |
526 | static int arizona_runtime_resume(struct device *dev) |
527 | { | |
528 | struct arizona *arizona = dev_get_drvdata(dev); | |
529 | int ret; | |
530 | ||
508c8299 MB |
531 | dev_dbg(arizona->dev, "Leaving AoD mode\n"); |
532 | ||
e6cb7341 CK |
533 | if (arizona->has_fully_powered_off) { |
534 | dev_dbg(arizona->dev, "Re-enabling core supplies\n"); | |
535 | ||
536 | ret = regulator_bulk_enable(arizona->num_core_supplies, | |
537 | arizona->core_supplies); | |
538 | if (ret) { | |
539 | dev_err(dev, "Failed to enable core supplies: %d\n", | |
540 | ret); | |
541 | return ret; | |
542 | } | |
543 | } | |
544 | ||
59db9691 MB |
545 | ret = regulator_enable(arizona->dcvdd); |
546 | if (ret != 0) { | |
547 | dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret); | |
e6cb7341 CK |
548 | if (arizona->has_fully_powered_off) |
549 | regulator_bulk_disable(arizona->num_core_supplies, | |
550 | arizona->core_supplies); | |
59db9691 MB |
551 | return ret; |
552 | } | |
3cc72986 | 553 | |
e6cb7341 CK |
554 | if (arizona->has_fully_powered_off) { |
555 | arizona_disable_reset(arizona); | |
556 | enable_irq(arizona->irq); | |
557 | arizona->has_fully_powered_off = false; | |
558 | } | |
559 | ||
3cc72986 MB |
560 | regcache_cache_only(arizona->regmap, false); |
561 | ||
4c9bb8bc CK |
562 | switch (arizona->type) { |
563 | case WM5102: | |
5927467d | 564 | if (arizona->external_dcvdd) { |
e7811147 RF |
565 | ret = arizona_connect_dcvdd(arizona); |
566 | if (ret != 0) | |
5927467d | 567 | goto err; |
5927467d MB |
568 | } |
569 | ||
4c9bb8bc CK |
570 | ret = wm5102_patch(arizona); |
571 | if (ret != 0) { | |
572 | dev_err(arizona->dev, "Failed to apply patch: %d\n", | |
573 | ret); | |
574 | goto err; | |
575 | } | |
e80436bb | 576 | |
0be068a0 CK |
577 | ret = wm5102_apply_hardware_patch(arizona); |
578 | if (ret) { | |
e80436bb CK |
579 | dev_err(arizona->dev, |
580 | "Failed to apply hardware patch: %d\n", | |
581 | ret); | |
582 | goto err; | |
583 | } | |
584 | break; | |
96129a0e CK |
585 | case WM5110: |
586 | case WM8280: | |
587 | ret = arizona_wait_for_boot(arizona); | |
588 | if (ret) | |
589 | goto err; | |
590 | ||
591 | if (arizona->external_dcvdd) { | |
e7811147 RF |
592 | ret = arizona_connect_dcvdd(arizona); |
593 | if (ret != 0) | |
96129a0e | 594 | goto err; |
96129a0e CK |
595 | } else { |
596 | /* | |
597 | * As this is only called for the internal regulator | |
598 | * (where we know voltage ranges available) it is ok | |
599 | * to request an exact range. | |
600 | */ | |
601 | ret = regulator_set_voltage(arizona->dcvdd, | |
602 | 1200000, 1200000); | |
603 | if (ret < 0) { | |
604 | dev_err(arizona->dev, | |
605 | "Failed to set resume voltage: %d\n", | |
606 | ret); | |
607 | goto err; | |
608 | } | |
609 | } | |
e6cb7341 CK |
610 | |
611 | ret = wm5110_apply_sleep_patch(arizona); | |
612 | if (ret) { | |
613 | dev_err(arizona->dev, | |
614 | "Failed to re-apply sleep patch: %d\n", | |
615 | ret); | |
616 | goto err; | |
617 | } | |
96129a0e | 618 | break; |
ea1f3339 RF |
619 | case WM1831: |
620 | case CS47L24: | |
621 | ret = arizona_wait_for_boot(arizona); | |
622 | if (ret != 0) | |
623 | goto err; | |
624 | break; | |
e80436bb | 625 | default: |
12bb68ed | 626 | ret = arizona_wait_for_boot(arizona); |
3762aede | 627 | if (ret != 0) |
12bb68ed | 628 | goto err; |
12bb68ed | 629 | |
5927467d | 630 | if (arizona->external_dcvdd) { |
e7811147 RF |
631 | ret = arizona_connect_dcvdd(arizona); |
632 | if (ret != 0) | |
5927467d | 633 | goto err; |
5927467d | 634 | } |
e80436bb | 635 | break; |
4c9bb8bc CK |
636 | } |
637 | ||
9270bdf5 MB |
638 | ret = regcache_sync(arizona->regmap); |
639 | if (ret != 0) { | |
640 | dev_err(arizona->dev, "Failed to restore register cache\n"); | |
4816bd1c | 641 | goto err; |
9270bdf5 | 642 | } |
3cc72986 MB |
643 | |
644 | return 0; | |
4816bd1c MB |
645 | |
646 | err: | |
647 | regcache_cache_only(arizona->regmap, true); | |
648 | regulator_disable(arizona->dcvdd); | |
649 | return ret; | |
3cc72986 MB |
650 | } |
651 | ||
652 | static int arizona_runtime_suspend(struct device *dev) | |
653 | { | |
654 | struct arizona *arizona = dev_get_drvdata(dev); | |
a05950a4 | 655 | int jd_active = 0; |
5927467d | 656 | int ret; |
3cc72986 | 657 | |
508c8299 MB |
658 | dev_dbg(arizona->dev, "Entering AoD mode\n"); |
659 | ||
e6cb7341 CK |
660 | switch (arizona->type) { |
661 | case WM5110: | |
662 | case WM8280: | |
e3424273 RF |
663 | jd_active = arizona_is_jack_det_active(arizona); |
664 | if (jd_active < 0) | |
665 | return jd_active; | |
666 | ||
e7811147 RF |
667 | if (arizona->external_dcvdd) { |
668 | ret = arizona_isolate_dcvdd(arizona); | |
669 | if (ret != 0) | |
670 | return ret; | |
671 | } else { | |
672 | /* | |
673 | * As this is only called for the internal regulator | |
674 | * (where we know voltage ranges available) it is ok | |
675 | * to request an exact range. | |
676 | */ | |
677 | ret = regulator_set_voltage(arizona->dcvdd, | |
678 | 1175000, 1175000); | |
679 | if (ret < 0) { | |
680 | dev_err(arizona->dev, | |
681 | "Failed to set suspend voltage: %d\n", | |
682 | ret); | |
683 | return ret; | |
684 | } | |
e6cb7341 CK |
685 | } |
686 | break; | |
687 | case WM5102: | |
e3424273 RF |
688 | jd_active = arizona_is_jack_det_active(arizona); |
689 | if (jd_active < 0) | |
690 | return jd_active; | |
691 | ||
e7811147 RF |
692 | if (arizona->external_dcvdd) { |
693 | ret = arizona_isolate_dcvdd(arizona); | |
694 | if (ret != 0) | |
695 | return ret; | |
696 | } | |
697 | ||
e3424273 | 698 | if (!jd_active) { |
e6cb7341 CK |
699 | ret = regmap_write(arizona->regmap, |
700 | ARIZONA_WRITE_SEQUENCER_CTRL_3, 0x0); | |
701 | if (ret) { | |
96129a0e | 702 | dev_err(arizona->dev, |
e6cb7341 | 703 | "Failed to clear write sequencer: %d\n", |
96129a0e CK |
704 | ret); |
705 | return ret; | |
706 | } | |
96129a0e | 707 | } |
e6cb7341 | 708 | break; |
ea1f3339 RF |
709 | case WM1831: |
710 | case CS47L24: | |
711 | break; | |
e6cb7341 | 712 | default: |
e3424273 RF |
713 | jd_active = arizona_is_jack_det_active(arizona); |
714 | if (jd_active < 0) | |
715 | return jd_active; | |
716 | ||
e7811147 RF |
717 | if (arizona->external_dcvdd) { |
718 | ret = arizona_isolate_dcvdd(arizona); | |
719 | if (ret != 0) | |
720 | return ret; | |
721 | } | |
e6cb7341 | 722 | break; |
5927467d MB |
723 | } |
724 | ||
59db9691 MB |
725 | regcache_cache_only(arizona->regmap, true); |
726 | regcache_mark_dirty(arizona->regmap); | |
e293e847 | 727 | regulator_disable(arizona->dcvdd); |
3cc72986 | 728 | |
e6cb7341 | 729 | /* Allow us to completely power down if no jack detection */ |
e3424273 | 730 | if (!jd_active) { |
e6cb7341 CK |
731 | dev_dbg(arizona->dev, "Fully powering off\n"); |
732 | ||
733 | arizona->has_fully_powered_off = true; | |
734 | ||
11150929 | 735 | disable_irq_nosync(arizona->irq); |
e6cb7341 CK |
736 | arizona_enable_reset(arizona); |
737 | regulator_bulk_disable(arizona->num_core_supplies, | |
738 | arizona->core_supplies); | |
739 | } | |
740 | ||
3cc72986 MB |
741 | return 0; |
742 | } | |
3cc72986 | 743 | |
67c99296 MB |
744 | static int arizona_suspend(struct device *dev) |
745 | { | |
746 | struct arizona *arizona = dev_get_drvdata(dev); | |
747 | ||
748 | dev_dbg(arizona->dev, "Suspend, disabling IRQ\n"); | |
749 | disable_irq(arizona->irq); | |
750 | ||
751 | return 0; | |
752 | } | |
753 | ||
3612b27c | 754 | static int arizona_suspend_noirq(struct device *dev) |
67c99296 MB |
755 | { |
756 | struct arizona *arizona = dev_get_drvdata(dev); | |
757 | ||
758 | dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n"); | |
759 | enable_irq(arizona->irq); | |
760 | ||
761 | return 0; | |
762 | } | |
763 | ||
dc781d0e MB |
764 | static int arizona_resume_noirq(struct device *dev) |
765 | { | |
766 | struct arizona *arizona = dev_get_drvdata(dev); | |
767 | ||
768 | dev_dbg(arizona->dev, "Early resume, disabling IRQ\n"); | |
769 | disable_irq(arizona->irq); | |
770 | ||
771 | return 0; | |
772 | } | |
773 | ||
774 | static int arizona_resume(struct device *dev) | |
775 | { | |
776 | struct arizona *arizona = dev_get_drvdata(dev); | |
777 | ||
3612b27c | 778 | dev_dbg(arizona->dev, "Resume, reenabling IRQ\n"); |
dc781d0e MB |
779 | enable_irq(arizona->irq); |
780 | ||
781 | return 0; | |
782 | } | |
50d3ac7d PC |
783 | |
784 | EXPORT_GPL_DEV_PM_OPS(arizona_pm_ops) = { | |
785 | RUNTIME_PM_OPS(arizona_runtime_suspend, | |
786 | arizona_runtime_resume, | |
787 | NULL) | |
788 | SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume) | |
789 | NOIRQ_SYSTEM_SLEEP_PM_OPS(arizona_suspend_noirq, | |
790 | arizona_resume_noirq) | |
3cc72986 | 791 | }; |
3cc72986 | 792 | |
d781009c | 793 | #ifdef CONFIG_OF |
d781009c MB |
794 | static int arizona_of_get_core_pdata(struct arizona *arizona) |
795 | { | |
e4fcb1d6 | 796 | struct arizona_pdata *pdata = &arizona->pdata; |
d781009c MB |
797 | int ret, i; |
798 | ||
c1860466 | 799 | /* Handle old non-standard DT binding */ |
5da3f767 | 800 | pdata->reset = devm_gpiod_get(arizona->dev, "wlf,reset", GPIOD_OUT_LOW); |
c1860466 CK |
801 | if (IS_ERR(pdata->reset)) { |
802 | ret = PTR_ERR(pdata->reset); | |
1961531d | 803 | |
c1860466 CK |
804 | /* |
805 | * Reset missing will be caught when other binding is read | |
806 | * but all other errors imply this binding is in use but has | |
807 | * encountered a problem so should be handled. | |
808 | */ | |
809 | if (ret == -EPROBE_DEFER) | |
810 | return ret; | |
811 | else if (ret != -ENOENT && ret != -ENOSYS) | |
812 | dev_err(arizona->dev, "Reset GPIO malformed: %d\n", | |
813 | ret); | |
814 | ||
815 | pdata->reset = NULL; | |
1961531d | 816 | } |
d781009c MB |
817 | |
818 | ret = of_property_read_u32_array(arizona->dev->of_node, | |
819 | "wlf,gpio-defaults", | |
3762aede CK |
820 | pdata->gpio_defaults, |
821 | ARRAY_SIZE(pdata->gpio_defaults)); | |
d781009c MB |
822 | if (ret >= 0) { |
823 | /* | |
824 | * All values are literal except out of range values | |
825 | * which are chip default, translate into platform | |
826 | * data which uses 0 as chip default and out of range | |
827 | * as zero. | |
828 | */ | |
3762aede CK |
829 | for (i = 0; i < ARRAY_SIZE(pdata->gpio_defaults); i++) { |
830 | if (pdata->gpio_defaults[i] > 0xffff) | |
831 | pdata->gpio_defaults[i] = 0; | |
832 | else if (pdata->gpio_defaults[i] == 0) | |
833 | pdata->gpio_defaults[i] = 0x10000; | |
d781009c MB |
834 | } |
835 | } else { | |
836 | dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n", | |
837 | ret); | |
838 | } | |
839 | ||
840 | return 0; | |
841 | } | |
d781009c MB |
842 | #else |
843 | static inline int arizona_of_get_core_pdata(struct arizona *arizona) | |
844 | { | |
845 | return 0; | |
846 | } | |
847 | #endif | |
848 | ||
5ac98553 | 849 | static const struct mfd_cell early_devs[] = { |
3cc72986 MB |
850 | { .name = "arizona-ldo1" }, |
851 | }; | |
852 | ||
3762aede | 853 | static const char * const wm5102_supplies[] = { |
5fc6c396 | 854 | "MICVDD", |
32dadef2 CK |
855 | "DBVDD2", |
856 | "DBVDD3", | |
857 | "CPVDD", | |
858 | "SPKVDDL", | |
859 | "SPKVDDR", | |
860 | }; | |
861 | ||
5ac98553 | 862 | static const struct mfd_cell wm5102_devs[] = { |
d7768111 | 863 | { .name = "arizona-micsupp" }, |
f83c218c | 864 | { .name = "arizona-gpio" }, |
503b1cac | 865 | { .name = "arizona-haptics" }, |
3cc72986 | 866 | { .name = "arizona-pwm" }, |
32dadef2 CK |
867 | { |
868 | .name = "wm5102-codec", | |
869 | .parent_supplies = wm5102_supplies, | |
870 | .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), | |
871 | }, | |
3cc72986 MB |
872 | }; |
873 | ||
5ac98553 | 874 | static const struct mfd_cell wm5110_devs[] = { |
d7768111 | 875 | { .name = "arizona-micsupp" }, |
f83c218c | 876 | { .name = "arizona-gpio" }, |
503b1cac | 877 | { .name = "arizona-haptics" }, |
e102befe | 878 | { .name = "arizona-pwm" }, |
32dadef2 CK |
879 | { |
880 | .name = "wm5110-codec", | |
881 | .parent_supplies = wm5102_supplies, | |
882 | .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), | |
883 | }, | |
884 | }; | |
885 | ||
ea1f3339 RF |
886 | static const char * const cs47l24_supplies[] = { |
887 | "MICVDD", | |
888 | "CPVDD", | |
889 | "SPKVDD", | |
890 | }; | |
891 | ||
892 | static const struct mfd_cell cs47l24_devs[] = { | |
893 | { .name = "arizona-gpio" }, | |
894 | { .name = "arizona-haptics" }, | |
895 | { .name = "arizona-pwm" }, | |
896 | { | |
897 | .name = "cs47l24-codec", | |
898 | .parent_supplies = cs47l24_supplies, | |
899 | .num_parent_supplies = ARRAY_SIZE(cs47l24_supplies), | |
900 | }, | |
901 | }; | |
902 | ||
3762aede | 903 | static const char * const wm8997_supplies[] = { |
996c2d4f | 904 | "MICVDD", |
32dadef2 CK |
905 | "DBVDD2", |
906 | "CPVDD", | |
907 | "SPKVDD", | |
e102befe MB |
908 | }; |
909 | ||
5ac98553 | 910 | static const struct mfd_cell wm8997_devs[] = { |
dc7d4863 | 911 | { .name = "arizona-micsupp" }, |
f83c218c | 912 | { .name = "arizona-gpio" }, |
dc7d4863 CK |
913 | { .name = "arizona-haptics" }, |
914 | { .name = "arizona-pwm" }, | |
32dadef2 CK |
915 | { |
916 | .name = "wm8997-codec", | |
917 | .parent_supplies = wm8997_supplies, | |
918 | .num_parent_supplies = ARRAY_SIZE(wm8997_supplies), | |
919 | }, | |
dc7d4863 CK |
920 | }; |
921 | ||
6887b042 | 922 | static const struct mfd_cell wm8998_devs[] = { |
f83c218c CK |
923 | { .name = "arizona-micsupp" }, |
924 | { .name = "arizona-gpio" }, | |
6887b042 RF |
925 | { .name = "arizona-haptics" }, |
926 | { .name = "arizona-pwm" }, | |
927 | { | |
928 | .name = "wm8998-codec", | |
929 | .parent_supplies = wm5102_supplies, | |
930 | .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), | |
931 | }, | |
6887b042 RF |
932 | }; |
933 | ||
f791be49 | 934 | int arizona_dev_init(struct arizona *arizona) |
3cc72986 | 935 | { |
8e27a563 | 936 | static const char * const mclk_name[] = { "mclk1", "mclk2" }; |
3cc72986 | 937 | struct device *dev = arizona->dev; |
ea1f3339 | 938 | const char *type_name = NULL; |
6000c99e | 939 | unsigned int reg, val; |
62d62b59 | 940 | int (*apply_patch)(struct arizona *) = NULL; |
ae05ea36 | 941 | const struct mfd_cell *subdevs = NULL; |
5da6cbcd | 942 | int n_subdevs = 0, ret, i; |
3cc72986 MB |
943 | |
944 | dev_set_drvdata(arizona->dev, arizona); | |
945 | mutex_init(&arizona->clk_lock); | |
946 | ||
b8d336ed | 947 | if (dev_get_platdata(arizona->dev)) { |
3cc72986 MB |
948 | memcpy(&arizona->pdata, dev_get_platdata(arizona->dev), |
949 | sizeof(arizona->pdata)); | |
b8d336ed CK |
950 | } else { |
951 | ret = arizona_of_get_core_pdata(arizona); | |
952 | if (ret < 0) | |
953 | return ret; | |
954 | } | |
3cc72986 | 955 | |
cdd8da8c SN |
956 | BUILD_BUG_ON(ARRAY_SIZE(arizona->mclk) != ARRAY_SIZE(mclk_name)); |
957 | for (i = 0; i < ARRAY_SIZE(arizona->mclk); i++) { | |
958 | arizona->mclk[i] = devm_clk_get(arizona->dev, mclk_name[i]); | |
959 | if (IS_ERR(arizona->mclk[i])) { | |
960 | dev_info(arizona->dev, "Failed to get %s: %ld\n", | |
961 | mclk_name[i], PTR_ERR(arizona->mclk[i])); | |
962 | arizona->mclk[i] = NULL; | |
963 | } | |
964 | } | |
965 | ||
3cc72986 MB |
966 | regcache_cache_only(arizona->regmap, true); |
967 | ||
968 | switch (arizona->type) { | |
969 | case WM5102: | |
e102befe | 970 | case WM5110: |
e5d4ef0d | 971 | case WM8280: |
dc7d4863 | 972 | case WM8997: |
6887b042 RF |
973 | case WM8998: |
974 | case WM1814: | |
ea1f3339 RF |
975 | case WM1831: |
976 | case CS47L24: | |
3cc72986 MB |
977 | for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++) |
978 | arizona->core_supplies[i].supply | |
979 | = wm5102_core_supplies[i]; | |
980 | arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies); | |
981 | break; | |
982 | default: | |
983 | dev_err(arizona->dev, "Unknown device type %d\n", | |
984 | arizona->type); | |
75d8a2b0 | 985 | return -ENODEV; |
3cc72986 MB |
986 | } |
987 | ||
4a8c475f CK |
988 | /* Mark DCVDD as external, LDO1 driver will clear if internal */ |
989 | arizona->external_dcvdd = true; | |
990 | ||
ea1f3339 RF |
991 | switch (arizona->type) { |
992 | case WM1831: | |
993 | case CS47L24: | |
994 | break; /* No LDO1 regulator */ | |
995 | default: | |
996 | ret = mfd_add_devices(arizona->dev, -1, early_devs, | |
997 | ARRAY_SIZE(early_devs), NULL, 0, NULL); | |
998 | if (ret != 0) { | |
999 | dev_err(dev, "Failed to add early children: %d\n", ret); | |
1000 | return ret; | |
1001 | } | |
1002 | break; | |
3cc72986 MB |
1003 | } |
1004 | ||
1005 | ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies, | |
1006 | arizona->core_supplies); | |
1007 | if (ret != 0) { | |
1008 | dev_err(dev, "Failed to request core supplies: %d\n", | |
1009 | ret); | |
1010 | goto err_early; | |
1011 | } | |
1012 | ||
0c2d0ffb CK |
1013 | /** |
1014 | * Don't use devres here because the only device we have to get | |
1015 | * against is the MFD device and DCVDD will likely be supplied by | |
1016 | * one of its children. Meaning that the regulator will be | |
1017 | * destroyed by the time devres calls regulator put. | |
1018 | */ | |
e6021511 | 1019 | arizona->dcvdd = regulator_get(arizona->dev, "DCVDD"); |
59db9691 MB |
1020 | if (IS_ERR(arizona->dcvdd)) { |
1021 | ret = PTR_ERR(arizona->dcvdd); | |
1022 | dev_err(dev, "Failed to request DCVDD: %d\n", ret); | |
1023 | goto err_early; | |
1024 | } | |
1025 | ||
c1860466 | 1026 | if (!arizona->pdata.reset) { |
87d3af4a | 1027 | /* Start out with /RESET low to put the chip into reset */ |
c1860466 CK |
1028 | arizona->pdata.reset = devm_gpiod_get(arizona->dev, "reset", |
1029 | GPIOD_OUT_LOW); | |
1030 | if (IS_ERR(arizona->pdata.reset)) { | |
1031 | ret = PTR_ERR(arizona->pdata.reset); | |
1032 | if (ret == -EPROBE_DEFER) | |
1033 | goto err_dcvdd; | |
1034 | ||
1035 | dev_err(arizona->dev, | |
1036 | "Reset GPIO missing/malformed: %d\n", ret); | |
1037 | ||
1038 | arizona->pdata.reset = NULL; | |
87d3af4a MB |
1039 | } |
1040 | } | |
1041 | ||
3cc72986 MB |
1042 | ret = regulator_bulk_enable(arizona->num_core_supplies, |
1043 | arizona->core_supplies); | |
1044 | if (ret != 0) { | |
1045 | dev_err(dev, "Failed to enable core supplies: %d\n", | |
1046 | ret); | |
e6021511 | 1047 | goto err_dcvdd; |
3cc72986 MB |
1048 | } |
1049 | ||
59db9691 MB |
1050 | ret = regulator_enable(arizona->dcvdd); |
1051 | if (ret != 0) { | |
1052 | dev_err(dev, "Failed to enable DCVDD: %d\n", ret); | |
1053 | goto err_enable; | |
1054 | } | |
1055 | ||
2229875d | 1056 | arizona_disable_reset(arizona); |
3cc72986 | 1057 | |
3cc72986 MB |
1058 | regcache_cache_only(arizona->regmap, false); |
1059 | ||
ca76ceb8 | 1060 | /* Verify that this is a chip we know about */ |
3cc72986 MB |
1061 | ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); |
1062 | if (ret != 0) { | |
1063 | dev_err(dev, "Failed to read ID register: %d\n", ret); | |
59db9691 | 1064 | goto err_reset; |
3cc72986 MB |
1065 | } |
1066 | ||
3cc72986 MB |
1067 | switch (reg) { |
1068 | case 0x5102: | |
e102befe | 1069 | case 0x5110: |
6887b042 | 1070 | case 0x6349: |
ea1f3339 | 1071 | case 0x6363: |
dc7d4863 | 1072 | case 0x8997: |
e102befe | 1073 | break; |
3cc72986 | 1074 | default: |
ca76ceb8 | 1075 | dev_err(arizona->dev, "Unknown device ID: %x\n", reg); |
75d8a2b0 | 1076 | ret = -ENODEV; |
59db9691 | 1077 | goto err_reset; |
3cc72986 MB |
1078 | } |
1079 | ||
3cc72986 MB |
1080 | /* If we have a /RESET GPIO we'll already be reset */ |
1081 | if (!arizona->pdata.reset) { | |
1082 | ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0); | |
1083 | if (ret != 0) { | |
1084 | dev_err(dev, "Failed to reset device: %d\n", ret); | |
59db9691 | 1085 | goto err_reset; |
3cc72986 | 1086 | } |
46b9d13a | 1087 | |
b79a980f | 1088 | usleep_range(1000, 5000); |
3cc72986 MB |
1089 | } |
1090 | ||
ca76ceb8 | 1091 | /* Ensure device startup is complete */ |
d955cba8 CK |
1092 | switch (arizona->type) { |
1093 | case WM5102: | |
48018943 MB |
1094 | ret = regmap_read(arizona->regmap, |
1095 | ARIZONA_WRITE_SEQUENCER_CTRL_3, &val); | |
1c1c6bba | 1096 | if (ret) { |
d955cba8 CK |
1097 | dev_err(dev, |
1098 | "Failed to check write sequencer state: %d\n", | |
1099 | ret); | |
1c1c6bba CK |
1100 | } else if (val & 0x01) { |
1101 | ret = wm5102_clear_write_sequencer(arizona); | |
1102 | if (ret) | |
1103 | return ret; | |
d955cba8 CK |
1104 | } |
1105 | break; | |
1c1c6bba CK |
1106 | default: |
1107 | break; | |
1108 | } | |
1109 | ||
1110 | ret = arizona_wait_for_boot(arizona); | |
1111 | if (ret) { | |
1112 | dev_err(arizona->dev, "Device failed initial boot: %d\n", ret); | |
1113 | goto err_reset; | |
af65a361 | 1114 | } |
3cc72986 | 1115 | |
ca76ceb8 MB |
1116 | /* Read the device ID information & do device specific stuff */ |
1117 | ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); | |
1118 | if (ret != 0) { | |
1119 | dev_err(dev, "Failed to read ID register: %d\n", ret); | |
1120 | goto err_reset; | |
1121 | } | |
1122 | ||
1123 | ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION, | |
1124 | &arizona->rev); | |
1125 | if (ret != 0) { | |
1126 | dev_err(dev, "Failed to read revision register: %d\n", ret); | |
1127 | goto err_reset; | |
1128 | } | |
1129 | arizona->rev &= ARIZONA_DEVICE_REVISION_MASK; | |
1130 | ||
1131 | switch (reg) { | |
ca76ceb8 | 1132 | case 0x5102: |
b61c1ec0 RF |
1133 | if (IS_ENABLED(CONFIG_MFD_WM5102)) { |
1134 | type_name = "WM5102"; | |
1135 | if (arizona->type != WM5102) { | |
1136 | dev_warn(arizona->dev, | |
1137 | "WM5102 registered as %d\n", | |
1138 | arizona->type); | |
1139 | arizona->type = WM5102; | |
1140 | } | |
1141 | ||
1142 | apply_patch = wm5102_patch; | |
1143 | arizona->rev &= 0x7; | |
1144 | subdevs = wm5102_devs; | |
1145 | n_subdevs = ARRAY_SIZE(wm5102_devs); | |
ca76ceb8 | 1146 | } |
ca76ceb8 | 1147 | break; |
ca76ceb8 | 1148 | case 0x5110: |
b61c1ec0 RF |
1149 | if (IS_ENABLED(CONFIG_MFD_WM5110)) { |
1150 | switch (arizona->type) { | |
1151 | case WM5110: | |
1152 | type_name = "WM5110"; | |
1153 | break; | |
1154 | case WM8280: | |
1155 | type_name = "WM8280"; | |
1156 | break; | |
1157 | default: | |
1158 | type_name = "WM5110"; | |
1159 | dev_warn(arizona->dev, | |
1160 | "WM5110 registered as %d\n", | |
1161 | arizona->type); | |
1162 | arizona->type = WM5110; | |
1163 | break; | |
1164 | } | |
1165 | ||
1166 | apply_patch = wm5110_patch; | |
1167 | subdevs = wm5110_devs; | |
1168 | n_subdevs = ARRAY_SIZE(wm5110_devs); | |
ca76ceb8 | 1169 | } |
ca76ceb8 | 1170 | break; |
ea1f3339 RF |
1171 | case 0x6363: |
1172 | if (IS_ENABLED(CONFIG_MFD_CS47L24)) { | |
1173 | switch (arizona->type) { | |
1174 | case CS47L24: | |
1175 | type_name = "CS47L24"; | |
1176 | break; | |
1177 | ||
1178 | case WM1831: | |
1179 | type_name = "WM1831"; | |
1180 | break; | |
1181 | ||
1182 | default: | |
1183 | dev_warn(arizona->dev, | |
1184 | "CS47L24 registered as %d\n", | |
1185 | arizona->type); | |
1186 | arizona->type = CS47L24; | |
1187 | break; | |
1188 | } | |
1189 | ||
1190 | apply_patch = cs47l24_patch; | |
1191 | subdevs = cs47l24_devs; | |
1192 | n_subdevs = ARRAY_SIZE(cs47l24_devs); | |
1193 | } | |
1194 | break; | |
dc7d4863 | 1195 | case 0x8997: |
b61c1ec0 RF |
1196 | if (IS_ENABLED(CONFIG_MFD_WM8997)) { |
1197 | type_name = "WM8997"; | |
1198 | if (arizona->type != WM8997) { | |
1199 | dev_warn(arizona->dev, | |
1200 | "WM8997 registered as %d\n", | |
1201 | arizona->type); | |
1202 | arizona->type = WM8997; | |
1203 | } | |
1204 | ||
1205 | apply_patch = wm8997_patch; | |
1206 | subdevs = wm8997_devs; | |
1207 | n_subdevs = ARRAY_SIZE(wm8997_devs); | |
dc7d4863 | 1208 | } |
dc7d4863 | 1209 | break; |
6887b042 | 1210 | case 0x6349: |
b61c1ec0 RF |
1211 | if (IS_ENABLED(CONFIG_MFD_WM8998)) { |
1212 | switch (arizona->type) { | |
1213 | case WM8998: | |
1214 | type_name = "WM8998"; | |
1215 | break; | |
1216 | ||
1217 | case WM1814: | |
1218 | type_name = "WM1814"; | |
1219 | break; | |
1220 | ||
1221 | default: | |
1222 | type_name = "WM8998"; | |
1223 | dev_warn(arizona->dev, | |
1224 | "WM8998 registered as %d\n", | |
1225 | arizona->type); | |
1226 | arizona->type = WM8998; | |
1227 | } | |
6887b042 | 1228 | |
b61c1ec0 RF |
1229 | apply_patch = wm8998_patch; |
1230 | subdevs = wm8998_devs; | |
1231 | n_subdevs = ARRAY_SIZE(wm8998_devs); | |
6887b042 | 1232 | } |
6887b042 | 1233 | break; |
ca76ceb8 MB |
1234 | default: |
1235 | dev_err(arizona->dev, "Unknown device ID %x\n", reg); | |
75d8a2b0 | 1236 | ret = -ENODEV; |
ca76ceb8 MB |
1237 | goto err_reset; |
1238 | } | |
1239 | ||
b61c1ec0 RF |
1240 | if (!subdevs) { |
1241 | dev_err(arizona->dev, | |
1242 | "No kernel support for device ID %x\n", reg); | |
75d8a2b0 | 1243 | ret = -ENODEV; |
b61c1ec0 RF |
1244 | goto err_reset; |
1245 | } | |
1246 | ||
ca76ceb8 MB |
1247 | dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A'); |
1248 | ||
62d62b59 MB |
1249 | if (apply_patch) { |
1250 | ret = apply_patch(arizona); | |
1251 | if (ret != 0) { | |
1252 | dev_err(arizona->dev, "Failed to apply patch: %d\n", | |
1253 | ret); | |
1254 | goto err_reset; | |
1255 | } | |
e80436bb CK |
1256 | |
1257 | switch (arizona->type) { | |
1258 | case WM5102: | |
0be068a0 CK |
1259 | ret = wm5102_apply_hardware_patch(arizona); |
1260 | if (ret) { | |
e80436bb CK |
1261 | dev_err(arizona->dev, |
1262 | "Failed to apply hardware patch: %d\n", | |
1263 | ret); | |
1264 | goto err_reset; | |
1265 | } | |
1266 | break; | |
882bc468 CK |
1267 | case WM5110: |
1268 | case WM8280: | |
1269 | ret = wm5110_apply_sleep_patch(arizona); | |
1270 | if (ret) { | |
1271 | dev_err(arizona->dev, | |
1272 | "Failed to apply sleep patch: %d\n", | |
1273 | ret); | |
1274 | goto err_reset; | |
1275 | } | |
1276 | break; | |
e80436bb CK |
1277 | default: |
1278 | break; | |
1279 | } | |
62d62b59 MB |
1280 | } |
1281 | ||
3cc72986 MB |
1282 | for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) { |
1283 | if (!arizona->pdata.gpio_defaults[i]) | |
1284 | continue; | |
1285 | ||
1286 | regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i, | |
1287 | arizona->pdata.gpio_defaults[i]); | |
1288 | } | |
1289 | ||
3cc72986 MB |
1290 | /* Chip default */ |
1291 | if (!arizona->pdata.clk32k_src) | |
1292 | arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2; | |
1293 | ||
1294 | switch (arizona->pdata.clk32k_src) { | |
1295 | case ARIZONA_32KZ_MCLK1: | |
1296 | case ARIZONA_32KZ_MCLK2: | |
1297 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, | |
1298 | ARIZONA_CLK_32K_SRC_MASK, | |
1299 | arizona->pdata.clk32k_src - 1); | |
767c6dc0 | 1300 | arizona_clk32k_enable(arizona); |
3cc72986 MB |
1301 | break; |
1302 | case ARIZONA_32KZ_NONE: | |
1303 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, | |
1304 | ARIZONA_CLK_32K_SRC_MASK, 2); | |
1305 | break; | |
1306 | default: | |
1307 | dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n", | |
1308 | arizona->pdata.clk32k_src); | |
1309 | ret = -EINVAL; | |
59db9691 | 1310 | goto err_reset; |
3cc72986 MB |
1311 | } |
1312 | ||
3d91f828 | 1313 | for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) { |
544c7aad MB |
1314 | if (!arizona->pdata.micbias[i].mV && |
1315 | !arizona->pdata.micbias[i].bypass) | |
3d91f828 MB |
1316 | continue; |
1317 | ||
544c7aad MB |
1318 | /* Apply default for bypass mode */ |
1319 | if (!arizona->pdata.micbias[i].mV) | |
1320 | arizona->pdata.micbias[i].mV = 2800; | |
1321 | ||
3d91f828 | 1322 | val = (arizona->pdata.micbias[i].mV - 1500) / 100; |
544c7aad | 1323 | |
3d91f828 MB |
1324 | val <<= ARIZONA_MICB1_LVL_SHIFT; |
1325 | ||
1326 | if (arizona->pdata.micbias[i].ext_cap) | |
1327 | val |= ARIZONA_MICB1_EXT_CAP; | |
1328 | ||
1329 | if (arizona->pdata.micbias[i].discharge) | |
1330 | val |= ARIZONA_MICB1_DISCH; | |
1331 | ||
f773fc6d | 1332 | if (arizona->pdata.micbias[i].soft_start) |
3d91f828 MB |
1333 | val |= ARIZONA_MICB1_RATE; |
1334 | ||
544c7aad MB |
1335 | if (arizona->pdata.micbias[i].bypass) |
1336 | val |= ARIZONA_MICB1_BYPASS; | |
1337 | ||
3d91f828 MB |
1338 | regmap_update_bits(arizona->regmap, |
1339 | ARIZONA_MIC_BIAS_CTRL_1 + i, | |
1340 | ARIZONA_MICB1_LVL_MASK | | |
71d134b9 | 1341 | ARIZONA_MICB1_EXT_CAP | |
3d91f828 | 1342 | ARIZONA_MICB1_DISCH | |
544c7aad | 1343 | ARIZONA_MICB1_BYPASS | |
3d91f828 MB |
1344 | ARIZONA_MICB1_RATE, val); |
1345 | } | |
1346 | ||
72e43164 CK |
1347 | pm_runtime_set_active(arizona->dev); |
1348 | pm_runtime_enable(arizona->dev); | |
1349 | ||
3cc72986 MB |
1350 | /* Set up for interrupts */ |
1351 | ret = arizona_irq_init(arizona); | |
1352 | if (ret != 0) | |
d347792c | 1353 | goto err_pm; |
3cc72986 | 1354 | |
72e43164 CK |
1355 | pm_runtime_set_autosuspend_delay(arizona->dev, 100); |
1356 | pm_runtime_use_autosuspend(arizona->dev); | |
1357 | ||
3cc72986 MB |
1358 | arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error", |
1359 | arizona_clkgen_err, arizona); | |
1360 | arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked", | |
1361 | arizona_overclocked, arizona); | |
1362 | arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked", | |
1363 | arizona_underclocked, arizona); | |
1364 | ||
ae05ea36 RF |
1365 | ret = mfd_add_devices(arizona->dev, PLATFORM_DEVID_NONE, |
1366 | subdevs, n_subdevs, NULL, 0, NULL); | |
3cc72986 | 1367 | |
ae05ea36 | 1368 | if (ret) { |
3cc72986 MB |
1369 | dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret); |
1370 | goto err_irq; | |
1371 | } | |
1372 | ||
1373 | return 0; | |
1374 | ||
1375 | err_irq: | |
1376 | arizona_irq_exit(arizona); | |
d347792c CK |
1377 | err_pm: |
1378 | pm_runtime_disable(arizona->dev); | |
ddff6c45 CK |
1379 | |
1380 | switch (arizona->pdata.clk32k_src) { | |
1381 | case ARIZONA_32KZ_MCLK1: | |
1382 | case ARIZONA_32KZ_MCLK2: | |
1383 | arizona_clk32k_disable(arizona); | |
1384 | break; | |
1385 | default: | |
1386 | break; | |
1387 | } | |
3cc72986 | 1388 | err_reset: |
2229875d | 1389 | arizona_enable_reset(arizona); |
59db9691 | 1390 | regulator_disable(arizona->dcvdd); |
3cc72986 | 1391 | err_enable: |
3a36a0db | 1392 | regulator_bulk_disable(arizona->num_core_supplies, |
3cc72986 | 1393 | arizona->core_supplies); |
e6021511 CK |
1394 | err_dcvdd: |
1395 | regulator_put(arizona->dcvdd); | |
3cc72986 MB |
1396 | err_early: |
1397 | mfd_remove_devices(dev); | |
1398 | return ret; | |
1399 | } | |
1400 | EXPORT_SYMBOL_GPL(arizona_dev_init); | |
1401 | ||
4740f73f | 1402 | int arizona_dev_exit(struct arizona *arizona) |
3cc72986 | 1403 | { |
fb36f77e | 1404 | disable_irq(arizona->irq); |
b804020a CK |
1405 | pm_runtime_disable(arizona->dev); |
1406 | ||
df6b3352 | 1407 | regulator_disable(arizona->dcvdd); |
e6021511 | 1408 | regulator_put(arizona->dcvdd); |
df6b3352 | 1409 | |
ddff6c45 CK |
1410 | switch (arizona->pdata.clk32k_src) { |
1411 | case ARIZONA_32KZ_MCLK1: | |
1412 | case ARIZONA_32KZ_MCLK2: | |
1413 | arizona_clk32k_disable(arizona); | |
1414 | break; | |
1415 | default: | |
1416 | break; | |
1417 | } | |
1418 | ||
3cc72986 MB |
1419 | mfd_remove_devices(arizona->dev); |
1420 | arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona); | |
1421 | arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona); | |
1422 | arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona); | |
3cc72986 | 1423 | arizona_irq_exit(arizona); |
2229875d | 1424 | arizona_enable_reset(arizona); |
df6b3352 | 1425 | |
4420286e | 1426 | regulator_bulk_disable(arizona->num_core_supplies, |
1d017b6b | 1427 | arizona->core_supplies); |
3cc72986 MB |
1428 | return 0; |
1429 | } | |
1430 | EXPORT_SYMBOL_GPL(arizona_dev_exit); | |
33d55070 | 1431 | |
5fed47ab | 1432 | MODULE_DESCRIPTION("Wolfson Arizona core driver"); |
33d55070 | 1433 | MODULE_LICENSE("GPL v2"); |