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mfd: Add device tree bindings for Arizona class devices
[linux-2.6-block.git] / drivers / mfd / arizona-core.c
CommitLineData
3cc72986
MB		 1/*
2 * Arizona core driver
3 *
4 * Copyright 2012 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/delay.h>
59db9691 14#include <linux/err.h>
3cc72986
MB		 15#include <linux/gpio.h>
16#include <linux/interrupt.h>
17#include <linux/mfd/core.h>
18#include <linux/module.h>
d781009c
MB		 19#include <linux/of.h>
20#include <linux/of_device.h>
21#include <linux/of_gpio.h>
3cc72986
MB		 22#include <linux/pm_runtime.h>
23#include <linux/regmap.h>
24#include <linux/regulator/consumer.h>
25#include <linux/slab.h>
26
27#include <linux/mfd/arizona/core.h>
28#include <linux/mfd/arizona/registers.h>
29
30#include "arizona.h"
31
32static const char *wm5102_core_supplies[] = {
33 "AVDD",
34 "DBVDD1",
3cc72986
MB		 35};
36
37int arizona_clk32k_enable(struct arizona *arizona)
38{
39 int ret = 0;
40
41 mutex_lock(&arizona->clk_lock);
42
43 arizona->clk32k_ref++;
44
247fa192
MB		 45 if (arizona->clk32k_ref == 1) {
46 switch (arizona->pdata.clk32k_src) {
47 case ARIZONA_32KZ_MCLK1:
48 ret = pm_runtime_get_sync(arizona->dev);
49 if (ret != 0)
50 goto out;
51 break;
52 }
53
3cc72986
MB		 54 ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
55 ARIZONA_CLK_32K_ENA,
56 ARIZONA_CLK_32K_ENA);
247fa192 57 }
3cc72986 58
247fa192 59out:
3cc72986
MB		 60 if (ret != 0)
61 arizona->clk32k_ref--;
62
63 mutex_unlock(&arizona->clk_lock);
64
65 return ret;
66}
67EXPORT_SYMBOL_GPL(arizona_clk32k_enable);
68
69int arizona_clk32k_disable(struct arizona *arizona)
70{
71 int ret = 0;
72
73 mutex_lock(&arizona->clk_lock);
74
75 BUG_ON(arizona->clk32k_ref <= 0);
76
77 arizona->clk32k_ref--;
78
247fa192 79 if (arizona->clk32k_ref == 0) {
3cc72986
MB		 80 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
81 ARIZONA_CLK_32K_ENA, 0);
82
247fa192
MB		 83 switch (arizona->pdata.clk32k_src) {
84 case ARIZONA_32KZ_MCLK1:
85 pm_runtime_put_sync(arizona->dev);
86 break;
87 }
88 }
89
3cc72986
MB		 90 mutex_unlock(&arizona->clk_lock);
91
92 return ret;
93}
94EXPORT_SYMBOL_GPL(arizona_clk32k_disable);
95
96static irqreturn_t arizona_clkgen_err(int irq, void *data)
97{
98 struct arizona *arizona = data;
99
100 dev_err(arizona->dev, "CLKGEN error\n");
101
102 return IRQ_HANDLED;
103}
104
105static irqreturn_t arizona_underclocked(int irq, void *data)
106{
107 struct arizona *arizona = data;
108 unsigned int val;
109 int ret;
110
111 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8,
112 &val);
113 if (ret != 0) {
114 dev_err(arizona->dev, "Failed to read underclock status: %d\n",
115 ret);
116 return IRQ_NONE;
117 }
118
3cc72986
MB		 119 if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
120 dev_err(arizona->dev, "AIF3 underclocked\n");
121 if (val & ARIZONA_AIF2_UNDERCLOCKED_STS)
3ebef34d
CK		 122 dev_err(arizona->dev, "AIF2 underclocked\n");
123 if (val & ARIZONA_AIF1_UNDERCLOCKED_STS)
3cc72986
MB		 124 dev_err(arizona->dev, "AIF1 underclocked\n");
125 if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS)
126 dev_err(arizona->dev, "ISRC2 underclocked\n");
127 if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS)
128 dev_err(arizona->dev, "ISRC1 underclocked\n");
129 if (val & ARIZONA_FX_UNDERCLOCKED_STS)
130 dev_err(arizona->dev, "FX underclocked\n");
131 if (val & ARIZONA_ASRC_UNDERCLOCKED_STS)
132 dev_err(arizona->dev, "ASRC underclocked\n");
133 if (val & ARIZONA_DAC_UNDERCLOCKED_STS)
134 dev_err(arizona->dev, "DAC underclocked\n");
135 if (val & ARIZONA_ADC_UNDERCLOCKED_STS)
136 dev_err(arizona->dev, "ADC underclocked\n");
137 if (val & ARIZONA_MIXER_UNDERCLOCKED_STS)
648a9880 138 dev_err(arizona->dev, "Mixer dropped sample\n");
3cc72986
MB		 139
140 return IRQ_HANDLED;
141}
142
143static irqreturn_t arizona_overclocked(int irq, void *data)
144{
145 struct arizona *arizona = data;
146 unsigned int val[2];
147 int ret;
148
149 ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
150 &val[0], 2);
151 if (ret != 0) {
152 dev_err(arizona->dev, "Failed to read overclock status: %d\n",
153 ret);
154 return IRQ_NONE;
155 }
156
157 if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
158 dev_err(arizona->dev, "PWM overclocked\n");
159 if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
160 dev_err(arizona->dev, "FX core overclocked\n");
161 if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS)
162 dev_err(arizona->dev, "DAC SYS overclocked\n");
163 if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS)
164 dev_err(arizona->dev, "DAC WARP overclocked\n");
165 if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS)
166 dev_err(arizona->dev, "ADC overclocked\n");
167 if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS)
168 dev_err(arizona->dev, "Mixer overclocked\n");
169 if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS)
170 dev_err(arizona->dev, "AIF3 overclocked\n");
171 if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS)
172 dev_err(arizona->dev, "AIF2 overclocked\n");
173 if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS)
174 dev_err(arizona->dev, "AIF1 overclocked\n");
175 if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS)
176 dev_err(arizona->dev, "Pad control overclocked\n");
177
178 if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS)
179 dev_err(arizona->dev, "Slimbus subsystem overclocked\n");
180 if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS)
181 dev_err(arizona->dev, "Slimbus async overclocked\n");
182 if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS)
183 dev_err(arizona->dev, "Slimbus sync overclocked\n");
184 if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS)
185 dev_err(arizona->dev, "ASRC async system overclocked\n");
186 if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS)
187 dev_err(arizona->dev, "ASRC async WARP overclocked\n");
188 if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS)
189 dev_err(arizona->dev, "ASRC sync system overclocked\n");
190 if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS)
191 dev_err(arizona->dev, "ASRC sync WARP overclocked\n");
192 if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS)
193 dev_err(arizona->dev, "DSP1 overclocked\n");
194 if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS)
195 dev_err(arizona->dev, "ISRC2 overclocked\n");
196 if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
197 dev_err(arizona->dev, "ISRC1 overclocked\n");
198
199 return IRQ_HANDLED;
200}
201
9d53dfdc
CK		 202static int arizona_poll_reg(struct arizona *arizona,
203 int timeout, unsigned int reg,
204 unsigned int mask, unsigned int target)
3cc72986 205{
9d53dfdc 206 unsigned int val = 0;
3cc72986
MB		 207 int ret, i;
208
9d53dfdc
CK		 209 for (i = 0; i < timeout; i++) {
210 ret = regmap_read(arizona->regmap, reg, &val);
3cc72986 211 if (ret != 0) {
9d53dfdc
CK		 212 dev_err(arizona->dev, "Failed to read reg %u: %d\n",
213 reg, ret);
cfe775ce 214 continue;
3cc72986
MB		 215 }
216
9d53dfdc
CK		 217 if ((val & mask) == target)
218 return 0;
219
220 msleep(1);
3cc72986
MB		 221 }
222
9d53dfdc
CK		 223 dev_err(arizona->dev, "Polling reg %u timed out: %x\n", reg, val);
224 return -ETIMEDOUT;
225}
226
227static int arizona_wait_for_boot(struct arizona *arizona)
228{
229 int ret;
230
231 /*
232 * We can't use an interrupt as we need to runtime resume to do so,
233 * we won't race with the interrupt handler as it'll be blocked on
234 * runtime resume.
235 */
236 ret = arizona_poll_reg(arizona, 5, ARIZONA_INTERRUPT_RAW_STATUS_5,
237 ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS);
238
239 if (!ret)
3cc72986
MB		 240 regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5,
241 ARIZONA_BOOT_DONE_STS);
3cc72986
MB		 242
243 pm_runtime_mark_last_busy(arizona->dev);
244
9d53dfdc 245 return ret;
3cc72986
MB		 246}
247
e80436bb
CK		 248static int arizona_apply_hardware_patch(struct arizona* arizona)
249{
250 unsigned int fll, sysclk;
251 int ret, err;
252
253 regcache_cache_bypass(arizona->regmap, true);
254
255 /* Cache existing FLL and SYSCLK settings */
256 ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &fll);
257 if (ret != 0) {
258 dev_err(arizona->dev, "Failed to cache FLL settings: %d\n",
259 ret);
260 return ret;
261 }
262 ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &sysclk);
263 if (ret != 0) {
264 dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n",
265 ret);
266 return ret;
267 }
268
269 /* Start up SYSCLK using the FLL in free running mode */
270 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1,
271 ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN);
272 if (ret != 0) {
273 dev_err(arizona->dev,
274 "Failed to start FLL in freerunning mode: %d\n",
275 ret);
276 return ret;
277 }
278 ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5,
279 ARIZONA_FLL1_CLOCK_OK_STS,
280 ARIZONA_FLL1_CLOCK_OK_STS);
281 if (ret != 0) {
282 ret = -ETIMEDOUT;
283 goto err_fll;
284 }
285
286 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144);
287 if (ret != 0) {
288 dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret);
289 goto err_fll;
290 }
291
292 /* Start the write sequencer and wait for it to finish */
293 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
294 ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160);
295 if (ret != 0) {
296 dev_err(arizona->dev, "Failed to start write sequencer: %d\n",
297 ret);
298 goto err_sysclk;
299 }
300 ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1,
301 ARIZONA_WSEQ_BUSY, 0);
302 if (ret != 0) {
303 regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
304 ARIZONA_WSEQ_ABORT);
305 ret = -ETIMEDOUT;
306 }
307
308err_sysclk:
309 err = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, sysclk);
310 if (err != 0) {
311 dev_err(arizona->dev,
312 "Failed to re-apply old SYSCLK settings: %d\n",
313 err);
314 }
315
316err_fll:
317 err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, fll);
318 if (err != 0) {
319 dev_err(arizona->dev,
320 "Failed to re-apply old FLL settings: %d\n",
321 err);
322 }
323
324 regcache_cache_bypass(arizona->regmap, false);
325
326 if (ret != 0)
327 return ret;
328 else
329 return err;
330}
331
3cc72986
MB		 332#ifdef CONFIG_PM_RUNTIME
333static int arizona_runtime_resume(struct device *dev)
334{
335 struct arizona *arizona = dev_get_drvdata(dev);
336 int ret;
337
508c8299
MB		 338 dev_dbg(arizona->dev, "Leaving AoD mode\n");
339
59db9691
MB		 340 ret = regulator_enable(arizona->dcvdd);
341 if (ret != 0) {
342 dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret);
343 return ret;
344 }
3cc72986
MB		 345
346 regcache_cache_only(arizona->regmap, false);
347
4c9bb8bc
CK		 348 switch (arizona->type) {
349 case WM5102:
350 ret = wm5102_patch(arizona);
351 if (ret != 0) {
352 dev_err(arizona->dev, "Failed to apply patch: %d\n",
353 ret);
354 goto err;
355 }
e80436bb
CK		 356
357 ret = arizona_apply_hardware_patch(arizona);
358 if (ret != 0) {
359 dev_err(arizona->dev,
360 "Failed to apply hardware patch: %d\n",
361 ret);
362 goto err;
363 }
364 break;
365 default:
12bb68ed
CK		 366 ret = arizona_wait_for_boot(arizona);
367 if (ret != 0) {
368 goto err;
369 }
370
e80436bb 371 break;
4c9bb8bc
CK		 372 }
373
d9d03496
CK		 374 switch (arizona->type) {
375 case WM5102:
376 ret = wm5102_patch(arizona);
377 if (ret != 0) {
378 dev_err(arizona->dev, "Failed to apply patch: %d\n",
379 ret);
380 goto err;
381 }
382 default:
383 break;
384 }
385
9270bdf5
MB		 386 ret = regcache_sync(arizona->regmap);
387 if (ret != 0) {
388 dev_err(arizona->dev, "Failed to restore register cache\n");
4816bd1c 389 goto err;
9270bdf5 390 }
3cc72986
MB		 391
392 return 0;
4816bd1c
MB		 393
394err:
395 regcache_cache_only(arizona->regmap, true);
396 regulator_disable(arizona->dcvdd);
397 return ret;
3cc72986
MB		 398}
399
400static int arizona_runtime_suspend(struct device *dev)
401{
402 struct arizona *arizona = dev_get_drvdata(dev);
403
508c8299
MB		 404 dev_dbg(arizona->dev, "Entering AoD mode\n");
405
59db9691
MB		 406 regulator_disable(arizona->dcvdd);
407 regcache_cache_only(arizona->regmap, true);
408 regcache_mark_dirty(arizona->regmap);
3cc72986
MB		 409
410 return 0;
411}
412#endif
413
dc781d0e 414#ifdef CONFIG_PM_SLEEP
67c99296
MB		 415static int arizona_suspend(struct device *dev)
416{
417 struct arizona *arizona = dev_get_drvdata(dev);
418
419 dev_dbg(arizona->dev, "Suspend, disabling IRQ\n");
420 disable_irq(arizona->irq);
421
422 return 0;
423}
424
425static int arizona_suspend_late(struct device *dev)
426{
427 struct arizona *arizona = dev_get_drvdata(dev);
428
429 dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n");
430 enable_irq(arizona->irq);
431
432 return 0;
433}
434
dc781d0e
MB		 435static int arizona_resume_noirq(struct device *dev)
436{
437 struct arizona *arizona = dev_get_drvdata(dev);
438
439 dev_dbg(arizona->dev, "Early resume, disabling IRQ\n");
440 disable_irq(arizona->irq);
441
442 return 0;
443}
444
445static int arizona_resume(struct device *dev)
446{
447 struct arizona *arizona = dev_get_drvdata(dev);
448
449 dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n");
450 enable_irq(arizona->irq);
451
452 return 0;
453}
454#endif
455
3cc72986
MB		 456const struct dev_pm_ops arizona_pm_ops = {
457 SET_RUNTIME_PM_OPS(arizona_runtime_suspend,
458 arizona_runtime_resume,
459 NULL)
67c99296 460 SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume)
dc781d0e 461#ifdef CONFIG_PM_SLEEP
67c99296 462 .suspend_late = arizona_suspend_late,
dc781d0e
MB		 463 .resume_noirq = arizona_resume_noirq,
464#endif
3cc72986
MB		 465};
466EXPORT_SYMBOL_GPL(arizona_pm_ops);
467
d781009c
MB		 468#ifdef CONFIG_OF
469int arizona_of_get_type(struct device *dev)
470{
471 const struct of_device_id *id = of_match_device(arizona_of_match, dev);
472
473 if (id)
474 return (int)id->data;
475 else
476 return 0;
477}
478EXPORT_SYMBOL_GPL(arizona_of_get_type);
479
480static int arizona_of_get_core_pdata(struct arizona *arizona)
481{
482 int ret, i;
483
484 arizona->pdata.reset = of_get_named_gpio(arizona->dev->of_node,
485 "wlf,reset", 0);
486 if (arizona->pdata.reset < 0)
487 arizona->pdata.reset = 0;
488
489 arizona->pdata.ldoena = of_get_named_gpio(arizona->dev->of_node,
490 "wlf,ldoena", 0);
491 if (arizona->pdata.ldoena < 0)
492 arizona->pdata.ldoena = 0;
493
494 ret = of_property_read_u32_array(arizona->dev->of_node,
495 "wlf,gpio-defaults",
496 arizona->pdata.gpio_defaults,
497 ARRAY_SIZE(arizona->pdata.gpio_defaults));
498 if (ret >= 0) {
499 /*
500 * All values are literal except out of range values
501 * which are chip default, translate into platform
502 * data which uses 0 as chip default and out of range
503 * as zero.
504 */
505 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
506 if (arizona->pdata.gpio_defaults[i] > 0xffff)
507 arizona->pdata.gpio_defaults[i] = 0;
508 if (arizona->pdata.gpio_defaults[i] == 0)
509 arizona->pdata.gpio_defaults[i] = 0x10000;
510 }
511 } else {
512 dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n",
513 ret);
514 }
515
516 return 0;
517}
518
519const struct of_device_id arizona_of_match[] = {
520 { .compatible = "wlf,wm5102", .data = (void *)WM5102 },
521 { .compatible = "wlf,wm5110", .data = (void *)WM5110 },
522 {},
523};
524EXPORT_SYMBOL_GPL(arizona_of_match);
525#else
526static inline int arizona_of_get_core_pdata(struct arizona *arizona)
527{
528 return 0;
529}
530#endif
531
3cc72986
MB		 532static struct mfd_cell early_devs[] = {
533 { .name = "arizona-ldo1" },
534};
535
536static struct mfd_cell wm5102_devs[] = {
d7768111 537 { .name = "arizona-micsupp" },
3cc72986
MB		 538 { .name = "arizona-extcon" },
539 { .name = "arizona-gpio" },
503b1cac 540 { .name = "arizona-haptics" },
3cc72986
MB		 541 { .name = "arizona-pwm" },
542 { .name = "wm5102-codec" },
543};
544
e102befe 545static struct mfd_cell wm5110_devs[] = {
d7768111 546 { .name = "arizona-micsupp" },
e102befe
MB		 547 { .name = "arizona-extcon" },
548 { .name = "arizona-gpio" },
503b1cac 549 { .name = "arizona-haptics" },
e102befe
MB		 550 { .name = "arizona-pwm" },
551 { .name = "wm5110-codec" },
552};
553
f791be49 554int arizona_dev_init(struct arizona *arizona)
3cc72986
MB		 555{
556 struct device *dev = arizona->dev;
557 const char *type_name;
558 unsigned int reg, val;
62d62b59 559 int (*apply_patch)(struct arizona *) = NULL;
3cc72986
MB		 560 int ret, i;
561
562 dev_set_drvdata(arizona->dev, arizona);
563 mutex_init(&arizona->clk_lock);
564
d781009c
MB		 565 arizona_of_get_core_pdata(arizona);
566
3cc72986
MB		 567 if (dev_get_platdata(arizona->dev))
568 memcpy(&arizona->pdata, dev_get_platdata(arizona->dev),
569 sizeof(arizona->pdata));
570
571 regcache_cache_only(arizona->regmap, true);
572
573 switch (arizona->type) {
574 case WM5102:
e102befe 575 case WM5110:
3cc72986
MB		 576 for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
577 arizona->core_supplies[i].supply
578 = wm5102_core_supplies[i];
579 arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies);
580 break;
581 default:
582 dev_err(arizona->dev, "Unknown device type %d\n",
583 arizona->type);
584 return -EINVAL;
585 }
586
587 ret = mfd_add_devices(arizona->dev, -1, early_devs,
0848c94f 588 ARRAY_SIZE(early_devs), NULL, 0, NULL);
3cc72986
MB		 589 if (ret != 0) {
590 dev_err(dev, "Failed to add early children: %d\n", ret);
591 return ret;
592 }
593
594 ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies,
595 arizona->core_supplies);
596 if (ret != 0) {
597 dev_err(dev, "Failed to request core supplies: %d\n",
598 ret);
599 goto err_early;
600 }
601
59db9691
MB		 602 arizona->dcvdd = devm_regulator_get(arizona->dev, "DCVDD");
603 if (IS_ERR(arizona->dcvdd)) {
604 ret = PTR_ERR(arizona->dcvdd);
605 dev_err(dev, "Failed to request DCVDD: %d\n", ret);
606 goto err_early;
607 }
608
87d3af4a
MB		 609 if (arizona->pdata.reset) {
610 /* Start out with /RESET low to put the chip into reset */
611 ret = gpio_request_one(arizona->pdata.reset,
612 GPIOF_DIR_OUT | GPIOF_INIT_LOW,
613 "arizona /RESET");
614 if (ret != 0) {
615 dev_err(dev, "Failed to request /RESET: %d\n", ret);
616 goto err_early;
617 }
618 }
619
3cc72986
MB		 620 ret = regulator_bulk_enable(arizona->num_core_supplies,
621 arizona->core_supplies);
622 if (ret != 0) {
623 dev_err(dev, "Failed to enable core supplies: %d\n",
624 ret);
625 goto err_early;
626 }
627
59db9691
MB		 628 ret = regulator_enable(arizona->dcvdd);
629 if (ret != 0) {
630 dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
631 goto err_enable;
632 }
633
c25feaa5 634 if (arizona->pdata.reset) {
3cc72986 635 gpio_set_value_cansleep(arizona->pdata.reset, 1);
c25feaa5
CK		 636 msleep(1);
637 }
3cc72986 638
3cc72986
MB		 639 regcache_cache_only(arizona->regmap, false);
640
ca76ceb8 641 /* Verify that this is a chip we know about */
3cc72986
MB		 642 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
643 if (ret != 0) {
644 dev_err(dev, "Failed to read ID register: %d\n", ret);
59db9691 645 goto err_reset;
3cc72986
MB		 646 }
647
3cc72986
MB		 648 switch (reg) {
649 case 0x5102:
e102befe 650 case 0x5110:
e102befe 651 break;
3cc72986 652 default:
ca76ceb8 653 dev_err(arizona->dev, "Unknown device ID: %x\n", reg);
59db9691 654 goto err_reset;
3cc72986
MB		 655 }
656
3cc72986
MB		 657 /* If we have a /RESET GPIO we'll already be reset */
658 if (!arizona->pdata.reset) {
46b9d13a
CK		 659 regcache_mark_dirty(arizona->regmap);
660
3cc72986
MB		 661 ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0);
662 if (ret != 0) {
663 dev_err(dev, "Failed to reset device: %d\n", ret);
59db9691 664 goto err_reset;
3cc72986 665 }
46b9d13a 666
c25feaa5
CK		 667 msleep(1);
668
46b9d13a
CK		 669 ret = regcache_sync(arizona->regmap);
670 if (ret != 0) {
671 dev_err(dev, "Failed to sync device: %d\n", ret);
672 goto err_reset;
673 }
3cc72986
MB		 674 }
675
ca76ceb8 676 /* Ensure device startup is complete */
d955cba8
CK		 677 switch (arizona->type) {
678 case WM5102:
679 ret = regmap_read(arizona->regmap, 0x19, &val);
680 if (ret != 0)
681 dev_err(dev,
682 "Failed to check write sequencer state: %d\n",
683 ret);
684 else if (val & 0x01)
685 break;
686 /* Fall through */
687 default:
688 ret = arizona_wait_for_boot(arizona);
689 if (ret != 0) {
690 dev_err(arizona->dev,
691 "Device failed initial boot: %d\n", ret);
692 goto err_reset;
693 }
694 break;
af65a361 695 }
3cc72986 696
ca76ceb8
MB		 697 /* Read the device ID information & do device specific stuff */
698 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
699 if (ret != 0) {
700 dev_err(dev, "Failed to read ID register: %d\n", ret);
701 goto err_reset;
702 }
703
704 ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION,
705 &arizona->rev);
706 if (ret != 0) {
707 dev_err(dev, "Failed to read revision register: %d\n", ret);
708 goto err_reset;
709 }
710 arizona->rev &= ARIZONA_DEVICE_REVISION_MASK;
711
712 switch (reg) {
713#ifdef CONFIG_MFD_WM5102
714 case 0x5102:
715 type_name = "WM5102";
716 if (arizona->type != WM5102) {
717 dev_err(arizona->dev, "WM5102 registered as %d\n",
718 arizona->type);
719 arizona->type = WM5102;
720 }
721 apply_patch = wm5102_patch;
722 arizona->rev &= 0x7;
723 break;
724#endif
725#ifdef CONFIG_MFD_WM5110
726 case 0x5110:
727 type_name = "WM5110";
728 if (arizona->type != WM5110) {
729 dev_err(arizona->dev, "WM5110 registered as %d\n",
730 arizona->type);
731 arizona->type = WM5110;
732 }
733 apply_patch = wm5110_patch;
734 break;
735#endif
736 default:
737 dev_err(arizona->dev, "Unknown device ID %x\n", reg);
738 goto err_reset;
739 }
740
741 dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A');
742
62d62b59
MB		 743 if (apply_patch) {
744 ret = apply_patch(arizona);
745 if (ret != 0) {
746 dev_err(arizona->dev, "Failed to apply patch: %d\n",
747 ret);
748 goto err_reset;
749 }
e80436bb
CK		 750
751 switch (arizona->type) {
752 case WM5102:
753 ret = arizona_apply_hardware_patch(arizona);
754 if (ret != 0) {
755 dev_err(arizona->dev,
756 "Failed to apply hardware patch: %d\n",
757 ret);
758 goto err_reset;
759 }
760 break;
761 default:
762 break;
763 }
62d62b59
MB		 764 }
765
3cc72986
MB		 766 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
767 if (!arizona->pdata.gpio_defaults[i])
768 continue;
769
770 regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i,
771 arizona->pdata.gpio_defaults[i]);
772 }
773
774 pm_runtime_set_autosuspend_delay(arizona->dev, 100);
775 pm_runtime_use_autosuspend(arizona->dev);
776 pm_runtime_enable(arizona->dev);
777
778 /* Chip default */
779 if (!arizona->pdata.clk32k_src)
780 arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2;
781
782 switch (arizona->pdata.clk32k_src) {
783 case ARIZONA_32KZ_MCLK1:
784 case ARIZONA_32KZ_MCLK2:
785 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
786 ARIZONA_CLK_32K_SRC_MASK,
787 arizona->pdata.clk32k_src - 1);
767c6dc0 788 arizona_clk32k_enable(arizona);
3cc72986
MB		 789 break;
790 case ARIZONA_32KZ_NONE:
791 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
792 ARIZONA_CLK_32K_SRC_MASK, 2);
793 break;
794 default:
795 dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n",
796 arizona->pdata.clk32k_src);
797 ret = -EINVAL;
59db9691 798 goto err_reset;
3cc72986
MB		 799 }
800
3d91f828 801 for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) {
544c7aad
MB		 802 if (!arizona->pdata.micbias[i].mV &&
803 !arizona->pdata.micbias[i].bypass)
3d91f828
MB		 804 continue;
805
544c7aad
MB		 806 /* Apply default for bypass mode */
807 if (!arizona->pdata.micbias[i].mV)
808 arizona->pdata.micbias[i].mV = 2800;
809
3d91f828 810 val = (arizona->pdata.micbias[i].mV - 1500) / 100;
544c7aad 811
3d91f828
MB		 812 val <<= ARIZONA_MICB1_LVL_SHIFT;
813
814 if (arizona->pdata.micbias[i].ext_cap)
815 val |= ARIZONA_MICB1_EXT_CAP;
816
817 if (arizona->pdata.micbias[i].discharge)
818 val |= ARIZONA_MICB1_DISCH;
819
820 if (arizona->pdata.micbias[i].fast_start)
821 val |= ARIZONA_MICB1_RATE;
822
544c7aad
MB		 823 if (arizona->pdata.micbias[i].bypass)
824 val |= ARIZONA_MICB1_BYPASS;
825
3d91f828
MB		 826 regmap_update_bits(arizona->regmap,
827 ARIZONA_MIC_BIAS_CTRL_1 + i,
828 ARIZONA_MICB1_LVL_MASK |
829 ARIZONA_MICB1_DISCH |
544c7aad 830 ARIZONA_MICB1_BYPASS |
3d91f828
MB		 831 ARIZONA_MICB1_RATE, val);
832 }
833
3cc72986
MB		 834 for (i = 0; i < ARIZONA_MAX_INPUT; i++) {
835 /* Default for both is 0 so noop with defaults */
836 val = arizona->pdata.dmic_ref[i]
837 << ARIZONA_IN1_DMIC_SUP_SHIFT;
838 val |= arizona->pdata.inmode[i] << ARIZONA_IN1_MODE_SHIFT;
839
840 regmap_update_bits(arizona->regmap,
841 ARIZONA_IN1L_CONTROL + (i * 8),
842 ARIZONA_IN1_DMIC_SUP_MASK |
843 ARIZONA_IN1_MODE_MASK, val);
844 }
845
846 for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) {
847 /* Default is 0 so noop with defaults */
848 if (arizona->pdata.out_mono[i])
849 val = ARIZONA_OUT1_MONO;
850 else
851 val = 0;
852
853 regmap_update_bits(arizona->regmap,
854 ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8),
855 ARIZONA_OUT1_MONO, val);
856 }
857
3cc72986
MB		 858 for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) {
859 if (arizona->pdata.spk_mute[i])
860 regmap_update_bits(arizona->regmap,
2a51da04 861 ARIZONA_PDM_SPK1_CTRL_1 + (i * 2),
3cc72986
MB		 862 ARIZONA_SPK1_MUTE_ENDIAN_MASK |
863 ARIZONA_SPK1_MUTE_SEQ1_MASK,
864 arizona->pdata.spk_mute[i]);
865
866 if (arizona->pdata.spk_fmt[i])
867 regmap_update_bits(arizona->regmap,
2a51da04 868 ARIZONA_PDM_SPK1_CTRL_2 + (i * 2),
3cc72986
MB		 869 ARIZONA_SPK1_FMT_MASK,
870 arizona->pdata.spk_fmt[i]);
871 }
872
873 /* Set up for interrupts */
874 ret = arizona_irq_init(arizona);
875 if (ret != 0)
59db9691 876 goto err_reset;
3cc72986
MB		 877
878 arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error",
879 arizona_clkgen_err, arizona);
880 arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked",
881 arizona_overclocked, arizona);
882 arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked",
883 arizona_underclocked, arizona);
884
885 switch (arizona->type) {
886 case WM5102:
887 ret = mfd_add_devices(arizona->dev, -1, wm5102_devs,
0848c94f 888 ARRAY_SIZE(wm5102_devs), NULL, 0, NULL);
e102befe
MB		 889 break;
890 case WM5110:
891 ret = mfd_add_devices(arizona->dev, -1, wm5110_devs,
78566afd 892 ARRAY_SIZE(wm5110_devs), NULL, 0, NULL);
3cc72986
MB		 893 break;
894 }
895
896 if (ret != 0) {
897 dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret);
898 goto err_irq;
899 }
900
59db9691
MB		 901#ifdef CONFIG_PM_RUNTIME
902 regulator_disable(arizona->dcvdd);
903#endif
904
3cc72986
MB		 905 return 0;
906
907err_irq:
908 arizona_irq_exit(arizona);
3cc72986
MB		 909err_reset:
910 if (arizona->pdata.reset) {
87d3af4a 911 gpio_set_value_cansleep(arizona->pdata.reset, 0);
3cc72986
MB		 912 gpio_free(arizona->pdata.reset);
913 }
59db9691 914 regulator_disable(arizona->dcvdd);
3cc72986 915err_enable:
3a36a0db 916 regulator_bulk_disable(arizona->num_core_supplies,
3cc72986
MB		 917 arizona->core_supplies);
918err_early:
919 mfd_remove_devices(dev);
920 return ret;
921}
922EXPORT_SYMBOL_GPL(arizona_dev_init);
923
4740f73f 924int arizona_dev_exit(struct arizona *arizona)
3cc72986
MB		 925{
926 mfd_remove_devices(arizona->dev);
927 arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona);
928 arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona);
929 arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona);
930 pm_runtime_disable(arizona->dev);
931 arizona_irq_exit(arizona);
1d017b6b
MB		 932 if (arizona->pdata.reset)
933 gpio_set_value_cansleep(arizona->pdata.reset, 0);
934 regulator_disable(arizona->dcvdd);
935 regulator_bulk_disable(ARRAY_SIZE(arizona->core_supplies),
936 arizona->core_supplies);
3cc72986
MB		 937 return 0;
938}
939EXPORT_SYMBOL_GPL(arizona_dev_exit);
Linux 6.x block layer and io_uring tree(s)