Commit | Line | Data |
---|---|---|
3cc72986 MB |
1 | /* |
2 | * Arizona core driver | |
3 | * | |
4 | * Copyright 2012 Wolfson Microelectronics plc | |
5 | * | |
6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/delay.h> | |
59db9691 | 14 | #include <linux/err.h> |
3cc72986 MB |
15 | #include <linux/gpio.h> |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/mfd/core.h> | |
18 | #include <linux/module.h> | |
d781009c MB |
19 | #include <linux/of.h> |
20 | #include <linux/of_device.h> | |
21 | #include <linux/of_gpio.h> | |
3cc72986 MB |
22 | #include <linux/pm_runtime.h> |
23 | #include <linux/regmap.h> | |
24 | #include <linux/regulator/consumer.h> | |
5927467d | 25 | #include <linux/regulator/machine.h> |
3cc72986 MB |
26 | #include <linux/slab.h> |
27 | ||
28 | #include <linux/mfd/arizona/core.h> | |
29 | #include <linux/mfd/arizona/registers.h> | |
30 | ||
31 | #include "arizona.h" | |
32 | ||
33 | static const char *wm5102_core_supplies[] = { | |
34 | "AVDD", | |
35 | "DBVDD1", | |
3cc72986 MB |
36 | }; |
37 | ||
38 | int arizona_clk32k_enable(struct arizona *arizona) | |
39 | { | |
40 | int ret = 0; | |
41 | ||
42 | mutex_lock(&arizona->clk_lock); | |
43 | ||
44 | arizona->clk32k_ref++; | |
45 | ||
247fa192 MB |
46 | if (arizona->clk32k_ref == 1) { |
47 | switch (arizona->pdata.clk32k_src) { | |
48 | case ARIZONA_32KZ_MCLK1: | |
49 | ret = pm_runtime_get_sync(arizona->dev); | |
50 | if (ret != 0) | |
51 | goto out; | |
52 | break; | |
53 | } | |
54 | ||
3cc72986 MB |
55 | ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, |
56 | ARIZONA_CLK_32K_ENA, | |
57 | ARIZONA_CLK_32K_ENA); | |
247fa192 | 58 | } |
3cc72986 | 59 | |
247fa192 | 60 | out: |
3cc72986 MB |
61 | if (ret != 0) |
62 | arizona->clk32k_ref--; | |
63 | ||
64 | mutex_unlock(&arizona->clk_lock); | |
65 | ||
66 | return ret; | |
67 | } | |
68 | EXPORT_SYMBOL_GPL(arizona_clk32k_enable); | |
69 | ||
70 | int arizona_clk32k_disable(struct arizona *arizona) | |
71 | { | |
72 | int ret = 0; | |
73 | ||
74 | mutex_lock(&arizona->clk_lock); | |
75 | ||
76 | BUG_ON(arizona->clk32k_ref <= 0); | |
77 | ||
78 | arizona->clk32k_ref--; | |
79 | ||
247fa192 | 80 | if (arizona->clk32k_ref == 0) { |
3cc72986 MB |
81 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, |
82 | ARIZONA_CLK_32K_ENA, 0); | |
83 | ||
247fa192 MB |
84 | switch (arizona->pdata.clk32k_src) { |
85 | case ARIZONA_32KZ_MCLK1: | |
86 | pm_runtime_put_sync(arizona->dev); | |
87 | break; | |
88 | } | |
89 | } | |
90 | ||
3cc72986 MB |
91 | mutex_unlock(&arizona->clk_lock); |
92 | ||
93 | return ret; | |
94 | } | |
95 | EXPORT_SYMBOL_GPL(arizona_clk32k_disable); | |
96 | ||
97 | static irqreturn_t arizona_clkgen_err(int irq, void *data) | |
98 | { | |
99 | struct arizona *arizona = data; | |
100 | ||
101 | dev_err(arizona->dev, "CLKGEN error\n"); | |
102 | ||
103 | return IRQ_HANDLED; | |
104 | } | |
105 | ||
106 | static irqreturn_t arizona_underclocked(int irq, void *data) | |
107 | { | |
108 | struct arizona *arizona = data; | |
109 | unsigned int val; | |
110 | int ret; | |
111 | ||
112 | ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8, | |
113 | &val); | |
114 | if (ret != 0) { | |
115 | dev_err(arizona->dev, "Failed to read underclock status: %d\n", | |
116 | ret); | |
117 | return IRQ_NONE; | |
118 | } | |
119 | ||
3cc72986 MB |
120 | if (val & ARIZONA_AIF3_UNDERCLOCKED_STS) |
121 | dev_err(arizona->dev, "AIF3 underclocked\n"); | |
122 | if (val & ARIZONA_AIF2_UNDERCLOCKED_STS) | |
3ebef34d CK |
123 | dev_err(arizona->dev, "AIF2 underclocked\n"); |
124 | if (val & ARIZONA_AIF1_UNDERCLOCKED_STS) | |
3cc72986 | 125 | dev_err(arizona->dev, "AIF1 underclocked\n"); |
6e440d27 CK |
126 | if (val & ARIZONA_ISRC3_UNDERCLOCKED_STS) |
127 | dev_err(arizona->dev, "ISRC3 underclocked\n"); | |
3cc72986 MB |
128 | if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS) |
129 | dev_err(arizona->dev, "ISRC2 underclocked\n"); | |
130 | if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS) | |
131 | dev_err(arizona->dev, "ISRC1 underclocked\n"); | |
132 | if (val & ARIZONA_FX_UNDERCLOCKED_STS) | |
133 | dev_err(arizona->dev, "FX underclocked\n"); | |
134 | if (val & ARIZONA_ASRC_UNDERCLOCKED_STS) | |
135 | dev_err(arizona->dev, "ASRC underclocked\n"); | |
136 | if (val & ARIZONA_DAC_UNDERCLOCKED_STS) | |
137 | dev_err(arizona->dev, "DAC underclocked\n"); | |
138 | if (val & ARIZONA_ADC_UNDERCLOCKED_STS) | |
139 | dev_err(arizona->dev, "ADC underclocked\n"); | |
140 | if (val & ARIZONA_MIXER_UNDERCLOCKED_STS) | |
648a9880 | 141 | dev_err(arizona->dev, "Mixer dropped sample\n"); |
3cc72986 MB |
142 | |
143 | return IRQ_HANDLED; | |
144 | } | |
145 | ||
146 | static irqreturn_t arizona_overclocked(int irq, void *data) | |
147 | { | |
148 | struct arizona *arizona = data; | |
149 | unsigned int val[2]; | |
150 | int ret; | |
151 | ||
152 | ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6, | |
153 | &val[0], 2); | |
154 | if (ret != 0) { | |
155 | dev_err(arizona->dev, "Failed to read overclock status: %d\n", | |
156 | ret); | |
157 | return IRQ_NONE; | |
158 | } | |
159 | ||
160 | if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS) | |
161 | dev_err(arizona->dev, "PWM overclocked\n"); | |
162 | if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS) | |
163 | dev_err(arizona->dev, "FX core overclocked\n"); | |
164 | if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS) | |
165 | dev_err(arizona->dev, "DAC SYS overclocked\n"); | |
166 | if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS) | |
167 | dev_err(arizona->dev, "DAC WARP overclocked\n"); | |
168 | if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS) | |
169 | dev_err(arizona->dev, "ADC overclocked\n"); | |
170 | if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS) | |
171 | dev_err(arizona->dev, "Mixer overclocked\n"); | |
172 | if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS) | |
173 | dev_err(arizona->dev, "AIF3 overclocked\n"); | |
174 | if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS) | |
175 | dev_err(arizona->dev, "AIF2 overclocked\n"); | |
176 | if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS) | |
177 | dev_err(arizona->dev, "AIF1 overclocked\n"); | |
178 | if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS) | |
179 | dev_err(arizona->dev, "Pad control overclocked\n"); | |
180 | ||
181 | if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS) | |
182 | dev_err(arizona->dev, "Slimbus subsystem overclocked\n"); | |
183 | if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS) | |
184 | dev_err(arizona->dev, "Slimbus async overclocked\n"); | |
185 | if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS) | |
186 | dev_err(arizona->dev, "Slimbus sync overclocked\n"); | |
187 | if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS) | |
188 | dev_err(arizona->dev, "ASRC async system overclocked\n"); | |
189 | if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS) | |
190 | dev_err(arizona->dev, "ASRC async WARP overclocked\n"); | |
191 | if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS) | |
192 | dev_err(arizona->dev, "ASRC sync system overclocked\n"); | |
193 | if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS) | |
194 | dev_err(arizona->dev, "ASRC sync WARP overclocked\n"); | |
195 | if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS) | |
196 | dev_err(arizona->dev, "DSP1 overclocked\n"); | |
6e440d27 CK |
197 | if (val[1] & ARIZONA_ISRC3_OVERCLOCKED_STS) |
198 | dev_err(arizona->dev, "ISRC3 overclocked\n"); | |
3cc72986 MB |
199 | if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS) |
200 | dev_err(arizona->dev, "ISRC2 overclocked\n"); | |
201 | if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS) | |
202 | dev_err(arizona->dev, "ISRC1 overclocked\n"); | |
203 | ||
204 | return IRQ_HANDLED; | |
205 | } | |
206 | ||
9d53dfdc CK |
207 | static int arizona_poll_reg(struct arizona *arizona, |
208 | int timeout, unsigned int reg, | |
209 | unsigned int mask, unsigned int target) | |
3cc72986 | 210 | { |
9d53dfdc | 211 | unsigned int val = 0; |
3cc72986 MB |
212 | int ret, i; |
213 | ||
9d53dfdc CK |
214 | for (i = 0; i < timeout; i++) { |
215 | ret = regmap_read(arizona->regmap, reg, &val); | |
3cc72986 | 216 | if (ret != 0) { |
9d53dfdc CK |
217 | dev_err(arizona->dev, "Failed to read reg %u: %d\n", |
218 | reg, ret); | |
cfe775ce | 219 | continue; |
3cc72986 MB |
220 | } |
221 | ||
9d53dfdc CK |
222 | if ((val & mask) == target) |
223 | return 0; | |
224 | ||
225 | msleep(1); | |
3cc72986 MB |
226 | } |
227 | ||
9d53dfdc CK |
228 | dev_err(arizona->dev, "Polling reg %u timed out: %x\n", reg, val); |
229 | return -ETIMEDOUT; | |
230 | } | |
231 | ||
232 | static int arizona_wait_for_boot(struct arizona *arizona) | |
233 | { | |
234 | int ret; | |
235 | ||
236 | /* | |
237 | * We can't use an interrupt as we need to runtime resume to do so, | |
238 | * we won't race with the interrupt handler as it'll be blocked on | |
239 | * runtime resume. | |
240 | */ | |
241 | ret = arizona_poll_reg(arizona, 5, ARIZONA_INTERRUPT_RAW_STATUS_5, | |
242 | ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS); | |
243 | ||
244 | if (!ret) | |
3cc72986 MB |
245 | regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5, |
246 | ARIZONA_BOOT_DONE_STS); | |
3cc72986 MB |
247 | |
248 | pm_runtime_mark_last_busy(arizona->dev); | |
249 | ||
9d53dfdc | 250 | return ret; |
3cc72986 MB |
251 | } |
252 | ||
2229875d CK |
253 | static inline void arizona_enable_reset(struct arizona *arizona) |
254 | { | |
255 | if (arizona->pdata.reset) | |
256 | gpio_set_value_cansleep(arizona->pdata.reset, 0); | |
257 | } | |
258 | ||
259 | static void arizona_disable_reset(struct arizona *arizona) | |
260 | { | |
261 | if (arizona->pdata.reset) { | |
121c075c CK |
262 | switch (arizona->type) { |
263 | case WM5110: | |
264 | case WM8280: | |
265 | /* Meet requirements for minimum reset duration */ | |
266 | msleep(5); | |
267 | break; | |
268 | default: | |
269 | break; | |
270 | } | |
271 | ||
2229875d CK |
272 | gpio_set_value_cansleep(arizona->pdata.reset, 1); |
273 | msleep(1); | |
274 | } | |
275 | } | |
276 | ||
3850e3ee CK |
277 | struct arizona_sysclk_state { |
278 | unsigned int fll; | |
279 | unsigned int sysclk; | |
280 | }; | |
281 | ||
282 | static int arizona_enable_freerun_sysclk(struct arizona *arizona, | |
283 | struct arizona_sysclk_state *state) | |
e80436bb | 284 | { |
e80436bb CK |
285 | int ret, err; |
286 | ||
e80436bb | 287 | /* Cache existing FLL and SYSCLK settings */ |
3850e3ee | 288 | ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &state->fll); |
0be068a0 | 289 | if (ret) { |
e80436bb CK |
290 | dev_err(arizona->dev, "Failed to cache FLL settings: %d\n", |
291 | ret); | |
292 | return ret; | |
293 | } | |
3850e3ee CK |
294 | ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, |
295 | &state->sysclk); | |
0be068a0 | 296 | if (ret) { |
e80436bb CK |
297 | dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n", |
298 | ret); | |
299 | return ret; | |
300 | } | |
301 | ||
302 | /* Start up SYSCLK using the FLL in free running mode */ | |
303 | ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, | |
304 | ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN); | |
0be068a0 | 305 | if (ret) { |
e80436bb CK |
306 | dev_err(arizona->dev, |
307 | "Failed to start FLL in freerunning mode: %d\n", | |
308 | ret); | |
309 | return ret; | |
310 | } | |
311 | ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5, | |
312 | ARIZONA_FLL1_CLOCK_OK_STS, | |
313 | ARIZONA_FLL1_CLOCK_OK_STS); | |
0be068a0 | 314 | if (ret) { |
e80436bb CK |
315 | ret = -ETIMEDOUT; |
316 | goto err_fll; | |
317 | } | |
318 | ||
319 | ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144); | |
0be068a0 | 320 | if (ret) { |
e80436bb CK |
321 | dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret); |
322 | goto err_fll; | |
323 | } | |
324 | ||
3850e3ee CK |
325 | return 0; |
326 | ||
327 | err_fll: | |
328 | err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll); | |
329 | if (err) | |
330 | dev_err(arizona->dev, | |
331 | "Failed to re-apply old FLL settings: %d\n", err); | |
332 | ||
333 | return ret; | |
334 | } | |
335 | ||
336 | static int arizona_disable_freerun_sysclk(struct arizona *arizona, | |
337 | struct arizona_sysclk_state *state) | |
338 | { | |
339 | int ret; | |
340 | ||
341 | ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, | |
342 | state->sysclk); | |
343 | if (ret) { | |
344 | dev_err(arizona->dev, | |
345 | "Failed to re-apply old SYSCLK settings: %d\n", ret); | |
346 | return ret; | |
347 | } | |
348 | ||
349 | ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll); | |
350 | if (ret) { | |
351 | dev_err(arizona->dev, | |
352 | "Failed to re-apply old FLL settings: %d\n", ret); | |
353 | return ret; | |
354 | } | |
355 | ||
356 | return 0; | |
357 | } | |
358 | ||
359 | static int wm5102_apply_hardware_patch(struct arizona *arizona) | |
360 | { | |
361 | struct arizona_sysclk_state state; | |
362 | int err, ret; | |
363 | ||
364 | ret = arizona_enable_freerun_sysclk(arizona, &state); | |
365 | if (ret) | |
366 | return ret; | |
367 | ||
e80436bb CK |
368 | /* Start the write sequencer and wait for it to finish */ |
369 | ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, | |
0be068a0 CK |
370 | ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160); |
371 | if (ret) { | |
e80436bb CK |
372 | dev_err(arizona->dev, "Failed to start write sequencer: %d\n", |
373 | ret); | |
3850e3ee | 374 | goto err; |
e80436bb | 375 | } |
3850e3ee | 376 | |
e80436bb CK |
377 | ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1, |
378 | ARIZONA_WSEQ_BUSY, 0); | |
0be068a0 | 379 | if (ret) { |
e80436bb | 380 | regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, |
0be068a0 | 381 | ARIZONA_WSEQ_ABORT); |
e80436bb CK |
382 | ret = -ETIMEDOUT; |
383 | } | |
384 | ||
3850e3ee CK |
385 | err: |
386 | err = arizona_disable_freerun_sysclk(arizona, &state); | |
e80436bb | 387 | |
0be068a0 | 388 | return ret ?: err; |
e80436bb CK |
389 | } |
390 | ||
882bc468 CK |
391 | /* |
392 | * Register patch to some of the CODECs internal write sequences | |
393 | * to ensure a clean exit from the low power sleep state. | |
394 | */ | |
395 | static const struct reg_default wm5110_sleep_patch[] = { | |
396 | { 0x337A, 0xC100 }, | |
397 | { 0x337B, 0x0041 }, | |
398 | { 0x3300, 0xA210 }, | |
399 | { 0x3301, 0x050C }, | |
400 | }; | |
401 | ||
402 | static int wm5110_apply_sleep_patch(struct arizona *arizona) | |
403 | { | |
404 | struct arizona_sysclk_state state; | |
405 | int err, ret; | |
406 | ||
407 | ret = arizona_enable_freerun_sysclk(arizona, &state); | |
408 | if (ret) | |
409 | return ret; | |
410 | ||
411 | ret = regmap_multi_reg_write_bypassed(arizona->regmap, | |
412 | wm5110_sleep_patch, | |
413 | ARRAY_SIZE(wm5110_sleep_patch)); | |
414 | ||
415 | err = arizona_disable_freerun_sysclk(arizona, &state); | |
416 | ||
417 | return ret ?: err; | |
418 | } | |
419 | ||
1c1c6bba CK |
420 | static int wm5102_clear_write_sequencer(struct arizona *arizona) |
421 | { | |
422 | int ret; | |
423 | ||
424 | ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_3, | |
425 | 0x0); | |
426 | if (ret) { | |
427 | dev_err(arizona->dev, | |
428 | "Failed to clear write sequencer state: %d\n", ret); | |
429 | return ret; | |
430 | } | |
431 | ||
432 | arizona_enable_reset(arizona); | |
433 | regulator_disable(arizona->dcvdd); | |
434 | ||
435 | msleep(20); | |
436 | ||
437 | ret = regulator_enable(arizona->dcvdd); | |
438 | if (ret) { | |
439 | dev_err(arizona->dev, "Failed to re-enable DCVDD: %d\n", ret); | |
440 | return ret; | |
441 | } | |
442 | arizona_disable_reset(arizona); | |
443 | ||
444 | return 0; | |
445 | } | |
446 | ||
48bb9fe4 | 447 | #ifdef CONFIG_PM |
3cc72986 MB |
448 | static int arizona_runtime_resume(struct device *dev) |
449 | { | |
450 | struct arizona *arizona = dev_get_drvdata(dev); | |
451 | int ret; | |
452 | ||
508c8299 MB |
453 | dev_dbg(arizona->dev, "Leaving AoD mode\n"); |
454 | ||
e6cb7341 CK |
455 | if (arizona->has_fully_powered_off) { |
456 | dev_dbg(arizona->dev, "Re-enabling core supplies\n"); | |
457 | ||
458 | ret = regulator_bulk_enable(arizona->num_core_supplies, | |
459 | arizona->core_supplies); | |
460 | if (ret) { | |
461 | dev_err(dev, "Failed to enable core supplies: %d\n", | |
462 | ret); | |
463 | return ret; | |
464 | } | |
465 | } | |
466 | ||
59db9691 MB |
467 | ret = regulator_enable(arizona->dcvdd); |
468 | if (ret != 0) { | |
469 | dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret); | |
e6cb7341 CK |
470 | if (arizona->has_fully_powered_off) |
471 | regulator_bulk_disable(arizona->num_core_supplies, | |
472 | arizona->core_supplies); | |
59db9691 MB |
473 | return ret; |
474 | } | |
3cc72986 | 475 | |
e6cb7341 CK |
476 | if (arizona->has_fully_powered_off) { |
477 | arizona_disable_reset(arizona); | |
478 | enable_irq(arizona->irq); | |
479 | arizona->has_fully_powered_off = false; | |
480 | } | |
481 | ||
3cc72986 MB |
482 | regcache_cache_only(arizona->regmap, false); |
483 | ||
4c9bb8bc CK |
484 | switch (arizona->type) { |
485 | case WM5102: | |
5927467d MB |
486 | if (arizona->external_dcvdd) { |
487 | ret = regmap_update_bits(arizona->regmap, | |
488 | ARIZONA_ISOLATION_CONTROL, | |
489 | ARIZONA_ISOLATE_DCVDD1, 0); | |
490 | if (ret != 0) { | |
491 | dev_err(arizona->dev, | |
492 | "Failed to connect DCVDD: %d\n", ret); | |
493 | goto err; | |
494 | } | |
495 | } | |
496 | ||
4c9bb8bc CK |
497 | ret = wm5102_patch(arizona); |
498 | if (ret != 0) { | |
499 | dev_err(arizona->dev, "Failed to apply patch: %d\n", | |
500 | ret); | |
501 | goto err; | |
502 | } | |
e80436bb | 503 | |
0be068a0 CK |
504 | ret = wm5102_apply_hardware_patch(arizona); |
505 | if (ret) { | |
e80436bb CK |
506 | dev_err(arizona->dev, |
507 | "Failed to apply hardware patch: %d\n", | |
508 | ret); | |
509 | goto err; | |
510 | } | |
511 | break; | |
96129a0e CK |
512 | case WM5110: |
513 | case WM8280: | |
514 | ret = arizona_wait_for_boot(arizona); | |
515 | if (ret) | |
516 | goto err; | |
517 | ||
518 | if (arizona->external_dcvdd) { | |
519 | ret = regmap_update_bits(arizona->regmap, | |
520 | ARIZONA_ISOLATION_CONTROL, | |
521 | ARIZONA_ISOLATE_DCVDD1, 0); | |
522 | if (ret) { | |
523 | dev_err(arizona->dev, | |
524 | "Failed to connect DCVDD: %d\n", ret); | |
525 | goto err; | |
526 | } | |
527 | } else { | |
528 | /* | |
529 | * As this is only called for the internal regulator | |
530 | * (where we know voltage ranges available) it is ok | |
531 | * to request an exact range. | |
532 | */ | |
533 | ret = regulator_set_voltage(arizona->dcvdd, | |
534 | 1200000, 1200000); | |
535 | if (ret < 0) { | |
536 | dev_err(arizona->dev, | |
537 | "Failed to set resume voltage: %d\n", | |
538 | ret); | |
539 | goto err; | |
540 | } | |
541 | } | |
e6cb7341 CK |
542 | |
543 | ret = wm5110_apply_sleep_patch(arizona); | |
544 | if (ret) { | |
545 | dev_err(arizona->dev, | |
546 | "Failed to re-apply sleep patch: %d\n", | |
547 | ret); | |
548 | goto err; | |
549 | } | |
96129a0e | 550 | break; |
e80436bb | 551 | default: |
12bb68ed CK |
552 | ret = arizona_wait_for_boot(arizona); |
553 | if (ret != 0) { | |
554 | goto err; | |
555 | } | |
556 | ||
5927467d MB |
557 | if (arizona->external_dcvdd) { |
558 | ret = regmap_update_bits(arizona->regmap, | |
559 | ARIZONA_ISOLATION_CONTROL, | |
560 | ARIZONA_ISOLATE_DCVDD1, 0); | |
561 | if (ret != 0) { | |
562 | dev_err(arizona->dev, | |
563 | "Failed to connect DCVDD: %d\n", ret); | |
564 | goto err; | |
565 | } | |
566 | } | |
e80436bb | 567 | break; |
4c9bb8bc CK |
568 | } |
569 | ||
9270bdf5 MB |
570 | ret = regcache_sync(arizona->regmap); |
571 | if (ret != 0) { | |
572 | dev_err(arizona->dev, "Failed to restore register cache\n"); | |
4816bd1c | 573 | goto err; |
9270bdf5 | 574 | } |
3cc72986 MB |
575 | |
576 | return 0; | |
4816bd1c MB |
577 | |
578 | err: | |
579 | regcache_cache_only(arizona->regmap, true); | |
580 | regulator_disable(arizona->dcvdd); | |
581 | return ret; | |
3cc72986 MB |
582 | } |
583 | ||
584 | static int arizona_runtime_suspend(struct device *dev) | |
585 | { | |
586 | struct arizona *arizona = dev_get_drvdata(dev); | |
e6cb7341 | 587 | unsigned int val; |
5927467d | 588 | int ret; |
3cc72986 | 589 | |
508c8299 MB |
590 | dev_dbg(arizona->dev, "Entering AoD mode\n"); |
591 | ||
e6cb7341 CK |
592 | ret = regmap_read(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, &val); |
593 | if (ret) { | |
594 | dev_err(dev, "Failed to check jack det status: %d\n", ret); | |
595 | return ret; | |
596 | } | |
597 | ||
5927467d MB |
598 | if (arizona->external_dcvdd) { |
599 | ret = regmap_update_bits(arizona->regmap, | |
600 | ARIZONA_ISOLATION_CONTROL, | |
601 | ARIZONA_ISOLATE_DCVDD1, | |
602 | ARIZONA_ISOLATE_DCVDD1); | |
603 | if (ret != 0) { | |
604 | dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n", | |
605 | ret); | |
606 | return ret; | |
607 | } | |
e6cb7341 CK |
608 | } |
609 | ||
610 | switch (arizona->type) { | |
611 | case WM5110: | |
612 | case WM8280: | |
613 | if (arizona->external_dcvdd) | |
614 | break; | |
615 | ||
616 | /* | |
617 | * As this is only called for the internal regulator | |
618 | * (where we know voltage ranges available) it is ok | |
619 | * to request an exact range. | |
620 | */ | |
621 | ret = regulator_set_voltage(arizona->dcvdd, 1175000, 1175000); | |
622 | if (ret < 0) { | |
623 | dev_err(arizona->dev, | |
624 | "Failed to set suspend voltage: %d\n", ret); | |
625 | return ret; | |
626 | } | |
627 | break; | |
628 | case WM5102: | |
629 | if (!(val & ARIZONA_JD1_ENA)) { | |
630 | ret = regmap_write(arizona->regmap, | |
631 | ARIZONA_WRITE_SEQUENCER_CTRL_3, 0x0); | |
632 | if (ret) { | |
96129a0e | 633 | dev_err(arizona->dev, |
e6cb7341 | 634 | "Failed to clear write sequencer: %d\n", |
96129a0e CK |
635 | ret); |
636 | return ret; | |
637 | } | |
96129a0e | 638 | } |
e6cb7341 CK |
639 | break; |
640 | default: | |
641 | break; | |
5927467d MB |
642 | } |
643 | ||
59db9691 MB |
644 | regcache_cache_only(arizona->regmap, true); |
645 | regcache_mark_dirty(arizona->regmap); | |
e293e847 | 646 | regulator_disable(arizona->dcvdd); |
3cc72986 | 647 | |
e6cb7341 CK |
648 | /* Allow us to completely power down if no jack detection */ |
649 | if (!(val & ARIZONA_JD1_ENA)) { | |
650 | dev_dbg(arizona->dev, "Fully powering off\n"); | |
651 | ||
652 | arizona->has_fully_powered_off = true; | |
653 | ||
16f6a0df | 654 | disable_irq_nosync(arizona->irq); |
e6cb7341 CK |
655 | arizona_enable_reset(arizona); |
656 | regulator_bulk_disable(arizona->num_core_supplies, | |
657 | arizona->core_supplies); | |
658 | } | |
659 | ||
3cc72986 MB |
660 | return 0; |
661 | } | |
662 | #endif | |
663 | ||
dc781d0e | 664 | #ifdef CONFIG_PM_SLEEP |
67c99296 MB |
665 | static int arizona_suspend(struct device *dev) |
666 | { | |
667 | struct arizona *arizona = dev_get_drvdata(dev); | |
668 | ||
669 | dev_dbg(arizona->dev, "Suspend, disabling IRQ\n"); | |
670 | disable_irq(arizona->irq); | |
671 | ||
672 | return 0; | |
673 | } | |
674 | ||
675 | static int arizona_suspend_late(struct device *dev) | |
676 | { | |
677 | struct arizona *arizona = dev_get_drvdata(dev); | |
678 | ||
679 | dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n"); | |
680 | enable_irq(arizona->irq); | |
681 | ||
682 | return 0; | |
683 | } | |
684 | ||
dc781d0e MB |
685 | static int arizona_resume_noirq(struct device *dev) |
686 | { | |
687 | struct arizona *arizona = dev_get_drvdata(dev); | |
688 | ||
689 | dev_dbg(arizona->dev, "Early resume, disabling IRQ\n"); | |
690 | disable_irq(arizona->irq); | |
691 | ||
692 | return 0; | |
693 | } | |
694 | ||
695 | static int arizona_resume(struct device *dev) | |
696 | { | |
697 | struct arizona *arizona = dev_get_drvdata(dev); | |
698 | ||
699 | dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n"); | |
700 | enable_irq(arizona->irq); | |
701 | ||
702 | return 0; | |
703 | } | |
704 | #endif | |
705 | ||
3cc72986 MB |
706 | const struct dev_pm_ops arizona_pm_ops = { |
707 | SET_RUNTIME_PM_OPS(arizona_runtime_suspend, | |
708 | arizona_runtime_resume, | |
709 | NULL) | |
67c99296 | 710 | SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume) |
dc781d0e | 711 | #ifdef CONFIG_PM_SLEEP |
67c99296 | 712 | .suspend_late = arizona_suspend_late, |
dc781d0e MB |
713 | .resume_noirq = arizona_resume_noirq, |
714 | #endif | |
3cc72986 MB |
715 | }; |
716 | EXPORT_SYMBOL_GPL(arizona_pm_ops); | |
717 | ||
d781009c | 718 | #ifdef CONFIG_OF |
942786e6 | 719 | unsigned long arizona_of_get_type(struct device *dev) |
d781009c MB |
720 | { |
721 | const struct of_device_id *id = of_match_device(arizona_of_match, dev); | |
722 | ||
723 | if (id) | |
942786e6 | 724 | return (unsigned long)id->data; |
d781009c MB |
725 | else |
726 | return 0; | |
727 | } | |
728 | EXPORT_SYMBOL_GPL(arizona_of_get_type); | |
729 | ||
e4fcb1d6 CK |
730 | int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop, |
731 | bool mandatory) | |
732 | { | |
733 | int gpio; | |
734 | ||
735 | gpio = of_get_named_gpio(arizona->dev->of_node, prop, 0); | |
736 | if (gpio < 0) { | |
737 | if (mandatory) | |
738 | dev_err(arizona->dev, | |
739 | "Mandatory DT gpio %s missing/malformed: %d\n", | |
740 | prop, gpio); | |
741 | ||
742 | gpio = 0; | |
743 | } | |
744 | ||
745 | return gpio; | |
746 | } | |
747 | EXPORT_SYMBOL_GPL(arizona_of_get_named_gpio); | |
748 | ||
d781009c MB |
749 | static int arizona_of_get_core_pdata(struct arizona *arizona) |
750 | { | |
e4fcb1d6 | 751 | struct arizona_pdata *pdata = &arizona->pdata; |
cc47aed9 IS |
752 | struct property *prop; |
753 | const __be32 *cur; | |
754 | u32 val; | |
d781009c | 755 | int ret, i; |
cc47aed9 | 756 | int count = 0; |
d781009c | 757 | |
e4fcb1d6 | 758 | pdata->reset = arizona_of_get_named_gpio(arizona, "wlf,reset", true); |
d781009c MB |
759 | |
760 | ret = of_property_read_u32_array(arizona->dev->of_node, | |
761 | "wlf,gpio-defaults", | |
762 | arizona->pdata.gpio_defaults, | |
763 | ARRAY_SIZE(arizona->pdata.gpio_defaults)); | |
764 | if (ret >= 0) { | |
765 | /* | |
766 | * All values are literal except out of range values | |
767 | * which are chip default, translate into platform | |
768 | * data which uses 0 as chip default and out of range | |
769 | * as zero. | |
770 | */ | |
771 | for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) { | |
772 | if (arizona->pdata.gpio_defaults[i] > 0xffff) | |
773 | arizona->pdata.gpio_defaults[i] = 0; | |
91c73935 | 774 | else if (arizona->pdata.gpio_defaults[i] == 0) |
d781009c MB |
775 | arizona->pdata.gpio_defaults[i] = 0x10000; |
776 | } | |
777 | } else { | |
778 | dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n", | |
779 | ret); | |
780 | } | |
781 | ||
cc47aed9 IS |
782 | of_property_for_each_u32(arizona->dev->of_node, "wlf,inmode", prop, |
783 | cur, val) { | |
784 | if (count == ARRAY_SIZE(arizona->pdata.inmode)) | |
785 | break; | |
786 | ||
787 | arizona->pdata.inmode[count] = val; | |
788 | count++; | |
789 | } | |
790 | ||
e7ad27ca CK |
791 | count = 0; |
792 | of_property_for_each_u32(arizona->dev->of_node, "wlf,dmic-ref", prop, | |
793 | cur, val) { | |
794 | if (count == ARRAY_SIZE(arizona->pdata.dmic_ref)) | |
795 | break; | |
796 | ||
797 | arizona->pdata.dmic_ref[count] = val; | |
798 | count++; | |
799 | } | |
800 | ||
d781009c MB |
801 | return 0; |
802 | } | |
803 | ||
804 | const struct of_device_id arizona_of_match[] = { | |
805 | { .compatible = "wlf,wm5102", .data = (void *)WM5102 }, | |
806 | { .compatible = "wlf,wm5110", .data = (void *)WM5110 }, | |
e5d4ef0d | 807 | { .compatible = "wlf,wm8280", .data = (void *)WM8280 }, |
dc7d4863 | 808 | { .compatible = "wlf,wm8997", .data = (void *)WM8997 }, |
d781009c MB |
809 | {}, |
810 | }; | |
811 | EXPORT_SYMBOL_GPL(arizona_of_match); | |
812 | #else | |
813 | static inline int arizona_of_get_core_pdata(struct arizona *arizona) | |
814 | { | |
815 | return 0; | |
816 | } | |
817 | #endif | |
818 | ||
5ac98553 | 819 | static const struct mfd_cell early_devs[] = { |
3cc72986 MB |
820 | { .name = "arizona-ldo1" }, |
821 | }; | |
822 | ||
32dadef2 | 823 | static const char *wm5102_supplies[] = { |
5fc6c396 | 824 | "MICVDD", |
32dadef2 CK |
825 | "DBVDD2", |
826 | "DBVDD3", | |
827 | "CPVDD", | |
828 | "SPKVDDL", | |
829 | "SPKVDDR", | |
830 | }; | |
831 | ||
5ac98553 | 832 | static const struct mfd_cell wm5102_devs[] = { |
d7768111 | 833 | { .name = "arizona-micsupp" }, |
5fc6c396 CK |
834 | { |
835 | .name = "arizona-extcon", | |
836 | .parent_supplies = wm5102_supplies, | |
837 | .num_parent_supplies = 1, /* We only need MICVDD */ | |
838 | }, | |
3cc72986 | 839 | { .name = "arizona-gpio" }, |
503b1cac | 840 | { .name = "arizona-haptics" }, |
3cc72986 | 841 | { .name = "arizona-pwm" }, |
32dadef2 CK |
842 | { |
843 | .name = "wm5102-codec", | |
844 | .parent_supplies = wm5102_supplies, | |
845 | .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), | |
846 | }, | |
3cc72986 MB |
847 | }; |
848 | ||
5ac98553 | 849 | static const struct mfd_cell wm5110_devs[] = { |
d7768111 | 850 | { .name = "arizona-micsupp" }, |
5fc6c396 CK |
851 | { |
852 | .name = "arizona-extcon", | |
853 | .parent_supplies = wm5102_supplies, | |
854 | .num_parent_supplies = 1, /* We only need MICVDD */ | |
855 | }, | |
e102befe | 856 | { .name = "arizona-gpio" }, |
503b1cac | 857 | { .name = "arizona-haptics" }, |
e102befe | 858 | { .name = "arizona-pwm" }, |
32dadef2 CK |
859 | { |
860 | .name = "wm5110-codec", | |
861 | .parent_supplies = wm5102_supplies, | |
862 | .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), | |
863 | }, | |
864 | }; | |
865 | ||
866 | static const char *wm8997_supplies[] = { | |
996c2d4f | 867 | "MICVDD", |
32dadef2 CK |
868 | "DBVDD2", |
869 | "CPVDD", | |
870 | "SPKVDD", | |
e102befe MB |
871 | }; |
872 | ||
5ac98553 | 873 | static const struct mfd_cell wm8997_devs[] = { |
dc7d4863 | 874 | { .name = "arizona-micsupp" }, |
5fc6c396 CK |
875 | { |
876 | .name = "arizona-extcon", | |
877 | .parent_supplies = wm8997_supplies, | |
878 | .num_parent_supplies = 1, /* We only need MICVDD */ | |
879 | }, | |
dc7d4863 CK |
880 | { .name = "arizona-gpio" }, |
881 | { .name = "arizona-haptics" }, | |
882 | { .name = "arizona-pwm" }, | |
32dadef2 CK |
883 | { |
884 | .name = "wm8997-codec", | |
885 | .parent_supplies = wm8997_supplies, | |
886 | .num_parent_supplies = ARRAY_SIZE(wm8997_supplies), | |
887 | }, | |
dc7d4863 CK |
888 | }; |
889 | ||
f791be49 | 890 | int arizona_dev_init(struct arizona *arizona) |
3cc72986 MB |
891 | { |
892 | struct device *dev = arizona->dev; | |
893 | const char *type_name; | |
894 | unsigned int reg, val; | |
62d62b59 | 895 | int (*apply_patch)(struct arizona *) = NULL; |
3cc72986 MB |
896 | int ret, i; |
897 | ||
898 | dev_set_drvdata(arizona->dev, arizona); | |
899 | mutex_init(&arizona->clk_lock); | |
900 | ||
901 | if (dev_get_platdata(arizona->dev)) | |
902 | memcpy(&arizona->pdata, dev_get_platdata(arizona->dev), | |
903 | sizeof(arizona->pdata)); | |
22d7dc8a LJ |
904 | else |
905 | arizona_of_get_core_pdata(arizona); | |
3cc72986 MB |
906 | |
907 | regcache_cache_only(arizona->regmap, true); | |
908 | ||
909 | switch (arizona->type) { | |
910 | case WM5102: | |
e102befe | 911 | case WM5110: |
e5d4ef0d | 912 | case WM8280: |
dc7d4863 | 913 | case WM8997: |
3cc72986 MB |
914 | for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++) |
915 | arizona->core_supplies[i].supply | |
916 | = wm5102_core_supplies[i]; | |
917 | arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies); | |
918 | break; | |
919 | default: | |
920 | dev_err(arizona->dev, "Unknown device type %d\n", | |
921 | arizona->type); | |
922 | return -EINVAL; | |
923 | } | |
924 | ||
4a8c475f CK |
925 | /* Mark DCVDD as external, LDO1 driver will clear if internal */ |
926 | arizona->external_dcvdd = true; | |
927 | ||
3cc72986 | 928 | ret = mfd_add_devices(arizona->dev, -1, early_devs, |
0848c94f | 929 | ARRAY_SIZE(early_devs), NULL, 0, NULL); |
3cc72986 MB |
930 | if (ret != 0) { |
931 | dev_err(dev, "Failed to add early children: %d\n", ret); | |
932 | return ret; | |
933 | } | |
934 | ||
935 | ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies, | |
936 | arizona->core_supplies); | |
937 | if (ret != 0) { | |
938 | dev_err(dev, "Failed to request core supplies: %d\n", | |
939 | ret); | |
940 | goto err_early; | |
941 | } | |
942 | ||
0c2d0ffb CK |
943 | /** |
944 | * Don't use devres here because the only device we have to get | |
945 | * against is the MFD device and DCVDD will likely be supplied by | |
946 | * one of its children. Meaning that the regulator will be | |
947 | * destroyed by the time devres calls regulator put. | |
948 | */ | |
e6021511 | 949 | arizona->dcvdd = regulator_get(arizona->dev, "DCVDD"); |
59db9691 MB |
950 | if (IS_ERR(arizona->dcvdd)) { |
951 | ret = PTR_ERR(arizona->dcvdd); | |
952 | dev_err(dev, "Failed to request DCVDD: %d\n", ret); | |
953 | goto err_early; | |
954 | } | |
955 | ||
87d3af4a MB |
956 | if (arizona->pdata.reset) { |
957 | /* Start out with /RESET low to put the chip into reset */ | |
5f056bf0 CK |
958 | ret = devm_gpio_request_one(arizona->dev, arizona->pdata.reset, |
959 | GPIOF_DIR_OUT | GPIOF_INIT_LOW, | |
960 | "arizona /RESET"); | |
87d3af4a MB |
961 | if (ret != 0) { |
962 | dev_err(dev, "Failed to request /RESET: %d\n", ret); | |
e6021511 | 963 | goto err_dcvdd; |
87d3af4a MB |
964 | } |
965 | } | |
966 | ||
3cc72986 MB |
967 | ret = regulator_bulk_enable(arizona->num_core_supplies, |
968 | arizona->core_supplies); | |
969 | if (ret != 0) { | |
970 | dev_err(dev, "Failed to enable core supplies: %d\n", | |
971 | ret); | |
e6021511 | 972 | goto err_dcvdd; |
3cc72986 MB |
973 | } |
974 | ||
59db9691 MB |
975 | ret = regulator_enable(arizona->dcvdd); |
976 | if (ret != 0) { | |
977 | dev_err(dev, "Failed to enable DCVDD: %d\n", ret); | |
978 | goto err_enable; | |
979 | } | |
980 | ||
2229875d | 981 | arizona_disable_reset(arizona); |
3cc72986 | 982 | |
3cc72986 MB |
983 | regcache_cache_only(arizona->regmap, false); |
984 | ||
ca76ceb8 | 985 | /* Verify that this is a chip we know about */ |
3cc72986 MB |
986 | ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); |
987 | if (ret != 0) { | |
988 | dev_err(dev, "Failed to read ID register: %d\n", ret); | |
59db9691 | 989 | goto err_reset; |
3cc72986 MB |
990 | } |
991 | ||
3cc72986 MB |
992 | switch (reg) { |
993 | case 0x5102: | |
e102befe | 994 | case 0x5110: |
dc7d4863 | 995 | case 0x8997: |
e102befe | 996 | break; |
3cc72986 | 997 | default: |
ca76ceb8 | 998 | dev_err(arizona->dev, "Unknown device ID: %x\n", reg); |
59db9691 | 999 | goto err_reset; |
3cc72986 MB |
1000 | } |
1001 | ||
3cc72986 MB |
1002 | /* If we have a /RESET GPIO we'll already be reset */ |
1003 | if (!arizona->pdata.reset) { | |
1004 | ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0); | |
1005 | if (ret != 0) { | |
1006 | dev_err(dev, "Failed to reset device: %d\n", ret); | |
59db9691 | 1007 | goto err_reset; |
3cc72986 | 1008 | } |
46b9d13a | 1009 | |
c25feaa5 | 1010 | msleep(1); |
3cc72986 MB |
1011 | } |
1012 | ||
ca76ceb8 | 1013 | /* Ensure device startup is complete */ |
d955cba8 CK |
1014 | switch (arizona->type) { |
1015 | case WM5102: | |
48018943 MB |
1016 | ret = regmap_read(arizona->regmap, |
1017 | ARIZONA_WRITE_SEQUENCER_CTRL_3, &val); | |
1c1c6bba | 1018 | if (ret) { |
d955cba8 CK |
1019 | dev_err(dev, |
1020 | "Failed to check write sequencer state: %d\n", | |
1021 | ret); | |
1c1c6bba CK |
1022 | } else if (val & 0x01) { |
1023 | ret = wm5102_clear_write_sequencer(arizona); | |
1024 | if (ret) | |
1025 | return ret; | |
d955cba8 CK |
1026 | } |
1027 | break; | |
1c1c6bba CK |
1028 | default: |
1029 | break; | |
1030 | } | |
1031 | ||
1032 | ret = arizona_wait_for_boot(arizona); | |
1033 | if (ret) { | |
1034 | dev_err(arizona->dev, "Device failed initial boot: %d\n", ret); | |
1035 | goto err_reset; | |
af65a361 | 1036 | } |
3cc72986 | 1037 | |
ca76ceb8 MB |
1038 | /* Read the device ID information & do device specific stuff */ |
1039 | ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); | |
1040 | if (ret != 0) { | |
1041 | dev_err(dev, "Failed to read ID register: %d\n", ret); | |
1042 | goto err_reset; | |
1043 | } | |
1044 | ||
1045 | ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION, | |
1046 | &arizona->rev); | |
1047 | if (ret != 0) { | |
1048 | dev_err(dev, "Failed to read revision register: %d\n", ret); | |
1049 | goto err_reset; | |
1050 | } | |
1051 | arizona->rev &= ARIZONA_DEVICE_REVISION_MASK; | |
1052 | ||
1053 | switch (reg) { | |
1054 | #ifdef CONFIG_MFD_WM5102 | |
1055 | case 0x5102: | |
1056 | type_name = "WM5102"; | |
1057 | if (arizona->type != WM5102) { | |
1058 | dev_err(arizona->dev, "WM5102 registered as %d\n", | |
1059 | arizona->type); | |
1060 | arizona->type = WM5102; | |
1061 | } | |
1062 | apply_patch = wm5102_patch; | |
1063 | arizona->rev &= 0x7; | |
1064 | break; | |
1065 | #endif | |
1066 | #ifdef CONFIG_MFD_WM5110 | |
1067 | case 0x5110: | |
e5d4ef0d RF |
1068 | switch (arizona->type) { |
1069 | case WM5110: | |
1070 | type_name = "WM5110"; | |
1071 | break; | |
1072 | case WM8280: | |
1073 | type_name = "WM8280"; | |
1074 | break; | |
1075 | default: | |
1076 | type_name = "WM5110"; | |
ca76ceb8 MB |
1077 | dev_err(arizona->dev, "WM5110 registered as %d\n", |
1078 | arizona->type); | |
1079 | arizona->type = WM5110; | |
e5d4ef0d | 1080 | break; |
ca76ceb8 MB |
1081 | } |
1082 | apply_patch = wm5110_patch; | |
1083 | break; | |
dc7d4863 CK |
1084 | #endif |
1085 | #ifdef CONFIG_MFD_WM8997 | |
1086 | case 0x8997: | |
1087 | type_name = "WM8997"; | |
1088 | if (arizona->type != WM8997) { | |
1089 | dev_err(arizona->dev, "WM8997 registered as %d\n", | |
1090 | arizona->type); | |
1091 | arizona->type = WM8997; | |
1092 | } | |
1093 | apply_patch = wm8997_patch; | |
1094 | break; | |
ca76ceb8 MB |
1095 | #endif |
1096 | default: | |
1097 | dev_err(arizona->dev, "Unknown device ID %x\n", reg); | |
1098 | goto err_reset; | |
1099 | } | |
1100 | ||
1101 | dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A'); | |
1102 | ||
62d62b59 MB |
1103 | if (apply_patch) { |
1104 | ret = apply_patch(arizona); | |
1105 | if (ret != 0) { | |
1106 | dev_err(arizona->dev, "Failed to apply patch: %d\n", | |
1107 | ret); | |
1108 | goto err_reset; | |
1109 | } | |
e80436bb CK |
1110 | |
1111 | switch (arizona->type) { | |
1112 | case WM5102: | |
0be068a0 CK |
1113 | ret = wm5102_apply_hardware_patch(arizona); |
1114 | if (ret) { | |
e80436bb CK |
1115 | dev_err(arizona->dev, |
1116 | "Failed to apply hardware patch: %d\n", | |
1117 | ret); | |
1118 | goto err_reset; | |
1119 | } | |
1120 | break; | |
882bc468 CK |
1121 | case WM5110: |
1122 | case WM8280: | |
1123 | ret = wm5110_apply_sleep_patch(arizona); | |
1124 | if (ret) { | |
1125 | dev_err(arizona->dev, | |
1126 | "Failed to apply sleep patch: %d\n", | |
1127 | ret); | |
1128 | goto err_reset; | |
1129 | } | |
1130 | break; | |
e80436bb CK |
1131 | default: |
1132 | break; | |
1133 | } | |
62d62b59 MB |
1134 | } |
1135 | ||
3cc72986 MB |
1136 | for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) { |
1137 | if (!arizona->pdata.gpio_defaults[i]) | |
1138 | continue; | |
1139 | ||
1140 | regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i, | |
1141 | arizona->pdata.gpio_defaults[i]); | |
1142 | } | |
1143 | ||
1144 | pm_runtime_set_autosuspend_delay(arizona->dev, 100); | |
1145 | pm_runtime_use_autosuspend(arizona->dev); | |
1146 | pm_runtime_enable(arizona->dev); | |
1147 | ||
1148 | /* Chip default */ | |
1149 | if (!arizona->pdata.clk32k_src) | |
1150 | arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2; | |
1151 | ||
1152 | switch (arizona->pdata.clk32k_src) { | |
1153 | case ARIZONA_32KZ_MCLK1: | |
1154 | case ARIZONA_32KZ_MCLK2: | |
1155 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, | |
1156 | ARIZONA_CLK_32K_SRC_MASK, | |
1157 | arizona->pdata.clk32k_src - 1); | |
767c6dc0 | 1158 | arizona_clk32k_enable(arizona); |
3cc72986 MB |
1159 | break; |
1160 | case ARIZONA_32KZ_NONE: | |
1161 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, | |
1162 | ARIZONA_CLK_32K_SRC_MASK, 2); | |
1163 | break; | |
1164 | default: | |
1165 | dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n", | |
1166 | arizona->pdata.clk32k_src); | |
1167 | ret = -EINVAL; | |
59db9691 | 1168 | goto err_reset; |
3cc72986 MB |
1169 | } |
1170 | ||
3d91f828 | 1171 | for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) { |
544c7aad MB |
1172 | if (!arizona->pdata.micbias[i].mV && |
1173 | !arizona->pdata.micbias[i].bypass) | |
3d91f828 MB |
1174 | continue; |
1175 | ||
544c7aad MB |
1176 | /* Apply default for bypass mode */ |
1177 | if (!arizona->pdata.micbias[i].mV) | |
1178 | arizona->pdata.micbias[i].mV = 2800; | |
1179 | ||
3d91f828 | 1180 | val = (arizona->pdata.micbias[i].mV - 1500) / 100; |
544c7aad | 1181 | |
3d91f828 MB |
1182 | val <<= ARIZONA_MICB1_LVL_SHIFT; |
1183 | ||
1184 | if (arizona->pdata.micbias[i].ext_cap) | |
1185 | val |= ARIZONA_MICB1_EXT_CAP; | |
1186 | ||
1187 | if (arizona->pdata.micbias[i].discharge) | |
1188 | val |= ARIZONA_MICB1_DISCH; | |
1189 | ||
f773fc6d | 1190 | if (arizona->pdata.micbias[i].soft_start) |
3d91f828 MB |
1191 | val |= ARIZONA_MICB1_RATE; |
1192 | ||
544c7aad MB |
1193 | if (arizona->pdata.micbias[i].bypass) |
1194 | val |= ARIZONA_MICB1_BYPASS; | |
1195 | ||
3d91f828 MB |
1196 | regmap_update_bits(arizona->regmap, |
1197 | ARIZONA_MIC_BIAS_CTRL_1 + i, | |
1198 | ARIZONA_MICB1_LVL_MASK | | |
71d134b9 | 1199 | ARIZONA_MICB1_EXT_CAP | |
3d91f828 | 1200 | ARIZONA_MICB1_DISCH | |
544c7aad | 1201 | ARIZONA_MICB1_BYPASS | |
3d91f828 MB |
1202 | ARIZONA_MICB1_RATE, val); |
1203 | } | |
1204 | ||
3cc72986 MB |
1205 | for (i = 0; i < ARIZONA_MAX_INPUT; i++) { |
1206 | /* Default for both is 0 so noop with defaults */ | |
1207 | val = arizona->pdata.dmic_ref[i] | |
1208 | << ARIZONA_IN1_DMIC_SUP_SHIFT; | |
fc027d13 RF |
1209 | if (arizona->pdata.inmode[i] & ARIZONA_INMODE_DMIC) |
1210 | val |= 1 << ARIZONA_IN1_MODE_SHIFT; | |
1211 | if (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE) | |
1212 | val |= 1 << ARIZONA_IN1_SINGLE_ENDED_SHIFT; | |
3cc72986 MB |
1213 | |
1214 | regmap_update_bits(arizona->regmap, | |
1215 | ARIZONA_IN1L_CONTROL + (i * 8), | |
1216 | ARIZONA_IN1_DMIC_SUP_MASK | | |
fc027d13 RF |
1217 | ARIZONA_IN1_MODE_MASK | |
1218 | ARIZONA_IN1_SINGLE_ENDED_MASK, val); | |
3cc72986 MB |
1219 | } |
1220 | ||
1221 | for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) { | |
1222 | /* Default is 0 so noop with defaults */ | |
1223 | if (arizona->pdata.out_mono[i]) | |
1224 | val = ARIZONA_OUT1_MONO; | |
1225 | else | |
1226 | val = 0; | |
1227 | ||
1228 | regmap_update_bits(arizona->regmap, | |
1229 | ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8), | |
1230 | ARIZONA_OUT1_MONO, val); | |
1231 | } | |
1232 | ||
3cc72986 MB |
1233 | for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) { |
1234 | if (arizona->pdata.spk_mute[i]) | |
1235 | regmap_update_bits(arizona->regmap, | |
2a51da04 | 1236 | ARIZONA_PDM_SPK1_CTRL_1 + (i * 2), |
3cc72986 MB |
1237 | ARIZONA_SPK1_MUTE_ENDIAN_MASK | |
1238 | ARIZONA_SPK1_MUTE_SEQ1_MASK, | |
1239 | arizona->pdata.spk_mute[i]); | |
1240 | ||
1241 | if (arizona->pdata.spk_fmt[i]) | |
1242 | regmap_update_bits(arizona->regmap, | |
2a51da04 | 1243 | ARIZONA_PDM_SPK1_CTRL_2 + (i * 2), |
3cc72986 MB |
1244 | ARIZONA_SPK1_FMT_MASK, |
1245 | arizona->pdata.spk_fmt[i]); | |
1246 | } | |
1247 | ||
1248 | /* Set up for interrupts */ | |
1249 | ret = arizona_irq_init(arizona); | |
1250 | if (ret != 0) | |
59db9691 | 1251 | goto err_reset; |
3cc72986 MB |
1252 | |
1253 | arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error", | |
1254 | arizona_clkgen_err, arizona); | |
1255 | arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked", | |
1256 | arizona_overclocked, arizona); | |
1257 | arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked", | |
1258 | arizona_underclocked, arizona); | |
1259 | ||
1260 | switch (arizona->type) { | |
1261 | case WM5102: | |
1262 | ret = mfd_add_devices(arizona->dev, -1, wm5102_devs, | |
0848c94f | 1263 | ARRAY_SIZE(wm5102_devs), NULL, 0, NULL); |
e102befe MB |
1264 | break; |
1265 | case WM5110: | |
e5d4ef0d | 1266 | case WM8280: |
e102befe | 1267 | ret = mfd_add_devices(arizona->dev, -1, wm5110_devs, |
78566afd | 1268 | ARRAY_SIZE(wm5110_devs), NULL, 0, NULL); |
3cc72986 | 1269 | break; |
dc7d4863 CK |
1270 | case WM8997: |
1271 | ret = mfd_add_devices(arizona->dev, -1, wm8997_devs, | |
1272 | ARRAY_SIZE(wm8997_devs), NULL, 0, NULL); | |
1273 | break; | |
3cc72986 MB |
1274 | } |
1275 | ||
1276 | if (ret != 0) { | |
1277 | dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret); | |
1278 | goto err_irq; | |
1279 | } | |
1280 | ||
48bb9fe4 | 1281 | #ifdef CONFIG_PM |
59db9691 MB |
1282 | regulator_disable(arizona->dcvdd); |
1283 | #endif | |
1284 | ||
3cc72986 MB |
1285 | return 0; |
1286 | ||
1287 | err_irq: | |
1288 | arizona_irq_exit(arizona); | |
3cc72986 | 1289 | err_reset: |
2229875d | 1290 | arizona_enable_reset(arizona); |
59db9691 | 1291 | regulator_disable(arizona->dcvdd); |
3cc72986 | 1292 | err_enable: |
3a36a0db | 1293 | regulator_bulk_disable(arizona->num_core_supplies, |
3cc72986 | 1294 | arizona->core_supplies); |
e6021511 CK |
1295 | err_dcvdd: |
1296 | regulator_put(arizona->dcvdd); | |
3cc72986 MB |
1297 | err_early: |
1298 | mfd_remove_devices(dev); | |
1299 | return ret; | |
1300 | } | |
1301 | EXPORT_SYMBOL_GPL(arizona_dev_init); | |
1302 | ||
4740f73f | 1303 | int arizona_dev_exit(struct arizona *arizona) |
3cc72986 | 1304 | { |
b804020a CK |
1305 | pm_runtime_disable(arizona->dev); |
1306 | ||
df6b3352 | 1307 | regulator_disable(arizona->dcvdd); |
e6021511 | 1308 | regulator_put(arizona->dcvdd); |
df6b3352 | 1309 | |
3cc72986 MB |
1310 | mfd_remove_devices(arizona->dev); |
1311 | arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona); | |
1312 | arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona); | |
1313 | arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona); | |
3cc72986 | 1314 | arizona_irq_exit(arizona); |
2229875d | 1315 | arizona_enable_reset(arizona); |
df6b3352 | 1316 | |
4420286e | 1317 | regulator_bulk_disable(arizona->num_core_supplies, |
1d017b6b | 1318 | arizona->core_supplies); |
3cc72986 MB |
1319 | return 0; |
1320 | } | |
1321 | EXPORT_SYMBOL_GPL(arizona_dev_exit); |