mfd: arizona: Add MICVDD to mapped regulators for wm8997
[linux-2.6-block.git] / drivers / mfd / arizona-core.c
CommitLineData
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1/*
2 * Arizona core driver
3 *
4 * Copyright 2012 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/delay.h>
59db9691 14#include <linux/err.h>
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15#include <linux/gpio.h>
16#include <linux/interrupt.h>
17#include <linux/mfd/core.h>
18#include <linux/module.h>
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19#include <linux/of.h>
20#include <linux/of_device.h>
21#include <linux/of_gpio.h>
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22#include <linux/pm_runtime.h>
23#include <linux/regmap.h>
24#include <linux/regulator/consumer.h>
5927467d 25#include <linux/regulator/machine.h>
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26#include <linux/slab.h>
27
28#include <linux/mfd/arizona/core.h>
29#include <linux/mfd/arizona/registers.h>
30
31#include "arizona.h"
32
33static const char *wm5102_core_supplies[] = {
34 "AVDD",
35 "DBVDD1",
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36};
37
38int arizona_clk32k_enable(struct arizona *arizona)
39{
40 int ret = 0;
41
42 mutex_lock(&arizona->clk_lock);
43
44 arizona->clk32k_ref++;
45
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46 if (arizona->clk32k_ref == 1) {
47 switch (arizona->pdata.clk32k_src) {
48 case ARIZONA_32KZ_MCLK1:
49 ret = pm_runtime_get_sync(arizona->dev);
50 if (ret != 0)
51 goto out;
52 break;
53 }
54
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55 ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
56 ARIZONA_CLK_32K_ENA,
57 ARIZONA_CLK_32K_ENA);
247fa192 58 }
3cc72986 59
247fa192 60out:
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61 if (ret != 0)
62 arizona->clk32k_ref--;
63
64 mutex_unlock(&arizona->clk_lock);
65
66 return ret;
67}
68EXPORT_SYMBOL_GPL(arizona_clk32k_enable);
69
70int arizona_clk32k_disable(struct arizona *arizona)
71{
72 int ret = 0;
73
74 mutex_lock(&arizona->clk_lock);
75
76 BUG_ON(arizona->clk32k_ref <= 0);
77
78 arizona->clk32k_ref--;
79
247fa192 80 if (arizona->clk32k_ref == 0) {
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81 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
82 ARIZONA_CLK_32K_ENA, 0);
83
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84 switch (arizona->pdata.clk32k_src) {
85 case ARIZONA_32KZ_MCLK1:
86 pm_runtime_put_sync(arizona->dev);
87 break;
88 }
89 }
90
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91 mutex_unlock(&arizona->clk_lock);
92
93 return ret;
94}
95EXPORT_SYMBOL_GPL(arizona_clk32k_disable);
96
97static irqreturn_t arizona_clkgen_err(int irq, void *data)
98{
99 struct arizona *arizona = data;
100
101 dev_err(arizona->dev, "CLKGEN error\n");
102
103 return IRQ_HANDLED;
104}
105
106static irqreturn_t arizona_underclocked(int irq, void *data)
107{
108 struct arizona *arizona = data;
109 unsigned int val;
110 int ret;
111
112 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8,
113 &val);
114 if (ret != 0) {
115 dev_err(arizona->dev, "Failed to read underclock status: %d\n",
116 ret);
117 return IRQ_NONE;
118 }
119
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120 if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
121 dev_err(arizona->dev, "AIF3 underclocked\n");
122 if (val & ARIZONA_AIF2_UNDERCLOCKED_STS)
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123 dev_err(arizona->dev, "AIF2 underclocked\n");
124 if (val & ARIZONA_AIF1_UNDERCLOCKED_STS)
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125 dev_err(arizona->dev, "AIF1 underclocked\n");
126 if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS)
127 dev_err(arizona->dev, "ISRC2 underclocked\n");
128 if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS)
129 dev_err(arizona->dev, "ISRC1 underclocked\n");
130 if (val & ARIZONA_FX_UNDERCLOCKED_STS)
131 dev_err(arizona->dev, "FX underclocked\n");
132 if (val & ARIZONA_ASRC_UNDERCLOCKED_STS)
133 dev_err(arizona->dev, "ASRC underclocked\n");
134 if (val & ARIZONA_DAC_UNDERCLOCKED_STS)
135 dev_err(arizona->dev, "DAC underclocked\n");
136 if (val & ARIZONA_ADC_UNDERCLOCKED_STS)
137 dev_err(arizona->dev, "ADC underclocked\n");
138 if (val & ARIZONA_MIXER_UNDERCLOCKED_STS)
648a9880 139 dev_err(arizona->dev, "Mixer dropped sample\n");
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140
141 return IRQ_HANDLED;
142}
143
144static irqreturn_t arizona_overclocked(int irq, void *data)
145{
146 struct arizona *arizona = data;
147 unsigned int val[2];
148 int ret;
149
150 ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
151 &val[0], 2);
152 if (ret != 0) {
153 dev_err(arizona->dev, "Failed to read overclock status: %d\n",
154 ret);
155 return IRQ_NONE;
156 }
157
158 if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
159 dev_err(arizona->dev, "PWM overclocked\n");
160 if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
161 dev_err(arizona->dev, "FX core overclocked\n");
162 if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS)
163 dev_err(arizona->dev, "DAC SYS overclocked\n");
164 if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS)
165 dev_err(arizona->dev, "DAC WARP overclocked\n");
166 if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS)
167 dev_err(arizona->dev, "ADC overclocked\n");
168 if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS)
169 dev_err(arizona->dev, "Mixer overclocked\n");
170 if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS)
171 dev_err(arizona->dev, "AIF3 overclocked\n");
172 if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS)
173 dev_err(arizona->dev, "AIF2 overclocked\n");
174 if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS)
175 dev_err(arizona->dev, "AIF1 overclocked\n");
176 if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS)
177 dev_err(arizona->dev, "Pad control overclocked\n");
178
179 if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS)
180 dev_err(arizona->dev, "Slimbus subsystem overclocked\n");
181 if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS)
182 dev_err(arizona->dev, "Slimbus async overclocked\n");
183 if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS)
184 dev_err(arizona->dev, "Slimbus sync overclocked\n");
185 if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS)
186 dev_err(arizona->dev, "ASRC async system overclocked\n");
187 if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS)
188 dev_err(arizona->dev, "ASRC async WARP overclocked\n");
189 if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS)
190 dev_err(arizona->dev, "ASRC sync system overclocked\n");
191 if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS)
192 dev_err(arizona->dev, "ASRC sync WARP overclocked\n");
193 if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS)
194 dev_err(arizona->dev, "DSP1 overclocked\n");
195 if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS)
196 dev_err(arizona->dev, "ISRC2 overclocked\n");
197 if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
198 dev_err(arizona->dev, "ISRC1 overclocked\n");
199
200 return IRQ_HANDLED;
201}
202
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203static int arizona_poll_reg(struct arizona *arizona,
204 int timeout, unsigned int reg,
205 unsigned int mask, unsigned int target)
3cc72986 206{
9d53dfdc 207 unsigned int val = 0;
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208 int ret, i;
209
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210 for (i = 0; i < timeout; i++) {
211 ret = regmap_read(arizona->regmap, reg, &val);
3cc72986 212 if (ret != 0) {
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213 dev_err(arizona->dev, "Failed to read reg %u: %d\n",
214 reg, ret);
cfe775ce 215 continue;
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216 }
217
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218 if ((val & mask) == target)
219 return 0;
220
221 msleep(1);
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222 }
223
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224 dev_err(arizona->dev, "Polling reg %u timed out: %x\n", reg, val);
225 return -ETIMEDOUT;
226}
227
228static int arizona_wait_for_boot(struct arizona *arizona)
229{
230 int ret;
231
232 /*
233 * We can't use an interrupt as we need to runtime resume to do so,
234 * we won't race with the interrupt handler as it'll be blocked on
235 * runtime resume.
236 */
237 ret = arizona_poll_reg(arizona, 5, ARIZONA_INTERRUPT_RAW_STATUS_5,
238 ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS);
239
240 if (!ret)
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241 regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5,
242 ARIZONA_BOOT_DONE_STS);
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243
244 pm_runtime_mark_last_busy(arizona->dev);
245
9d53dfdc 246 return ret;
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247}
248
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249static int arizona_apply_hardware_patch(struct arizona* arizona)
250{
251 unsigned int fll, sysclk;
252 int ret, err;
253
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254 /* Cache existing FLL and SYSCLK settings */
255 ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &fll);
256 if (ret != 0) {
257 dev_err(arizona->dev, "Failed to cache FLL settings: %d\n",
258 ret);
259 return ret;
260 }
261 ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &sysclk);
262 if (ret != 0) {
263 dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n",
264 ret);
265 return ret;
266 }
267
268 /* Start up SYSCLK using the FLL in free running mode */
269 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1,
270 ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN);
271 if (ret != 0) {
272 dev_err(arizona->dev,
273 "Failed to start FLL in freerunning mode: %d\n",
274 ret);
275 return ret;
276 }
277 ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5,
278 ARIZONA_FLL1_CLOCK_OK_STS,
279 ARIZONA_FLL1_CLOCK_OK_STS);
280 if (ret != 0) {
281 ret = -ETIMEDOUT;
282 goto err_fll;
283 }
284
285 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144);
286 if (ret != 0) {
287 dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret);
288 goto err_fll;
289 }
290
291 /* Start the write sequencer and wait for it to finish */
292 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
293 ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160);
294 if (ret != 0) {
295 dev_err(arizona->dev, "Failed to start write sequencer: %d\n",
296 ret);
297 goto err_sysclk;
298 }
299 ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1,
300 ARIZONA_WSEQ_BUSY, 0);
301 if (ret != 0) {
302 regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
303 ARIZONA_WSEQ_ABORT);
304 ret = -ETIMEDOUT;
305 }
306
307err_sysclk:
308 err = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, sysclk);
309 if (err != 0) {
310 dev_err(arizona->dev,
311 "Failed to re-apply old SYSCLK settings: %d\n",
312 err);
313 }
314
315err_fll:
316 err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, fll);
317 if (err != 0) {
318 dev_err(arizona->dev,
319 "Failed to re-apply old FLL settings: %d\n",
320 err);
321 }
322
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323 if (ret != 0)
324 return ret;
325 else
326 return err;
327}
328
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329#ifdef CONFIG_PM_RUNTIME
330static int arizona_runtime_resume(struct device *dev)
331{
332 struct arizona *arizona = dev_get_drvdata(dev);
333 int ret;
334
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335 dev_dbg(arizona->dev, "Leaving AoD mode\n");
336
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337 ret = regulator_enable(arizona->dcvdd);
338 if (ret != 0) {
339 dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret);
340 return ret;
341 }
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342
343 regcache_cache_only(arizona->regmap, false);
344
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345 switch (arizona->type) {
346 case WM5102:
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347 if (arizona->external_dcvdd) {
348 ret = regmap_update_bits(arizona->regmap,
349 ARIZONA_ISOLATION_CONTROL,
350 ARIZONA_ISOLATE_DCVDD1, 0);
351 if (ret != 0) {
352 dev_err(arizona->dev,
353 "Failed to connect DCVDD: %d\n", ret);
354 goto err;
355 }
356 }
357
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358 ret = wm5102_patch(arizona);
359 if (ret != 0) {
360 dev_err(arizona->dev, "Failed to apply patch: %d\n",
361 ret);
362 goto err;
363 }
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364
365 ret = arizona_apply_hardware_patch(arizona);
366 if (ret != 0) {
367 dev_err(arizona->dev,
368 "Failed to apply hardware patch: %d\n",
369 ret);
370 goto err;
371 }
372 break;
373 default:
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374 ret = arizona_wait_for_boot(arizona);
375 if (ret != 0) {
376 goto err;
377 }
378
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379 if (arizona->external_dcvdd) {
380 ret = regmap_update_bits(arizona->regmap,
381 ARIZONA_ISOLATION_CONTROL,
382 ARIZONA_ISOLATE_DCVDD1, 0);
383 if (ret != 0) {
384 dev_err(arizona->dev,
385 "Failed to connect DCVDD: %d\n", ret);
386 goto err;
387 }
388 }
e80436bb 389 break;
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CK
390 }
391
d9d03496
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392 switch (arizona->type) {
393 case WM5102:
394 ret = wm5102_patch(arizona);
395 if (ret != 0) {
396 dev_err(arizona->dev, "Failed to apply patch: %d\n",
397 ret);
398 goto err;
399 }
400 default:
401 break;
402 }
403
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404 ret = regcache_sync(arizona->regmap);
405 if (ret != 0) {
406 dev_err(arizona->dev, "Failed to restore register cache\n");
4816bd1c 407 goto err;
9270bdf5 408 }
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409
410 return 0;
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411
412err:
413 regcache_cache_only(arizona->regmap, true);
414 regulator_disable(arizona->dcvdd);
415 return ret;
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416}
417
418static int arizona_runtime_suspend(struct device *dev)
419{
420 struct arizona *arizona = dev_get_drvdata(dev);
5927467d 421 int ret;
3cc72986 422
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423 dev_dbg(arizona->dev, "Entering AoD mode\n");
424
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425 if (arizona->external_dcvdd) {
426 ret = regmap_update_bits(arizona->regmap,
427 ARIZONA_ISOLATION_CONTROL,
428 ARIZONA_ISOLATE_DCVDD1,
429 ARIZONA_ISOLATE_DCVDD1);
430 if (ret != 0) {
431 dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n",
432 ret);
433 return ret;
434 }
435 }
436
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437 regcache_cache_only(arizona->regmap, true);
438 regcache_mark_dirty(arizona->regmap);
e293e847 439 regulator_disable(arizona->dcvdd);
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440
441 return 0;
442}
443#endif
444
dc781d0e 445#ifdef CONFIG_PM_SLEEP
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446static int arizona_suspend(struct device *dev)
447{
448 struct arizona *arizona = dev_get_drvdata(dev);
449
450 dev_dbg(arizona->dev, "Suspend, disabling IRQ\n");
451 disable_irq(arizona->irq);
452
453 return 0;
454}
455
456static int arizona_suspend_late(struct device *dev)
457{
458 struct arizona *arizona = dev_get_drvdata(dev);
459
460 dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n");
461 enable_irq(arizona->irq);
462
463 return 0;
464}
465
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466static int arizona_resume_noirq(struct device *dev)
467{
468 struct arizona *arizona = dev_get_drvdata(dev);
469
470 dev_dbg(arizona->dev, "Early resume, disabling IRQ\n");
471 disable_irq(arizona->irq);
472
473 return 0;
474}
475
476static int arizona_resume(struct device *dev)
477{
478 struct arizona *arizona = dev_get_drvdata(dev);
479
480 dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n");
481 enable_irq(arizona->irq);
482
483 return 0;
484}
485#endif
486
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487const struct dev_pm_ops arizona_pm_ops = {
488 SET_RUNTIME_PM_OPS(arizona_runtime_suspend,
489 arizona_runtime_resume,
490 NULL)
67c99296 491 SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume)
dc781d0e 492#ifdef CONFIG_PM_SLEEP
67c99296 493 .suspend_late = arizona_suspend_late,
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494 .resume_noirq = arizona_resume_noirq,
495#endif
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496};
497EXPORT_SYMBOL_GPL(arizona_pm_ops);
498
d781009c 499#ifdef CONFIG_OF
942786e6 500unsigned long arizona_of_get_type(struct device *dev)
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501{
502 const struct of_device_id *id = of_match_device(arizona_of_match, dev);
503
504 if (id)
942786e6 505 return (unsigned long)id->data;
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506 else
507 return 0;
508}
509EXPORT_SYMBOL_GPL(arizona_of_get_type);
510
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511int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop,
512 bool mandatory)
513{
514 int gpio;
515
516 gpio = of_get_named_gpio(arizona->dev->of_node, prop, 0);
517 if (gpio < 0) {
518 if (mandatory)
519 dev_err(arizona->dev,
520 "Mandatory DT gpio %s missing/malformed: %d\n",
521 prop, gpio);
522
523 gpio = 0;
524 }
525
526 return gpio;
527}
528EXPORT_SYMBOL_GPL(arizona_of_get_named_gpio);
529
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530static int arizona_of_get_core_pdata(struct arizona *arizona)
531{
e4fcb1d6 532 struct arizona_pdata *pdata = &arizona->pdata;
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533 int ret, i;
534
e4fcb1d6 535 pdata->reset = arizona_of_get_named_gpio(arizona, "wlf,reset", true);
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536
537 ret = of_property_read_u32_array(arizona->dev->of_node,
538 "wlf,gpio-defaults",
539 arizona->pdata.gpio_defaults,
540 ARRAY_SIZE(arizona->pdata.gpio_defaults));
541 if (ret >= 0) {
542 /*
543 * All values are literal except out of range values
544 * which are chip default, translate into platform
545 * data which uses 0 as chip default and out of range
546 * as zero.
547 */
548 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
549 if (arizona->pdata.gpio_defaults[i] > 0xffff)
550 arizona->pdata.gpio_defaults[i] = 0;
91c73935 551 else if (arizona->pdata.gpio_defaults[i] == 0)
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552 arizona->pdata.gpio_defaults[i] = 0x10000;
553 }
554 } else {
555 dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n",
556 ret);
557 }
558
559 return 0;
560}
561
562const struct of_device_id arizona_of_match[] = {
563 { .compatible = "wlf,wm5102", .data = (void *)WM5102 },
564 { .compatible = "wlf,wm5110", .data = (void *)WM5110 },
dc7d4863 565 { .compatible = "wlf,wm8997", .data = (void *)WM8997 },
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566 {},
567};
568EXPORT_SYMBOL_GPL(arizona_of_match);
569#else
570static inline int arizona_of_get_core_pdata(struct arizona *arizona)
571{
572 return 0;
573}
574#endif
575
5ac98553 576static const struct mfd_cell early_devs[] = {
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577 { .name = "arizona-ldo1" },
578};
579
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580static const char *wm5102_supplies[] = {
581 "DBVDD2",
582 "DBVDD3",
583 "CPVDD",
584 "SPKVDDL",
585 "SPKVDDR",
058c8901 586 "MICVDD",
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CK
587};
588
5ac98553 589static const struct mfd_cell wm5102_devs[] = {
d7768111 590 { .name = "arizona-micsupp" },
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591 { .name = "arizona-extcon" },
592 { .name = "arizona-gpio" },
503b1cac 593 { .name = "arizona-haptics" },
3cc72986 594 { .name = "arizona-pwm" },
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595 {
596 .name = "wm5102-codec",
597 .parent_supplies = wm5102_supplies,
598 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
599 },
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600};
601
5ac98553 602static const struct mfd_cell wm5110_devs[] = {
d7768111 603 { .name = "arizona-micsupp" },
e102befe
MB
604 { .name = "arizona-extcon" },
605 { .name = "arizona-gpio" },
503b1cac 606 { .name = "arizona-haptics" },
e102befe 607 { .name = "arizona-pwm" },
32dadef2
CK
608 {
609 .name = "wm5110-codec",
610 .parent_supplies = wm5102_supplies,
611 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
612 },
613};
614
615static const char *wm8997_supplies[] = {
996c2d4f 616 "MICVDD",
32dadef2
CK
617 "DBVDD2",
618 "CPVDD",
619 "SPKVDD",
e102befe
MB
620};
621
5ac98553 622static const struct mfd_cell wm8997_devs[] = {
dc7d4863
CK
623 { .name = "arizona-micsupp" },
624 { .name = "arizona-extcon" },
625 { .name = "arizona-gpio" },
626 { .name = "arizona-haptics" },
627 { .name = "arizona-pwm" },
32dadef2
CK
628 {
629 .name = "wm8997-codec",
630 .parent_supplies = wm8997_supplies,
631 .num_parent_supplies = ARRAY_SIZE(wm8997_supplies),
632 },
dc7d4863
CK
633};
634
f791be49 635int arizona_dev_init(struct arizona *arizona)
3cc72986
MB
636{
637 struct device *dev = arizona->dev;
638 const char *type_name;
639 unsigned int reg, val;
62d62b59 640 int (*apply_patch)(struct arizona *) = NULL;
3cc72986
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641 int ret, i;
642
643 dev_set_drvdata(arizona->dev, arizona);
644 mutex_init(&arizona->clk_lock);
645
646 if (dev_get_platdata(arizona->dev))
647 memcpy(&arizona->pdata, dev_get_platdata(arizona->dev),
648 sizeof(arizona->pdata));
22d7dc8a
LJ
649 else
650 arizona_of_get_core_pdata(arizona);
3cc72986
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651
652 regcache_cache_only(arizona->regmap, true);
653
654 switch (arizona->type) {
655 case WM5102:
e102befe 656 case WM5110:
dc7d4863 657 case WM8997:
3cc72986
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658 for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
659 arizona->core_supplies[i].supply
660 = wm5102_core_supplies[i];
661 arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies);
662 break;
663 default:
664 dev_err(arizona->dev, "Unknown device type %d\n",
665 arizona->type);
666 return -EINVAL;
667 }
668
4a8c475f
CK
669 /* Mark DCVDD as external, LDO1 driver will clear if internal */
670 arizona->external_dcvdd = true;
671
3cc72986 672 ret = mfd_add_devices(arizona->dev, -1, early_devs,
0848c94f 673 ARRAY_SIZE(early_devs), NULL, 0, NULL);
3cc72986
MB
674 if (ret != 0) {
675 dev_err(dev, "Failed to add early children: %d\n", ret);
676 return ret;
677 }
678
679 ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies,
680 arizona->core_supplies);
681 if (ret != 0) {
682 dev_err(dev, "Failed to request core supplies: %d\n",
683 ret);
684 goto err_early;
685 }
686
0c2d0ffb
CK
687 /**
688 * Don't use devres here because the only device we have to get
689 * against is the MFD device and DCVDD will likely be supplied by
690 * one of its children. Meaning that the regulator will be
691 * destroyed by the time devres calls regulator put.
692 */
e6021511 693 arizona->dcvdd = regulator_get(arizona->dev, "DCVDD");
59db9691
MB
694 if (IS_ERR(arizona->dcvdd)) {
695 ret = PTR_ERR(arizona->dcvdd);
696 dev_err(dev, "Failed to request DCVDD: %d\n", ret);
697 goto err_early;
698 }
699
87d3af4a
MB
700 if (arizona->pdata.reset) {
701 /* Start out with /RESET low to put the chip into reset */
702 ret = gpio_request_one(arizona->pdata.reset,
703 GPIOF_DIR_OUT | GPIOF_INIT_LOW,
704 "arizona /RESET");
705 if (ret != 0) {
706 dev_err(dev, "Failed to request /RESET: %d\n", ret);
e6021511 707 goto err_dcvdd;
87d3af4a
MB
708 }
709 }
710
3cc72986
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711 ret = regulator_bulk_enable(arizona->num_core_supplies,
712 arizona->core_supplies);
713 if (ret != 0) {
714 dev_err(dev, "Failed to enable core supplies: %d\n",
715 ret);
e6021511 716 goto err_dcvdd;
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MB
717 }
718
59db9691
MB
719 ret = regulator_enable(arizona->dcvdd);
720 if (ret != 0) {
721 dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
722 goto err_enable;
723 }
724
c25feaa5 725 if (arizona->pdata.reset) {
3cc72986 726 gpio_set_value_cansleep(arizona->pdata.reset, 1);
c25feaa5
CK
727 msleep(1);
728 }
3cc72986 729
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730 regcache_cache_only(arizona->regmap, false);
731
ca76ceb8 732 /* Verify that this is a chip we know about */
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733 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
734 if (ret != 0) {
735 dev_err(dev, "Failed to read ID register: %d\n", ret);
59db9691 736 goto err_reset;
3cc72986
MB
737 }
738
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739 switch (reg) {
740 case 0x5102:
e102befe 741 case 0x5110:
dc7d4863 742 case 0x8997:
e102befe 743 break;
3cc72986 744 default:
ca76ceb8 745 dev_err(arizona->dev, "Unknown device ID: %x\n", reg);
59db9691 746 goto err_reset;
3cc72986
MB
747 }
748
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749 /* If we have a /RESET GPIO we'll already be reset */
750 if (!arizona->pdata.reset) {
46b9d13a
CK
751 regcache_mark_dirty(arizona->regmap);
752
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753 ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0);
754 if (ret != 0) {
755 dev_err(dev, "Failed to reset device: %d\n", ret);
59db9691 756 goto err_reset;
3cc72986 757 }
46b9d13a 758
c25feaa5
CK
759 msleep(1);
760
46b9d13a
CK
761 ret = regcache_sync(arizona->regmap);
762 if (ret != 0) {
763 dev_err(dev, "Failed to sync device: %d\n", ret);
764 goto err_reset;
765 }
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766 }
767
ca76ceb8 768 /* Ensure device startup is complete */
d955cba8
CK
769 switch (arizona->type) {
770 case WM5102:
771 ret = regmap_read(arizona->regmap, 0x19, &val);
772 if (ret != 0)
773 dev_err(dev,
774 "Failed to check write sequencer state: %d\n",
775 ret);
776 else if (val & 0x01)
777 break;
778 /* Fall through */
779 default:
780 ret = arizona_wait_for_boot(arizona);
781 if (ret != 0) {
782 dev_err(arizona->dev,
783 "Device failed initial boot: %d\n", ret);
784 goto err_reset;
785 }
786 break;
af65a361 787 }
3cc72986 788
ca76ceb8
MB
789 /* Read the device ID information & do device specific stuff */
790 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
791 if (ret != 0) {
792 dev_err(dev, "Failed to read ID register: %d\n", ret);
793 goto err_reset;
794 }
795
796 ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION,
797 &arizona->rev);
798 if (ret != 0) {
799 dev_err(dev, "Failed to read revision register: %d\n", ret);
800 goto err_reset;
801 }
802 arizona->rev &= ARIZONA_DEVICE_REVISION_MASK;
803
804 switch (reg) {
805#ifdef CONFIG_MFD_WM5102
806 case 0x5102:
807 type_name = "WM5102";
808 if (arizona->type != WM5102) {
809 dev_err(arizona->dev, "WM5102 registered as %d\n",
810 arizona->type);
811 arizona->type = WM5102;
812 }
813 apply_patch = wm5102_patch;
814 arizona->rev &= 0x7;
815 break;
816#endif
817#ifdef CONFIG_MFD_WM5110
818 case 0x5110:
819 type_name = "WM5110";
820 if (arizona->type != WM5110) {
821 dev_err(arizona->dev, "WM5110 registered as %d\n",
822 arizona->type);
823 arizona->type = WM5110;
824 }
825 apply_patch = wm5110_patch;
826 break;
dc7d4863
CK
827#endif
828#ifdef CONFIG_MFD_WM8997
829 case 0x8997:
830 type_name = "WM8997";
831 if (arizona->type != WM8997) {
832 dev_err(arizona->dev, "WM8997 registered as %d\n",
833 arizona->type);
834 arizona->type = WM8997;
835 }
836 apply_patch = wm8997_patch;
837 break;
ca76ceb8
MB
838#endif
839 default:
840 dev_err(arizona->dev, "Unknown device ID %x\n", reg);
841 goto err_reset;
842 }
843
844 dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A');
845
62d62b59
MB
846 if (apply_patch) {
847 ret = apply_patch(arizona);
848 if (ret != 0) {
849 dev_err(arizona->dev, "Failed to apply patch: %d\n",
850 ret);
851 goto err_reset;
852 }
e80436bb
CK
853
854 switch (arizona->type) {
855 case WM5102:
856 ret = arizona_apply_hardware_patch(arizona);
857 if (ret != 0) {
858 dev_err(arizona->dev,
859 "Failed to apply hardware patch: %d\n",
860 ret);
861 goto err_reset;
862 }
863 break;
864 default:
865 break;
866 }
62d62b59
MB
867 }
868
3cc72986
MB
869 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
870 if (!arizona->pdata.gpio_defaults[i])
871 continue;
872
873 regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i,
874 arizona->pdata.gpio_defaults[i]);
875 }
876
877 pm_runtime_set_autosuspend_delay(arizona->dev, 100);
878 pm_runtime_use_autosuspend(arizona->dev);
879 pm_runtime_enable(arizona->dev);
880
881 /* Chip default */
882 if (!arizona->pdata.clk32k_src)
883 arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2;
884
885 switch (arizona->pdata.clk32k_src) {
886 case ARIZONA_32KZ_MCLK1:
887 case ARIZONA_32KZ_MCLK2:
888 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
889 ARIZONA_CLK_32K_SRC_MASK,
890 arizona->pdata.clk32k_src - 1);
767c6dc0 891 arizona_clk32k_enable(arizona);
3cc72986
MB
892 break;
893 case ARIZONA_32KZ_NONE:
894 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
895 ARIZONA_CLK_32K_SRC_MASK, 2);
896 break;
897 default:
898 dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n",
899 arizona->pdata.clk32k_src);
900 ret = -EINVAL;
59db9691 901 goto err_reset;
3cc72986
MB
902 }
903
3d91f828 904 for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) {
544c7aad
MB
905 if (!arizona->pdata.micbias[i].mV &&
906 !arizona->pdata.micbias[i].bypass)
3d91f828
MB
907 continue;
908
544c7aad
MB
909 /* Apply default for bypass mode */
910 if (!arizona->pdata.micbias[i].mV)
911 arizona->pdata.micbias[i].mV = 2800;
912
3d91f828 913 val = (arizona->pdata.micbias[i].mV - 1500) / 100;
544c7aad 914
3d91f828
MB
915 val <<= ARIZONA_MICB1_LVL_SHIFT;
916
917 if (arizona->pdata.micbias[i].ext_cap)
918 val |= ARIZONA_MICB1_EXT_CAP;
919
920 if (arizona->pdata.micbias[i].discharge)
921 val |= ARIZONA_MICB1_DISCH;
922
f773fc6d 923 if (arizona->pdata.micbias[i].soft_start)
3d91f828
MB
924 val |= ARIZONA_MICB1_RATE;
925
544c7aad
MB
926 if (arizona->pdata.micbias[i].bypass)
927 val |= ARIZONA_MICB1_BYPASS;
928
3d91f828
MB
929 regmap_update_bits(arizona->regmap,
930 ARIZONA_MIC_BIAS_CTRL_1 + i,
931 ARIZONA_MICB1_LVL_MASK |
932 ARIZONA_MICB1_DISCH |
544c7aad 933 ARIZONA_MICB1_BYPASS |
3d91f828
MB
934 ARIZONA_MICB1_RATE, val);
935 }
936
3cc72986
MB
937 for (i = 0; i < ARIZONA_MAX_INPUT; i++) {
938 /* Default for both is 0 so noop with defaults */
939 val = arizona->pdata.dmic_ref[i]
940 << ARIZONA_IN1_DMIC_SUP_SHIFT;
941 val |= arizona->pdata.inmode[i] << ARIZONA_IN1_MODE_SHIFT;
942
943 regmap_update_bits(arizona->regmap,
944 ARIZONA_IN1L_CONTROL + (i * 8),
945 ARIZONA_IN1_DMIC_SUP_MASK |
946 ARIZONA_IN1_MODE_MASK, val);
947 }
948
949 for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) {
950 /* Default is 0 so noop with defaults */
951 if (arizona->pdata.out_mono[i])
952 val = ARIZONA_OUT1_MONO;
953 else
954 val = 0;
955
956 regmap_update_bits(arizona->regmap,
957 ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8),
958 ARIZONA_OUT1_MONO, val);
959 }
960
3cc72986
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961 for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) {
962 if (arizona->pdata.spk_mute[i])
963 regmap_update_bits(arizona->regmap,
2a51da04 964 ARIZONA_PDM_SPK1_CTRL_1 + (i * 2),
3cc72986
MB
965 ARIZONA_SPK1_MUTE_ENDIAN_MASK |
966 ARIZONA_SPK1_MUTE_SEQ1_MASK,
967 arizona->pdata.spk_mute[i]);
968
969 if (arizona->pdata.spk_fmt[i])
970 regmap_update_bits(arizona->regmap,
2a51da04 971 ARIZONA_PDM_SPK1_CTRL_2 + (i * 2),
3cc72986
MB
972 ARIZONA_SPK1_FMT_MASK,
973 arizona->pdata.spk_fmt[i]);
974 }
975
976 /* Set up for interrupts */
977 ret = arizona_irq_init(arizona);
978 if (ret != 0)
59db9691 979 goto err_reset;
3cc72986
MB
980
981 arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error",
982 arizona_clkgen_err, arizona);
983 arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked",
984 arizona_overclocked, arizona);
985 arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked",
986 arizona_underclocked, arizona);
987
988 switch (arizona->type) {
989 case WM5102:
990 ret = mfd_add_devices(arizona->dev, -1, wm5102_devs,
0848c94f 991 ARRAY_SIZE(wm5102_devs), NULL, 0, NULL);
e102befe
MB
992 break;
993 case WM5110:
994 ret = mfd_add_devices(arizona->dev, -1, wm5110_devs,
78566afd 995 ARRAY_SIZE(wm5110_devs), NULL, 0, NULL);
3cc72986 996 break;
dc7d4863
CK
997 case WM8997:
998 ret = mfd_add_devices(arizona->dev, -1, wm8997_devs,
999 ARRAY_SIZE(wm8997_devs), NULL, 0, NULL);
1000 break;
3cc72986
MB
1001 }
1002
1003 if (ret != 0) {
1004 dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret);
1005 goto err_irq;
1006 }
1007
59db9691
MB
1008#ifdef CONFIG_PM_RUNTIME
1009 regulator_disable(arizona->dcvdd);
1010#endif
1011
3cc72986
MB
1012 return 0;
1013
1014err_irq:
1015 arizona_irq_exit(arizona);
3cc72986
MB
1016err_reset:
1017 if (arizona->pdata.reset) {
87d3af4a 1018 gpio_set_value_cansleep(arizona->pdata.reset, 0);
3cc72986
MB
1019 gpio_free(arizona->pdata.reset);
1020 }
59db9691 1021 regulator_disable(arizona->dcvdd);
3cc72986 1022err_enable:
3a36a0db 1023 regulator_bulk_disable(arizona->num_core_supplies,
3cc72986 1024 arizona->core_supplies);
e6021511
CK
1025err_dcvdd:
1026 regulator_put(arizona->dcvdd);
3cc72986
MB
1027err_early:
1028 mfd_remove_devices(dev);
1029 return ret;
1030}
1031EXPORT_SYMBOL_GPL(arizona_dev_init);
1032
4740f73f 1033int arizona_dev_exit(struct arizona *arizona)
3cc72986 1034{
b804020a
CK
1035 pm_runtime_disable(arizona->dev);
1036
df6b3352 1037 regulator_disable(arizona->dcvdd);
e6021511 1038 regulator_put(arizona->dcvdd);
df6b3352 1039
3cc72986
MB
1040 mfd_remove_devices(arizona->dev);
1041 arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona);
1042 arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona);
1043 arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona);
3cc72986 1044 arizona_irq_exit(arizona);
1d017b6b
MB
1045 if (arizona->pdata.reset)
1046 gpio_set_value_cansleep(arizona->pdata.reset, 0);
df6b3352 1047
4420286e 1048 regulator_bulk_disable(arizona->num_core_supplies,
1d017b6b 1049 arizona->core_supplies);
3cc72986
MB
1050 return 0;
1051}
1052EXPORT_SYMBOL_GPL(arizona_dev_exit);