Commit | Line | Data |
---|---|---|
3cc72986 MB |
1 | /* |
2 | * Arizona core driver | |
3 | * | |
4 | * Copyright 2012 Wolfson Microelectronics plc | |
5 | * | |
6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/delay.h> | |
59db9691 | 14 | #include <linux/err.h> |
3cc72986 MB |
15 | #include <linux/gpio.h> |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/mfd/core.h> | |
18 | #include <linux/module.h> | |
19 | #include <linux/pm_runtime.h> | |
20 | #include <linux/regmap.h> | |
21 | #include <linux/regulator/consumer.h> | |
22 | #include <linux/slab.h> | |
23 | ||
24 | #include <linux/mfd/arizona/core.h> | |
25 | #include <linux/mfd/arizona/registers.h> | |
26 | ||
27 | #include "arizona.h" | |
28 | ||
29 | static const char *wm5102_core_supplies[] = { | |
30 | "AVDD", | |
31 | "DBVDD1", | |
3cc72986 MB |
32 | }; |
33 | ||
34 | int arizona_clk32k_enable(struct arizona *arizona) | |
35 | { | |
36 | int ret = 0; | |
37 | ||
38 | mutex_lock(&arizona->clk_lock); | |
39 | ||
40 | arizona->clk32k_ref++; | |
41 | ||
247fa192 MB |
42 | if (arizona->clk32k_ref == 1) { |
43 | switch (arizona->pdata.clk32k_src) { | |
44 | case ARIZONA_32KZ_MCLK1: | |
45 | ret = pm_runtime_get_sync(arizona->dev); | |
46 | if (ret != 0) | |
47 | goto out; | |
48 | break; | |
49 | } | |
50 | ||
3cc72986 MB |
51 | ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, |
52 | ARIZONA_CLK_32K_ENA, | |
53 | ARIZONA_CLK_32K_ENA); | |
247fa192 | 54 | } |
3cc72986 | 55 | |
247fa192 | 56 | out: |
3cc72986 MB |
57 | if (ret != 0) |
58 | arizona->clk32k_ref--; | |
59 | ||
60 | mutex_unlock(&arizona->clk_lock); | |
61 | ||
62 | return ret; | |
63 | } | |
64 | EXPORT_SYMBOL_GPL(arizona_clk32k_enable); | |
65 | ||
66 | int arizona_clk32k_disable(struct arizona *arizona) | |
67 | { | |
68 | int ret = 0; | |
69 | ||
70 | mutex_lock(&arizona->clk_lock); | |
71 | ||
72 | BUG_ON(arizona->clk32k_ref <= 0); | |
73 | ||
74 | arizona->clk32k_ref--; | |
75 | ||
247fa192 | 76 | if (arizona->clk32k_ref == 0) { |
3cc72986 MB |
77 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, |
78 | ARIZONA_CLK_32K_ENA, 0); | |
79 | ||
247fa192 MB |
80 | switch (arizona->pdata.clk32k_src) { |
81 | case ARIZONA_32KZ_MCLK1: | |
82 | pm_runtime_put_sync(arizona->dev); | |
83 | break; | |
84 | } | |
85 | } | |
86 | ||
3cc72986 MB |
87 | mutex_unlock(&arizona->clk_lock); |
88 | ||
89 | return ret; | |
90 | } | |
91 | EXPORT_SYMBOL_GPL(arizona_clk32k_disable); | |
92 | ||
93 | static irqreturn_t arizona_clkgen_err(int irq, void *data) | |
94 | { | |
95 | struct arizona *arizona = data; | |
96 | ||
97 | dev_err(arizona->dev, "CLKGEN error\n"); | |
98 | ||
99 | return IRQ_HANDLED; | |
100 | } | |
101 | ||
102 | static irqreturn_t arizona_underclocked(int irq, void *data) | |
103 | { | |
104 | struct arizona *arizona = data; | |
105 | unsigned int val; | |
106 | int ret; | |
107 | ||
108 | ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8, | |
109 | &val); | |
110 | if (ret != 0) { | |
111 | dev_err(arizona->dev, "Failed to read underclock status: %d\n", | |
112 | ret); | |
113 | return IRQ_NONE; | |
114 | } | |
115 | ||
3cc72986 MB |
116 | if (val & ARIZONA_AIF3_UNDERCLOCKED_STS) |
117 | dev_err(arizona->dev, "AIF3 underclocked\n"); | |
118 | if (val & ARIZONA_AIF2_UNDERCLOCKED_STS) | |
3ebef34d CK |
119 | dev_err(arizona->dev, "AIF2 underclocked\n"); |
120 | if (val & ARIZONA_AIF1_UNDERCLOCKED_STS) | |
3cc72986 MB |
121 | dev_err(arizona->dev, "AIF1 underclocked\n"); |
122 | if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS) | |
123 | dev_err(arizona->dev, "ISRC2 underclocked\n"); | |
124 | if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS) | |
125 | dev_err(arizona->dev, "ISRC1 underclocked\n"); | |
126 | if (val & ARIZONA_FX_UNDERCLOCKED_STS) | |
127 | dev_err(arizona->dev, "FX underclocked\n"); | |
128 | if (val & ARIZONA_ASRC_UNDERCLOCKED_STS) | |
129 | dev_err(arizona->dev, "ASRC underclocked\n"); | |
130 | if (val & ARIZONA_DAC_UNDERCLOCKED_STS) | |
131 | dev_err(arizona->dev, "DAC underclocked\n"); | |
132 | if (val & ARIZONA_ADC_UNDERCLOCKED_STS) | |
133 | dev_err(arizona->dev, "ADC underclocked\n"); | |
134 | if (val & ARIZONA_MIXER_UNDERCLOCKED_STS) | |
648a9880 | 135 | dev_err(arizona->dev, "Mixer dropped sample\n"); |
3cc72986 MB |
136 | |
137 | return IRQ_HANDLED; | |
138 | } | |
139 | ||
140 | static irqreturn_t arizona_overclocked(int irq, void *data) | |
141 | { | |
142 | struct arizona *arizona = data; | |
143 | unsigned int val[2]; | |
144 | int ret; | |
145 | ||
146 | ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6, | |
147 | &val[0], 2); | |
148 | if (ret != 0) { | |
149 | dev_err(arizona->dev, "Failed to read overclock status: %d\n", | |
150 | ret); | |
151 | return IRQ_NONE; | |
152 | } | |
153 | ||
154 | if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS) | |
155 | dev_err(arizona->dev, "PWM overclocked\n"); | |
156 | if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS) | |
157 | dev_err(arizona->dev, "FX core overclocked\n"); | |
158 | if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS) | |
159 | dev_err(arizona->dev, "DAC SYS overclocked\n"); | |
160 | if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS) | |
161 | dev_err(arizona->dev, "DAC WARP overclocked\n"); | |
162 | if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS) | |
163 | dev_err(arizona->dev, "ADC overclocked\n"); | |
164 | if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS) | |
165 | dev_err(arizona->dev, "Mixer overclocked\n"); | |
166 | if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS) | |
167 | dev_err(arizona->dev, "AIF3 overclocked\n"); | |
168 | if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS) | |
169 | dev_err(arizona->dev, "AIF2 overclocked\n"); | |
170 | if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS) | |
171 | dev_err(arizona->dev, "AIF1 overclocked\n"); | |
172 | if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS) | |
173 | dev_err(arizona->dev, "Pad control overclocked\n"); | |
174 | ||
175 | if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS) | |
176 | dev_err(arizona->dev, "Slimbus subsystem overclocked\n"); | |
177 | if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS) | |
178 | dev_err(arizona->dev, "Slimbus async overclocked\n"); | |
179 | if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS) | |
180 | dev_err(arizona->dev, "Slimbus sync overclocked\n"); | |
181 | if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS) | |
182 | dev_err(arizona->dev, "ASRC async system overclocked\n"); | |
183 | if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS) | |
184 | dev_err(arizona->dev, "ASRC async WARP overclocked\n"); | |
185 | if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS) | |
186 | dev_err(arizona->dev, "ASRC sync system overclocked\n"); | |
187 | if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS) | |
188 | dev_err(arizona->dev, "ASRC sync WARP overclocked\n"); | |
189 | if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS) | |
190 | dev_err(arizona->dev, "DSP1 overclocked\n"); | |
191 | if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS) | |
192 | dev_err(arizona->dev, "ISRC2 overclocked\n"); | |
193 | if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS) | |
194 | dev_err(arizona->dev, "ISRC1 overclocked\n"); | |
195 | ||
196 | return IRQ_HANDLED; | |
197 | } | |
198 | ||
9d53dfdc CK |
199 | static int arizona_poll_reg(struct arizona *arizona, |
200 | int timeout, unsigned int reg, | |
201 | unsigned int mask, unsigned int target) | |
3cc72986 | 202 | { |
9d53dfdc | 203 | unsigned int val = 0; |
3cc72986 MB |
204 | int ret, i; |
205 | ||
9d53dfdc CK |
206 | for (i = 0; i < timeout; i++) { |
207 | ret = regmap_read(arizona->regmap, reg, &val); | |
3cc72986 | 208 | if (ret != 0) { |
9d53dfdc CK |
209 | dev_err(arizona->dev, "Failed to read reg %u: %d\n", |
210 | reg, ret); | |
cfe775ce | 211 | continue; |
3cc72986 MB |
212 | } |
213 | ||
9d53dfdc CK |
214 | if ((val & mask) == target) |
215 | return 0; | |
216 | ||
217 | msleep(1); | |
3cc72986 MB |
218 | } |
219 | ||
9d53dfdc CK |
220 | dev_err(arizona->dev, "Polling reg %u timed out: %x\n", reg, val); |
221 | return -ETIMEDOUT; | |
222 | } | |
223 | ||
224 | static int arizona_wait_for_boot(struct arizona *arizona) | |
225 | { | |
226 | int ret; | |
227 | ||
228 | /* | |
229 | * We can't use an interrupt as we need to runtime resume to do so, | |
230 | * we won't race with the interrupt handler as it'll be blocked on | |
231 | * runtime resume. | |
232 | */ | |
233 | ret = arizona_poll_reg(arizona, 5, ARIZONA_INTERRUPT_RAW_STATUS_5, | |
234 | ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS); | |
235 | ||
236 | if (!ret) | |
3cc72986 MB |
237 | regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5, |
238 | ARIZONA_BOOT_DONE_STS); | |
3cc72986 MB |
239 | |
240 | pm_runtime_mark_last_busy(arizona->dev); | |
241 | ||
9d53dfdc | 242 | return ret; |
3cc72986 MB |
243 | } |
244 | ||
e80436bb CK |
245 | static int arizona_apply_hardware_patch(struct arizona* arizona) |
246 | { | |
247 | unsigned int fll, sysclk; | |
248 | int ret, err; | |
249 | ||
250 | regcache_cache_bypass(arizona->regmap, true); | |
251 | ||
252 | /* Cache existing FLL and SYSCLK settings */ | |
253 | ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &fll); | |
254 | if (ret != 0) { | |
255 | dev_err(arizona->dev, "Failed to cache FLL settings: %d\n", | |
256 | ret); | |
257 | return ret; | |
258 | } | |
259 | ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &sysclk); | |
260 | if (ret != 0) { | |
261 | dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n", | |
262 | ret); | |
263 | return ret; | |
264 | } | |
265 | ||
266 | /* Start up SYSCLK using the FLL in free running mode */ | |
267 | ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, | |
268 | ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN); | |
269 | if (ret != 0) { | |
270 | dev_err(arizona->dev, | |
271 | "Failed to start FLL in freerunning mode: %d\n", | |
272 | ret); | |
273 | return ret; | |
274 | } | |
275 | ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5, | |
276 | ARIZONA_FLL1_CLOCK_OK_STS, | |
277 | ARIZONA_FLL1_CLOCK_OK_STS); | |
278 | if (ret != 0) { | |
279 | ret = -ETIMEDOUT; | |
280 | goto err_fll; | |
281 | } | |
282 | ||
283 | ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144); | |
284 | if (ret != 0) { | |
285 | dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret); | |
286 | goto err_fll; | |
287 | } | |
288 | ||
289 | /* Start the write sequencer and wait for it to finish */ | |
290 | ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, | |
291 | ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160); | |
292 | if (ret != 0) { | |
293 | dev_err(arizona->dev, "Failed to start write sequencer: %d\n", | |
294 | ret); | |
295 | goto err_sysclk; | |
296 | } | |
297 | ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1, | |
298 | ARIZONA_WSEQ_BUSY, 0); | |
299 | if (ret != 0) { | |
300 | regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, | |
301 | ARIZONA_WSEQ_ABORT); | |
302 | ret = -ETIMEDOUT; | |
303 | } | |
304 | ||
305 | err_sysclk: | |
306 | err = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, sysclk); | |
307 | if (err != 0) { | |
308 | dev_err(arizona->dev, | |
309 | "Failed to re-apply old SYSCLK settings: %d\n", | |
310 | err); | |
311 | } | |
312 | ||
313 | err_fll: | |
314 | err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, fll); | |
315 | if (err != 0) { | |
316 | dev_err(arizona->dev, | |
317 | "Failed to re-apply old FLL settings: %d\n", | |
318 | err); | |
319 | } | |
320 | ||
321 | regcache_cache_bypass(arizona->regmap, false); | |
322 | ||
323 | if (ret != 0) | |
324 | return ret; | |
325 | else | |
326 | return err; | |
327 | } | |
328 | ||
3cc72986 MB |
329 | #ifdef CONFIG_PM_RUNTIME |
330 | static int arizona_runtime_resume(struct device *dev) | |
331 | { | |
332 | struct arizona *arizona = dev_get_drvdata(dev); | |
333 | int ret; | |
334 | ||
508c8299 MB |
335 | dev_dbg(arizona->dev, "Leaving AoD mode\n"); |
336 | ||
59db9691 MB |
337 | ret = regulator_enable(arizona->dcvdd); |
338 | if (ret != 0) { | |
339 | dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret); | |
340 | return ret; | |
341 | } | |
3cc72986 MB |
342 | |
343 | regcache_cache_only(arizona->regmap, false); | |
344 | ||
4c9bb8bc CK |
345 | switch (arizona->type) { |
346 | case WM5102: | |
347 | ret = wm5102_patch(arizona); | |
348 | if (ret != 0) { | |
349 | dev_err(arizona->dev, "Failed to apply patch: %d\n", | |
350 | ret); | |
351 | goto err; | |
352 | } | |
e80436bb CK |
353 | |
354 | ret = arizona_apply_hardware_patch(arizona); | |
355 | if (ret != 0) { | |
356 | dev_err(arizona->dev, | |
357 | "Failed to apply hardware patch: %d\n", | |
358 | ret); | |
359 | goto err; | |
360 | } | |
361 | break; | |
362 | default: | |
12bb68ed CK |
363 | ret = arizona_wait_for_boot(arizona); |
364 | if (ret != 0) { | |
365 | goto err; | |
366 | } | |
367 | ||
e80436bb | 368 | break; |
4c9bb8bc CK |
369 | } |
370 | ||
d9d03496 CK |
371 | switch (arizona->type) { |
372 | case WM5102: | |
373 | ret = wm5102_patch(arizona); | |
374 | if (ret != 0) { | |
375 | dev_err(arizona->dev, "Failed to apply patch: %d\n", | |
376 | ret); | |
377 | goto err; | |
378 | } | |
379 | default: | |
380 | break; | |
381 | } | |
382 | ||
9270bdf5 MB |
383 | ret = regcache_sync(arizona->regmap); |
384 | if (ret != 0) { | |
385 | dev_err(arizona->dev, "Failed to restore register cache\n"); | |
4816bd1c | 386 | goto err; |
9270bdf5 | 387 | } |
3cc72986 MB |
388 | |
389 | return 0; | |
4816bd1c MB |
390 | |
391 | err: | |
392 | regcache_cache_only(arizona->regmap, true); | |
393 | regulator_disable(arizona->dcvdd); | |
394 | return ret; | |
3cc72986 MB |
395 | } |
396 | ||
397 | static int arizona_runtime_suspend(struct device *dev) | |
398 | { | |
399 | struct arizona *arizona = dev_get_drvdata(dev); | |
400 | ||
508c8299 MB |
401 | dev_dbg(arizona->dev, "Entering AoD mode\n"); |
402 | ||
59db9691 MB |
403 | regulator_disable(arizona->dcvdd); |
404 | regcache_cache_only(arizona->regmap, true); | |
405 | regcache_mark_dirty(arizona->regmap); | |
3cc72986 MB |
406 | |
407 | return 0; | |
408 | } | |
409 | #endif | |
410 | ||
dc781d0e | 411 | #ifdef CONFIG_PM_SLEEP |
67c99296 MB |
412 | static int arizona_suspend(struct device *dev) |
413 | { | |
414 | struct arizona *arizona = dev_get_drvdata(dev); | |
415 | ||
416 | dev_dbg(arizona->dev, "Suspend, disabling IRQ\n"); | |
417 | disable_irq(arizona->irq); | |
418 | ||
419 | return 0; | |
420 | } | |
421 | ||
422 | static int arizona_suspend_late(struct device *dev) | |
423 | { | |
424 | struct arizona *arizona = dev_get_drvdata(dev); | |
425 | ||
426 | dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n"); | |
427 | enable_irq(arizona->irq); | |
428 | ||
429 | return 0; | |
430 | } | |
431 | ||
dc781d0e MB |
432 | static int arizona_resume_noirq(struct device *dev) |
433 | { | |
434 | struct arizona *arizona = dev_get_drvdata(dev); | |
435 | ||
436 | dev_dbg(arizona->dev, "Early resume, disabling IRQ\n"); | |
437 | disable_irq(arizona->irq); | |
438 | ||
439 | return 0; | |
440 | } | |
441 | ||
442 | static int arizona_resume(struct device *dev) | |
443 | { | |
444 | struct arizona *arizona = dev_get_drvdata(dev); | |
445 | ||
446 | dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n"); | |
447 | enable_irq(arizona->irq); | |
448 | ||
449 | return 0; | |
450 | } | |
451 | #endif | |
452 | ||
3cc72986 MB |
453 | const struct dev_pm_ops arizona_pm_ops = { |
454 | SET_RUNTIME_PM_OPS(arizona_runtime_suspend, | |
455 | arizona_runtime_resume, | |
456 | NULL) | |
67c99296 | 457 | SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume) |
dc781d0e | 458 | #ifdef CONFIG_PM_SLEEP |
67c99296 | 459 | .suspend_late = arizona_suspend_late, |
dc781d0e MB |
460 | .resume_noirq = arizona_resume_noirq, |
461 | #endif | |
3cc72986 MB |
462 | }; |
463 | EXPORT_SYMBOL_GPL(arizona_pm_ops); | |
464 | ||
465 | static struct mfd_cell early_devs[] = { | |
466 | { .name = "arizona-ldo1" }, | |
467 | }; | |
468 | ||
469 | static struct mfd_cell wm5102_devs[] = { | |
d7768111 | 470 | { .name = "arizona-micsupp" }, |
3cc72986 MB |
471 | { .name = "arizona-extcon" }, |
472 | { .name = "arizona-gpio" }, | |
503b1cac | 473 | { .name = "arizona-haptics" }, |
3cc72986 MB |
474 | { .name = "arizona-pwm" }, |
475 | { .name = "wm5102-codec" }, | |
476 | }; | |
477 | ||
e102befe | 478 | static struct mfd_cell wm5110_devs[] = { |
d7768111 | 479 | { .name = "arizona-micsupp" }, |
e102befe MB |
480 | { .name = "arizona-extcon" }, |
481 | { .name = "arizona-gpio" }, | |
503b1cac | 482 | { .name = "arizona-haptics" }, |
e102befe MB |
483 | { .name = "arizona-pwm" }, |
484 | { .name = "wm5110-codec" }, | |
485 | }; | |
486 | ||
f791be49 | 487 | int arizona_dev_init(struct arizona *arizona) |
3cc72986 MB |
488 | { |
489 | struct device *dev = arizona->dev; | |
490 | const char *type_name; | |
491 | unsigned int reg, val; | |
62d62b59 | 492 | int (*apply_patch)(struct arizona *) = NULL; |
3cc72986 MB |
493 | int ret, i; |
494 | ||
495 | dev_set_drvdata(arizona->dev, arizona); | |
496 | mutex_init(&arizona->clk_lock); | |
497 | ||
498 | if (dev_get_platdata(arizona->dev)) | |
499 | memcpy(&arizona->pdata, dev_get_platdata(arizona->dev), | |
500 | sizeof(arizona->pdata)); | |
501 | ||
502 | regcache_cache_only(arizona->regmap, true); | |
503 | ||
504 | switch (arizona->type) { | |
505 | case WM5102: | |
e102befe | 506 | case WM5110: |
3cc72986 MB |
507 | for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++) |
508 | arizona->core_supplies[i].supply | |
509 | = wm5102_core_supplies[i]; | |
510 | arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies); | |
511 | break; | |
512 | default: | |
513 | dev_err(arizona->dev, "Unknown device type %d\n", | |
514 | arizona->type); | |
515 | return -EINVAL; | |
516 | } | |
517 | ||
518 | ret = mfd_add_devices(arizona->dev, -1, early_devs, | |
0848c94f | 519 | ARRAY_SIZE(early_devs), NULL, 0, NULL); |
3cc72986 MB |
520 | if (ret != 0) { |
521 | dev_err(dev, "Failed to add early children: %d\n", ret); | |
522 | return ret; | |
523 | } | |
524 | ||
525 | ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies, | |
526 | arizona->core_supplies); | |
527 | if (ret != 0) { | |
528 | dev_err(dev, "Failed to request core supplies: %d\n", | |
529 | ret); | |
530 | goto err_early; | |
531 | } | |
532 | ||
59db9691 MB |
533 | arizona->dcvdd = devm_regulator_get(arizona->dev, "DCVDD"); |
534 | if (IS_ERR(arizona->dcvdd)) { | |
535 | ret = PTR_ERR(arizona->dcvdd); | |
536 | dev_err(dev, "Failed to request DCVDD: %d\n", ret); | |
537 | goto err_early; | |
538 | } | |
539 | ||
87d3af4a MB |
540 | if (arizona->pdata.reset) { |
541 | /* Start out with /RESET low to put the chip into reset */ | |
542 | ret = gpio_request_one(arizona->pdata.reset, | |
543 | GPIOF_DIR_OUT | GPIOF_INIT_LOW, | |
544 | "arizona /RESET"); | |
545 | if (ret != 0) { | |
546 | dev_err(dev, "Failed to request /RESET: %d\n", ret); | |
547 | goto err_early; | |
548 | } | |
549 | } | |
550 | ||
3cc72986 MB |
551 | ret = regulator_bulk_enable(arizona->num_core_supplies, |
552 | arizona->core_supplies); | |
553 | if (ret != 0) { | |
554 | dev_err(dev, "Failed to enable core supplies: %d\n", | |
555 | ret); | |
556 | goto err_early; | |
557 | } | |
558 | ||
59db9691 MB |
559 | ret = regulator_enable(arizona->dcvdd); |
560 | if (ret != 0) { | |
561 | dev_err(dev, "Failed to enable DCVDD: %d\n", ret); | |
562 | goto err_enable; | |
563 | } | |
564 | ||
c25feaa5 | 565 | if (arizona->pdata.reset) { |
3cc72986 | 566 | gpio_set_value_cansleep(arizona->pdata.reset, 1); |
c25feaa5 CK |
567 | msleep(1); |
568 | } | |
3cc72986 | 569 | |
3cc72986 MB |
570 | regcache_cache_only(arizona->regmap, false); |
571 | ||
ca76ceb8 | 572 | /* Verify that this is a chip we know about */ |
3cc72986 MB |
573 | ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); |
574 | if (ret != 0) { | |
575 | dev_err(dev, "Failed to read ID register: %d\n", ret); | |
59db9691 | 576 | goto err_reset; |
3cc72986 MB |
577 | } |
578 | ||
3cc72986 MB |
579 | switch (reg) { |
580 | case 0x5102: | |
e102befe | 581 | case 0x5110: |
e102befe | 582 | break; |
3cc72986 | 583 | default: |
ca76ceb8 | 584 | dev_err(arizona->dev, "Unknown device ID: %x\n", reg); |
59db9691 | 585 | goto err_reset; |
3cc72986 MB |
586 | } |
587 | ||
3cc72986 MB |
588 | /* If we have a /RESET GPIO we'll already be reset */ |
589 | if (!arizona->pdata.reset) { | |
46b9d13a CK |
590 | regcache_mark_dirty(arizona->regmap); |
591 | ||
3cc72986 MB |
592 | ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0); |
593 | if (ret != 0) { | |
594 | dev_err(dev, "Failed to reset device: %d\n", ret); | |
59db9691 | 595 | goto err_reset; |
3cc72986 | 596 | } |
46b9d13a | 597 | |
c25feaa5 CK |
598 | msleep(1); |
599 | ||
46b9d13a CK |
600 | ret = regcache_sync(arizona->regmap); |
601 | if (ret != 0) { | |
602 | dev_err(dev, "Failed to sync device: %d\n", ret); | |
603 | goto err_reset; | |
604 | } | |
3cc72986 MB |
605 | } |
606 | ||
ca76ceb8 | 607 | /* Ensure device startup is complete */ |
d955cba8 CK |
608 | switch (arizona->type) { |
609 | case WM5102: | |
610 | ret = regmap_read(arizona->regmap, 0x19, &val); | |
611 | if (ret != 0) | |
612 | dev_err(dev, | |
613 | "Failed to check write sequencer state: %d\n", | |
614 | ret); | |
615 | else if (val & 0x01) | |
616 | break; | |
617 | /* Fall through */ | |
618 | default: | |
619 | ret = arizona_wait_for_boot(arizona); | |
620 | if (ret != 0) { | |
621 | dev_err(arizona->dev, | |
622 | "Device failed initial boot: %d\n", ret); | |
623 | goto err_reset; | |
624 | } | |
625 | break; | |
af65a361 | 626 | } |
3cc72986 | 627 | |
ca76ceb8 MB |
628 | /* Read the device ID information & do device specific stuff */ |
629 | ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); | |
630 | if (ret != 0) { | |
631 | dev_err(dev, "Failed to read ID register: %d\n", ret); | |
632 | goto err_reset; | |
633 | } | |
634 | ||
635 | ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION, | |
636 | &arizona->rev); | |
637 | if (ret != 0) { | |
638 | dev_err(dev, "Failed to read revision register: %d\n", ret); | |
639 | goto err_reset; | |
640 | } | |
641 | arizona->rev &= ARIZONA_DEVICE_REVISION_MASK; | |
642 | ||
643 | switch (reg) { | |
644 | #ifdef CONFIG_MFD_WM5102 | |
645 | case 0x5102: | |
646 | type_name = "WM5102"; | |
647 | if (arizona->type != WM5102) { | |
648 | dev_err(arizona->dev, "WM5102 registered as %d\n", | |
649 | arizona->type); | |
650 | arizona->type = WM5102; | |
651 | } | |
652 | apply_patch = wm5102_patch; | |
653 | arizona->rev &= 0x7; | |
654 | break; | |
655 | #endif | |
656 | #ifdef CONFIG_MFD_WM5110 | |
657 | case 0x5110: | |
658 | type_name = "WM5110"; | |
659 | if (arizona->type != WM5110) { | |
660 | dev_err(arizona->dev, "WM5110 registered as %d\n", | |
661 | arizona->type); | |
662 | arizona->type = WM5110; | |
663 | } | |
664 | apply_patch = wm5110_patch; | |
665 | break; | |
666 | #endif | |
667 | default: | |
668 | dev_err(arizona->dev, "Unknown device ID %x\n", reg); | |
669 | goto err_reset; | |
670 | } | |
671 | ||
672 | dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A'); | |
673 | ||
62d62b59 MB |
674 | if (apply_patch) { |
675 | ret = apply_patch(arizona); | |
676 | if (ret != 0) { | |
677 | dev_err(arizona->dev, "Failed to apply patch: %d\n", | |
678 | ret); | |
679 | goto err_reset; | |
680 | } | |
e80436bb CK |
681 | |
682 | switch (arizona->type) { | |
683 | case WM5102: | |
684 | ret = arizona_apply_hardware_patch(arizona); | |
685 | if (ret != 0) { | |
686 | dev_err(arizona->dev, | |
687 | "Failed to apply hardware patch: %d\n", | |
688 | ret); | |
689 | goto err_reset; | |
690 | } | |
691 | break; | |
692 | default: | |
693 | break; | |
694 | } | |
62d62b59 MB |
695 | } |
696 | ||
3cc72986 MB |
697 | for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) { |
698 | if (!arizona->pdata.gpio_defaults[i]) | |
699 | continue; | |
700 | ||
701 | regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i, | |
702 | arizona->pdata.gpio_defaults[i]); | |
703 | } | |
704 | ||
705 | pm_runtime_set_autosuspend_delay(arizona->dev, 100); | |
706 | pm_runtime_use_autosuspend(arizona->dev); | |
707 | pm_runtime_enable(arizona->dev); | |
708 | ||
709 | /* Chip default */ | |
710 | if (!arizona->pdata.clk32k_src) | |
711 | arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2; | |
712 | ||
713 | switch (arizona->pdata.clk32k_src) { | |
714 | case ARIZONA_32KZ_MCLK1: | |
715 | case ARIZONA_32KZ_MCLK2: | |
716 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, | |
717 | ARIZONA_CLK_32K_SRC_MASK, | |
718 | arizona->pdata.clk32k_src - 1); | |
767c6dc0 | 719 | arizona_clk32k_enable(arizona); |
3cc72986 MB |
720 | break; |
721 | case ARIZONA_32KZ_NONE: | |
722 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, | |
723 | ARIZONA_CLK_32K_SRC_MASK, 2); | |
724 | break; | |
725 | default: | |
726 | dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n", | |
727 | arizona->pdata.clk32k_src); | |
728 | ret = -EINVAL; | |
59db9691 | 729 | goto err_reset; |
3cc72986 MB |
730 | } |
731 | ||
3d91f828 | 732 | for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) { |
544c7aad MB |
733 | if (!arizona->pdata.micbias[i].mV && |
734 | !arizona->pdata.micbias[i].bypass) | |
3d91f828 MB |
735 | continue; |
736 | ||
544c7aad MB |
737 | /* Apply default for bypass mode */ |
738 | if (!arizona->pdata.micbias[i].mV) | |
739 | arizona->pdata.micbias[i].mV = 2800; | |
740 | ||
3d91f828 | 741 | val = (arizona->pdata.micbias[i].mV - 1500) / 100; |
544c7aad | 742 | |
3d91f828 MB |
743 | val <<= ARIZONA_MICB1_LVL_SHIFT; |
744 | ||
745 | if (arizona->pdata.micbias[i].ext_cap) | |
746 | val |= ARIZONA_MICB1_EXT_CAP; | |
747 | ||
748 | if (arizona->pdata.micbias[i].discharge) | |
749 | val |= ARIZONA_MICB1_DISCH; | |
750 | ||
751 | if (arizona->pdata.micbias[i].fast_start) | |
752 | val |= ARIZONA_MICB1_RATE; | |
753 | ||
544c7aad MB |
754 | if (arizona->pdata.micbias[i].bypass) |
755 | val |= ARIZONA_MICB1_BYPASS; | |
756 | ||
3d91f828 MB |
757 | regmap_update_bits(arizona->regmap, |
758 | ARIZONA_MIC_BIAS_CTRL_1 + i, | |
759 | ARIZONA_MICB1_LVL_MASK | | |
760 | ARIZONA_MICB1_DISCH | | |
544c7aad | 761 | ARIZONA_MICB1_BYPASS | |
3d91f828 MB |
762 | ARIZONA_MICB1_RATE, val); |
763 | } | |
764 | ||
3cc72986 MB |
765 | for (i = 0; i < ARIZONA_MAX_INPUT; i++) { |
766 | /* Default for both is 0 so noop with defaults */ | |
767 | val = arizona->pdata.dmic_ref[i] | |
768 | << ARIZONA_IN1_DMIC_SUP_SHIFT; | |
769 | val |= arizona->pdata.inmode[i] << ARIZONA_IN1_MODE_SHIFT; | |
770 | ||
771 | regmap_update_bits(arizona->regmap, | |
772 | ARIZONA_IN1L_CONTROL + (i * 8), | |
773 | ARIZONA_IN1_DMIC_SUP_MASK | | |
774 | ARIZONA_IN1_MODE_MASK, val); | |
775 | } | |
776 | ||
777 | for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) { | |
778 | /* Default is 0 so noop with defaults */ | |
779 | if (arizona->pdata.out_mono[i]) | |
780 | val = ARIZONA_OUT1_MONO; | |
781 | else | |
782 | val = 0; | |
783 | ||
784 | regmap_update_bits(arizona->regmap, | |
785 | ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8), | |
786 | ARIZONA_OUT1_MONO, val); | |
787 | } | |
788 | ||
3cc72986 MB |
789 | for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) { |
790 | if (arizona->pdata.spk_mute[i]) | |
791 | regmap_update_bits(arizona->regmap, | |
2a51da04 | 792 | ARIZONA_PDM_SPK1_CTRL_1 + (i * 2), |
3cc72986 MB |
793 | ARIZONA_SPK1_MUTE_ENDIAN_MASK | |
794 | ARIZONA_SPK1_MUTE_SEQ1_MASK, | |
795 | arizona->pdata.spk_mute[i]); | |
796 | ||
797 | if (arizona->pdata.spk_fmt[i]) | |
798 | regmap_update_bits(arizona->regmap, | |
2a51da04 | 799 | ARIZONA_PDM_SPK1_CTRL_2 + (i * 2), |
3cc72986 MB |
800 | ARIZONA_SPK1_FMT_MASK, |
801 | arizona->pdata.spk_fmt[i]); | |
802 | } | |
803 | ||
804 | /* Set up for interrupts */ | |
805 | ret = arizona_irq_init(arizona); | |
806 | if (ret != 0) | |
59db9691 | 807 | goto err_reset; |
3cc72986 MB |
808 | |
809 | arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error", | |
810 | arizona_clkgen_err, arizona); | |
811 | arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked", | |
812 | arizona_overclocked, arizona); | |
813 | arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked", | |
814 | arizona_underclocked, arizona); | |
815 | ||
816 | switch (arizona->type) { | |
817 | case WM5102: | |
818 | ret = mfd_add_devices(arizona->dev, -1, wm5102_devs, | |
0848c94f | 819 | ARRAY_SIZE(wm5102_devs), NULL, 0, NULL); |
e102befe MB |
820 | break; |
821 | case WM5110: | |
822 | ret = mfd_add_devices(arizona->dev, -1, wm5110_devs, | |
78566afd | 823 | ARRAY_SIZE(wm5110_devs), NULL, 0, NULL); |
3cc72986 MB |
824 | break; |
825 | } | |
826 | ||
827 | if (ret != 0) { | |
828 | dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret); | |
829 | goto err_irq; | |
830 | } | |
831 | ||
59db9691 MB |
832 | #ifdef CONFIG_PM_RUNTIME |
833 | regulator_disable(arizona->dcvdd); | |
834 | #endif | |
835 | ||
3cc72986 MB |
836 | return 0; |
837 | ||
838 | err_irq: | |
839 | arizona_irq_exit(arizona); | |
3cc72986 MB |
840 | err_reset: |
841 | if (arizona->pdata.reset) { | |
87d3af4a | 842 | gpio_set_value_cansleep(arizona->pdata.reset, 0); |
3cc72986 MB |
843 | gpio_free(arizona->pdata.reset); |
844 | } | |
59db9691 | 845 | regulator_disable(arizona->dcvdd); |
3cc72986 | 846 | err_enable: |
3a36a0db | 847 | regulator_bulk_disable(arizona->num_core_supplies, |
3cc72986 MB |
848 | arizona->core_supplies); |
849 | err_early: | |
850 | mfd_remove_devices(dev); | |
851 | return ret; | |
852 | } | |
853 | EXPORT_SYMBOL_GPL(arizona_dev_init); | |
854 | ||
4740f73f | 855 | int arizona_dev_exit(struct arizona *arizona) |
3cc72986 MB |
856 | { |
857 | mfd_remove_devices(arizona->dev); | |
858 | arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona); | |
859 | arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona); | |
860 | arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona); | |
861 | pm_runtime_disable(arizona->dev); | |
862 | arizona_irq_exit(arizona); | |
1d017b6b MB |
863 | if (arizona->pdata.reset) |
864 | gpio_set_value_cansleep(arizona->pdata.reset, 0); | |
865 | regulator_disable(arizona->dcvdd); | |
866 | regulator_bulk_disable(ARRAY_SIZE(arizona->core_supplies), | |
867 | arizona->core_supplies); | |
3cc72986 MB |
868 | return 0; |
869 | } | |
870 | EXPORT_SYMBOL_GPL(arizona_dev_exit); |