mfd: arizona: Factor out SYSCLK enable from wm5102 hardware patch
[linux-2.6-block.git] / drivers / mfd / arizona-core.c
CommitLineData
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1/*
2 * Arizona core driver
3 *
4 * Copyright 2012 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/delay.h>
59db9691 14#include <linux/err.h>
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15#include <linux/gpio.h>
16#include <linux/interrupt.h>
17#include <linux/mfd/core.h>
18#include <linux/module.h>
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19#include <linux/of.h>
20#include <linux/of_device.h>
21#include <linux/of_gpio.h>
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22#include <linux/pm_runtime.h>
23#include <linux/regmap.h>
24#include <linux/regulator/consumer.h>
5927467d 25#include <linux/regulator/machine.h>
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26#include <linux/slab.h>
27
28#include <linux/mfd/arizona/core.h>
29#include <linux/mfd/arizona/registers.h>
30
31#include "arizona.h"
32
33static const char *wm5102_core_supplies[] = {
34 "AVDD",
35 "DBVDD1",
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36};
37
38int arizona_clk32k_enable(struct arizona *arizona)
39{
40 int ret = 0;
41
42 mutex_lock(&arizona->clk_lock);
43
44 arizona->clk32k_ref++;
45
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46 if (arizona->clk32k_ref == 1) {
47 switch (arizona->pdata.clk32k_src) {
48 case ARIZONA_32KZ_MCLK1:
49 ret = pm_runtime_get_sync(arizona->dev);
50 if (ret != 0)
51 goto out;
52 break;
53 }
54
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55 ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
56 ARIZONA_CLK_32K_ENA,
57 ARIZONA_CLK_32K_ENA);
247fa192 58 }
3cc72986 59
247fa192 60out:
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61 if (ret != 0)
62 arizona->clk32k_ref--;
63
64 mutex_unlock(&arizona->clk_lock);
65
66 return ret;
67}
68EXPORT_SYMBOL_GPL(arizona_clk32k_enable);
69
70int arizona_clk32k_disable(struct arizona *arizona)
71{
72 int ret = 0;
73
74 mutex_lock(&arizona->clk_lock);
75
76 BUG_ON(arizona->clk32k_ref <= 0);
77
78 arizona->clk32k_ref--;
79
247fa192 80 if (arizona->clk32k_ref == 0) {
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81 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
82 ARIZONA_CLK_32K_ENA, 0);
83
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84 switch (arizona->pdata.clk32k_src) {
85 case ARIZONA_32KZ_MCLK1:
86 pm_runtime_put_sync(arizona->dev);
87 break;
88 }
89 }
90
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91 mutex_unlock(&arizona->clk_lock);
92
93 return ret;
94}
95EXPORT_SYMBOL_GPL(arizona_clk32k_disable);
96
97static irqreturn_t arizona_clkgen_err(int irq, void *data)
98{
99 struct arizona *arizona = data;
100
101 dev_err(arizona->dev, "CLKGEN error\n");
102
103 return IRQ_HANDLED;
104}
105
106static irqreturn_t arizona_underclocked(int irq, void *data)
107{
108 struct arizona *arizona = data;
109 unsigned int val;
110 int ret;
111
112 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8,
113 &val);
114 if (ret != 0) {
115 dev_err(arizona->dev, "Failed to read underclock status: %d\n",
116 ret);
117 return IRQ_NONE;
118 }
119
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120 if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
121 dev_err(arizona->dev, "AIF3 underclocked\n");
122 if (val & ARIZONA_AIF2_UNDERCLOCKED_STS)
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123 dev_err(arizona->dev, "AIF2 underclocked\n");
124 if (val & ARIZONA_AIF1_UNDERCLOCKED_STS)
3cc72986 125 dev_err(arizona->dev, "AIF1 underclocked\n");
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126 if (val & ARIZONA_ISRC3_UNDERCLOCKED_STS)
127 dev_err(arizona->dev, "ISRC3 underclocked\n");
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128 if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS)
129 dev_err(arizona->dev, "ISRC2 underclocked\n");
130 if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS)
131 dev_err(arizona->dev, "ISRC1 underclocked\n");
132 if (val & ARIZONA_FX_UNDERCLOCKED_STS)
133 dev_err(arizona->dev, "FX underclocked\n");
134 if (val & ARIZONA_ASRC_UNDERCLOCKED_STS)
135 dev_err(arizona->dev, "ASRC underclocked\n");
136 if (val & ARIZONA_DAC_UNDERCLOCKED_STS)
137 dev_err(arizona->dev, "DAC underclocked\n");
138 if (val & ARIZONA_ADC_UNDERCLOCKED_STS)
139 dev_err(arizona->dev, "ADC underclocked\n");
140 if (val & ARIZONA_MIXER_UNDERCLOCKED_STS)
648a9880 141 dev_err(arizona->dev, "Mixer dropped sample\n");
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142
143 return IRQ_HANDLED;
144}
145
146static irqreturn_t arizona_overclocked(int irq, void *data)
147{
148 struct arizona *arizona = data;
149 unsigned int val[2];
150 int ret;
151
152 ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
153 &val[0], 2);
154 if (ret != 0) {
155 dev_err(arizona->dev, "Failed to read overclock status: %d\n",
156 ret);
157 return IRQ_NONE;
158 }
159
160 if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
161 dev_err(arizona->dev, "PWM overclocked\n");
162 if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
163 dev_err(arizona->dev, "FX core overclocked\n");
164 if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS)
165 dev_err(arizona->dev, "DAC SYS overclocked\n");
166 if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS)
167 dev_err(arizona->dev, "DAC WARP overclocked\n");
168 if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS)
169 dev_err(arizona->dev, "ADC overclocked\n");
170 if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS)
171 dev_err(arizona->dev, "Mixer overclocked\n");
172 if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS)
173 dev_err(arizona->dev, "AIF3 overclocked\n");
174 if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS)
175 dev_err(arizona->dev, "AIF2 overclocked\n");
176 if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS)
177 dev_err(arizona->dev, "AIF1 overclocked\n");
178 if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS)
179 dev_err(arizona->dev, "Pad control overclocked\n");
180
181 if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS)
182 dev_err(arizona->dev, "Slimbus subsystem overclocked\n");
183 if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS)
184 dev_err(arizona->dev, "Slimbus async overclocked\n");
185 if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS)
186 dev_err(arizona->dev, "Slimbus sync overclocked\n");
187 if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS)
188 dev_err(arizona->dev, "ASRC async system overclocked\n");
189 if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS)
190 dev_err(arizona->dev, "ASRC async WARP overclocked\n");
191 if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS)
192 dev_err(arizona->dev, "ASRC sync system overclocked\n");
193 if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS)
194 dev_err(arizona->dev, "ASRC sync WARP overclocked\n");
195 if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS)
196 dev_err(arizona->dev, "DSP1 overclocked\n");
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197 if (val[1] & ARIZONA_ISRC3_OVERCLOCKED_STS)
198 dev_err(arizona->dev, "ISRC3 overclocked\n");
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199 if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS)
200 dev_err(arizona->dev, "ISRC2 overclocked\n");
201 if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
202 dev_err(arizona->dev, "ISRC1 overclocked\n");
203
204 return IRQ_HANDLED;
205}
206
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207static int arizona_poll_reg(struct arizona *arizona,
208 int timeout, unsigned int reg,
209 unsigned int mask, unsigned int target)
3cc72986 210{
9d53dfdc 211 unsigned int val = 0;
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212 int ret, i;
213
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214 for (i = 0; i < timeout; i++) {
215 ret = regmap_read(arizona->regmap, reg, &val);
3cc72986 216 if (ret != 0) {
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217 dev_err(arizona->dev, "Failed to read reg %u: %d\n",
218 reg, ret);
cfe775ce 219 continue;
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220 }
221
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222 if ((val & mask) == target)
223 return 0;
224
225 msleep(1);
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226 }
227
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228 dev_err(arizona->dev, "Polling reg %u timed out: %x\n", reg, val);
229 return -ETIMEDOUT;
230}
231
232static int arizona_wait_for_boot(struct arizona *arizona)
233{
234 int ret;
235
236 /*
237 * We can't use an interrupt as we need to runtime resume to do so,
238 * we won't race with the interrupt handler as it'll be blocked on
239 * runtime resume.
240 */
241 ret = arizona_poll_reg(arizona, 5, ARIZONA_INTERRUPT_RAW_STATUS_5,
242 ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS);
243
244 if (!ret)
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245 regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5,
246 ARIZONA_BOOT_DONE_STS);
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247
248 pm_runtime_mark_last_busy(arizona->dev);
249
9d53dfdc 250 return ret;
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251}
252
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253static inline void arizona_enable_reset(struct arizona *arizona)
254{
255 if (arizona->pdata.reset)
256 gpio_set_value_cansleep(arizona->pdata.reset, 0);
257}
258
259static void arizona_disable_reset(struct arizona *arizona)
260{
261 if (arizona->pdata.reset) {
262 gpio_set_value_cansleep(arizona->pdata.reset, 1);
263 msleep(1);
264 }
265}
266
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267struct arizona_sysclk_state {
268 unsigned int fll;
269 unsigned int sysclk;
270};
271
272static int arizona_enable_freerun_sysclk(struct arizona *arizona,
273 struct arizona_sysclk_state *state)
e80436bb 274{
e80436bb
CK
275 int ret, err;
276
e80436bb 277 /* Cache existing FLL and SYSCLK settings */
3850e3ee 278 ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &state->fll);
0be068a0 279 if (ret) {
e80436bb
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280 dev_err(arizona->dev, "Failed to cache FLL settings: %d\n",
281 ret);
282 return ret;
283 }
3850e3ee
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284 ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1,
285 &state->sysclk);
0be068a0 286 if (ret) {
e80436bb
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287 dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n",
288 ret);
289 return ret;
290 }
291
292 /* Start up SYSCLK using the FLL in free running mode */
293 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1,
294 ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN);
0be068a0 295 if (ret) {
e80436bb
CK
296 dev_err(arizona->dev,
297 "Failed to start FLL in freerunning mode: %d\n",
298 ret);
299 return ret;
300 }
301 ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5,
302 ARIZONA_FLL1_CLOCK_OK_STS,
303 ARIZONA_FLL1_CLOCK_OK_STS);
0be068a0 304 if (ret) {
e80436bb
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305 ret = -ETIMEDOUT;
306 goto err_fll;
307 }
308
309 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144);
0be068a0 310 if (ret) {
e80436bb
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311 dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret);
312 goto err_fll;
313 }
314
3850e3ee
CK
315 return 0;
316
317err_fll:
318 err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll);
319 if (err)
320 dev_err(arizona->dev,
321 "Failed to re-apply old FLL settings: %d\n", err);
322
323 return ret;
324}
325
326static int arizona_disable_freerun_sysclk(struct arizona *arizona,
327 struct arizona_sysclk_state *state)
328{
329 int ret;
330
331 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1,
332 state->sysclk);
333 if (ret) {
334 dev_err(arizona->dev,
335 "Failed to re-apply old SYSCLK settings: %d\n", ret);
336 return ret;
337 }
338
339 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll);
340 if (ret) {
341 dev_err(arizona->dev,
342 "Failed to re-apply old FLL settings: %d\n", ret);
343 return ret;
344 }
345
346 return 0;
347}
348
349static int wm5102_apply_hardware_patch(struct arizona *arizona)
350{
351 struct arizona_sysclk_state state;
352 int err, ret;
353
354 ret = arizona_enable_freerun_sysclk(arizona, &state);
355 if (ret)
356 return ret;
357
e80436bb
CK
358 /* Start the write sequencer and wait for it to finish */
359 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
0be068a0
CK
360 ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160);
361 if (ret) {
e80436bb
CK
362 dev_err(arizona->dev, "Failed to start write sequencer: %d\n",
363 ret);
3850e3ee 364 goto err;
e80436bb 365 }
3850e3ee 366
e80436bb
CK
367 ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1,
368 ARIZONA_WSEQ_BUSY, 0);
0be068a0 369 if (ret) {
e80436bb 370 regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
0be068a0 371 ARIZONA_WSEQ_ABORT);
e80436bb
CK
372 ret = -ETIMEDOUT;
373 }
374
3850e3ee
CK
375err:
376 err = arizona_disable_freerun_sysclk(arizona, &state);
e80436bb 377
0be068a0 378 return ret ?: err;
e80436bb
CK
379}
380
1c1c6bba
CK
381static int wm5102_clear_write_sequencer(struct arizona *arizona)
382{
383 int ret;
384
385 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_3,
386 0x0);
387 if (ret) {
388 dev_err(arizona->dev,
389 "Failed to clear write sequencer state: %d\n", ret);
390 return ret;
391 }
392
393 arizona_enable_reset(arizona);
394 regulator_disable(arizona->dcvdd);
395
396 msleep(20);
397
398 ret = regulator_enable(arizona->dcvdd);
399 if (ret) {
400 dev_err(arizona->dev, "Failed to re-enable DCVDD: %d\n", ret);
401 return ret;
402 }
403 arizona_disable_reset(arizona);
404
405 return 0;
406}
407
48bb9fe4 408#ifdef CONFIG_PM
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409static int arizona_runtime_resume(struct device *dev)
410{
411 struct arizona *arizona = dev_get_drvdata(dev);
412 int ret;
413
508c8299
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414 dev_dbg(arizona->dev, "Leaving AoD mode\n");
415
59db9691
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416 ret = regulator_enable(arizona->dcvdd);
417 if (ret != 0) {
418 dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret);
419 return ret;
420 }
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421
422 regcache_cache_only(arizona->regmap, false);
423
4c9bb8bc
CK
424 switch (arizona->type) {
425 case WM5102:
5927467d
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426 if (arizona->external_dcvdd) {
427 ret = regmap_update_bits(arizona->regmap,
428 ARIZONA_ISOLATION_CONTROL,
429 ARIZONA_ISOLATE_DCVDD1, 0);
430 if (ret != 0) {
431 dev_err(arizona->dev,
432 "Failed to connect DCVDD: %d\n", ret);
433 goto err;
434 }
435 }
436
4c9bb8bc
CK
437 ret = wm5102_patch(arizona);
438 if (ret != 0) {
439 dev_err(arizona->dev, "Failed to apply patch: %d\n",
440 ret);
441 goto err;
442 }
e80436bb 443
0be068a0
CK
444 ret = wm5102_apply_hardware_patch(arizona);
445 if (ret) {
e80436bb
CK
446 dev_err(arizona->dev,
447 "Failed to apply hardware patch: %d\n",
448 ret);
449 goto err;
450 }
451 break;
452 default:
12bb68ed
CK
453 ret = arizona_wait_for_boot(arizona);
454 if (ret != 0) {
455 goto err;
456 }
457
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458 if (arizona->external_dcvdd) {
459 ret = regmap_update_bits(arizona->regmap,
460 ARIZONA_ISOLATION_CONTROL,
461 ARIZONA_ISOLATE_DCVDD1, 0);
462 if (ret != 0) {
463 dev_err(arizona->dev,
464 "Failed to connect DCVDD: %d\n", ret);
465 goto err;
466 }
467 }
e80436bb 468 break;
4c9bb8bc
CK
469 }
470
9270bdf5
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471 ret = regcache_sync(arizona->regmap);
472 if (ret != 0) {
473 dev_err(arizona->dev, "Failed to restore register cache\n");
4816bd1c 474 goto err;
9270bdf5 475 }
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476
477 return 0;
4816bd1c
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478
479err:
480 regcache_cache_only(arizona->regmap, true);
481 regulator_disable(arizona->dcvdd);
482 return ret;
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483}
484
485static int arizona_runtime_suspend(struct device *dev)
486{
487 struct arizona *arizona = dev_get_drvdata(dev);
5927467d 488 int ret;
3cc72986 489
508c8299
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490 dev_dbg(arizona->dev, "Entering AoD mode\n");
491
5927467d
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492 if (arizona->external_dcvdd) {
493 ret = regmap_update_bits(arizona->regmap,
494 ARIZONA_ISOLATION_CONTROL,
495 ARIZONA_ISOLATE_DCVDD1,
496 ARIZONA_ISOLATE_DCVDD1);
497 if (ret != 0) {
498 dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n",
499 ret);
500 return ret;
501 }
502 }
503
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504 regcache_cache_only(arizona->regmap, true);
505 regcache_mark_dirty(arizona->regmap);
e293e847 506 regulator_disable(arizona->dcvdd);
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507
508 return 0;
509}
510#endif
511
dc781d0e 512#ifdef CONFIG_PM_SLEEP
67c99296
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513static int arizona_suspend(struct device *dev)
514{
515 struct arizona *arizona = dev_get_drvdata(dev);
516
517 dev_dbg(arizona->dev, "Suspend, disabling IRQ\n");
518 disable_irq(arizona->irq);
519
520 return 0;
521}
522
523static int arizona_suspend_late(struct device *dev)
524{
525 struct arizona *arizona = dev_get_drvdata(dev);
526
527 dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n");
528 enable_irq(arizona->irq);
529
530 return 0;
531}
532
dc781d0e
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533static int arizona_resume_noirq(struct device *dev)
534{
535 struct arizona *arizona = dev_get_drvdata(dev);
536
537 dev_dbg(arizona->dev, "Early resume, disabling IRQ\n");
538 disable_irq(arizona->irq);
539
540 return 0;
541}
542
543static int arizona_resume(struct device *dev)
544{
545 struct arizona *arizona = dev_get_drvdata(dev);
546
547 dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n");
548 enable_irq(arizona->irq);
549
550 return 0;
551}
552#endif
553
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554const struct dev_pm_ops arizona_pm_ops = {
555 SET_RUNTIME_PM_OPS(arizona_runtime_suspend,
556 arizona_runtime_resume,
557 NULL)
67c99296 558 SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume)
dc781d0e 559#ifdef CONFIG_PM_SLEEP
67c99296 560 .suspend_late = arizona_suspend_late,
dc781d0e
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561 .resume_noirq = arizona_resume_noirq,
562#endif
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563};
564EXPORT_SYMBOL_GPL(arizona_pm_ops);
565
d781009c 566#ifdef CONFIG_OF
942786e6 567unsigned long arizona_of_get_type(struct device *dev)
d781009c
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568{
569 const struct of_device_id *id = of_match_device(arizona_of_match, dev);
570
571 if (id)
942786e6 572 return (unsigned long)id->data;
d781009c
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573 else
574 return 0;
575}
576EXPORT_SYMBOL_GPL(arizona_of_get_type);
577
e4fcb1d6
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578int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop,
579 bool mandatory)
580{
581 int gpio;
582
583 gpio = of_get_named_gpio(arizona->dev->of_node, prop, 0);
584 if (gpio < 0) {
585 if (mandatory)
586 dev_err(arizona->dev,
587 "Mandatory DT gpio %s missing/malformed: %d\n",
588 prop, gpio);
589
590 gpio = 0;
591 }
592
593 return gpio;
594}
595EXPORT_SYMBOL_GPL(arizona_of_get_named_gpio);
596
d781009c
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597static int arizona_of_get_core_pdata(struct arizona *arizona)
598{
e4fcb1d6 599 struct arizona_pdata *pdata = &arizona->pdata;
cc47aed9
IS
600 struct property *prop;
601 const __be32 *cur;
602 u32 val;
d781009c 603 int ret, i;
cc47aed9 604 int count = 0;
d781009c 605
e4fcb1d6 606 pdata->reset = arizona_of_get_named_gpio(arizona, "wlf,reset", true);
d781009c
MB
607
608 ret = of_property_read_u32_array(arizona->dev->of_node,
609 "wlf,gpio-defaults",
610 arizona->pdata.gpio_defaults,
611 ARRAY_SIZE(arizona->pdata.gpio_defaults));
612 if (ret >= 0) {
613 /*
614 * All values are literal except out of range values
615 * which are chip default, translate into platform
616 * data which uses 0 as chip default and out of range
617 * as zero.
618 */
619 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
620 if (arizona->pdata.gpio_defaults[i] > 0xffff)
621 arizona->pdata.gpio_defaults[i] = 0;
91c73935 622 else if (arizona->pdata.gpio_defaults[i] == 0)
d781009c
MB
623 arizona->pdata.gpio_defaults[i] = 0x10000;
624 }
625 } else {
626 dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n",
627 ret);
628 }
629
cc47aed9
IS
630 of_property_for_each_u32(arizona->dev->of_node, "wlf,inmode", prop,
631 cur, val) {
632 if (count == ARRAY_SIZE(arizona->pdata.inmode))
633 break;
634
635 arizona->pdata.inmode[count] = val;
636 count++;
637 }
638
e7ad27ca
CK
639 count = 0;
640 of_property_for_each_u32(arizona->dev->of_node, "wlf,dmic-ref", prop,
641 cur, val) {
642 if (count == ARRAY_SIZE(arizona->pdata.dmic_ref))
643 break;
644
645 arizona->pdata.dmic_ref[count] = val;
646 count++;
647 }
648
d781009c
MB
649 return 0;
650}
651
652const struct of_device_id arizona_of_match[] = {
653 { .compatible = "wlf,wm5102", .data = (void *)WM5102 },
654 { .compatible = "wlf,wm5110", .data = (void *)WM5110 },
e5d4ef0d 655 { .compatible = "wlf,wm8280", .data = (void *)WM8280 },
dc7d4863 656 { .compatible = "wlf,wm8997", .data = (void *)WM8997 },
d781009c
MB
657 {},
658};
659EXPORT_SYMBOL_GPL(arizona_of_match);
660#else
661static inline int arizona_of_get_core_pdata(struct arizona *arizona)
662{
663 return 0;
664}
665#endif
666
5ac98553 667static const struct mfd_cell early_devs[] = {
3cc72986
MB
668 { .name = "arizona-ldo1" },
669};
670
32dadef2 671static const char *wm5102_supplies[] = {
5fc6c396 672 "MICVDD",
32dadef2
CK
673 "DBVDD2",
674 "DBVDD3",
675 "CPVDD",
676 "SPKVDDL",
677 "SPKVDDR",
678};
679
5ac98553 680static const struct mfd_cell wm5102_devs[] = {
d7768111 681 { .name = "arizona-micsupp" },
5fc6c396
CK
682 {
683 .name = "arizona-extcon",
684 .parent_supplies = wm5102_supplies,
685 .num_parent_supplies = 1, /* We only need MICVDD */
686 },
3cc72986 687 { .name = "arizona-gpio" },
503b1cac 688 { .name = "arizona-haptics" },
3cc72986 689 { .name = "arizona-pwm" },
32dadef2
CK
690 {
691 .name = "wm5102-codec",
692 .parent_supplies = wm5102_supplies,
693 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
694 },
3cc72986
MB
695};
696
5ac98553 697static const struct mfd_cell wm5110_devs[] = {
d7768111 698 { .name = "arizona-micsupp" },
5fc6c396
CK
699 {
700 .name = "arizona-extcon",
701 .parent_supplies = wm5102_supplies,
702 .num_parent_supplies = 1, /* We only need MICVDD */
703 },
e102befe 704 { .name = "arizona-gpio" },
503b1cac 705 { .name = "arizona-haptics" },
e102befe 706 { .name = "arizona-pwm" },
32dadef2
CK
707 {
708 .name = "wm5110-codec",
709 .parent_supplies = wm5102_supplies,
710 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
711 },
712};
713
714static const char *wm8997_supplies[] = {
996c2d4f 715 "MICVDD",
32dadef2
CK
716 "DBVDD2",
717 "CPVDD",
718 "SPKVDD",
e102befe
MB
719};
720
5ac98553 721static const struct mfd_cell wm8997_devs[] = {
dc7d4863 722 { .name = "arizona-micsupp" },
5fc6c396
CK
723 {
724 .name = "arizona-extcon",
725 .parent_supplies = wm8997_supplies,
726 .num_parent_supplies = 1, /* We only need MICVDD */
727 },
dc7d4863
CK
728 { .name = "arizona-gpio" },
729 { .name = "arizona-haptics" },
730 { .name = "arizona-pwm" },
32dadef2
CK
731 {
732 .name = "wm8997-codec",
733 .parent_supplies = wm8997_supplies,
734 .num_parent_supplies = ARRAY_SIZE(wm8997_supplies),
735 },
dc7d4863
CK
736};
737
f791be49 738int arizona_dev_init(struct arizona *arizona)
3cc72986
MB
739{
740 struct device *dev = arizona->dev;
741 const char *type_name;
742 unsigned int reg, val;
62d62b59 743 int (*apply_patch)(struct arizona *) = NULL;
3cc72986
MB
744 int ret, i;
745
746 dev_set_drvdata(arizona->dev, arizona);
747 mutex_init(&arizona->clk_lock);
748
749 if (dev_get_platdata(arizona->dev))
750 memcpy(&arizona->pdata, dev_get_platdata(arizona->dev),
751 sizeof(arizona->pdata));
22d7dc8a
LJ
752 else
753 arizona_of_get_core_pdata(arizona);
3cc72986
MB
754
755 regcache_cache_only(arizona->regmap, true);
756
757 switch (arizona->type) {
758 case WM5102:
e102befe 759 case WM5110:
e5d4ef0d 760 case WM8280:
dc7d4863 761 case WM8997:
3cc72986
MB
762 for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
763 arizona->core_supplies[i].supply
764 = wm5102_core_supplies[i];
765 arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies);
766 break;
767 default:
768 dev_err(arizona->dev, "Unknown device type %d\n",
769 arizona->type);
770 return -EINVAL;
771 }
772
4a8c475f
CK
773 /* Mark DCVDD as external, LDO1 driver will clear if internal */
774 arizona->external_dcvdd = true;
775
3cc72986 776 ret = mfd_add_devices(arizona->dev, -1, early_devs,
0848c94f 777 ARRAY_SIZE(early_devs), NULL, 0, NULL);
3cc72986
MB
778 if (ret != 0) {
779 dev_err(dev, "Failed to add early children: %d\n", ret);
780 return ret;
781 }
782
783 ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies,
784 arizona->core_supplies);
785 if (ret != 0) {
786 dev_err(dev, "Failed to request core supplies: %d\n",
787 ret);
788 goto err_early;
789 }
790
0c2d0ffb
CK
791 /**
792 * Don't use devres here because the only device we have to get
793 * against is the MFD device and DCVDD will likely be supplied by
794 * one of its children. Meaning that the regulator will be
795 * destroyed by the time devres calls regulator put.
796 */
e6021511 797 arizona->dcvdd = regulator_get(arizona->dev, "DCVDD");
59db9691
MB
798 if (IS_ERR(arizona->dcvdd)) {
799 ret = PTR_ERR(arizona->dcvdd);
800 dev_err(dev, "Failed to request DCVDD: %d\n", ret);
801 goto err_early;
802 }
803
87d3af4a
MB
804 if (arizona->pdata.reset) {
805 /* Start out with /RESET low to put the chip into reset */
5f056bf0
CK
806 ret = devm_gpio_request_one(arizona->dev, arizona->pdata.reset,
807 GPIOF_DIR_OUT | GPIOF_INIT_LOW,
808 "arizona /RESET");
87d3af4a
MB
809 if (ret != 0) {
810 dev_err(dev, "Failed to request /RESET: %d\n", ret);
e6021511 811 goto err_dcvdd;
87d3af4a
MB
812 }
813 }
814
3cc72986
MB
815 ret = regulator_bulk_enable(arizona->num_core_supplies,
816 arizona->core_supplies);
817 if (ret != 0) {
818 dev_err(dev, "Failed to enable core supplies: %d\n",
819 ret);
e6021511 820 goto err_dcvdd;
3cc72986
MB
821 }
822
59db9691
MB
823 ret = regulator_enable(arizona->dcvdd);
824 if (ret != 0) {
825 dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
826 goto err_enable;
827 }
828
2229875d 829 arizona_disable_reset(arizona);
3cc72986 830
3cc72986
MB
831 regcache_cache_only(arizona->regmap, false);
832
ca76ceb8 833 /* Verify that this is a chip we know about */
3cc72986
MB
834 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
835 if (ret != 0) {
836 dev_err(dev, "Failed to read ID register: %d\n", ret);
59db9691 837 goto err_reset;
3cc72986
MB
838 }
839
3cc72986
MB
840 switch (reg) {
841 case 0x5102:
e102befe 842 case 0x5110:
dc7d4863 843 case 0x8997:
e102befe 844 break;
3cc72986 845 default:
ca76ceb8 846 dev_err(arizona->dev, "Unknown device ID: %x\n", reg);
59db9691 847 goto err_reset;
3cc72986
MB
848 }
849
3cc72986
MB
850 /* If we have a /RESET GPIO we'll already be reset */
851 if (!arizona->pdata.reset) {
852 ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0);
853 if (ret != 0) {
854 dev_err(dev, "Failed to reset device: %d\n", ret);
59db9691 855 goto err_reset;
3cc72986 856 }
46b9d13a 857
c25feaa5 858 msleep(1);
3cc72986
MB
859 }
860
ca76ceb8 861 /* Ensure device startup is complete */
d955cba8
CK
862 switch (arizona->type) {
863 case WM5102:
48018943
MB
864 ret = regmap_read(arizona->regmap,
865 ARIZONA_WRITE_SEQUENCER_CTRL_3, &val);
1c1c6bba 866 if (ret) {
d955cba8
CK
867 dev_err(dev,
868 "Failed to check write sequencer state: %d\n",
869 ret);
1c1c6bba
CK
870 } else if (val & 0x01) {
871 ret = wm5102_clear_write_sequencer(arizona);
872 if (ret)
873 return ret;
d955cba8
CK
874 }
875 break;
1c1c6bba
CK
876 default:
877 break;
878 }
879
880 ret = arizona_wait_for_boot(arizona);
881 if (ret) {
882 dev_err(arizona->dev, "Device failed initial boot: %d\n", ret);
883 goto err_reset;
af65a361 884 }
3cc72986 885
ca76ceb8
MB
886 /* Read the device ID information & do device specific stuff */
887 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
888 if (ret != 0) {
889 dev_err(dev, "Failed to read ID register: %d\n", ret);
890 goto err_reset;
891 }
892
893 ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION,
894 &arizona->rev);
895 if (ret != 0) {
896 dev_err(dev, "Failed to read revision register: %d\n", ret);
897 goto err_reset;
898 }
899 arizona->rev &= ARIZONA_DEVICE_REVISION_MASK;
900
901 switch (reg) {
902#ifdef CONFIG_MFD_WM5102
903 case 0x5102:
904 type_name = "WM5102";
905 if (arizona->type != WM5102) {
906 dev_err(arizona->dev, "WM5102 registered as %d\n",
907 arizona->type);
908 arizona->type = WM5102;
909 }
910 apply_patch = wm5102_patch;
911 arizona->rev &= 0x7;
912 break;
913#endif
914#ifdef CONFIG_MFD_WM5110
915 case 0x5110:
e5d4ef0d
RF
916 switch (arizona->type) {
917 case WM5110:
918 type_name = "WM5110";
919 break;
920 case WM8280:
921 type_name = "WM8280";
922 break;
923 default:
924 type_name = "WM5110";
ca76ceb8
MB
925 dev_err(arizona->dev, "WM5110 registered as %d\n",
926 arizona->type);
927 arizona->type = WM5110;
e5d4ef0d 928 break;
ca76ceb8
MB
929 }
930 apply_patch = wm5110_patch;
931 break;
dc7d4863
CK
932#endif
933#ifdef CONFIG_MFD_WM8997
934 case 0x8997:
935 type_name = "WM8997";
936 if (arizona->type != WM8997) {
937 dev_err(arizona->dev, "WM8997 registered as %d\n",
938 arizona->type);
939 arizona->type = WM8997;
940 }
941 apply_patch = wm8997_patch;
942 break;
ca76ceb8
MB
943#endif
944 default:
945 dev_err(arizona->dev, "Unknown device ID %x\n", reg);
946 goto err_reset;
947 }
948
949 dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A');
950
62d62b59
MB
951 if (apply_patch) {
952 ret = apply_patch(arizona);
953 if (ret != 0) {
954 dev_err(arizona->dev, "Failed to apply patch: %d\n",
955 ret);
956 goto err_reset;
957 }
e80436bb
CK
958
959 switch (arizona->type) {
960 case WM5102:
0be068a0
CK
961 ret = wm5102_apply_hardware_patch(arizona);
962 if (ret) {
e80436bb
CK
963 dev_err(arizona->dev,
964 "Failed to apply hardware patch: %d\n",
965 ret);
966 goto err_reset;
967 }
968 break;
969 default:
970 break;
971 }
62d62b59
MB
972 }
973
3cc72986
MB
974 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
975 if (!arizona->pdata.gpio_defaults[i])
976 continue;
977
978 regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i,
979 arizona->pdata.gpio_defaults[i]);
980 }
981
982 pm_runtime_set_autosuspend_delay(arizona->dev, 100);
983 pm_runtime_use_autosuspend(arizona->dev);
984 pm_runtime_enable(arizona->dev);
985
986 /* Chip default */
987 if (!arizona->pdata.clk32k_src)
988 arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2;
989
990 switch (arizona->pdata.clk32k_src) {
991 case ARIZONA_32KZ_MCLK1:
992 case ARIZONA_32KZ_MCLK2:
993 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
994 ARIZONA_CLK_32K_SRC_MASK,
995 arizona->pdata.clk32k_src - 1);
767c6dc0 996 arizona_clk32k_enable(arizona);
3cc72986
MB
997 break;
998 case ARIZONA_32KZ_NONE:
999 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
1000 ARIZONA_CLK_32K_SRC_MASK, 2);
1001 break;
1002 default:
1003 dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n",
1004 arizona->pdata.clk32k_src);
1005 ret = -EINVAL;
59db9691 1006 goto err_reset;
3cc72986
MB
1007 }
1008
3d91f828 1009 for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) {
544c7aad
MB
1010 if (!arizona->pdata.micbias[i].mV &&
1011 !arizona->pdata.micbias[i].bypass)
3d91f828
MB
1012 continue;
1013
544c7aad
MB
1014 /* Apply default for bypass mode */
1015 if (!arizona->pdata.micbias[i].mV)
1016 arizona->pdata.micbias[i].mV = 2800;
1017
3d91f828 1018 val = (arizona->pdata.micbias[i].mV - 1500) / 100;
544c7aad 1019
3d91f828
MB
1020 val <<= ARIZONA_MICB1_LVL_SHIFT;
1021
1022 if (arizona->pdata.micbias[i].ext_cap)
1023 val |= ARIZONA_MICB1_EXT_CAP;
1024
1025 if (arizona->pdata.micbias[i].discharge)
1026 val |= ARIZONA_MICB1_DISCH;
1027
f773fc6d 1028 if (arizona->pdata.micbias[i].soft_start)
3d91f828
MB
1029 val |= ARIZONA_MICB1_RATE;
1030
544c7aad
MB
1031 if (arizona->pdata.micbias[i].bypass)
1032 val |= ARIZONA_MICB1_BYPASS;
1033
3d91f828
MB
1034 regmap_update_bits(arizona->regmap,
1035 ARIZONA_MIC_BIAS_CTRL_1 + i,
1036 ARIZONA_MICB1_LVL_MASK |
71d134b9 1037 ARIZONA_MICB1_EXT_CAP |
3d91f828 1038 ARIZONA_MICB1_DISCH |
544c7aad 1039 ARIZONA_MICB1_BYPASS |
3d91f828
MB
1040 ARIZONA_MICB1_RATE, val);
1041 }
1042
3cc72986
MB
1043 for (i = 0; i < ARIZONA_MAX_INPUT; i++) {
1044 /* Default for both is 0 so noop with defaults */
1045 val = arizona->pdata.dmic_ref[i]
1046 << ARIZONA_IN1_DMIC_SUP_SHIFT;
1047 val |= arizona->pdata.inmode[i] << ARIZONA_IN1_MODE_SHIFT;
1048
1049 regmap_update_bits(arizona->regmap,
1050 ARIZONA_IN1L_CONTROL + (i * 8),
1051 ARIZONA_IN1_DMIC_SUP_MASK |
1052 ARIZONA_IN1_MODE_MASK, val);
1053 }
1054
1055 for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) {
1056 /* Default is 0 so noop with defaults */
1057 if (arizona->pdata.out_mono[i])
1058 val = ARIZONA_OUT1_MONO;
1059 else
1060 val = 0;
1061
1062 regmap_update_bits(arizona->regmap,
1063 ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8),
1064 ARIZONA_OUT1_MONO, val);
1065 }
1066
3cc72986
MB
1067 for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) {
1068 if (arizona->pdata.spk_mute[i])
1069 regmap_update_bits(arizona->regmap,
2a51da04 1070 ARIZONA_PDM_SPK1_CTRL_1 + (i * 2),
3cc72986
MB
1071 ARIZONA_SPK1_MUTE_ENDIAN_MASK |
1072 ARIZONA_SPK1_MUTE_SEQ1_MASK,
1073 arizona->pdata.spk_mute[i]);
1074
1075 if (arizona->pdata.spk_fmt[i])
1076 regmap_update_bits(arizona->regmap,
2a51da04 1077 ARIZONA_PDM_SPK1_CTRL_2 + (i * 2),
3cc72986
MB
1078 ARIZONA_SPK1_FMT_MASK,
1079 arizona->pdata.spk_fmt[i]);
1080 }
1081
1082 /* Set up for interrupts */
1083 ret = arizona_irq_init(arizona);
1084 if (ret != 0)
59db9691 1085 goto err_reset;
3cc72986
MB
1086
1087 arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error",
1088 arizona_clkgen_err, arizona);
1089 arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked",
1090 arizona_overclocked, arizona);
1091 arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked",
1092 arizona_underclocked, arizona);
1093
1094 switch (arizona->type) {
1095 case WM5102:
1096 ret = mfd_add_devices(arizona->dev, -1, wm5102_devs,
0848c94f 1097 ARRAY_SIZE(wm5102_devs), NULL, 0, NULL);
e102befe
MB
1098 break;
1099 case WM5110:
e5d4ef0d 1100 case WM8280:
e102befe 1101 ret = mfd_add_devices(arizona->dev, -1, wm5110_devs,
78566afd 1102 ARRAY_SIZE(wm5110_devs), NULL, 0, NULL);
3cc72986 1103 break;
dc7d4863
CK
1104 case WM8997:
1105 ret = mfd_add_devices(arizona->dev, -1, wm8997_devs,
1106 ARRAY_SIZE(wm8997_devs), NULL, 0, NULL);
1107 break;
3cc72986
MB
1108 }
1109
1110 if (ret != 0) {
1111 dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret);
1112 goto err_irq;
1113 }
1114
48bb9fe4 1115#ifdef CONFIG_PM
59db9691
MB
1116 regulator_disable(arizona->dcvdd);
1117#endif
1118
3cc72986
MB
1119 return 0;
1120
1121err_irq:
1122 arizona_irq_exit(arizona);
3cc72986 1123err_reset:
2229875d 1124 arizona_enable_reset(arizona);
59db9691 1125 regulator_disable(arizona->dcvdd);
3cc72986 1126err_enable:
3a36a0db 1127 regulator_bulk_disable(arizona->num_core_supplies,
3cc72986 1128 arizona->core_supplies);
e6021511
CK
1129err_dcvdd:
1130 regulator_put(arizona->dcvdd);
3cc72986
MB
1131err_early:
1132 mfd_remove_devices(dev);
1133 return ret;
1134}
1135EXPORT_SYMBOL_GPL(arizona_dev_init);
1136
4740f73f 1137int arizona_dev_exit(struct arizona *arizona)
3cc72986 1138{
b804020a
CK
1139 pm_runtime_disable(arizona->dev);
1140
df6b3352 1141 regulator_disable(arizona->dcvdd);
e6021511 1142 regulator_put(arizona->dcvdd);
df6b3352 1143
3cc72986
MB
1144 mfd_remove_devices(arizona->dev);
1145 arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona);
1146 arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona);
1147 arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona);
3cc72986 1148 arizona_irq_exit(arizona);
2229875d 1149 arizona_enable_reset(arizona);
df6b3352 1150
4420286e 1151 regulator_bulk_disable(arizona->num_core_supplies,
1d017b6b 1152 arizona->core_supplies);
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1153 return 0;
1154}
1155EXPORT_SYMBOL_GPL(arizona_dev_exit);