Commit | Line | Data |
---|---|---|
3cc72986 MB |
1 | /* |
2 | * Arizona core driver | |
3 | * | |
4 | * Copyright 2012 Wolfson Microelectronics plc | |
5 | * | |
6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/delay.h> | |
59db9691 | 14 | #include <linux/err.h> |
3cc72986 MB |
15 | #include <linux/gpio.h> |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/mfd/core.h> | |
18 | #include <linux/module.h> | |
d781009c MB |
19 | #include <linux/of.h> |
20 | #include <linux/of_device.h> | |
21 | #include <linux/of_gpio.h> | |
3cc72986 MB |
22 | #include <linux/pm_runtime.h> |
23 | #include <linux/regmap.h> | |
24 | #include <linux/regulator/consumer.h> | |
5927467d | 25 | #include <linux/regulator/machine.h> |
3cc72986 MB |
26 | #include <linux/slab.h> |
27 | ||
28 | #include <linux/mfd/arizona/core.h> | |
29 | #include <linux/mfd/arizona/registers.h> | |
30 | ||
31 | #include "arizona.h" | |
32 | ||
33 | static const char *wm5102_core_supplies[] = { | |
34 | "AVDD", | |
35 | "DBVDD1", | |
3cc72986 MB |
36 | }; |
37 | ||
38 | int arizona_clk32k_enable(struct arizona *arizona) | |
39 | { | |
40 | int ret = 0; | |
41 | ||
42 | mutex_lock(&arizona->clk_lock); | |
43 | ||
44 | arizona->clk32k_ref++; | |
45 | ||
247fa192 MB |
46 | if (arizona->clk32k_ref == 1) { |
47 | switch (arizona->pdata.clk32k_src) { | |
48 | case ARIZONA_32KZ_MCLK1: | |
49 | ret = pm_runtime_get_sync(arizona->dev); | |
50 | if (ret != 0) | |
51 | goto out; | |
52 | break; | |
53 | } | |
54 | ||
3cc72986 MB |
55 | ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, |
56 | ARIZONA_CLK_32K_ENA, | |
57 | ARIZONA_CLK_32K_ENA); | |
247fa192 | 58 | } |
3cc72986 | 59 | |
247fa192 | 60 | out: |
3cc72986 MB |
61 | if (ret != 0) |
62 | arizona->clk32k_ref--; | |
63 | ||
64 | mutex_unlock(&arizona->clk_lock); | |
65 | ||
66 | return ret; | |
67 | } | |
68 | EXPORT_SYMBOL_GPL(arizona_clk32k_enable); | |
69 | ||
70 | int arizona_clk32k_disable(struct arizona *arizona) | |
71 | { | |
72 | int ret = 0; | |
73 | ||
74 | mutex_lock(&arizona->clk_lock); | |
75 | ||
76 | BUG_ON(arizona->clk32k_ref <= 0); | |
77 | ||
78 | arizona->clk32k_ref--; | |
79 | ||
247fa192 | 80 | if (arizona->clk32k_ref == 0) { |
3cc72986 MB |
81 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, |
82 | ARIZONA_CLK_32K_ENA, 0); | |
83 | ||
247fa192 MB |
84 | switch (arizona->pdata.clk32k_src) { |
85 | case ARIZONA_32KZ_MCLK1: | |
86 | pm_runtime_put_sync(arizona->dev); | |
87 | break; | |
88 | } | |
89 | } | |
90 | ||
3cc72986 MB |
91 | mutex_unlock(&arizona->clk_lock); |
92 | ||
93 | return ret; | |
94 | } | |
95 | EXPORT_SYMBOL_GPL(arizona_clk32k_disable); | |
96 | ||
97 | static irqreturn_t arizona_clkgen_err(int irq, void *data) | |
98 | { | |
99 | struct arizona *arizona = data; | |
100 | ||
101 | dev_err(arizona->dev, "CLKGEN error\n"); | |
102 | ||
103 | return IRQ_HANDLED; | |
104 | } | |
105 | ||
106 | static irqreturn_t arizona_underclocked(int irq, void *data) | |
107 | { | |
108 | struct arizona *arizona = data; | |
109 | unsigned int val; | |
110 | int ret; | |
111 | ||
112 | ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8, | |
113 | &val); | |
114 | if (ret != 0) { | |
115 | dev_err(arizona->dev, "Failed to read underclock status: %d\n", | |
116 | ret); | |
117 | return IRQ_NONE; | |
118 | } | |
119 | ||
3cc72986 MB |
120 | if (val & ARIZONA_AIF3_UNDERCLOCKED_STS) |
121 | dev_err(arizona->dev, "AIF3 underclocked\n"); | |
122 | if (val & ARIZONA_AIF2_UNDERCLOCKED_STS) | |
3ebef34d CK |
123 | dev_err(arizona->dev, "AIF2 underclocked\n"); |
124 | if (val & ARIZONA_AIF1_UNDERCLOCKED_STS) | |
3cc72986 MB |
125 | dev_err(arizona->dev, "AIF1 underclocked\n"); |
126 | if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS) | |
127 | dev_err(arizona->dev, "ISRC2 underclocked\n"); | |
128 | if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS) | |
129 | dev_err(arizona->dev, "ISRC1 underclocked\n"); | |
130 | if (val & ARIZONA_FX_UNDERCLOCKED_STS) | |
131 | dev_err(arizona->dev, "FX underclocked\n"); | |
132 | if (val & ARIZONA_ASRC_UNDERCLOCKED_STS) | |
133 | dev_err(arizona->dev, "ASRC underclocked\n"); | |
134 | if (val & ARIZONA_DAC_UNDERCLOCKED_STS) | |
135 | dev_err(arizona->dev, "DAC underclocked\n"); | |
136 | if (val & ARIZONA_ADC_UNDERCLOCKED_STS) | |
137 | dev_err(arizona->dev, "ADC underclocked\n"); | |
138 | if (val & ARIZONA_MIXER_UNDERCLOCKED_STS) | |
648a9880 | 139 | dev_err(arizona->dev, "Mixer dropped sample\n"); |
3cc72986 MB |
140 | |
141 | return IRQ_HANDLED; | |
142 | } | |
143 | ||
144 | static irqreturn_t arizona_overclocked(int irq, void *data) | |
145 | { | |
146 | struct arizona *arizona = data; | |
147 | unsigned int val[2]; | |
148 | int ret; | |
149 | ||
150 | ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6, | |
151 | &val[0], 2); | |
152 | if (ret != 0) { | |
153 | dev_err(arizona->dev, "Failed to read overclock status: %d\n", | |
154 | ret); | |
155 | return IRQ_NONE; | |
156 | } | |
157 | ||
158 | if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS) | |
159 | dev_err(arizona->dev, "PWM overclocked\n"); | |
160 | if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS) | |
161 | dev_err(arizona->dev, "FX core overclocked\n"); | |
162 | if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS) | |
163 | dev_err(arizona->dev, "DAC SYS overclocked\n"); | |
164 | if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS) | |
165 | dev_err(arizona->dev, "DAC WARP overclocked\n"); | |
166 | if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS) | |
167 | dev_err(arizona->dev, "ADC overclocked\n"); | |
168 | if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS) | |
169 | dev_err(arizona->dev, "Mixer overclocked\n"); | |
170 | if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS) | |
171 | dev_err(arizona->dev, "AIF3 overclocked\n"); | |
172 | if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS) | |
173 | dev_err(arizona->dev, "AIF2 overclocked\n"); | |
174 | if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS) | |
175 | dev_err(arizona->dev, "AIF1 overclocked\n"); | |
176 | if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS) | |
177 | dev_err(arizona->dev, "Pad control overclocked\n"); | |
178 | ||
179 | if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS) | |
180 | dev_err(arizona->dev, "Slimbus subsystem overclocked\n"); | |
181 | if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS) | |
182 | dev_err(arizona->dev, "Slimbus async overclocked\n"); | |
183 | if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS) | |
184 | dev_err(arizona->dev, "Slimbus sync overclocked\n"); | |
185 | if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS) | |
186 | dev_err(arizona->dev, "ASRC async system overclocked\n"); | |
187 | if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS) | |
188 | dev_err(arizona->dev, "ASRC async WARP overclocked\n"); | |
189 | if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS) | |
190 | dev_err(arizona->dev, "ASRC sync system overclocked\n"); | |
191 | if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS) | |
192 | dev_err(arizona->dev, "ASRC sync WARP overclocked\n"); | |
193 | if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS) | |
194 | dev_err(arizona->dev, "DSP1 overclocked\n"); | |
195 | if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS) | |
196 | dev_err(arizona->dev, "ISRC2 overclocked\n"); | |
197 | if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS) | |
198 | dev_err(arizona->dev, "ISRC1 overclocked\n"); | |
199 | ||
200 | return IRQ_HANDLED; | |
201 | } | |
202 | ||
9d53dfdc CK |
203 | static int arizona_poll_reg(struct arizona *arizona, |
204 | int timeout, unsigned int reg, | |
205 | unsigned int mask, unsigned int target) | |
3cc72986 | 206 | { |
9d53dfdc | 207 | unsigned int val = 0; |
3cc72986 MB |
208 | int ret, i; |
209 | ||
9d53dfdc CK |
210 | for (i = 0; i < timeout; i++) { |
211 | ret = regmap_read(arizona->regmap, reg, &val); | |
3cc72986 | 212 | if (ret != 0) { |
9d53dfdc CK |
213 | dev_err(arizona->dev, "Failed to read reg %u: %d\n", |
214 | reg, ret); | |
cfe775ce | 215 | continue; |
3cc72986 MB |
216 | } |
217 | ||
9d53dfdc CK |
218 | if ((val & mask) == target) |
219 | return 0; | |
220 | ||
221 | msleep(1); | |
3cc72986 MB |
222 | } |
223 | ||
9d53dfdc CK |
224 | dev_err(arizona->dev, "Polling reg %u timed out: %x\n", reg, val); |
225 | return -ETIMEDOUT; | |
226 | } | |
227 | ||
228 | static int arizona_wait_for_boot(struct arizona *arizona) | |
229 | { | |
230 | int ret; | |
231 | ||
232 | /* | |
233 | * We can't use an interrupt as we need to runtime resume to do so, | |
234 | * we won't race with the interrupt handler as it'll be blocked on | |
235 | * runtime resume. | |
236 | */ | |
237 | ret = arizona_poll_reg(arizona, 5, ARIZONA_INTERRUPT_RAW_STATUS_5, | |
238 | ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS); | |
239 | ||
240 | if (!ret) | |
3cc72986 MB |
241 | regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5, |
242 | ARIZONA_BOOT_DONE_STS); | |
3cc72986 MB |
243 | |
244 | pm_runtime_mark_last_busy(arizona->dev); | |
245 | ||
9d53dfdc | 246 | return ret; |
3cc72986 MB |
247 | } |
248 | ||
e80436bb CK |
249 | static int arizona_apply_hardware_patch(struct arizona* arizona) |
250 | { | |
251 | unsigned int fll, sysclk; | |
252 | int ret, err; | |
253 | ||
e80436bb CK |
254 | /* Cache existing FLL and SYSCLK settings */ |
255 | ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &fll); | |
256 | if (ret != 0) { | |
257 | dev_err(arizona->dev, "Failed to cache FLL settings: %d\n", | |
258 | ret); | |
259 | return ret; | |
260 | } | |
261 | ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &sysclk); | |
262 | if (ret != 0) { | |
263 | dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n", | |
264 | ret); | |
265 | return ret; | |
266 | } | |
267 | ||
268 | /* Start up SYSCLK using the FLL in free running mode */ | |
269 | ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, | |
270 | ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN); | |
271 | if (ret != 0) { | |
272 | dev_err(arizona->dev, | |
273 | "Failed to start FLL in freerunning mode: %d\n", | |
274 | ret); | |
275 | return ret; | |
276 | } | |
277 | ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5, | |
278 | ARIZONA_FLL1_CLOCK_OK_STS, | |
279 | ARIZONA_FLL1_CLOCK_OK_STS); | |
280 | if (ret != 0) { | |
281 | ret = -ETIMEDOUT; | |
282 | goto err_fll; | |
283 | } | |
284 | ||
285 | ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144); | |
286 | if (ret != 0) { | |
287 | dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret); | |
288 | goto err_fll; | |
289 | } | |
290 | ||
291 | /* Start the write sequencer and wait for it to finish */ | |
292 | ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, | |
293 | ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160); | |
294 | if (ret != 0) { | |
295 | dev_err(arizona->dev, "Failed to start write sequencer: %d\n", | |
296 | ret); | |
297 | goto err_sysclk; | |
298 | } | |
299 | ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1, | |
300 | ARIZONA_WSEQ_BUSY, 0); | |
301 | if (ret != 0) { | |
302 | regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, | |
303 | ARIZONA_WSEQ_ABORT); | |
304 | ret = -ETIMEDOUT; | |
305 | } | |
306 | ||
307 | err_sysclk: | |
308 | err = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, sysclk); | |
309 | if (err != 0) { | |
310 | dev_err(arizona->dev, | |
311 | "Failed to re-apply old SYSCLK settings: %d\n", | |
312 | err); | |
313 | } | |
314 | ||
315 | err_fll: | |
316 | err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, fll); | |
317 | if (err != 0) { | |
318 | dev_err(arizona->dev, | |
319 | "Failed to re-apply old FLL settings: %d\n", | |
320 | err); | |
321 | } | |
322 | ||
e80436bb CK |
323 | if (ret != 0) |
324 | return ret; | |
325 | else | |
326 | return err; | |
327 | } | |
328 | ||
3cc72986 MB |
329 | #ifdef CONFIG_PM_RUNTIME |
330 | static int arizona_runtime_resume(struct device *dev) | |
331 | { | |
332 | struct arizona *arizona = dev_get_drvdata(dev); | |
333 | int ret; | |
334 | ||
508c8299 MB |
335 | dev_dbg(arizona->dev, "Leaving AoD mode\n"); |
336 | ||
59db9691 MB |
337 | ret = regulator_enable(arizona->dcvdd); |
338 | if (ret != 0) { | |
339 | dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret); | |
340 | return ret; | |
341 | } | |
3cc72986 MB |
342 | |
343 | regcache_cache_only(arizona->regmap, false); | |
344 | ||
4c9bb8bc CK |
345 | switch (arizona->type) { |
346 | case WM5102: | |
5927467d MB |
347 | if (arizona->external_dcvdd) { |
348 | ret = regmap_update_bits(arizona->regmap, | |
349 | ARIZONA_ISOLATION_CONTROL, | |
350 | ARIZONA_ISOLATE_DCVDD1, 0); | |
351 | if (ret != 0) { | |
352 | dev_err(arizona->dev, | |
353 | "Failed to connect DCVDD: %d\n", ret); | |
354 | goto err; | |
355 | } | |
356 | } | |
357 | ||
4c9bb8bc CK |
358 | ret = wm5102_patch(arizona); |
359 | if (ret != 0) { | |
360 | dev_err(arizona->dev, "Failed to apply patch: %d\n", | |
361 | ret); | |
362 | goto err; | |
363 | } | |
e80436bb CK |
364 | |
365 | ret = arizona_apply_hardware_patch(arizona); | |
366 | if (ret != 0) { | |
367 | dev_err(arizona->dev, | |
368 | "Failed to apply hardware patch: %d\n", | |
369 | ret); | |
370 | goto err; | |
371 | } | |
372 | break; | |
373 | default: | |
12bb68ed CK |
374 | ret = arizona_wait_for_boot(arizona); |
375 | if (ret != 0) { | |
376 | goto err; | |
377 | } | |
378 | ||
5927467d MB |
379 | if (arizona->external_dcvdd) { |
380 | ret = regmap_update_bits(arizona->regmap, | |
381 | ARIZONA_ISOLATION_CONTROL, | |
382 | ARIZONA_ISOLATE_DCVDD1, 0); | |
383 | if (ret != 0) { | |
384 | dev_err(arizona->dev, | |
385 | "Failed to connect DCVDD: %d\n", ret); | |
386 | goto err; | |
387 | } | |
388 | } | |
e80436bb | 389 | break; |
4c9bb8bc CK |
390 | } |
391 | ||
d9d03496 CK |
392 | switch (arizona->type) { |
393 | case WM5102: | |
394 | ret = wm5102_patch(arizona); | |
395 | if (ret != 0) { | |
396 | dev_err(arizona->dev, "Failed to apply patch: %d\n", | |
397 | ret); | |
398 | goto err; | |
399 | } | |
400 | default: | |
401 | break; | |
402 | } | |
403 | ||
9270bdf5 MB |
404 | ret = regcache_sync(arizona->regmap); |
405 | if (ret != 0) { | |
406 | dev_err(arizona->dev, "Failed to restore register cache\n"); | |
4816bd1c | 407 | goto err; |
9270bdf5 | 408 | } |
3cc72986 MB |
409 | |
410 | return 0; | |
4816bd1c MB |
411 | |
412 | err: | |
413 | regcache_cache_only(arizona->regmap, true); | |
414 | regulator_disable(arizona->dcvdd); | |
415 | return ret; | |
3cc72986 MB |
416 | } |
417 | ||
418 | static int arizona_runtime_suspend(struct device *dev) | |
419 | { | |
420 | struct arizona *arizona = dev_get_drvdata(dev); | |
5927467d | 421 | int ret; |
3cc72986 | 422 | |
508c8299 MB |
423 | dev_dbg(arizona->dev, "Entering AoD mode\n"); |
424 | ||
5927467d MB |
425 | if (arizona->external_dcvdd) { |
426 | ret = regmap_update_bits(arizona->regmap, | |
427 | ARIZONA_ISOLATION_CONTROL, | |
428 | ARIZONA_ISOLATE_DCVDD1, | |
429 | ARIZONA_ISOLATE_DCVDD1); | |
430 | if (ret != 0) { | |
431 | dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n", | |
432 | ret); | |
433 | return ret; | |
434 | } | |
435 | } | |
436 | ||
59db9691 MB |
437 | regcache_cache_only(arizona->regmap, true); |
438 | regcache_mark_dirty(arizona->regmap); | |
e293e847 | 439 | regulator_disable(arizona->dcvdd); |
3cc72986 MB |
440 | |
441 | return 0; | |
442 | } | |
443 | #endif | |
444 | ||
dc781d0e | 445 | #ifdef CONFIG_PM_SLEEP |
67c99296 MB |
446 | static int arizona_suspend(struct device *dev) |
447 | { | |
448 | struct arizona *arizona = dev_get_drvdata(dev); | |
449 | ||
450 | dev_dbg(arizona->dev, "Suspend, disabling IRQ\n"); | |
451 | disable_irq(arizona->irq); | |
452 | ||
453 | return 0; | |
454 | } | |
455 | ||
456 | static int arizona_suspend_late(struct device *dev) | |
457 | { | |
458 | struct arizona *arizona = dev_get_drvdata(dev); | |
459 | ||
460 | dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n"); | |
461 | enable_irq(arizona->irq); | |
462 | ||
463 | return 0; | |
464 | } | |
465 | ||
dc781d0e MB |
466 | static int arizona_resume_noirq(struct device *dev) |
467 | { | |
468 | struct arizona *arizona = dev_get_drvdata(dev); | |
469 | ||
470 | dev_dbg(arizona->dev, "Early resume, disabling IRQ\n"); | |
471 | disable_irq(arizona->irq); | |
472 | ||
473 | return 0; | |
474 | } | |
475 | ||
476 | static int arizona_resume(struct device *dev) | |
477 | { | |
478 | struct arizona *arizona = dev_get_drvdata(dev); | |
479 | ||
480 | dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n"); | |
481 | enable_irq(arizona->irq); | |
482 | ||
483 | return 0; | |
484 | } | |
485 | #endif | |
486 | ||
3cc72986 MB |
487 | const struct dev_pm_ops arizona_pm_ops = { |
488 | SET_RUNTIME_PM_OPS(arizona_runtime_suspend, | |
489 | arizona_runtime_resume, | |
490 | NULL) | |
67c99296 | 491 | SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume) |
dc781d0e | 492 | #ifdef CONFIG_PM_SLEEP |
67c99296 | 493 | .suspend_late = arizona_suspend_late, |
dc781d0e MB |
494 | .resume_noirq = arizona_resume_noirq, |
495 | #endif | |
3cc72986 MB |
496 | }; |
497 | EXPORT_SYMBOL_GPL(arizona_pm_ops); | |
498 | ||
d781009c MB |
499 | #ifdef CONFIG_OF |
500 | int arizona_of_get_type(struct device *dev) | |
501 | { | |
502 | const struct of_device_id *id = of_match_device(arizona_of_match, dev); | |
503 | ||
504 | if (id) | |
505 | return (int)id->data; | |
506 | else | |
507 | return 0; | |
508 | } | |
509 | EXPORT_SYMBOL_GPL(arizona_of_get_type); | |
510 | ||
e4fcb1d6 CK |
511 | int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop, |
512 | bool mandatory) | |
513 | { | |
514 | int gpio; | |
515 | ||
516 | gpio = of_get_named_gpio(arizona->dev->of_node, prop, 0); | |
517 | if (gpio < 0) { | |
518 | if (mandatory) | |
519 | dev_err(arizona->dev, | |
520 | "Mandatory DT gpio %s missing/malformed: %d\n", | |
521 | prop, gpio); | |
522 | ||
523 | gpio = 0; | |
524 | } | |
525 | ||
526 | return gpio; | |
527 | } | |
528 | EXPORT_SYMBOL_GPL(arizona_of_get_named_gpio); | |
529 | ||
d781009c MB |
530 | static int arizona_of_get_core_pdata(struct arizona *arizona) |
531 | { | |
e4fcb1d6 | 532 | struct arizona_pdata *pdata = &arizona->pdata; |
d781009c MB |
533 | int ret, i; |
534 | ||
e4fcb1d6 CK |
535 | pdata->reset = arizona_of_get_named_gpio(arizona, "wlf,reset", true); |
536 | pdata->ldoena = arizona_of_get_named_gpio(arizona, "wlf,ldoena", true); | |
d781009c MB |
537 | |
538 | ret = of_property_read_u32_array(arizona->dev->of_node, | |
539 | "wlf,gpio-defaults", | |
540 | arizona->pdata.gpio_defaults, | |
541 | ARRAY_SIZE(arizona->pdata.gpio_defaults)); | |
542 | if (ret >= 0) { | |
543 | /* | |
544 | * All values are literal except out of range values | |
545 | * which are chip default, translate into platform | |
546 | * data which uses 0 as chip default and out of range | |
547 | * as zero. | |
548 | */ | |
549 | for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) { | |
550 | if (arizona->pdata.gpio_defaults[i] > 0xffff) | |
551 | arizona->pdata.gpio_defaults[i] = 0; | |
91c73935 | 552 | else if (arizona->pdata.gpio_defaults[i] == 0) |
d781009c MB |
553 | arizona->pdata.gpio_defaults[i] = 0x10000; |
554 | } | |
555 | } else { | |
556 | dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n", | |
557 | ret); | |
558 | } | |
559 | ||
560 | return 0; | |
561 | } | |
562 | ||
563 | const struct of_device_id arizona_of_match[] = { | |
564 | { .compatible = "wlf,wm5102", .data = (void *)WM5102 }, | |
565 | { .compatible = "wlf,wm5110", .data = (void *)WM5110 }, | |
dc7d4863 | 566 | { .compatible = "wlf,wm8997", .data = (void *)WM8997 }, |
d781009c MB |
567 | {}, |
568 | }; | |
569 | EXPORT_SYMBOL_GPL(arizona_of_match); | |
570 | #else | |
571 | static inline int arizona_of_get_core_pdata(struct arizona *arizona) | |
572 | { | |
573 | return 0; | |
574 | } | |
575 | #endif | |
576 | ||
5ac98553 | 577 | static const struct mfd_cell early_devs[] = { |
3cc72986 MB |
578 | { .name = "arizona-ldo1" }, |
579 | }; | |
580 | ||
32dadef2 CK |
581 | static const char *wm5102_supplies[] = { |
582 | "DBVDD2", | |
583 | "DBVDD3", | |
584 | "CPVDD", | |
585 | "SPKVDDL", | |
586 | "SPKVDDR", | |
587 | }; | |
588 | ||
5ac98553 | 589 | static const struct mfd_cell wm5102_devs[] = { |
d7768111 | 590 | { .name = "arizona-micsupp" }, |
3cc72986 MB |
591 | { .name = "arizona-extcon" }, |
592 | { .name = "arizona-gpio" }, | |
503b1cac | 593 | { .name = "arizona-haptics" }, |
3cc72986 | 594 | { .name = "arizona-pwm" }, |
32dadef2 CK |
595 | { |
596 | .name = "wm5102-codec", | |
597 | .parent_supplies = wm5102_supplies, | |
598 | .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), | |
599 | }, | |
3cc72986 MB |
600 | }; |
601 | ||
5ac98553 | 602 | static const struct mfd_cell wm5110_devs[] = { |
d7768111 | 603 | { .name = "arizona-micsupp" }, |
e102befe MB |
604 | { .name = "arizona-extcon" }, |
605 | { .name = "arizona-gpio" }, | |
503b1cac | 606 | { .name = "arizona-haptics" }, |
e102befe | 607 | { .name = "arizona-pwm" }, |
32dadef2 CK |
608 | { |
609 | .name = "wm5110-codec", | |
610 | .parent_supplies = wm5102_supplies, | |
611 | .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), | |
612 | }, | |
613 | }; | |
614 | ||
615 | static const char *wm8997_supplies[] = { | |
616 | "DBVDD2", | |
617 | "CPVDD", | |
618 | "SPKVDD", | |
e102befe MB |
619 | }; |
620 | ||
5ac98553 | 621 | static const struct mfd_cell wm8997_devs[] = { |
dc7d4863 CK |
622 | { .name = "arizona-micsupp" }, |
623 | { .name = "arizona-extcon" }, | |
624 | { .name = "arizona-gpio" }, | |
625 | { .name = "arizona-haptics" }, | |
626 | { .name = "arizona-pwm" }, | |
32dadef2 CK |
627 | { |
628 | .name = "wm8997-codec", | |
629 | .parent_supplies = wm8997_supplies, | |
630 | .num_parent_supplies = ARRAY_SIZE(wm8997_supplies), | |
631 | }, | |
dc7d4863 CK |
632 | }; |
633 | ||
f791be49 | 634 | int arizona_dev_init(struct arizona *arizona) |
3cc72986 MB |
635 | { |
636 | struct device *dev = arizona->dev; | |
637 | const char *type_name; | |
638 | unsigned int reg, val; | |
62d62b59 | 639 | int (*apply_patch)(struct arizona *) = NULL; |
3cc72986 MB |
640 | int ret, i; |
641 | ||
642 | dev_set_drvdata(arizona->dev, arizona); | |
643 | mutex_init(&arizona->clk_lock); | |
644 | ||
645 | if (dev_get_platdata(arizona->dev)) | |
646 | memcpy(&arizona->pdata, dev_get_platdata(arizona->dev), | |
647 | sizeof(arizona->pdata)); | |
22d7dc8a LJ |
648 | else |
649 | arizona_of_get_core_pdata(arizona); | |
3cc72986 MB |
650 | |
651 | regcache_cache_only(arizona->regmap, true); | |
652 | ||
653 | switch (arizona->type) { | |
654 | case WM5102: | |
e102befe | 655 | case WM5110: |
dc7d4863 | 656 | case WM8997: |
3cc72986 MB |
657 | for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++) |
658 | arizona->core_supplies[i].supply | |
659 | = wm5102_core_supplies[i]; | |
660 | arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies); | |
661 | break; | |
662 | default: | |
663 | dev_err(arizona->dev, "Unknown device type %d\n", | |
664 | arizona->type); | |
665 | return -EINVAL; | |
666 | } | |
667 | ||
668 | ret = mfd_add_devices(arizona->dev, -1, early_devs, | |
0848c94f | 669 | ARRAY_SIZE(early_devs), NULL, 0, NULL); |
3cc72986 MB |
670 | if (ret != 0) { |
671 | dev_err(dev, "Failed to add early children: %d\n", ret); | |
672 | return ret; | |
673 | } | |
674 | ||
675 | ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies, | |
676 | arizona->core_supplies); | |
677 | if (ret != 0) { | |
678 | dev_err(dev, "Failed to request core supplies: %d\n", | |
679 | ret); | |
680 | goto err_early; | |
681 | } | |
682 | ||
59db9691 MB |
683 | arizona->dcvdd = devm_regulator_get(arizona->dev, "DCVDD"); |
684 | if (IS_ERR(arizona->dcvdd)) { | |
685 | ret = PTR_ERR(arizona->dcvdd); | |
686 | dev_err(dev, "Failed to request DCVDD: %d\n", ret); | |
687 | goto err_early; | |
688 | } | |
689 | ||
87d3af4a MB |
690 | if (arizona->pdata.reset) { |
691 | /* Start out with /RESET low to put the chip into reset */ | |
692 | ret = gpio_request_one(arizona->pdata.reset, | |
693 | GPIOF_DIR_OUT | GPIOF_INIT_LOW, | |
694 | "arizona /RESET"); | |
695 | if (ret != 0) { | |
696 | dev_err(dev, "Failed to request /RESET: %d\n", ret); | |
697 | goto err_early; | |
698 | } | |
699 | } | |
700 | ||
3cc72986 MB |
701 | ret = regulator_bulk_enable(arizona->num_core_supplies, |
702 | arizona->core_supplies); | |
703 | if (ret != 0) { | |
704 | dev_err(dev, "Failed to enable core supplies: %d\n", | |
705 | ret); | |
706 | goto err_early; | |
707 | } | |
708 | ||
59db9691 MB |
709 | ret = regulator_enable(arizona->dcvdd); |
710 | if (ret != 0) { | |
711 | dev_err(dev, "Failed to enable DCVDD: %d\n", ret); | |
712 | goto err_enable; | |
713 | } | |
714 | ||
c25feaa5 | 715 | if (arizona->pdata.reset) { |
3cc72986 | 716 | gpio_set_value_cansleep(arizona->pdata.reset, 1); |
c25feaa5 CK |
717 | msleep(1); |
718 | } | |
3cc72986 | 719 | |
3cc72986 MB |
720 | regcache_cache_only(arizona->regmap, false); |
721 | ||
ca76ceb8 | 722 | /* Verify that this is a chip we know about */ |
3cc72986 MB |
723 | ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); |
724 | if (ret != 0) { | |
725 | dev_err(dev, "Failed to read ID register: %d\n", ret); | |
59db9691 | 726 | goto err_reset; |
3cc72986 MB |
727 | } |
728 | ||
3cc72986 MB |
729 | switch (reg) { |
730 | case 0x5102: | |
e102befe | 731 | case 0x5110: |
dc7d4863 | 732 | case 0x8997: |
e102befe | 733 | break; |
3cc72986 | 734 | default: |
ca76ceb8 | 735 | dev_err(arizona->dev, "Unknown device ID: %x\n", reg); |
59db9691 | 736 | goto err_reset; |
3cc72986 MB |
737 | } |
738 | ||
3cc72986 MB |
739 | /* If we have a /RESET GPIO we'll already be reset */ |
740 | if (!arizona->pdata.reset) { | |
46b9d13a CK |
741 | regcache_mark_dirty(arizona->regmap); |
742 | ||
3cc72986 MB |
743 | ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0); |
744 | if (ret != 0) { | |
745 | dev_err(dev, "Failed to reset device: %d\n", ret); | |
59db9691 | 746 | goto err_reset; |
3cc72986 | 747 | } |
46b9d13a | 748 | |
c25feaa5 CK |
749 | msleep(1); |
750 | ||
46b9d13a CK |
751 | ret = regcache_sync(arizona->regmap); |
752 | if (ret != 0) { | |
753 | dev_err(dev, "Failed to sync device: %d\n", ret); | |
754 | goto err_reset; | |
755 | } | |
3cc72986 MB |
756 | } |
757 | ||
ca76ceb8 | 758 | /* Ensure device startup is complete */ |
d955cba8 CK |
759 | switch (arizona->type) { |
760 | case WM5102: | |
761 | ret = regmap_read(arizona->regmap, 0x19, &val); | |
762 | if (ret != 0) | |
763 | dev_err(dev, | |
764 | "Failed to check write sequencer state: %d\n", | |
765 | ret); | |
766 | else if (val & 0x01) | |
767 | break; | |
768 | /* Fall through */ | |
769 | default: | |
770 | ret = arizona_wait_for_boot(arizona); | |
771 | if (ret != 0) { | |
772 | dev_err(arizona->dev, | |
773 | "Device failed initial boot: %d\n", ret); | |
774 | goto err_reset; | |
775 | } | |
776 | break; | |
af65a361 | 777 | } |
3cc72986 | 778 | |
ca76ceb8 MB |
779 | /* Read the device ID information & do device specific stuff */ |
780 | ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); | |
781 | if (ret != 0) { | |
782 | dev_err(dev, "Failed to read ID register: %d\n", ret); | |
783 | goto err_reset; | |
784 | } | |
785 | ||
786 | ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION, | |
787 | &arizona->rev); | |
788 | if (ret != 0) { | |
789 | dev_err(dev, "Failed to read revision register: %d\n", ret); | |
790 | goto err_reset; | |
791 | } | |
792 | arizona->rev &= ARIZONA_DEVICE_REVISION_MASK; | |
793 | ||
794 | switch (reg) { | |
795 | #ifdef CONFIG_MFD_WM5102 | |
796 | case 0x5102: | |
797 | type_name = "WM5102"; | |
798 | if (arizona->type != WM5102) { | |
799 | dev_err(arizona->dev, "WM5102 registered as %d\n", | |
800 | arizona->type); | |
801 | arizona->type = WM5102; | |
802 | } | |
803 | apply_patch = wm5102_patch; | |
804 | arizona->rev &= 0x7; | |
805 | break; | |
806 | #endif | |
807 | #ifdef CONFIG_MFD_WM5110 | |
808 | case 0x5110: | |
809 | type_name = "WM5110"; | |
810 | if (arizona->type != WM5110) { | |
811 | dev_err(arizona->dev, "WM5110 registered as %d\n", | |
812 | arizona->type); | |
813 | arizona->type = WM5110; | |
814 | } | |
815 | apply_patch = wm5110_patch; | |
816 | break; | |
dc7d4863 CK |
817 | #endif |
818 | #ifdef CONFIG_MFD_WM8997 | |
819 | case 0x8997: | |
820 | type_name = "WM8997"; | |
821 | if (arizona->type != WM8997) { | |
822 | dev_err(arizona->dev, "WM8997 registered as %d\n", | |
823 | arizona->type); | |
824 | arizona->type = WM8997; | |
825 | } | |
826 | apply_patch = wm8997_patch; | |
827 | break; | |
ca76ceb8 MB |
828 | #endif |
829 | default: | |
830 | dev_err(arizona->dev, "Unknown device ID %x\n", reg); | |
831 | goto err_reset; | |
832 | } | |
833 | ||
834 | dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A'); | |
835 | ||
62d62b59 MB |
836 | if (apply_patch) { |
837 | ret = apply_patch(arizona); | |
838 | if (ret != 0) { | |
839 | dev_err(arizona->dev, "Failed to apply patch: %d\n", | |
840 | ret); | |
841 | goto err_reset; | |
842 | } | |
e80436bb CK |
843 | |
844 | switch (arizona->type) { | |
845 | case WM5102: | |
846 | ret = arizona_apply_hardware_patch(arizona); | |
847 | if (ret != 0) { | |
848 | dev_err(arizona->dev, | |
849 | "Failed to apply hardware patch: %d\n", | |
850 | ret); | |
851 | goto err_reset; | |
852 | } | |
853 | break; | |
854 | default: | |
855 | break; | |
856 | } | |
62d62b59 MB |
857 | } |
858 | ||
3cc72986 MB |
859 | for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) { |
860 | if (!arizona->pdata.gpio_defaults[i]) | |
861 | continue; | |
862 | ||
863 | regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i, | |
864 | arizona->pdata.gpio_defaults[i]); | |
865 | } | |
866 | ||
5927467d MB |
867 | /* |
868 | * LDO1 can only be used to supply DCVDD so if it has no | |
869 | * consumers then DCVDD is supplied externally. | |
870 | */ | |
871 | if (arizona->pdata.ldo1 && | |
872 | arizona->pdata.ldo1->num_consumer_supplies == 0) | |
873 | arizona->external_dcvdd = true; | |
874 | ||
3cc72986 MB |
875 | pm_runtime_set_autosuspend_delay(arizona->dev, 100); |
876 | pm_runtime_use_autosuspend(arizona->dev); | |
877 | pm_runtime_enable(arizona->dev); | |
878 | ||
879 | /* Chip default */ | |
880 | if (!arizona->pdata.clk32k_src) | |
881 | arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2; | |
882 | ||
883 | switch (arizona->pdata.clk32k_src) { | |
884 | case ARIZONA_32KZ_MCLK1: | |
885 | case ARIZONA_32KZ_MCLK2: | |
886 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, | |
887 | ARIZONA_CLK_32K_SRC_MASK, | |
888 | arizona->pdata.clk32k_src - 1); | |
767c6dc0 | 889 | arizona_clk32k_enable(arizona); |
3cc72986 MB |
890 | break; |
891 | case ARIZONA_32KZ_NONE: | |
892 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, | |
893 | ARIZONA_CLK_32K_SRC_MASK, 2); | |
894 | break; | |
895 | default: | |
896 | dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n", | |
897 | arizona->pdata.clk32k_src); | |
898 | ret = -EINVAL; | |
59db9691 | 899 | goto err_reset; |
3cc72986 MB |
900 | } |
901 | ||
3d91f828 | 902 | for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) { |
544c7aad MB |
903 | if (!arizona->pdata.micbias[i].mV && |
904 | !arizona->pdata.micbias[i].bypass) | |
3d91f828 MB |
905 | continue; |
906 | ||
544c7aad MB |
907 | /* Apply default for bypass mode */ |
908 | if (!arizona->pdata.micbias[i].mV) | |
909 | arizona->pdata.micbias[i].mV = 2800; | |
910 | ||
3d91f828 | 911 | val = (arizona->pdata.micbias[i].mV - 1500) / 100; |
544c7aad | 912 | |
3d91f828 MB |
913 | val <<= ARIZONA_MICB1_LVL_SHIFT; |
914 | ||
915 | if (arizona->pdata.micbias[i].ext_cap) | |
916 | val |= ARIZONA_MICB1_EXT_CAP; | |
917 | ||
918 | if (arizona->pdata.micbias[i].discharge) | |
919 | val |= ARIZONA_MICB1_DISCH; | |
920 | ||
f773fc6d | 921 | if (arizona->pdata.micbias[i].soft_start) |
3d91f828 MB |
922 | val |= ARIZONA_MICB1_RATE; |
923 | ||
544c7aad MB |
924 | if (arizona->pdata.micbias[i].bypass) |
925 | val |= ARIZONA_MICB1_BYPASS; | |
926 | ||
3d91f828 MB |
927 | regmap_update_bits(arizona->regmap, |
928 | ARIZONA_MIC_BIAS_CTRL_1 + i, | |
929 | ARIZONA_MICB1_LVL_MASK | | |
930 | ARIZONA_MICB1_DISCH | | |
544c7aad | 931 | ARIZONA_MICB1_BYPASS | |
3d91f828 MB |
932 | ARIZONA_MICB1_RATE, val); |
933 | } | |
934 | ||
3cc72986 MB |
935 | for (i = 0; i < ARIZONA_MAX_INPUT; i++) { |
936 | /* Default for both is 0 so noop with defaults */ | |
937 | val = arizona->pdata.dmic_ref[i] | |
938 | << ARIZONA_IN1_DMIC_SUP_SHIFT; | |
939 | val |= arizona->pdata.inmode[i] << ARIZONA_IN1_MODE_SHIFT; | |
940 | ||
941 | regmap_update_bits(arizona->regmap, | |
942 | ARIZONA_IN1L_CONTROL + (i * 8), | |
943 | ARIZONA_IN1_DMIC_SUP_MASK | | |
944 | ARIZONA_IN1_MODE_MASK, val); | |
945 | } | |
946 | ||
947 | for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) { | |
948 | /* Default is 0 so noop with defaults */ | |
949 | if (arizona->pdata.out_mono[i]) | |
950 | val = ARIZONA_OUT1_MONO; | |
951 | else | |
952 | val = 0; | |
953 | ||
954 | regmap_update_bits(arizona->regmap, | |
955 | ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8), | |
956 | ARIZONA_OUT1_MONO, val); | |
957 | } | |
958 | ||
3cc72986 MB |
959 | for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) { |
960 | if (arizona->pdata.spk_mute[i]) | |
961 | regmap_update_bits(arizona->regmap, | |
2a51da04 | 962 | ARIZONA_PDM_SPK1_CTRL_1 + (i * 2), |
3cc72986 MB |
963 | ARIZONA_SPK1_MUTE_ENDIAN_MASK | |
964 | ARIZONA_SPK1_MUTE_SEQ1_MASK, | |
965 | arizona->pdata.spk_mute[i]); | |
966 | ||
967 | if (arizona->pdata.spk_fmt[i]) | |
968 | regmap_update_bits(arizona->regmap, | |
2a51da04 | 969 | ARIZONA_PDM_SPK1_CTRL_2 + (i * 2), |
3cc72986 MB |
970 | ARIZONA_SPK1_FMT_MASK, |
971 | arizona->pdata.spk_fmt[i]); | |
972 | } | |
973 | ||
974 | /* Set up for interrupts */ | |
975 | ret = arizona_irq_init(arizona); | |
976 | if (ret != 0) | |
59db9691 | 977 | goto err_reset; |
3cc72986 MB |
978 | |
979 | arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error", | |
980 | arizona_clkgen_err, arizona); | |
981 | arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked", | |
982 | arizona_overclocked, arizona); | |
983 | arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked", | |
984 | arizona_underclocked, arizona); | |
985 | ||
986 | switch (arizona->type) { | |
987 | case WM5102: | |
988 | ret = mfd_add_devices(arizona->dev, -1, wm5102_devs, | |
0848c94f | 989 | ARRAY_SIZE(wm5102_devs), NULL, 0, NULL); |
e102befe MB |
990 | break; |
991 | case WM5110: | |
992 | ret = mfd_add_devices(arizona->dev, -1, wm5110_devs, | |
78566afd | 993 | ARRAY_SIZE(wm5110_devs), NULL, 0, NULL); |
3cc72986 | 994 | break; |
dc7d4863 CK |
995 | case WM8997: |
996 | ret = mfd_add_devices(arizona->dev, -1, wm8997_devs, | |
997 | ARRAY_SIZE(wm8997_devs), NULL, 0, NULL); | |
998 | break; | |
3cc72986 MB |
999 | } |
1000 | ||
1001 | if (ret != 0) { | |
1002 | dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret); | |
1003 | goto err_irq; | |
1004 | } | |
1005 | ||
59db9691 MB |
1006 | #ifdef CONFIG_PM_RUNTIME |
1007 | regulator_disable(arizona->dcvdd); | |
1008 | #endif | |
1009 | ||
3cc72986 MB |
1010 | return 0; |
1011 | ||
1012 | err_irq: | |
1013 | arizona_irq_exit(arizona); | |
3cc72986 MB |
1014 | err_reset: |
1015 | if (arizona->pdata.reset) { | |
87d3af4a | 1016 | gpio_set_value_cansleep(arizona->pdata.reset, 0); |
3cc72986 MB |
1017 | gpio_free(arizona->pdata.reset); |
1018 | } | |
59db9691 | 1019 | regulator_disable(arizona->dcvdd); |
3cc72986 | 1020 | err_enable: |
3a36a0db | 1021 | regulator_bulk_disable(arizona->num_core_supplies, |
3cc72986 MB |
1022 | arizona->core_supplies); |
1023 | err_early: | |
1024 | mfd_remove_devices(dev); | |
1025 | return ret; | |
1026 | } | |
1027 | EXPORT_SYMBOL_GPL(arizona_dev_init); | |
1028 | ||
4740f73f | 1029 | int arizona_dev_exit(struct arizona *arizona) |
3cc72986 MB |
1030 | { |
1031 | mfd_remove_devices(arizona->dev); | |
1032 | arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona); | |
1033 | arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona); | |
1034 | arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona); | |
1035 | pm_runtime_disable(arizona->dev); | |
1036 | arizona_irq_exit(arizona); | |
1d017b6b MB |
1037 | if (arizona->pdata.reset) |
1038 | gpio_set_value_cansleep(arizona->pdata.reset, 0); | |
1039 | regulator_disable(arizona->dcvdd); | |
1040 | regulator_bulk_disable(ARRAY_SIZE(arizona->core_supplies), | |
1041 | arizona->core_supplies); | |
3cc72986 MB |
1042 | return 0; |
1043 | } | |
1044 | EXPORT_SYMBOL_GPL(arizona_dev_exit); |