Commit | Line | Data |
---|---|---|
3cc72986 MB |
1 | /* |
2 | * Arizona core driver | |
3 | * | |
4 | * Copyright 2012 Wolfson Microelectronics plc | |
5 | * | |
6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/delay.h> | |
59db9691 | 14 | #include <linux/err.h> |
3cc72986 MB |
15 | #include <linux/gpio.h> |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/mfd/core.h> | |
18 | #include <linux/module.h> | |
19 | #include <linux/pm_runtime.h> | |
20 | #include <linux/regmap.h> | |
21 | #include <linux/regulator/consumer.h> | |
22 | #include <linux/slab.h> | |
23 | ||
24 | #include <linux/mfd/arizona/core.h> | |
25 | #include <linux/mfd/arizona/registers.h> | |
26 | ||
27 | #include "arizona.h" | |
28 | ||
29 | static const char *wm5102_core_supplies[] = { | |
30 | "AVDD", | |
31 | "DBVDD1", | |
3cc72986 MB |
32 | }; |
33 | ||
34 | int arizona_clk32k_enable(struct arizona *arizona) | |
35 | { | |
36 | int ret = 0; | |
37 | ||
38 | mutex_lock(&arizona->clk_lock); | |
39 | ||
40 | arizona->clk32k_ref++; | |
41 | ||
247fa192 MB |
42 | if (arizona->clk32k_ref == 1) { |
43 | switch (arizona->pdata.clk32k_src) { | |
44 | case ARIZONA_32KZ_MCLK1: | |
45 | ret = pm_runtime_get_sync(arizona->dev); | |
46 | if (ret != 0) | |
47 | goto out; | |
48 | break; | |
49 | } | |
50 | ||
3cc72986 MB |
51 | ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, |
52 | ARIZONA_CLK_32K_ENA, | |
53 | ARIZONA_CLK_32K_ENA); | |
247fa192 | 54 | } |
3cc72986 | 55 | |
247fa192 | 56 | out: |
3cc72986 MB |
57 | if (ret != 0) |
58 | arizona->clk32k_ref--; | |
59 | ||
60 | mutex_unlock(&arizona->clk_lock); | |
61 | ||
62 | return ret; | |
63 | } | |
64 | EXPORT_SYMBOL_GPL(arizona_clk32k_enable); | |
65 | ||
66 | int arizona_clk32k_disable(struct arizona *arizona) | |
67 | { | |
68 | int ret = 0; | |
69 | ||
70 | mutex_lock(&arizona->clk_lock); | |
71 | ||
72 | BUG_ON(arizona->clk32k_ref <= 0); | |
73 | ||
74 | arizona->clk32k_ref--; | |
75 | ||
247fa192 | 76 | if (arizona->clk32k_ref == 0) { |
3cc72986 MB |
77 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, |
78 | ARIZONA_CLK_32K_ENA, 0); | |
79 | ||
247fa192 MB |
80 | switch (arizona->pdata.clk32k_src) { |
81 | case ARIZONA_32KZ_MCLK1: | |
82 | pm_runtime_put_sync(arizona->dev); | |
83 | break; | |
84 | } | |
85 | } | |
86 | ||
3cc72986 MB |
87 | mutex_unlock(&arizona->clk_lock); |
88 | ||
89 | return ret; | |
90 | } | |
91 | EXPORT_SYMBOL_GPL(arizona_clk32k_disable); | |
92 | ||
93 | static irqreturn_t arizona_clkgen_err(int irq, void *data) | |
94 | { | |
95 | struct arizona *arizona = data; | |
96 | ||
97 | dev_err(arizona->dev, "CLKGEN error\n"); | |
98 | ||
99 | return IRQ_HANDLED; | |
100 | } | |
101 | ||
102 | static irqreturn_t arizona_underclocked(int irq, void *data) | |
103 | { | |
104 | struct arizona *arizona = data; | |
105 | unsigned int val; | |
106 | int ret; | |
107 | ||
108 | ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8, | |
109 | &val); | |
110 | if (ret != 0) { | |
111 | dev_err(arizona->dev, "Failed to read underclock status: %d\n", | |
112 | ret); | |
113 | return IRQ_NONE; | |
114 | } | |
115 | ||
3cc72986 MB |
116 | if (val & ARIZONA_AIF3_UNDERCLOCKED_STS) |
117 | dev_err(arizona->dev, "AIF3 underclocked\n"); | |
118 | if (val & ARIZONA_AIF2_UNDERCLOCKED_STS) | |
3ebef34d CK |
119 | dev_err(arizona->dev, "AIF2 underclocked\n"); |
120 | if (val & ARIZONA_AIF1_UNDERCLOCKED_STS) | |
3cc72986 MB |
121 | dev_err(arizona->dev, "AIF1 underclocked\n"); |
122 | if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS) | |
123 | dev_err(arizona->dev, "ISRC2 underclocked\n"); | |
124 | if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS) | |
125 | dev_err(arizona->dev, "ISRC1 underclocked\n"); | |
126 | if (val & ARIZONA_FX_UNDERCLOCKED_STS) | |
127 | dev_err(arizona->dev, "FX underclocked\n"); | |
128 | if (val & ARIZONA_ASRC_UNDERCLOCKED_STS) | |
129 | dev_err(arizona->dev, "ASRC underclocked\n"); | |
130 | if (val & ARIZONA_DAC_UNDERCLOCKED_STS) | |
131 | dev_err(arizona->dev, "DAC underclocked\n"); | |
132 | if (val & ARIZONA_ADC_UNDERCLOCKED_STS) | |
133 | dev_err(arizona->dev, "ADC underclocked\n"); | |
134 | if (val & ARIZONA_MIXER_UNDERCLOCKED_STS) | |
648a9880 | 135 | dev_err(arizona->dev, "Mixer dropped sample\n"); |
3cc72986 MB |
136 | |
137 | return IRQ_HANDLED; | |
138 | } | |
139 | ||
140 | static irqreturn_t arizona_overclocked(int irq, void *data) | |
141 | { | |
142 | struct arizona *arizona = data; | |
143 | unsigned int val[2]; | |
144 | int ret; | |
145 | ||
146 | ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6, | |
147 | &val[0], 2); | |
148 | if (ret != 0) { | |
149 | dev_err(arizona->dev, "Failed to read overclock status: %d\n", | |
150 | ret); | |
151 | return IRQ_NONE; | |
152 | } | |
153 | ||
154 | if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS) | |
155 | dev_err(arizona->dev, "PWM overclocked\n"); | |
156 | if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS) | |
157 | dev_err(arizona->dev, "FX core overclocked\n"); | |
158 | if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS) | |
159 | dev_err(arizona->dev, "DAC SYS overclocked\n"); | |
160 | if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS) | |
161 | dev_err(arizona->dev, "DAC WARP overclocked\n"); | |
162 | if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS) | |
163 | dev_err(arizona->dev, "ADC overclocked\n"); | |
164 | if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS) | |
165 | dev_err(arizona->dev, "Mixer overclocked\n"); | |
166 | if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS) | |
167 | dev_err(arizona->dev, "AIF3 overclocked\n"); | |
168 | if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS) | |
169 | dev_err(arizona->dev, "AIF2 overclocked\n"); | |
170 | if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS) | |
171 | dev_err(arizona->dev, "AIF1 overclocked\n"); | |
172 | if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS) | |
173 | dev_err(arizona->dev, "Pad control overclocked\n"); | |
174 | ||
175 | if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS) | |
176 | dev_err(arizona->dev, "Slimbus subsystem overclocked\n"); | |
177 | if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS) | |
178 | dev_err(arizona->dev, "Slimbus async overclocked\n"); | |
179 | if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS) | |
180 | dev_err(arizona->dev, "Slimbus sync overclocked\n"); | |
181 | if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS) | |
182 | dev_err(arizona->dev, "ASRC async system overclocked\n"); | |
183 | if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS) | |
184 | dev_err(arizona->dev, "ASRC async WARP overclocked\n"); | |
185 | if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS) | |
186 | dev_err(arizona->dev, "ASRC sync system overclocked\n"); | |
187 | if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS) | |
188 | dev_err(arizona->dev, "ASRC sync WARP overclocked\n"); | |
189 | if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS) | |
190 | dev_err(arizona->dev, "DSP1 overclocked\n"); | |
191 | if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS) | |
192 | dev_err(arizona->dev, "ISRC2 overclocked\n"); | |
193 | if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS) | |
194 | dev_err(arizona->dev, "ISRC1 overclocked\n"); | |
195 | ||
196 | return IRQ_HANDLED; | |
197 | } | |
198 | ||
199 | static int arizona_wait_for_boot(struct arizona *arizona) | |
200 | { | |
201 | unsigned int reg; | |
202 | int ret, i; | |
203 | ||
204 | /* | |
205 | * We can't use an interrupt as we need to runtime resume to do so, | |
206 | * we won't race with the interrupt handler as it'll be blocked on | |
207 | * runtime resume. | |
208 | */ | |
209 | for (i = 0; i < 5; i++) { | |
210 | msleep(1); | |
211 | ||
212 | ret = regmap_read(arizona->regmap, | |
213 | ARIZONA_INTERRUPT_RAW_STATUS_5, ®); | |
214 | if (ret != 0) { | |
215 | dev_err(arizona->dev, "Failed to read boot state: %d\n", | |
216 | ret); | |
cfe775ce | 217 | continue; |
3cc72986 MB |
218 | } |
219 | ||
220 | if (reg & ARIZONA_BOOT_DONE_STS) | |
221 | break; | |
222 | } | |
223 | ||
224 | if (reg & ARIZONA_BOOT_DONE_STS) { | |
225 | regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5, | |
226 | ARIZONA_BOOT_DONE_STS); | |
227 | } else { | |
228 | dev_err(arizona->dev, "Device boot timed out: %x\n", reg); | |
229 | return -ETIMEDOUT; | |
230 | } | |
231 | ||
232 | pm_runtime_mark_last_busy(arizona->dev); | |
233 | ||
234 | return 0; | |
235 | } | |
236 | ||
237 | #ifdef CONFIG_PM_RUNTIME | |
238 | static int arizona_runtime_resume(struct device *dev) | |
239 | { | |
240 | struct arizona *arizona = dev_get_drvdata(dev); | |
241 | int ret; | |
242 | ||
508c8299 MB |
243 | dev_dbg(arizona->dev, "Leaving AoD mode\n"); |
244 | ||
59db9691 MB |
245 | ret = regulator_enable(arizona->dcvdd); |
246 | if (ret != 0) { | |
247 | dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret); | |
248 | return ret; | |
249 | } | |
3cc72986 MB |
250 | |
251 | regcache_cache_only(arizona->regmap, false); | |
252 | ||
253 | ret = arizona_wait_for_boot(arizona); | |
5879f571 | 254 | if (ret != 0) { |
4816bd1c | 255 | goto err; |
5879f571 | 256 | } |
3cc72986 | 257 | |
9270bdf5 MB |
258 | ret = regcache_sync(arizona->regmap); |
259 | if (ret != 0) { | |
260 | dev_err(arizona->dev, "Failed to restore register cache\n"); | |
4816bd1c | 261 | goto err; |
9270bdf5 | 262 | } |
3cc72986 MB |
263 | |
264 | return 0; | |
4816bd1c MB |
265 | |
266 | err: | |
267 | regcache_cache_only(arizona->regmap, true); | |
268 | regulator_disable(arizona->dcvdd); | |
269 | return ret; | |
3cc72986 MB |
270 | } |
271 | ||
272 | static int arizona_runtime_suspend(struct device *dev) | |
273 | { | |
274 | struct arizona *arizona = dev_get_drvdata(dev); | |
275 | ||
508c8299 MB |
276 | dev_dbg(arizona->dev, "Entering AoD mode\n"); |
277 | ||
59db9691 MB |
278 | regulator_disable(arizona->dcvdd); |
279 | regcache_cache_only(arizona->regmap, true); | |
280 | regcache_mark_dirty(arizona->regmap); | |
3cc72986 MB |
281 | |
282 | return 0; | |
283 | } | |
284 | #endif | |
285 | ||
dc781d0e MB |
286 | #ifdef CONFIG_PM_SLEEP |
287 | static int arizona_resume_noirq(struct device *dev) | |
288 | { | |
289 | struct arizona *arizona = dev_get_drvdata(dev); | |
290 | ||
291 | dev_dbg(arizona->dev, "Early resume, disabling IRQ\n"); | |
292 | disable_irq(arizona->irq); | |
293 | ||
294 | return 0; | |
295 | } | |
296 | ||
297 | static int arizona_resume(struct device *dev) | |
298 | { | |
299 | struct arizona *arizona = dev_get_drvdata(dev); | |
300 | ||
301 | dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n"); | |
302 | enable_irq(arizona->irq); | |
303 | ||
304 | return 0; | |
305 | } | |
306 | #endif | |
307 | ||
3cc72986 MB |
308 | const struct dev_pm_ops arizona_pm_ops = { |
309 | SET_RUNTIME_PM_OPS(arizona_runtime_suspend, | |
310 | arizona_runtime_resume, | |
311 | NULL) | |
dc781d0e MB |
312 | SET_SYSTEM_SLEEP_PM_OPS(NULL, arizona_resume) |
313 | #ifdef CONFIG_PM_SLEEP | |
314 | .resume_noirq = arizona_resume_noirq, | |
315 | #endif | |
3cc72986 MB |
316 | }; |
317 | EXPORT_SYMBOL_GPL(arizona_pm_ops); | |
318 | ||
319 | static struct mfd_cell early_devs[] = { | |
320 | { .name = "arizona-ldo1" }, | |
321 | }; | |
322 | ||
323 | static struct mfd_cell wm5102_devs[] = { | |
d7768111 | 324 | { .name = "arizona-micsupp" }, |
3cc72986 MB |
325 | { .name = "arizona-extcon" }, |
326 | { .name = "arizona-gpio" }, | |
503b1cac | 327 | { .name = "arizona-haptics" }, |
3cc72986 MB |
328 | { .name = "arizona-pwm" }, |
329 | { .name = "wm5102-codec" }, | |
330 | }; | |
331 | ||
e102befe | 332 | static struct mfd_cell wm5110_devs[] = { |
d7768111 | 333 | { .name = "arizona-micsupp" }, |
e102befe MB |
334 | { .name = "arizona-extcon" }, |
335 | { .name = "arizona-gpio" }, | |
503b1cac | 336 | { .name = "arizona-haptics" }, |
e102befe MB |
337 | { .name = "arizona-pwm" }, |
338 | { .name = "wm5110-codec" }, | |
339 | }; | |
340 | ||
f791be49 | 341 | int arizona_dev_init(struct arizona *arizona) |
3cc72986 MB |
342 | { |
343 | struct device *dev = arizona->dev; | |
344 | const char *type_name; | |
345 | unsigned int reg, val; | |
62d62b59 | 346 | int (*apply_patch)(struct arizona *) = NULL; |
3cc72986 MB |
347 | int ret, i; |
348 | ||
349 | dev_set_drvdata(arizona->dev, arizona); | |
350 | mutex_init(&arizona->clk_lock); | |
351 | ||
352 | if (dev_get_platdata(arizona->dev)) | |
353 | memcpy(&arizona->pdata, dev_get_platdata(arizona->dev), | |
354 | sizeof(arizona->pdata)); | |
355 | ||
356 | regcache_cache_only(arizona->regmap, true); | |
357 | ||
358 | switch (arizona->type) { | |
359 | case WM5102: | |
e102befe | 360 | case WM5110: |
3cc72986 MB |
361 | for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++) |
362 | arizona->core_supplies[i].supply | |
363 | = wm5102_core_supplies[i]; | |
364 | arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies); | |
365 | break; | |
366 | default: | |
367 | dev_err(arizona->dev, "Unknown device type %d\n", | |
368 | arizona->type); | |
369 | return -EINVAL; | |
370 | } | |
371 | ||
372 | ret = mfd_add_devices(arizona->dev, -1, early_devs, | |
0848c94f | 373 | ARRAY_SIZE(early_devs), NULL, 0, NULL); |
3cc72986 MB |
374 | if (ret != 0) { |
375 | dev_err(dev, "Failed to add early children: %d\n", ret); | |
376 | return ret; | |
377 | } | |
378 | ||
379 | ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies, | |
380 | arizona->core_supplies); | |
381 | if (ret != 0) { | |
382 | dev_err(dev, "Failed to request core supplies: %d\n", | |
383 | ret); | |
384 | goto err_early; | |
385 | } | |
386 | ||
59db9691 MB |
387 | arizona->dcvdd = devm_regulator_get(arizona->dev, "DCVDD"); |
388 | if (IS_ERR(arizona->dcvdd)) { | |
389 | ret = PTR_ERR(arizona->dcvdd); | |
390 | dev_err(dev, "Failed to request DCVDD: %d\n", ret); | |
391 | goto err_early; | |
392 | } | |
393 | ||
3cc72986 MB |
394 | ret = regulator_bulk_enable(arizona->num_core_supplies, |
395 | arizona->core_supplies); | |
396 | if (ret != 0) { | |
397 | dev_err(dev, "Failed to enable core supplies: %d\n", | |
398 | ret); | |
399 | goto err_early; | |
400 | } | |
401 | ||
59db9691 MB |
402 | ret = regulator_enable(arizona->dcvdd); |
403 | if (ret != 0) { | |
404 | dev_err(dev, "Failed to enable DCVDD: %d\n", ret); | |
405 | goto err_enable; | |
406 | } | |
407 | ||
3cc72986 MB |
408 | if (arizona->pdata.reset) { |
409 | /* Start out with /RESET low to put the chip into reset */ | |
410 | ret = gpio_request_one(arizona->pdata.reset, | |
411 | GPIOF_DIR_OUT | GPIOF_INIT_LOW, | |
412 | "arizona /RESET"); | |
413 | if (ret != 0) { | |
414 | dev_err(dev, "Failed to request /RESET: %d\n", ret); | |
59db9691 | 415 | goto err_dcvdd; |
3cc72986 MB |
416 | } |
417 | ||
418 | gpio_set_value_cansleep(arizona->pdata.reset, 1); | |
419 | } | |
420 | ||
3cc72986 MB |
421 | regcache_cache_only(arizona->regmap, false); |
422 | ||
423 | ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); | |
424 | if (ret != 0) { | |
425 | dev_err(dev, "Failed to read ID register: %d\n", ret); | |
59db9691 | 426 | goto err_reset; |
3cc72986 MB |
427 | } |
428 | ||
429 | ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION, | |
430 | &arizona->rev); | |
431 | if (ret != 0) { | |
432 | dev_err(dev, "Failed to read revision register: %d\n", ret); | |
59db9691 | 433 | goto err_reset; |
3cc72986 MB |
434 | } |
435 | arizona->rev &= ARIZONA_DEVICE_REVISION_MASK; | |
436 | ||
437 | switch (reg) { | |
863df8d5 | 438 | #ifdef CONFIG_MFD_WM5102 |
3cc72986 MB |
439 | case 0x5102: |
440 | type_name = "WM5102"; | |
441 | if (arizona->type != WM5102) { | |
442 | dev_err(arizona->dev, "WM5102 registered as %d\n", | |
443 | arizona->type); | |
444 | arizona->type = WM5102; | |
445 | } | |
62d62b59 | 446 | apply_patch = wm5102_patch; |
3cc72986 | 447 | break; |
e102befe MB |
448 | #endif |
449 | #ifdef CONFIG_MFD_WM5110 | |
450 | case 0x5110: | |
451 | type_name = "WM5110"; | |
452 | if (arizona->type != WM5110) { | |
453 | dev_err(arizona->dev, "WM5110 registered as %d\n", | |
454 | arizona->type); | |
455 | arizona->type = WM5110; | |
456 | } | |
62d62b59 | 457 | apply_patch = wm5110_patch; |
e102befe | 458 | break; |
863df8d5 | 459 | #endif |
3cc72986 MB |
460 | default: |
461 | dev_err(arizona->dev, "Unknown device ID %x\n", reg); | |
59db9691 | 462 | goto err_reset; |
3cc72986 MB |
463 | } |
464 | ||
465 | dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A'); | |
466 | ||
3cc72986 MB |
467 | /* If we have a /RESET GPIO we'll already be reset */ |
468 | if (!arizona->pdata.reset) { | |
46b9d13a CK |
469 | regcache_mark_dirty(arizona->regmap); |
470 | ||
3cc72986 MB |
471 | ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0); |
472 | if (ret != 0) { | |
473 | dev_err(dev, "Failed to reset device: %d\n", ret); | |
59db9691 | 474 | goto err_reset; |
3cc72986 | 475 | } |
46b9d13a CK |
476 | |
477 | ret = regcache_sync(arizona->regmap); | |
478 | if (ret != 0) { | |
479 | dev_err(dev, "Failed to sync device: %d\n", ret); | |
480 | goto err_reset; | |
481 | } | |
3cc72986 MB |
482 | } |
483 | ||
af65a361 MB |
484 | ret = arizona_wait_for_boot(arizona); |
485 | if (ret != 0) { | |
486 | dev_err(arizona->dev, "Device failed initial boot: %d\n", ret); | |
487 | goto err_reset; | |
488 | } | |
3cc72986 | 489 | |
62d62b59 MB |
490 | if (apply_patch) { |
491 | ret = apply_patch(arizona); | |
492 | if (ret != 0) { | |
493 | dev_err(arizona->dev, "Failed to apply patch: %d\n", | |
494 | ret); | |
495 | goto err_reset; | |
496 | } | |
497 | } | |
498 | ||
3cc72986 MB |
499 | for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) { |
500 | if (!arizona->pdata.gpio_defaults[i]) | |
501 | continue; | |
502 | ||
503 | regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i, | |
504 | arizona->pdata.gpio_defaults[i]); | |
505 | } | |
506 | ||
507 | pm_runtime_set_autosuspend_delay(arizona->dev, 100); | |
508 | pm_runtime_use_autosuspend(arizona->dev); | |
509 | pm_runtime_enable(arizona->dev); | |
510 | ||
511 | /* Chip default */ | |
512 | if (!arizona->pdata.clk32k_src) | |
513 | arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2; | |
514 | ||
515 | switch (arizona->pdata.clk32k_src) { | |
516 | case ARIZONA_32KZ_MCLK1: | |
517 | case ARIZONA_32KZ_MCLK2: | |
518 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, | |
519 | ARIZONA_CLK_32K_SRC_MASK, | |
520 | arizona->pdata.clk32k_src - 1); | |
521 | break; | |
522 | case ARIZONA_32KZ_NONE: | |
523 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, | |
524 | ARIZONA_CLK_32K_SRC_MASK, 2); | |
525 | break; | |
526 | default: | |
527 | dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n", | |
528 | arizona->pdata.clk32k_src); | |
529 | ret = -EINVAL; | |
59db9691 | 530 | goto err_reset; |
3cc72986 MB |
531 | } |
532 | ||
3d91f828 | 533 | for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) { |
544c7aad MB |
534 | if (!arizona->pdata.micbias[i].mV && |
535 | !arizona->pdata.micbias[i].bypass) | |
3d91f828 MB |
536 | continue; |
537 | ||
544c7aad MB |
538 | /* Apply default for bypass mode */ |
539 | if (!arizona->pdata.micbias[i].mV) | |
540 | arizona->pdata.micbias[i].mV = 2800; | |
541 | ||
3d91f828 | 542 | val = (arizona->pdata.micbias[i].mV - 1500) / 100; |
544c7aad | 543 | |
3d91f828 MB |
544 | val <<= ARIZONA_MICB1_LVL_SHIFT; |
545 | ||
546 | if (arizona->pdata.micbias[i].ext_cap) | |
547 | val |= ARIZONA_MICB1_EXT_CAP; | |
548 | ||
549 | if (arizona->pdata.micbias[i].discharge) | |
550 | val |= ARIZONA_MICB1_DISCH; | |
551 | ||
552 | if (arizona->pdata.micbias[i].fast_start) | |
553 | val |= ARIZONA_MICB1_RATE; | |
554 | ||
544c7aad MB |
555 | if (arizona->pdata.micbias[i].bypass) |
556 | val |= ARIZONA_MICB1_BYPASS; | |
557 | ||
3d91f828 MB |
558 | regmap_update_bits(arizona->regmap, |
559 | ARIZONA_MIC_BIAS_CTRL_1 + i, | |
560 | ARIZONA_MICB1_LVL_MASK | | |
561 | ARIZONA_MICB1_DISCH | | |
544c7aad | 562 | ARIZONA_MICB1_BYPASS | |
3d91f828 MB |
563 | ARIZONA_MICB1_RATE, val); |
564 | } | |
565 | ||
3cc72986 MB |
566 | for (i = 0; i < ARIZONA_MAX_INPUT; i++) { |
567 | /* Default for both is 0 so noop with defaults */ | |
568 | val = arizona->pdata.dmic_ref[i] | |
569 | << ARIZONA_IN1_DMIC_SUP_SHIFT; | |
570 | val |= arizona->pdata.inmode[i] << ARIZONA_IN1_MODE_SHIFT; | |
571 | ||
572 | regmap_update_bits(arizona->regmap, | |
573 | ARIZONA_IN1L_CONTROL + (i * 8), | |
574 | ARIZONA_IN1_DMIC_SUP_MASK | | |
575 | ARIZONA_IN1_MODE_MASK, val); | |
576 | } | |
577 | ||
578 | for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) { | |
579 | /* Default is 0 so noop with defaults */ | |
580 | if (arizona->pdata.out_mono[i]) | |
581 | val = ARIZONA_OUT1_MONO; | |
582 | else | |
583 | val = 0; | |
584 | ||
585 | regmap_update_bits(arizona->regmap, | |
586 | ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8), | |
587 | ARIZONA_OUT1_MONO, val); | |
588 | } | |
589 | ||
3cc72986 MB |
590 | for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) { |
591 | if (arizona->pdata.spk_mute[i]) | |
592 | regmap_update_bits(arizona->regmap, | |
2a51da04 | 593 | ARIZONA_PDM_SPK1_CTRL_1 + (i * 2), |
3cc72986 MB |
594 | ARIZONA_SPK1_MUTE_ENDIAN_MASK | |
595 | ARIZONA_SPK1_MUTE_SEQ1_MASK, | |
596 | arizona->pdata.spk_mute[i]); | |
597 | ||
598 | if (arizona->pdata.spk_fmt[i]) | |
599 | regmap_update_bits(arizona->regmap, | |
2a51da04 | 600 | ARIZONA_PDM_SPK1_CTRL_2 + (i * 2), |
3cc72986 MB |
601 | ARIZONA_SPK1_FMT_MASK, |
602 | arizona->pdata.spk_fmt[i]); | |
603 | } | |
604 | ||
605 | /* Set up for interrupts */ | |
606 | ret = arizona_irq_init(arizona); | |
607 | if (ret != 0) | |
59db9691 | 608 | goto err_reset; |
3cc72986 MB |
609 | |
610 | arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error", | |
611 | arizona_clkgen_err, arizona); | |
612 | arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked", | |
613 | arizona_overclocked, arizona); | |
614 | arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked", | |
615 | arizona_underclocked, arizona); | |
616 | ||
617 | switch (arizona->type) { | |
618 | case WM5102: | |
619 | ret = mfd_add_devices(arizona->dev, -1, wm5102_devs, | |
0848c94f | 620 | ARRAY_SIZE(wm5102_devs), NULL, 0, NULL); |
e102befe MB |
621 | break; |
622 | case WM5110: | |
623 | ret = mfd_add_devices(arizona->dev, -1, wm5110_devs, | |
78566afd | 624 | ARRAY_SIZE(wm5110_devs), NULL, 0, NULL); |
3cc72986 MB |
625 | break; |
626 | } | |
627 | ||
628 | if (ret != 0) { | |
629 | dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret); | |
630 | goto err_irq; | |
631 | } | |
632 | ||
59db9691 MB |
633 | #ifdef CONFIG_PM_RUNTIME |
634 | regulator_disable(arizona->dcvdd); | |
635 | #endif | |
636 | ||
3cc72986 MB |
637 | return 0; |
638 | ||
639 | err_irq: | |
640 | arizona_irq_exit(arizona); | |
3cc72986 MB |
641 | err_reset: |
642 | if (arizona->pdata.reset) { | |
643 | gpio_set_value_cansleep(arizona->pdata.reset, 1); | |
644 | gpio_free(arizona->pdata.reset); | |
645 | } | |
59db9691 MB |
646 | err_dcvdd: |
647 | regulator_disable(arizona->dcvdd); | |
3cc72986 | 648 | err_enable: |
3a36a0db | 649 | regulator_bulk_disable(arizona->num_core_supplies, |
3cc72986 MB |
650 | arizona->core_supplies); |
651 | err_early: | |
652 | mfd_remove_devices(dev); | |
653 | return ret; | |
654 | } | |
655 | EXPORT_SYMBOL_GPL(arizona_dev_init); | |
656 | ||
4740f73f | 657 | int arizona_dev_exit(struct arizona *arizona) |
3cc72986 MB |
658 | { |
659 | mfd_remove_devices(arizona->dev); | |
660 | arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona); | |
661 | arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona); | |
662 | arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona); | |
663 | pm_runtime_disable(arizona->dev); | |
664 | arizona_irq_exit(arizona); | |
665 | return 0; | |
666 | } | |
667 | EXPORT_SYMBOL_GPL(arizona_dev_exit); |