Commit | Line | Data |
---|---|---|
3cc72986 MB |
1 | /* |
2 | * Arizona core driver | |
3 | * | |
4 | * Copyright 2012 Wolfson Microelectronics plc | |
5 | * | |
6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/delay.h> | |
59db9691 | 14 | #include <linux/err.h> |
3cc72986 MB |
15 | #include <linux/gpio.h> |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/mfd/core.h> | |
18 | #include <linux/module.h> | |
d781009c MB |
19 | #include <linux/of.h> |
20 | #include <linux/of_device.h> | |
21 | #include <linux/of_gpio.h> | |
3cc72986 MB |
22 | #include <linux/pm_runtime.h> |
23 | #include <linux/regmap.h> | |
24 | #include <linux/regulator/consumer.h> | |
5927467d | 25 | #include <linux/regulator/machine.h> |
3cc72986 MB |
26 | #include <linux/slab.h> |
27 | ||
28 | #include <linux/mfd/arizona/core.h> | |
29 | #include <linux/mfd/arizona/registers.h> | |
30 | ||
31 | #include "arizona.h" | |
32 | ||
33 | static const char *wm5102_core_supplies[] = { | |
34 | "AVDD", | |
35 | "DBVDD1", | |
3cc72986 MB |
36 | }; |
37 | ||
38 | int arizona_clk32k_enable(struct arizona *arizona) | |
39 | { | |
40 | int ret = 0; | |
41 | ||
42 | mutex_lock(&arizona->clk_lock); | |
43 | ||
44 | arizona->clk32k_ref++; | |
45 | ||
247fa192 MB |
46 | if (arizona->clk32k_ref == 1) { |
47 | switch (arizona->pdata.clk32k_src) { | |
48 | case ARIZONA_32KZ_MCLK1: | |
49 | ret = pm_runtime_get_sync(arizona->dev); | |
50 | if (ret != 0) | |
51 | goto out; | |
52 | break; | |
53 | } | |
54 | ||
3cc72986 MB |
55 | ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, |
56 | ARIZONA_CLK_32K_ENA, | |
57 | ARIZONA_CLK_32K_ENA); | |
247fa192 | 58 | } |
3cc72986 | 59 | |
247fa192 | 60 | out: |
3cc72986 MB |
61 | if (ret != 0) |
62 | arizona->clk32k_ref--; | |
63 | ||
64 | mutex_unlock(&arizona->clk_lock); | |
65 | ||
66 | return ret; | |
67 | } | |
68 | EXPORT_SYMBOL_GPL(arizona_clk32k_enable); | |
69 | ||
70 | int arizona_clk32k_disable(struct arizona *arizona) | |
71 | { | |
72 | int ret = 0; | |
73 | ||
74 | mutex_lock(&arizona->clk_lock); | |
75 | ||
76 | BUG_ON(arizona->clk32k_ref <= 0); | |
77 | ||
78 | arizona->clk32k_ref--; | |
79 | ||
247fa192 | 80 | if (arizona->clk32k_ref == 0) { |
3cc72986 MB |
81 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, |
82 | ARIZONA_CLK_32K_ENA, 0); | |
83 | ||
247fa192 MB |
84 | switch (arizona->pdata.clk32k_src) { |
85 | case ARIZONA_32KZ_MCLK1: | |
86 | pm_runtime_put_sync(arizona->dev); | |
87 | break; | |
88 | } | |
89 | } | |
90 | ||
3cc72986 MB |
91 | mutex_unlock(&arizona->clk_lock); |
92 | ||
93 | return ret; | |
94 | } | |
95 | EXPORT_SYMBOL_GPL(arizona_clk32k_disable); | |
96 | ||
97 | static irqreturn_t arizona_clkgen_err(int irq, void *data) | |
98 | { | |
99 | struct arizona *arizona = data; | |
100 | ||
101 | dev_err(arizona->dev, "CLKGEN error\n"); | |
102 | ||
103 | return IRQ_HANDLED; | |
104 | } | |
105 | ||
106 | static irqreturn_t arizona_underclocked(int irq, void *data) | |
107 | { | |
108 | struct arizona *arizona = data; | |
109 | unsigned int val; | |
110 | int ret; | |
111 | ||
112 | ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8, | |
113 | &val); | |
114 | if (ret != 0) { | |
115 | dev_err(arizona->dev, "Failed to read underclock status: %d\n", | |
116 | ret); | |
117 | return IRQ_NONE; | |
118 | } | |
119 | ||
3cc72986 MB |
120 | if (val & ARIZONA_AIF3_UNDERCLOCKED_STS) |
121 | dev_err(arizona->dev, "AIF3 underclocked\n"); | |
122 | if (val & ARIZONA_AIF2_UNDERCLOCKED_STS) | |
3ebef34d CK |
123 | dev_err(arizona->dev, "AIF2 underclocked\n"); |
124 | if (val & ARIZONA_AIF1_UNDERCLOCKED_STS) | |
3cc72986 | 125 | dev_err(arizona->dev, "AIF1 underclocked\n"); |
6e440d27 CK |
126 | if (val & ARIZONA_ISRC3_UNDERCLOCKED_STS) |
127 | dev_err(arizona->dev, "ISRC3 underclocked\n"); | |
3cc72986 MB |
128 | if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS) |
129 | dev_err(arizona->dev, "ISRC2 underclocked\n"); | |
130 | if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS) | |
131 | dev_err(arizona->dev, "ISRC1 underclocked\n"); | |
132 | if (val & ARIZONA_FX_UNDERCLOCKED_STS) | |
133 | dev_err(arizona->dev, "FX underclocked\n"); | |
134 | if (val & ARIZONA_ASRC_UNDERCLOCKED_STS) | |
135 | dev_err(arizona->dev, "ASRC underclocked\n"); | |
136 | if (val & ARIZONA_DAC_UNDERCLOCKED_STS) | |
137 | dev_err(arizona->dev, "DAC underclocked\n"); | |
138 | if (val & ARIZONA_ADC_UNDERCLOCKED_STS) | |
139 | dev_err(arizona->dev, "ADC underclocked\n"); | |
140 | if (val & ARIZONA_MIXER_UNDERCLOCKED_STS) | |
648a9880 | 141 | dev_err(arizona->dev, "Mixer dropped sample\n"); |
3cc72986 MB |
142 | |
143 | return IRQ_HANDLED; | |
144 | } | |
145 | ||
146 | static irqreturn_t arizona_overclocked(int irq, void *data) | |
147 | { | |
148 | struct arizona *arizona = data; | |
149 | unsigned int val[2]; | |
150 | int ret; | |
151 | ||
152 | ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6, | |
153 | &val[0], 2); | |
154 | if (ret != 0) { | |
155 | dev_err(arizona->dev, "Failed to read overclock status: %d\n", | |
156 | ret); | |
157 | return IRQ_NONE; | |
158 | } | |
159 | ||
160 | if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS) | |
161 | dev_err(arizona->dev, "PWM overclocked\n"); | |
162 | if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS) | |
163 | dev_err(arizona->dev, "FX core overclocked\n"); | |
164 | if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS) | |
165 | dev_err(arizona->dev, "DAC SYS overclocked\n"); | |
166 | if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS) | |
167 | dev_err(arizona->dev, "DAC WARP overclocked\n"); | |
168 | if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS) | |
169 | dev_err(arizona->dev, "ADC overclocked\n"); | |
170 | if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS) | |
171 | dev_err(arizona->dev, "Mixer overclocked\n"); | |
172 | if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS) | |
173 | dev_err(arizona->dev, "AIF3 overclocked\n"); | |
174 | if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS) | |
175 | dev_err(arizona->dev, "AIF2 overclocked\n"); | |
176 | if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS) | |
177 | dev_err(arizona->dev, "AIF1 overclocked\n"); | |
178 | if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS) | |
179 | dev_err(arizona->dev, "Pad control overclocked\n"); | |
180 | ||
181 | if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS) | |
182 | dev_err(arizona->dev, "Slimbus subsystem overclocked\n"); | |
183 | if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS) | |
184 | dev_err(arizona->dev, "Slimbus async overclocked\n"); | |
185 | if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS) | |
186 | dev_err(arizona->dev, "Slimbus sync overclocked\n"); | |
187 | if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS) | |
188 | dev_err(arizona->dev, "ASRC async system overclocked\n"); | |
189 | if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS) | |
190 | dev_err(arizona->dev, "ASRC async WARP overclocked\n"); | |
191 | if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS) | |
192 | dev_err(arizona->dev, "ASRC sync system overclocked\n"); | |
193 | if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS) | |
194 | dev_err(arizona->dev, "ASRC sync WARP overclocked\n"); | |
195 | if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS) | |
196 | dev_err(arizona->dev, "DSP1 overclocked\n"); | |
6e440d27 CK |
197 | if (val[1] & ARIZONA_ISRC3_OVERCLOCKED_STS) |
198 | dev_err(arizona->dev, "ISRC3 overclocked\n"); | |
3cc72986 MB |
199 | if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS) |
200 | dev_err(arizona->dev, "ISRC2 overclocked\n"); | |
201 | if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS) | |
202 | dev_err(arizona->dev, "ISRC1 overclocked\n"); | |
203 | ||
204 | return IRQ_HANDLED; | |
205 | } | |
206 | ||
9d53dfdc CK |
207 | static int arizona_poll_reg(struct arizona *arizona, |
208 | int timeout, unsigned int reg, | |
209 | unsigned int mask, unsigned int target) | |
3cc72986 | 210 | { |
9d53dfdc | 211 | unsigned int val = 0; |
3cc72986 MB |
212 | int ret, i; |
213 | ||
9d53dfdc CK |
214 | for (i = 0; i < timeout; i++) { |
215 | ret = regmap_read(arizona->regmap, reg, &val); | |
3cc72986 | 216 | if (ret != 0) { |
9d53dfdc CK |
217 | dev_err(arizona->dev, "Failed to read reg %u: %d\n", |
218 | reg, ret); | |
cfe775ce | 219 | continue; |
3cc72986 MB |
220 | } |
221 | ||
9d53dfdc CK |
222 | if ((val & mask) == target) |
223 | return 0; | |
224 | ||
225 | msleep(1); | |
3cc72986 MB |
226 | } |
227 | ||
9d53dfdc CK |
228 | dev_err(arizona->dev, "Polling reg %u timed out: %x\n", reg, val); |
229 | return -ETIMEDOUT; | |
230 | } | |
231 | ||
232 | static int arizona_wait_for_boot(struct arizona *arizona) | |
233 | { | |
234 | int ret; | |
235 | ||
236 | /* | |
237 | * We can't use an interrupt as we need to runtime resume to do so, | |
238 | * we won't race with the interrupt handler as it'll be blocked on | |
239 | * runtime resume. | |
240 | */ | |
241 | ret = arizona_poll_reg(arizona, 5, ARIZONA_INTERRUPT_RAW_STATUS_5, | |
242 | ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS); | |
243 | ||
244 | if (!ret) | |
3cc72986 MB |
245 | regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5, |
246 | ARIZONA_BOOT_DONE_STS); | |
3cc72986 MB |
247 | |
248 | pm_runtime_mark_last_busy(arizona->dev); | |
249 | ||
9d53dfdc | 250 | return ret; |
3cc72986 MB |
251 | } |
252 | ||
2229875d CK |
253 | static inline void arizona_enable_reset(struct arizona *arizona) |
254 | { | |
255 | if (arizona->pdata.reset) | |
256 | gpio_set_value_cansleep(arizona->pdata.reset, 0); | |
257 | } | |
258 | ||
259 | static void arizona_disable_reset(struct arizona *arizona) | |
260 | { | |
261 | if (arizona->pdata.reset) { | |
262 | gpio_set_value_cansleep(arizona->pdata.reset, 1); | |
263 | msleep(1); | |
264 | } | |
265 | } | |
266 | ||
e80436bb CK |
267 | static int arizona_apply_hardware_patch(struct arizona* arizona) |
268 | { | |
269 | unsigned int fll, sysclk; | |
270 | int ret, err; | |
271 | ||
e80436bb CK |
272 | /* Cache existing FLL and SYSCLK settings */ |
273 | ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &fll); | |
274 | if (ret != 0) { | |
275 | dev_err(arizona->dev, "Failed to cache FLL settings: %d\n", | |
276 | ret); | |
277 | return ret; | |
278 | } | |
279 | ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &sysclk); | |
280 | if (ret != 0) { | |
281 | dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n", | |
282 | ret); | |
283 | return ret; | |
284 | } | |
285 | ||
286 | /* Start up SYSCLK using the FLL in free running mode */ | |
287 | ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, | |
288 | ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN); | |
289 | if (ret != 0) { | |
290 | dev_err(arizona->dev, | |
291 | "Failed to start FLL in freerunning mode: %d\n", | |
292 | ret); | |
293 | return ret; | |
294 | } | |
295 | ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5, | |
296 | ARIZONA_FLL1_CLOCK_OK_STS, | |
297 | ARIZONA_FLL1_CLOCK_OK_STS); | |
298 | if (ret != 0) { | |
299 | ret = -ETIMEDOUT; | |
300 | goto err_fll; | |
301 | } | |
302 | ||
303 | ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144); | |
304 | if (ret != 0) { | |
305 | dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret); | |
306 | goto err_fll; | |
307 | } | |
308 | ||
309 | /* Start the write sequencer and wait for it to finish */ | |
310 | ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, | |
311 | ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160); | |
312 | if (ret != 0) { | |
313 | dev_err(arizona->dev, "Failed to start write sequencer: %d\n", | |
314 | ret); | |
315 | goto err_sysclk; | |
316 | } | |
317 | ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1, | |
318 | ARIZONA_WSEQ_BUSY, 0); | |
319 | if (ret != 0) { | |
320 | regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, | |
321 | ARIZONA_WSEQ_ABORT); | |
322 | ret = -ETIMEDOUT; | |
323 | } | |
324 | ||
325 | err_sysclk: | |
326 | err = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, sysclk); | |
327 | if (err != 0) { | |
328 | dev_err(arizona->dev, | |
329 | "Failed to re-apply old SYSCLK settings: %d\n", | |
330 | err); | |
331 | } | |
332 | ||
333 | err_fll: | |
334 | err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, fll); | |
335 | if (err != 0) { | |
336 | dev_err(arizona->dev, | |
337 | "Failed to re-apply old FLL settings: %d\n", | |
338 | err); | |
339 | } | |
340 | ||
e80436bb CK |
341 | if (ret != 0) |
342 | return ret; | |
343 | else | |
344 | return err; | |
345 | } | |
346 | ||
48bb9fe4 | 347 | #ifdef CONFIG_PM |
3cc72986 MB |
348 | static int arizona_runtime_resume(struct device *dev) |
349 | { | |
350 | struct arizona *arizona = dev_get_drvdata(dev); | |
351 | int ret; | |
352 | ||
508c8299 MB |
353 | dev_dbg(arizona->dev, "Leaving AoD mode\n"); |
354 | ||
59db9691 MB |
355 | ret = regulator_enable(arizona->dcvdd); |
356 | if (ret != 0) { | |
357 | dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret); | |
358 | return ret; | |
359 | } | |
3cc72986 MB |
360 | |
361 | regcache_cache_only(arizona->regmap, false); | |
362 | ||
4c9bb8bc CK |
363 | switch (arizona->type) { |
364 | case WM5102: | |
5927467d MB |
365 | if (arizona->external_dcvdd) { |
366 | ret = regmap_update_bits(arizona->regmap, | |
367 | ARIZONA_ISOLATION_CONTROL, | |
368 | ARIZONA_ISOLATE_DCVDD1, 0); | |
369 | if (ret != 0) { | |
370 | dev_err(arizona->dev, | |
371 | "Failed to connect DCVDD: %d\n", ret); | |
372 | goto err; | |
373 | } | |
374 | } | |
375 | ||
4c9bb8bc CK |
376 | ret = wm5102_patch(arizona); |
377 | if (ret != 0) { | |
378 | dev_err(arizona->dev, "Failed to apply patch: %d\n", | |
379 | ret); | |
380 | goto err; | |
381 | } | |
e80436bb CK |
382 | |
383 | ret = arizona_apply_hardware_patch(arizona); | |
384 | if (ret != 0) { | |
385 | dev_err(arizona->dev, | |
386 | "Failed to apply hardware patch: %d\n", | |
387 | ret); | |
388 | goto err; | |
389 | } | |
390 | break; | |
391 | default: | |
12bb68ed CK |
392 | ret = arizona_wait_for_boot(arizona); |
393 | if (ret != 0) { | |
394 | goto err; | |
395 | } | |
396 | ||
5927467d MB |
397 | if (arizona->external_dcvdd) { |
398 | ret = regmap_update_bits(arizona->regmap, | |
399 | ARIZONA_ISOLATION_CONTROL, | |
400 | ARIZONA_ISOLATE_DCVDD1, 0); | |
401 | if (ret != 0) { | |
402 | dev_err(arizona->dev, | |
403 | "Failed to connect DCVDD: %d\n", ret); | |
404 | goto err; | |
405 | } | |
406 | } | |
e80436bb | 407 | break; |
4c9bb8bc CK |
408 | } |
409 | ||
9270bdf5 MB |
410 | ret = regcache_sync(arizona->regmap); |
411 | if (ret != 0) { | |
412 | dev_err(arizona->dev, "Failed to restore register cache\n"); | |
4816bd1c | 413 | goto err; |
9270bdf5 | 414 | } |
3cc72986 MB |
415 | |
416 | return 0; | |
4816bd1c MB |
417 | |
418 | err: | |
419 | regcache_cache_only(arizona->regmap, true); | |
420 | regulator_disable(arizona->dcvdd); | |
421 | return ret; | |
3cc72986 MB |
422 | } |
423 | ||
424 | static int arizona_runtime_suspend(struct device *dev) | |
425 | { | |
426 | struct arizona *arizona = dev_get_drvdata(dev); | |
5927467d | 427 | int ret; |
3cc72986 | 428 | |
508c8299 MB |
429 | dev_dbg(arizona->dev, "Entering AoD mode\n"); |
430 | ||
5927467d MB |
431 | if (arizona->external_dcvdd) { |
432 | ret = regmap_update_bits(arizona->regmap, | |
433 | ARIZONA_ISOLATION_CONTROL, | |
434 | ARIZONA_ISOLATE_DCVDD1, | |
435 | ARIZONA_ISOLATE_DCVDD1); | |
436 | if (ret != 0) { | |
437 | dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n", | |
438 | ret); | |
439 | return ret; | |
440 | } | |
441 | } | |
442 | ||
59db9691 MB |
443 | regcache_cache_only(arizona->regmap, true); |
444 | regcache_mark_dirty(arizona->regmap); | |
e293e847 | 445 | regulator_disable(arizona->dcvdd); |
3cc72986 MB |
446 | |
447 | return 0; | |
448 | } | |
449 | #endif | |
450 | ||
dc781d0e | 451 | #ifdef CONFIG_PM_SLEEP |
67c99296 MB |
452 | static int arizona_suspend(struct device *dev) |
453 | { | |
454 | struct arizona *arizona = dev_get_drvdata(dev); | |
455 | ||
456 | dev_dbg(arizona->dev, "Suspend, disabling IRQ\n"); | |
457 | disable_irq(arizona->irq); | |
458 | ||
459 | return 0; | |
460 | } | |
461 | ||
462 | static int arizona_suspend_late(struct device *dev) | |
463 | { | |
464 | struct arizona *arizona = dev_get_drvdata(dev); | |
465 | ||
466 | dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n"); | |
467 | enable_irq(arizona->irq); | |
468 | ||
469 | return 0; | |
470 | } | |
471 | ||
dc781d0e MB |
472 | static int arizona_resume_noirq(struct device *dev) |
473 | { | |
474 | struct arizona *arizona = dev_get_drvdata(dev); | |
475 | ||
476 | dev_dbg(arizona->dev, "Early resume, disabling IRQ\n"); | |
477 | disable_irq(arizona->irq); | |
478 | ||
479 | return 0; | |
480 | } | |
481 | ||
482 | static int arizona_resume(struct device *dev) | |
483 | { | |
484 | struct arizona *arizona = dev_get_drvdata(dev); | |
485 | ||
486 | dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n"); | |
487 | enable_irq(arizona->irq); | |
488 | ||
489 | return 0; | |
490 | } | |
491 | #endif | |
492 | ||
3cc72986 MB |
493 | const struct dev_pm_ops arizona_pm_ops = { |
494 | SET_RUNTIME_PM_OPS(arizona_runtime_suspend, | |
495 | arizona_runtime_resume, | |
496 | NULL) | |
67c99296 | 497 | SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume) |
dc781d0e | 498 | #ifdef CONFIG_PM_SLEEP |
67c99296 | 499 | .suspend_late = arizona_suspend_late, |
dc781d0e MB |
500 | .resume_noirq = arizona_resume_noirq, |
501 | #endif | |
3cc72986 MB |
502 | }; |
503 | EXPORT_SYMBOL_GPL(arizona_pm_ops); | |
504 | ||
d781009c | 505 | #ifdef CONFIG_OF |
942786e6 | 506 | unsigned long arizona_of_get_type(struct device *dev) |
d781009c MB |
507 | { |
508 | const struct of_device_id *id = of_match_device(arizona_of_match, dev); | |
509 | ||
510 | if (id) | |
942786e6 | 511 | return (unsigned long)id->data; |
d781009c MB |
512 | else |
513 | return 0; | |
514 | } | |
515 | EXPORT_SYMBOL_GPL(arizona_of_get_type); | |
516 | ||
e4fcb1d6 CK |
517 | int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop, |
518 | bool mandatory) | |
519 | { | |
520 | int gpio; | |
521 | ||
522 | gpio = of_get_named_gpio(arizona->dev->of_node, prop, 0); | |
523 | if (gpio < 0) { | |
524 | if (mandatory) | |
525 | dev_err(arizona->dev, | |
526 | "Mandatory DT gpio %s missing/malformed: %d\n", | |
527 | prop, gpio); | |
528 | ||
529 | gpio = 0; | |
530 | } | |
531 | ||
532 | return gpio; | |
533 | } | |
534 | EXPORT_SYMBOL_GPL(arizona_of_get_named_gpio); | |
535 | ||
d781009c MB |
536 | static int arizona_of_get_core_pdata(struct arizona *arizona) |
537 | { | |
e4fcb1d6 | 538 | struct arizona_pdata *pdata = &arizona->pdata; |
cc47aed9 IS |
539 | struct property *prop; |
540 | const __be32 *cur; | |
541 | u32 val; | |
d781009c | 542 | int ret, i; |
cc47aed9 | 543 | int count = 0; |
d781009c | 544 | |
e4fcb1d6 | 545 | pdata->reset = arizona_of_get_named_gpio(arizona, "wlf,reset", true); |
d781009c MB |
546 | |
547 | ret = of_property_read_u32_array(arizona->dev->of_node, | |
548 | "wlf,gpio-defaults", | |
549 | arizona->pdata.gpio_defaults, | |
550 | ARRAY_SIZE(arizona->pdata.gpio_defaults)); | |
551 | if (ret >= 0) { | |
552 | /* | |
553 | * All values are literal except out of range values | |
554 | * which are chip default, translate into platform | |
555 | * data which uses 0 as chip default and out of range | |
556 | * as zero. | |
557 | */ | |
558 | for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) { | |
559 | if (arizona->pdata.gpio_defaults[i] > 0xffff) | |
560 | arizona->pdata.gpio_defaults[i] = 0; | |
91c73935 | 561 | else if (arizona->pdata.gpio_defaults[i] == 0) |
d781009c MB |
562 | arizona->pdata.gpio_defaults[i] = 0x10000; |
563 | } | |
564 | } else { | |
565 | dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n", | |
566 | ret); | |
567 | } | |
568 | ||
cc47aed9 IS |
569 | of_property_for_each_u32(arizona->dev->of_node, "wlf,inmode", prop, |
570 | cur, val) { | |
571 | if (count == ARRAY_SIZE(arizona->pdata.inmode)) | |
572 | break; | |
573 | ||
574 | arizona->pdata.inmode[count] = val; | |
575 | count++; | |
576 | } | |
577 | ||
e7ad27ca CK |
578 | count = 0; |
579 | of_property_for_each_u32(arizona->dev->of_node, "wlf,dmic-ref", prop, | |
580 | cur, val) { | |
581 | if (count == ARRAY_SIZE(arizona->pdata.dmic_ref)) | |
582 | break; | |
583 | ||
584 | arizona->pdata.dmic_ref[count] = val; | |
585 | count++; | |
586 | } | |
587 | ||
d781009c MB |
588 | return 0; |
589 | } | |
590 | ||
591 | const struct of_device_id arizona_of_match[] = { | |
592 | { .compatible = "wlf,wm5102", .data = (void *)WM5102 }, | |
593 | { .compatible = "wlf,wm5110", .data = (void *)WM5110 }, | |
e5d4ef0d | 594 | { .compatible = "wlf,wm8280", .data = (void *)WM8280 }, |
dc7d4863 | 595 | { .compatible = "wlf,wm8997", .data = (void *)WM8997 }, |
d781009c MB |
596 | {}, |
597 | }; | |
598 | EXPORT_SYMBOL_GPL(arizona_of_match); | |
599 | #else | |
600 | static inline int arizona_of_get_core_pdata(struct arizona *arizona) | |
601 | { | |
602 | return 0; | |
603 | } | |
604 | #endif | |
605 | ||
5ac98553 | 606 | static const struct mfd_cell early_devs[] = { |
3cc72986 MB |
607 | { .name = "arizona-ldo1" }, |
608 | }; | |
609 | ||
32dadef2 | 610 | static const char *wm5102_supplies[] = { |
5fc6c396 | 611 | "MICVDD", |
32dadef2 CK |
612 | "DBVDD2", |
613 | "DBVDD3", | |
614 | "CPVDD", | |
615 | "SPKVDDL", | |
616 | "SPKVDDR", | |
617 | }; | |
618 | ||
5ac98553 | 619 | static const struct mfd_cell wm5102_devs[] = { |
d7768111 | 620 | { .name = "arizona-micsupp" }, |
5fc6c396 CK |
621 | { |
622 | .name = "arizona-extcon", | |
623 | .parent_supplies = wm5102_supplies, | |
624 | .num_parent_supplies = 1, /* We only need MICVDD */ | |
625 | }, | |
3cc72986 | 626 | { .name = "arizona-gpio" }, |
503b1cac | 627 | { .name = "arizona-haptics" }, |
3cc72986 | 628 | { .name = "arizona-pwm" }, |
32dadef2 CK |
629 | { |
630 | .name = "wm5102-codec", | |
631 | .parent_supplies = wm5102_supplies, | |
632 | .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), | |
633 | }, | |
3cc72986 MB |
634 | }; |
635 | ||
5ac98553 | 636 | static const struct mfd_cell wm5110_devs[] = { |
d7768111 | 637 | { .name = "arizona-micsupp" }, |
5fc6c396 CK |
638 | { |
639 | .name = "arizona-extcon", | |
640 | .parent_supplies = wm5102_supplies, | |
641 | .num_parent_supplies = 1, /* We only need MICVDD */ | |
642 | }, | |
e102befe | 643 | { .name = "arizona-gpio" }, |
503b1cac | 644 | { .name = "arizona-haptics" }, |
e102befe | 645 | { .name = "arizona-pwm" }, |
32dadef2 CK |
646 | { |
647 | .name = "wm5110-codec", | |
648 | .parent_supplies = wm5102_supplies, | |
649 | .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), | |
650 | }, | |
651 | }; | |
652 | ||
653 | static const char *wm8997_supplies[] = { | |
996c2d4f | 654 | "MICVDD", |
32dadef2 CK |
655 | "DBVDD2", |
656 | "CPVDD", | |
657 | "SPKVDD", | |
e102befe MB |
658 | }; |
659 | ||
5ac98553 | 660 | static const struct mfd_cell wm8997_devs[] = { |
dc7d4863 | 661 | { .name = "arizona-micsupp" }, |
5fc6c396 CK |
662 | { |
663 | .name = "arizona-extcon", | |
664 | .parent_supplies = wm8997_supplies, | |
665 | .num_parent_supplies = 1, /* We only need MICVDD */ | |
666 | }, | |
dc7d4863 CK |
667 | { .name = "arizona-gpio" }, |
668 | { .name = "arizona-haptics" }, | |
669 | { .name = "arizona-pwm" }, | |
32dadef2 CK |
670 | { |
671 | .name = "wm8997-codec", | |
672 | .parent_supplies = wm8997_supplies, | |
673 | .num_parent_supplies = ARRAY_SIZE(wm8997_supplies), | |
674 | }, | |
dc7d4863 CK |
675 | }; |
676 | ||
f791be49 | 677 | int arizona_dev_init(struct arizona *arizona) |
3cc72986 MB |
678 | { |
679 | struct device *dev = arizona->dev; | |
680 | const char *type_name; | |
681 | unsigned int reg, val; | |
62d62b59 | 682 | int (*apply_patch)(struct arizona *) = NULL; |
3cc72986 MB |
683 | int ret, i; |
684 | ||
685 | dev_set_drvdata(arizona->dev, arizona); | |
686 | mutex_init(&arizona->clk_lock); | |
687 | ||
688 | if (dev_get_platdata(arizona->dev)) | |
689 | memcpy(&arizona->pdata, dev_get_platdata(arizona->dev), | |
690 | sizeof(arizona->pdata)); | |
22d7dc8a LJ |
691 | else |
692 | arizona_of_get_core_pdata(arizona); | |
3cc72986 MB |
693 | |
694 | regcache_cache_only(arizona->regmap, true); | |
695 | ||
696 | switch (arizona->type) { | |
697 | case WM5102: | |
e102befe | 698 | case WM5110: |
e5d4ef0d | 699 | case WM8280: |
dc7d4863 | 700 | case WM8997: |
3cc72986 MB |
701 | for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++) |
702 | arizona->core_supplies[i].supply | |
703 | = wm5102_core_supplies[i]; | |
704 | arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies); | |
705 | break; | |
706 | default: | |
707 | dev_err(arizona->dev, "Unknown device type %d\n", | |
708 | arizona->type); | |
709 | return -EINVAL; | |
710 | } | |
711 | ||
4a8c475f CK |
712 | /* Mark DCVDD as external, LDO1 driver will clear if internal */ |
713 | arizona->external_dcvdd = true; | |
714 | ||
3cc72986 | 715 | ret = mfd_add_devices(arizona->dev, -1, early_devs, |
0848c94f | 716 | ARRAY_SIZE(early_devs), NULL, 0, NULL); |
3cc72986 MB |
717 | if (ret != 0) { |
718 | dev_err(dev, "Failed to add early children: %d\n", ret); | |
719 | return ret; | |
720 | } | |
721 | ||
722 | ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies, | |
723 | arizona->core_supplies); | |
724 | if (ret != 0) { | |
725 | dev_err(dev, "Failed to request core supplies: %d\n", | |
726 | ret); | |
727 | goto err_early; | |
728 | } | |
729 | ||
0c2d0ffb CK |
730 | /** |
731 | * Don't use devres here because the only device we have to get | |
732 | * against is the MFD device and DCVDD will likely be supplied by | |
733 | * one of its children. Meaning that the regulator will be | |
734 | * destroyed by the time devres calls regulator put. | |
735 | */ | |
e6021511 | 736 | arizona->dcvdd = regulator_get(arizona->dev, "DCVDD"); |
59db9691 MB |
737 | if (IS_ERR(arizona->dcvdd)) { |
738 | ret = PTR_ERR(arizona->dcvdd); | |
739 | dev_err(dev, "Failed to request DCVDD: %d\n", ret); | |
740 | goto err_early; | |
741 | } | |
742 | ||
87d3af4a MB |
743 | if (arizona->pdata.reset) { |
744 | /* Start out with /RESET low to put the chip into reset */ | |
5f056bf0 CK |
745 | ret = devm_gpio_request_one(arizona->dev, arizona->pdata.reset, |
746 | GPIOF_DIR_OUT | GPIOF_INIT_LOW, | |
747 | "arizona /RESET"); | |
87d3af4a MB |
748 | if (ret != 0) { |
749 | dev_err(dev, "Failed to request /RESET: %d\n", ret); | |
e6021511 | 750 | goto err_dcvdd; |
87d3af4a MB |
751 | } |
752 | } | |
753 | ||
3cc72986 MB |
754 | ret = regulator_bulk_enable(arizona->num_core_supplies, |
755 | arizona->core_supplies); | |
756 | if (ret != 0) { | |
757 | dev_err(dev, "Failed to enable core supplies: %d\n", | |
758 | ret); | |
e6021511 | 759 | goto err_dcvdd; |
3cc72986 MB |
760 | } |
761 | ||
59db9691 MB |
762 | ret = regulator_enable(arizona->dcvdd); |
763 | if (ret != 0) { | |
764 | dev_err(dev, "Failed to enable DCVDD: %d\n", ret); | |
765 | goto err_enable; | |
766 | } | |
767 | ||
2229875d | 768 | arizona_disable_reset(arizona); |
3cc72986 | 769 | |
3cc72986 MB |
770 | regcache_cache_only(arizona->regmap, false); |
771 | ||
ca76ceb8 | 772 | /* Verify that this is a chip we know about */ |
3cc72986 MB |
773 | ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); |
774 | if (ret != 0) { | |
775 | dev_err(dev, "Failed to read ID register: %d\n", ret); | |
59db9691 | 776 | goto err_reset; |
3cc72986 MB |
777 | } |
778 | ||
3cc72986 MB |
779 | switch (reg) { |
780 | case 0x5102: | |
e102befe | 781 | case 0x5110: |
dc7d4863 | 782 | case 0x8997: |
e102befe | 783 | break; |
3cc72986 | 784 | default: |
ca76ceb8 | 785 | dev_err(arizona->dev, "Unknown device ID: %x\n", reg); |
59db9691 | 786 | goto err_reset; |
3cc72986 MB |
787 | } |
788 | ||
3cc72986 MB |
789 | /* If we have a /RESET GPIO we'll already be reset */ |
790 | if (!arizona->pdata.reset) { | |
791 | ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0); | |
792 | if (ret != 0) { | |
793 | dev_err(dev, "Failed to reset device: %d\n", ret); | |
59db9691 | 794 | goto err_reset; |
3cc72986 | 795 | } |
46b9d13a | 796 | |
c25feaa5 | 797 | msleep(1); |
3cc72986 MB |
798 | } |
799 | ||
ca76ceb8 | 800 | /* Ensure device startup is complete */ |
d955cba8 CK |
801 | switch (arizona->type) { |
802 | case WM5102: | |
48018943 MB |
803 | ret = regmap_read(arizona->regmap, |
804 | ARIZONA_WRITE_SEQUENCER_CTRL_3, &val); | |
d955cba8 CK |
805 | if (ret != 0) |
806 | dev_err(dev, | |
807 | "Failed to check write sequencer state: %d\n", | |
808 | ret); | |
809 | else if (val & 0x01) | |
810 | break; | |
811 | /* Fall through */ | |
812 | default: | |
813 | ret = arizona_wait_for_boot(arizona); | |
814 | if (ret != 0) { | |
815 | dev_err(arizona->dev, | |
816 | "Device failed initial boot: %d\n", ret); | |
817 | goto err_reset; | |
818 | } | |
819 | break; | |
af65a361 | 820 | } |
3cc72986 | 821 | |
ca76ceb8 MB |
822 | /* Read the device ID information & do device specific stuff */ |
823 | ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); | |
824 | if (ret != 0) { | |
825 | dev_err(dev, "Failed to read ID register: %d\n", ret); | |
826 | goto err_reset; | |
827 | } | |
828 | ||
829 | ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION, | |
830 | &arizona->rev); | |
831 | if (ret != 0) { | |
832 | dev_err(dev, "Failed to read revision register: %d\n", ret); | |
833 | goto err_reset; | |
834 | } | |
835 | arizona->rev &= ARIZONA_DEVICE_REVISION_MASK; | |
836 | ||
837 | switch (reg) { | |
838 | #ifdef CONFIG_MFD_WM5102 | |
839 | case 0x5102: | |
840 | type_name = "WM5102"; | |
841 | if (arizona->type != WM5102) { | |
842 | dev_err(arizona->dev, "WM5102 registered as %d\n", | |
843 | arizona->type); | |
844 | arizona->type = WM5102; | |
845 | } | |
846 | apply_patch = wm5102_patch; | |
847 | arizona->rev &= 0x7; | |
848 | break; | |
849 | #endif | |
850 | #ifdef CONFIG_MFD_WM5110 | |
851 | case 0x5110: | |
e5d4ef0d RF |
852 | switch (arizona->type) { |
853 | case WM5110: | |
854 | type_name = "WM5110"; | |
855 | break; | |
856 | case WM8280: | |
857 | type_name = "WM8280"; | |
858 | break; | |
859 | default: | |
860 | type_name = "WM5110"; | |
ca76ceb8 MB |
861 | dev_err(arizona->dev, "WM5110 registered as %d\n", |
862 | arizona->type); | |
863 | arizona->type = WM5110; | |
e5d4ef0d | 864 | break; |
ca76ceb8 MB |
865 | } |
866 | apply_patch = wm5110_patch; | |
867 | break; | |
dc7d4863 CK |
868 | #endif |
869 | #ifdef CONFIG_MFD_WM8997 | |
870 | case 0x8997: | |
871 | type_name = "WM8997"; | |
872 | if (arizona->type != WM8997) { | |
873 | dev_err(arizona->dev, "WM8997 registered as %d\n", | |
874 | arizona->type); | |
875 | arizona->type = WM8997; | |
876 | } | |
877 | apply_patch = wm8997_patch; | |
878 | break; | |
ca76ceb8 MB |
879 | #endif |
880 | default: | |
881 | dev_err(arizona->dev, "Unknown device ID %x\n", reg); | |
882 | goto err_reset; | |
883 | } | |
884 | ||
885 | dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A'); | |
886 | ||
62d62b59 MB |
887 | if (apply_patch) { |
888 | ret = apply_patch(arizona); | |
889 | if (ret != 0) { | |
890 | dev_err(arizona->dev, "Failed to apply patch: %d\n", | |
891 | ret); | |
892 | goto err_reset; | |
893 | } | |
e80436bb CK |
894 | |
895 | switch (arizona->type) { | |
896 | case WM5102: | |
897 | ret = arizona_apply_hardware_patch(arizona); | |
898 | if (ret != 0) { | |
899 | dev_err(arizona->dev, | |
900 | "Failed to apply hardware patch: %d\n", | |
901 | ret); | |
902 | goto err_reset; | |
903 | } | |
904 | break; | |
905 | default: | |
906 | break; | |
907 | } | |
62d62b59 MB |
908 | } |
909 | ||
3cc72986 MB |
910 | for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) { |
911 | if (!arizona->pdata.gpio_defaults[i]) | |
912 | continue; | |
913 | ||
914 | regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i, | |
915 | arizona->pdata.gpio_defaults[i]); | |
916 | } | |
917 | ||
918 | pm_runtime_set_autosuspend_delay(arizona->dev, 100); | |
919 | pm_runtime_use_autosuspend(arizona->dev); | |
920 | pm_runtime_enable(arizona->dev); | |
921 | ||
922 | /* Chip default */ | |
923 | if (!arizona->pdata.clk32k_src) | |
924 | arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2; | |
925 | ||
926 | switch (arizona->pdata.clk32k_src) { | |
927 | case ARIZONA_32KZ_MCLK1: | |
928 | case ARIZONA_32KZ_MCLK2: | |
929 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, | |
930 | ARIZONA_CLK_32K_SRC_MASK, | |
931 | arizona->pdata.clk32k_src - 1); | |
767c6dc0 | 932 | arizona_clk32k_enable(arizona); |
3cc72986 MB |
933 | break; |
934 | case ARIZONA_32KZ_NONE: | |
935 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, | |
936 | ARIZONA_CLK_32K_SRC_MASK, 2); | |
937 | break; | |
938 | default: | |
939 | dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n", | |
940 | arizona->pdata.clk32k_src); | |
941 | ret = -EINVAL; | |
59db9691 | 942 | goto err_reset; |
3cc72986 MB |
943 | } |
944 | ||
3d91f828 | 945 | for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) { |
544c7aad MB |
946 | if (!arizona->pdata.micbias[i].mV && |
947 | !arizona->pdata.micbias[i].bypass) | |
3d91f828 MB |
948 | continue; |
949 | ||
544c7aad MB |
950 | /* Apply default for bypass mode */ |
951 | if (!arizona->pdata.micbias[i].mV) | |
952 | arizona->pdata.micbias[i].mV = 2800; | |
953 | ||
3d91f828 | 954 | val = (arizona->pdata.micbias[i].mV - 1500) / 100; |
544c7aad | 955 | |
3d91f828 MB |
956 | val <<= ARIZONA_MICB1_LVL_SHIFT; |
957 | ||
958 | if (arizona->pdata.micbias[i].ext_cap) | |
959 | val |= ARIZONA_MICB1_EXT_CAP; | |
960 | ||
961 | if (arizona->pdata.micbias[i].discharge) | |
962 | val |= ARIZONA_MICB1_DISCH; | |
963 | ||
f773fc6d | 964 | if (arizona->pdata.micbias[i].soft_start) |
3d91f828 MB |
965 | val |= ARIZONA_MICB1_RATE; |
966 | ||
544c7aad MB |
967 | if (arizona->pdata.micbias[i].bypass) |
968 | val |= ARIZONA_MICB1_BYPASS; | |
969 | ||
3d91f828 MB |
970 | regmap_update_bits(arizona->regmap, |
971 | ARIZONA_MIC_BIAS_CTRL_1 + i, | |
972 | ARIZONA_MICB1_LVL_MASK | | |
71d134b9 | 973 | ARIZONA_MICB1_EXT_CAP | |
3d91f828 | 974 | ARIZONA_MICB1_DISCH | |
544c7aad | 975 | ARIZONA_MICB1_BYPASS | |
3d91f828 MB |
976 | ARIZONA_MICB1_RATE, val); |
977 | } | |
978 | ||
3cc72986 MB |
979 | for (i = 0; i < ARIZONA_MAX_INPUT; i++) { |
980 | /* Default for both is 0 so noop with defaults */ | |
981 | val = arizona->pdata.dmic_ref[i] | |
982 | << ARIZONA_IN1_DMIC_SUP_SHIFT; | |
983 | val |= arizona->pdata.inmode[i] << ARIZONA_IN1_MODE_SHIFT; | |
984 | ||
985 | regmap_update_bits(arizona->regmap, | |
986 | ARIZONA_IN1L_CONTROL + (i * 8), | |
987 | ARIZONA_IN1_DMIC_SUP_MASK | | |
988 | ARIZONA_IN1_MODE_MASK, val); | |
989 | } | |
990 | ||
991 | for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) { | |
992 | /* Default is 0 so noop with defaults */ | |
993 | if (arizona->pdata.out_mono[i]) | |
994 | val = ARIZONA_OUT1_MONO; | |
995 | else | |
996 | val = 0; | |
997 | ||
998 | regmap_update_bits(arizona->regmap, | |
999 | ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8), | |
1000 | ARIZONA_OUT1_MONO, val); | |
1001 | } | |
1002 | ||
3cc72986 MB |
1003 | for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) { |
1004 | if (arizona->pdata.spk_mute[i]) | |
1005 | regmap_update_bits(arizona->regmap, | |
2a51da04 | 1006 | ARIZONA_PDM_SPK1_CTRL_1 + (i * 2), |
3cc72986 MB |
1007 | ARIZONA_SPK1_MUTE_ENDIAN_MASK | |
1008 | ARIZONA_SPK1_MUTE_SEQ1_MASK, | |
1009 | arizona->pdata.spk_mute[i]); | |
1010 | ||
1011 | if (arizona->pdata.spk_fmt[i]) | |
1012 | regmap_update_bits(arizona->regmap, | |
2a51da04 | 1013 | ARIZONA_PDM_SPK1_CTRL_2 + (i * 2), |
3cc72986 MB |
1014 | ARIZONA_SPK1_FMT_MASK, |
1015 | arizona->pdata.spk_fmt[i]); | |
1016 | } | |
1017 | ||
1018 | /* Set up for interrupts */ | |
1019 | ret = arizona_irq_init(arizona); | |
1020 | if (ret != 0) | |
59db9691 | 1021 | goto err_reset; |
3cc72986 MB |
1022 | |
1023 | arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error", | |
1024 | arizona_clkgen_err, arizona); | |
1025 | arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked", | |
1026 | arizona_overclocked, arizona); | |
1027 | arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked", | |
1028 | arizona_underclocked, arizona); | |
1029 | ||
1030 | switch (arizona->type) { | |
1031 | case WM5102: | |
1032 | ret = mfd_add_devices(arizona->dev, -1, wm5102_devs, | |
0848c94f | 1033 | ARRAY_SIZE(wm5102_devs), NULL, 0, NULL); |
e102befe MB |
1034 | break; |
1035 | case WM5110: | |
e5d4ef0d | 1036 | case WM8280: |
e102befe | 1037 | ret = mfd_add_devices(arizona->dev, -1, wm5110_devs, |
78566afd | 1038 | ARRAY_SIZE(wm5110_devs), NULL, 0, NULL); |
3cc72986 | 1039 | break; |
dc7d4863 CK |
1040 | case WM8997: |
1041 | ret = mfd_add_devices(arizona->dev, -1, wm8997_devs, | |
1042 | ARRAY_SIZE(wm8997_devs), NULL, 0, NULL); | |
1043 | break; | |
3cc72986 MB |
1044 | } |
1045 | ||
1046 | if (ret != 0) { | |
1047 | dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret); | |
1048 | goto err_irq; | |
1049 | } | |
1050 | ||
48bb9fe4 | 1051 | #ifdef CONFIG_PM |
59db9691 MB |
1052 | regulator_disable(arizona->dcvdd); |
1053 | #endif | |
1054 | ||
3cc72986 MB |
1055 | return 0; |
1056 | ||
1057 | err_irq: | |
1058 | arizona_irq_exit(arizona); | |
3cc72986 | 1059 | err_reset: |
2229875d | 1060 | arizona_enable_reset(arizona); |
59db9691 | 1061 | regulator_disable(arizona->dcvdd); |
3cc72986 | 1062 | err_enable: |
3a36a0db | 1063 | regulator_bulk_disable(arizona->num_core_supplies, |
3cc72986 | 1064 | arizona->core_supplies); |
e6021511 CK |
1065 | err_dcvdd: |
1066 | regulator_put(arizona->dcvdd); | |
3cc72986 MB |
1067 | err_early: |
1068 | mfd_remove_devices(dev); | |
1069 | return ret; | |
1070 | } | |
1071 | EXPORT_SYMBOL_GPL(arizona_dev_init); | |
1072 | ||
4740f73f | 1073 | int arizona_dev_exit(struct arizona *arizona) |
3cc72986 | 1074 | { |
b804020a CK |
1075 | pm_runtime_disable(arizona->dev); |
1076 | ||
df6b3352 | 1077 | regulator_disable(arizona->dcvdd); |
e6021511 | 1078 | regulator_put(arizona->dcvdd); |
df6b3352 | 1079 | |
3cc72986 MB |
1080 | mfd_remove_devices(arizona->dev); |
1081 | arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona); | |
1082 | arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona); | |
1083 | arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona); | |
3cc72986 | 1084 | arizona_irq_exit(arizona); |
2229875d | 1085 | arizona_enable_reset(arizona); |
df6b3352 | 1086 | |
4420286e | 1087 | regulator_bulk_disable(arizona->num_core_supplies, |
1d017b6b | 1088 | arizona->core_supplies); |
3cc72986 MB |
1089 | return 0; |
1090 | } | |
1091 | EXPORT_SYMBOL_GPL(arizona_dev_exit); |