Commit | Line | Data |
---|---|---|
3cc72986 MB |
1 | /* |
2 | * Arizona core driver | |
3 | * | |
4 | * Copyright 2012 Wolfson Microelectronics plc | |
5 | * | |
6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
cdd8da8c | 13 | #include <linux/clk.h> |
3cc72986 | 14 | #include <linux/delay.h> |
59db9691 | 15 | #include <linux/err.h> |
3cc72986 MB |
16 | #include <linux/gpio.h> |
17 | #include <linux/interrupt.h> | |
18 | #include <linux/mfd/core.h> | |
19 | #include <linux/module.h> | |
d781009c MB |
20 | #include <linux/of.h> |
21 | #include <linux/of_device.h> | |
22 | #include <linux/of_gpio.h> | |
3cc72986 MB |
23 | #include <linux/pm_runtime.h> |
24 | #include <linux/regmap.h> | |
25 | #include <linux/regulator/consumer.h> | |
5927467d | 26 | #include <linux/regulator/machine.h> |
3cc72986 | 27 | #include <linux/slab.h> |
ae05ea36 | 28 | #include <linux/platform_device.h> |
3cc72986 MB |
29 | |
30 | #include <linux/mfd/arizona/core.h> | |
31 | #include <linux/mfd/arizona/registers.h> | |
32 | ||
33 | #include "arizona.h" | |
34 | ||
3762aede | 35 | static const char * const wm5102_core_supplies[] = { |
3cc72986 MB |
36 | "AVDD", |
37 | "DBVDD1", | |
3cc72986 MB |
38 | }; |
39 | ||
40 | int arizona_clk32k_enable(struct arizona *arizona) | |
41 | { | |
42 | int ret = 0; | |
43 | ||
44 | mutex_lock(&arizona->clk_lock); | |
45 | ||
46 | arizona->clk32k_ref++; | |
47 | ||
247fa192 MB |
48 | if (arizona->clk32k_ref == 1) { |
49 | switch (arizona->pdata.clk32k_src) { | |
50 | case ARIZONA_32KZ_MCLK1: | |
51 | ret = pm_runtime_get_sync(arizona->dev); | |
52 | if (ret != 0) | |
cdd8da8c SN |
53 | goto err_ref; |
54 | ret = clk_prepare_enable(arizona->mclk[ARIZONA_MCLK1]); | |
55 | if (ret != 0) | |
56 | goto err_pm; | |
57 | break; | |
58 | case ARIZONA_32KZ_MCLK2: | |
59 | ret = clk_prepare_enable(arizona->mclk[ARIZONA_MCLK2]); | |
60 | if (ret != 0) | |
61 | goto err_ref; | |
247fa192 MB |
62 | break; |
63 | } | |
64 | ||
3cc72986 MB |
65 | ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, |
66 | ARIZONA_CLK_32K_ENA, | |
67 | ARIZONA_CLK_32K_ENA); | |
247fa192 | 68 | } |
3cc72986 | 69 | |
cdd8da8c SN |
70 | err_pm: |
71 | pm_runtime_put_sync(arizona->dev); | |
72 | err_ref: | |
3cc72986 MB |
73 | if (ret != 0) |
74 | arizona->clk32k_ref--; | |
75 | ||
76 | mutex_unlock(&arizona->clk_lock); | |
77 | ||
78 | return ret; | |
79 | } | |
80 | EXPORT_SYMBOL_GPL(arizona_clk32k_enable); | |
81 | ||
82 | int arizona_clk32k_disable(struct arizona *arizona) | |
83 | { | |
3cc72986 MB |
84 | mutex_lock(&arizona->clk_lock); |
85 | ||
86 | BUG_ON(arizona->clk32k_ref <= 0); | |
87 | ||
88 | arizona->clk32k_ref--; | |
89 | ||
247fa192 | 90 | if (arizona->clk32k_ref == 0) { |
3cc72986 MB |
91 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, |
92 | ARIZONA_CLK_32K_ENA, 0); | |
93 | ||
247fa192 MB |
94 | switch (arizona->pdata.clk32k_src) { |
95 | case ARIZONA_32KZ_MCLK1: | |
96 | pm_runtime_put_sync(arizona->dev); | |
cdd8da8c SN |
97 | clk_disable_unprepare(arizona->mclk[ARIZONA_MCLK1]); |
98 | break; | |
99 | case ARIZONA_32KZ_MCLK2: | |
100 | clk_disable_unprepare(arizona->mclk[ARIZONA_MCLK2]); | |
247fa192 MB |
101 | break; |
102 | } | |
103 | } | |
104 | ||
3cc72986 MB |
105 | mutex_unlock(&arizona->clk_lock); |
106 | ||
a260fba1 | 107 | return 0; |
3cc72986 MB |
108 | } |
109 | EXPORT_SYMBOL_GPL(arizona_clk32k_disable); | |
110 | ||
111 | static irqreturn_t arizona_clkgen_err(int irq, void *data) | |
112 | { | |
113 | struct arizona *arizona = data; | |
114 | ||
115 | dev_err(arizona->dev, "CLKGEN error\n"); | |
116 | ||
117 | return IRQ_HANDLED; | |
118 | } | |
119 | ||
120 | static irqreturn_t arizona_underclocked(int irq, void *data) | |
121 | { | |
122 | struct arizona *arizona = data; | |
123 | unsigned int val; | |
124 | int ret; | |
125 | ||
126 | ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8, | |
127 | &val); | |
128 | if (ret != 0) { | |
129 | dev_err(arizona->dev, "Failed to read underclock status: %d\n", | |
130 | ret); | |
131 | return IRQ_NONE; | |
132 | } | |
133 | ||
3cc72986 MB |
134 | if (val & ARIZONA_AIF3_UNDERCLOCKED_STS) |
135 | dev_err(arizona->dev, "AIF3 underclocked\n"); | |
136 | if (val & ARIZONA_AIF2_UNDERCLOCKED_STS) | |
3ebef34d CK |
137 | dev_err(arizona->dev, "AIF2 underclocked\n"); |
138 | if (val & ARIZONA_AIF1_UNDERCLOCKED_STS) | |
3cc72986 | 139 | dev_err(arizona->dev, "AIF1 underclocked\n"); |
6e440d27 CK |
140 | if (val & ARIZONA_ISRC3_UNDERCLOCKED_STS) |
141 | dev_err(arizona->dev, "ISRC3 underclocked\n"); | |
3cc72986 MB |
142 | if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS) |
143 | dev_err(arizona->dev, "ISRC2 underclocked\n"); | |
144 | if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS) | |
145 | dev_err(arizona->dev, "ISRC1 underclocked\n"); | |
146 | if (val & ARIZONA_FX_UNDERCLOCKED_STS) | |
147 | dev_err(arizona->dev, "FX underclocked\n"); | |
148 | if (val & ARIZONA_ASRC_UNDERCLOCKED_STS) | |
149 | dev_err(arizona->dev, "ASRC underclocked\n"); | |
150 | if (val & ARIZONA_DAC_UNDERCLOCKED_STS) | |
151 | dev_err(arizona->dev, "DAC underclocked\n"); | |
152 | if (val & ARIZONA_ADC_UNDERCLOCKED_STS) | |
153 | dev_err(arizona->dev, "ADC underclocked\n"); | |
154 | if (val & ARIZONA_MIXER_UNDERCLOCKED_STS) | |
648a9880 | 155 | dev_err(arizona->dev, "Mixer dropped sample\n"); |
3cc72986 MB |
156 | |
157 | return IRQ_HANDLED; | |
158 | } | |
159 | ||
160 | static irqreturn_t arizona_overclocked(int irq, void *data) | |
161 | { | |
162 | struct arizona *arizona = data; | |
6887b042 | 163 | unsigned int val[3]; |
3cc72986 | 164 | int ret; |
3762aede | 165 | |
3cc72986 | 166 | ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6, |
6887b042 | 167 | &val[0], 3); |
3cc72986 MB |
168 | if (ret != 0) { |
169 | dev_err(arizona->dev, "Failed to read overclock status: %d\n", | |
170 | ret); | |
171 | return IRQ_NONE; | |
172 | } | |
173 | ||
6887b042 RF |
174 | switch (arizona->type) { |
175 | case WM8998: | |
176 | case WM1814: | |
177 | /* Some bits are shifted on WM8998, | |
178 | * rearrange to match the standard bit layout | |
179 | */ | |
180 | val[0] = ((val[0] & 0x60e0) >> 1) | | |
181 | ((val[0] & 0x1e00) >> 2) | | |
182 | (val[0] & 0x000f); | |
183 | break; | |
184 | default: | |
185 | break; | |
186 | } | |
187 | ||
3cc72986 MB |
188 | if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS) |
189 | dev_err(arizona->dev, "PWM overclocked\n"); | |
190 | if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS) | |
191 | dev_err(arizona->dev, "FX core overclocked\n"); | |
192 | if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS) | |
193 | dev_err(arizona->dev, "DAC SYS overclocked\n"); | |
194 | if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS) | |
195 | dev_err(arizona->dev, "DAC WARP overclocked\n"); | |
196 | if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS) | |
197 | dev_err(arizona->dev, "ADC overclocked\n"); | |
198 | if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS) | |
199 | dev_err(arizona->dev, "Mixer overclocked\n"); | |
200 | if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS) | |
201 | dev_err(arizona->dev, "AIF3 overclocked\n"); | |
202 | if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS) | |
203 | dev_err(arizona->dev, "AIF2 overclocked\n"); | |
204 | if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS) | |
205 | dev_err(arizona->dev, "AIF1 overclocked\n"); | |
206 | if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS) | |
207 | dev_err(arizona->dev, "Pad control overclocked\n"); | |
208 | ||
209 | if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS) | |
210 | dev_err(arizona->dev, "Slimbus subsystem overclocked\n"); | |
211 | if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS) | |
212 | dev_err(arizona->dev, "Slimbus async overclocked\n"); | |
213 | if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS) | |
214 | dev_err(arizona->dev, "Slimbus sync overclocked\n"); | |
215 | if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS) | |
216 | dev_err(arizona->dev, "ASRC async system overclocked\n"); | |
217 | if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS) | |
218 | dev_err(arizona->dev, "ASRC async WARP overclocked\n"); | |
219 | if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS) | |
220 | dev_err(arizona->dev, "ASRC sync system overclocked\n"); | |
221 | if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS) | |
222 | dev_err(arizona->dev, "ASRC sync WARP overclocked\n"); | |
223 | if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS) | |
224 | dev_err(arizona->dev, "DSP1 overclocked\n"); | |
6e440d27 CK |
225 | if (val[1] & ARIZONA_ISRC3_OVERCLOCKED_STS) |
226 | dev_err(arizona->dev, "ISRC3 overclocked\n"); | |
3cc72986 MB |
227 | if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS) |
228 | dev_err(arizona->dev, "ISRC2 overclocked\n"); | |
229 | if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS) | |
230 | dev_err(arizona->dev, "ISRC1 overclocked\n"); | |
231 | ||
6887b042 RF |
232 | if (val[2] & ARIZONA_SPDIF_OVERCLOCKED_STS) |
233 | dev_err(arizona->dev, "SPDIF overclocked\n"); | |
234 | ||
3cc72986 MB |
235 | return IRQ_HANDLED; |
236 | } | |
237 | ||
9d53dfdc CK |
238 | static int arizona_poll_reg(struct arizona *arizona, |
239 | int timeout, unsigned int reg, | |
240 | unsigned int mask, unsigned int target) | |
3cc72986 | 241 | { |
9d53dfdc | 242 | unsigned int val = 0; |
3cc72986 MB |
243 | int ret, i; |
244 | ||
9d53dfdc CK |
245 | for (i = 0; i < timeout; i++) { |
246 | ret = regmap_read(arizona->regmap, reg, &val); | |
3cc72986 | 247 | if (ret != 0) { |
9d53dfdc CK |
248 | dev_err(arizona->dev, "Failed to read reg %u: %d\n", |
249 | reg, ret); | |
cfe775ce | 250 | continue; |
3cc72986 MB |
251 | } |
252 | ||
9d53dfdc CK |
253 | if ((val & mask) == target) |
254 | return 0; | |
255 | ||
b79a980f | 256 | usleep_range(1000, 5000); |
3cc72986 MB |
257 | } |
258 | ||
9d53dfdc CK |
259 | dev_err(arizona->dev, "Polling reg %u timed out: %x\n", reg, val); |
260 | return -ETIMEDOUT; | |
261 | } | |
262 | ||
263 | static int arizona_wait_for_boot(struct arizona *arizona) | |
264 | { | |
265 | int ret; | |
266 | ||
267 | /* | |
268 | * We can't use an interrupt as we need to runtime resume to do so, | |
269 | * we won't race with the interrupt handler as it'll be blocked on | |
270 | * runtime resume. | |
271 | */ | |
272 | ret = arizona_poll_reg(arizona, 5, ARIZONA_INTERRUPT_RAW_STATUS_5, | |
273 | ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS); | |
274 | ||
275 | if (!ret) | |
3cc72986 MB |
276 | regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5, |
277 | ARIZONA_BOOT_DONE_STS); | |
3cc72986 MB |
278 | |
279 | pm_runtime_mark_last_busy(arizona->dev); | |
280 | ||
9d53dfdc | 281 | return ret; |
3cc72986 MB |
282 | } |
283 | ||
2229875d CK |
284 | static inline void arizona_enable_reset(struct arizona *arizona) |
285 | { | |
286 | if (arizona->pdata.reset) | |
287 | gpio_set_value_cansleep(arizona->pdata.reset, 0); | |
288 | } | |
289 | ||
290 | static void arizona_disable_reset(struct arizona *arizona) | |
291 | { | |
292 | if (arizona->pdata.reset) { | |
121c075c CK |
293 | switch (arizona->type) { |
294 | case WM5110: | |
295 | case WM8280: | |
296 | /* Meet requirements for minimum reset duration */ | |
b79a980f | 297 | usleep_range(5000, 10000); |
121c075c CK |
298 | break; |
299 | default: | |
300 | break; | |
301 | } | |
302 | ||
2229875d | 303 | gpio_set_value_cansleep(arizona->pdata.reset, 1); |
b79a980f | 304 | usleep_range(1000, 5000); |
2229875d CK |
305 | } |
306 | } | |
307 | ||
3850e3ee CK |
308 | struct arizona_sysclk_state { |
309 | unsigned int fll; | |
310 | unsigned int sysclk; | |
311 | }; | |
312 | ||
313 | static int arizona_enable_freerun_sysclk(struct arizona *arizona, | |
314 | struct arizona_sysclk_state *state) | |
e80436bb | 315 | { |
e80436bb CK |
316 | int ret, err; |
317 | ||
e80436bb | 318 | /* Cache existing FLL and SYSCLK settings */ |
3850e3ee | 319 | ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &state->fll); |
0be068a0 | 320 | if (ret) { |
e80436bb CK |
321 | dev_err(arizona->dev, "Failed to cache FLL settings: %d\n", |
322 | ret); | |
323 | return ret; | |
324 | } | |
3850e3ee CK |
325 | ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, |
326 | &state->sysclk); | |
0be068a0 | 327 | if (ret) { |
e80436bb CK |
328 | dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n", |
329 | ret); | |
330 | return ret; | |
331 | } | |
332 | ||
333 | /* Start up SYSCLK using the FLL in free running mode */ | |
334 | ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, | |
335 | ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN); | |
0be068a0 | 336 | if (ret) { |
e80436bb CK |
337 | dev_err(arizona->dev, |
338 | "Failed to start FLL in freerunning mode: %d\n", | |
339 | ret); | |
340 | return ret; | |
341 | } | |
342 | ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5, | |
343 | ARIZONA_FLL1_CLOCK_OK_STS, | |
344 | ARIZONA_FLL1_CLOCK_OK_STS); | |
0be068a0 | 345 | if (ret) { |
e80436bb CK |
346 | ret = -ETIMEDOUT; |
347 | goto err_fll; | |
348 | } | |
349 | ||
350 | ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144); | |
0be068a0 | 351 | if (ret) { |
e80436bb CK |
352 | dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret); |
353 | goto err_fll; | |
354 | } | |
355 | ||
3850e3ee CK |
356 | return 0; |
357 | ||
358 | err_fll: | |
359 | err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll); | |
360 | if (err) | |
361 | dev_err(arizona->dev, | |
362 | "Failed to re-apply old FLL settings: %d\n", err); | |
363 | ||
364 | return ret; | |
365 | } | |
366 | ||
367 | static int arizona_disable_freerun_sysclk(struct arizona *arizona, | |
368 | struct arizona_sysclk_state *state) | |
369 | { | |
370 | int ret; | |
371 | ||
372 | ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, | |
373 | state->sysclk); | |
374 | if (ret) { | |
375 | dev_err(arizona->dev, | |
376 | "Failed to re-apply old SYSCLK settings: %d\n", ret); | |
377 | return ret; | |
378 | } | |
379 | ||
380 | ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll); | |
381 | if (ret) { | |
382 | dev_err(arizona->dev, | |
383 | "Failed to re-apply old FLL settings: %d\n", ret); | |
384 | return ret; | |
385 | } | |
386 | ||
387 | return 0; | |
388 | } | |
389 | ||
390 | static int wm5102_apply_hardware_patch(struct arizona *arizona) | |
391 | { | |
392 | struct arizona_sysclk_state state; | |
393 | int err, ret; | |
394 | ||
395 | ret = arizona_enable_freerun_sysclk(arizona, &state); | |
396 | if (ret) | |
397 | return ret; | |
398 | ||
e80436bb CK |
399 | /* Start the write sequencer and wait for it to finish */ |
400 | ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, | |
0be068a0 CK |
401 | ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160); |
402 | if (ret) { | |
e80436bb CK |
403 | dev_err(arizona->dev, "Failed to start write sequencer: %d\n", |
404 | ret); | |
3850e3ee | 405 | goto err; |
e80436bb | 406 | } |
3850e3ee | 407 | |
e80436bb CK |
408 | ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1, |
409 | ARIZONA_WSEQ_BUSY, 0); | |
0be068a0 | 410 | if (ret) { |
e80436bb | 411 | regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, |
0be068a0 | 412 | ARIZONA_WSEQ_ABORT); |
e80436bb CK |
413 | ret = -ETIMEDOUT; |
414 | } | |
415 | ||
3850e3ee CK |
416 | err: |
417 | err = arizona_disable_freerun_sysclk(arizona, &state); | |
e80436bb | 418 | |
0be068a0 | 419 | return ret ?: err; |
e80436bb CK |
420 | } |
421 | ||
882bc468 CK |
422 | /* |
423 | * Register patch to some of the CODECs internal write sequences | |
424 | * to ensure a clean exit from the low power sleep state. | |
425 | */ | |
8019ff6c | 426 | static const struct reg_sequence wm5110_sleep_patch[] = { |
882bc468 CK |
427 | { 0x337A, 0xC100 }, |
428 | { 0x337B, 0x0041 }, | |
429 | { 0x3300, 0xA210 }, | |
430 | { 0x3301, 0x050C }, | |
431 | }; | |
432 | ||
433 | static int wm5110_apply_sleep_patch(struct arizona *arizona) | |
434 | { | |
435 | struct arizona_sysclk_state state; | |
436 | int err, ret; | |
437 | ||
438 | ret = arizona_enable_freerun_sysclk(arizona, &state); | |
439 | if (ret) | |
440 | return ret; | |
441 | ||
442 | ret = regmap_multi_reg_write_bypassed(arizona->regmap, | |
443 | wm5110_sleep_patch, | |
444 | ARRAY_SIZE(wm5110_sleep_patch)); | |
445 | ||
446 | err = arizona_disable_freerun_sysclk(arizona, &state); | |
447 | ||
448 | return ret ?: err; | |
449 | } | |
450 | ||
1c1c6bba CK |
451 | static int wm5102_clear_write_sequencer(struct arizona *arizona) |
452 | { | |
453 | int ret; | |
454 | ||
455 | ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_3, | |
456 | 0x0); | |
457 | if (ret) { | |
458 | dev_err(arizona->dev, | |
459 | "Failed to clear write sequencer state: %d\n", ret); | |
460 | return ret; | |
461 | } | |
462 | ||
463 | arizona_enable_reset(arizona); | |
464 | regulator_disable(arizona->dcvdd); | |
465 | ||
466 | msleep(20); | |
467 | ||
468 | ret = regulator_enable(arizona->dcvdd); | |
469 | if (ret) { | |
470 | dev_err(arizona->dev, "Failed to re-enable DCVDD: %d\n", ret); | |
471 | return ret; | |
472 | } | |
473 | arizona_disable_reset(arizona); | |
474 | ||
475 | return 0; | |
476 | } | |
477 | ||
48bb9fe4 | 478 | #ifdef CONFIG_PM |
e7811147 RF |
479 | static int arizona_isolate_dcvdd(struct arizona *arizona) |
480 | { | |
481 | int ret; | |
482 | ||
483 | ret = regmap_update_bits(arizona->regmap, | |
484 | ARIZONA_ISOLATION_CONTROL, | |
485 | ARIZONA_ISOLATE_DCVDD1, | |
486 | ARIZONA_ISOLATE_DCVDD1); | |
487 | if (ret != 0) | |
488 | dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n", ret); | |
489 | ||
490 | return ret; | |
491 | } | |
492 | ||
493 | static int arizona_connect_dcvdd(struct arizona *arizona) | |
494 | { | |
495 | int ret; | |
496 | ||
497 | ret = regmap_update_bits(arizona->regmap, | |
498 | ARIZONA_ISOLATION_CONTROL, | |
499 | ARIZONA_ISOLATE_DCVDD1, 0); | |
500 | if (ret != 0) | |
501 | dev_err(arizona->dev, "Failed to connect DCVDD: %d\n", ret); | |
502 | ||
503 | return ret; | |
504 | } | |
505 | ||
e3424273 RF |
506 | static int arizona_is_jack_det_active(struct arizona *arizona) |
507 | { | |
508 | unsigned int val; | |
509 | int ret; | |
510 | ||
511 | ret = regmap_read(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, &val); | |
512 | if (ret) { | |
513 | dev_err(arizona->dev, | |
514 | "Failed to check jack det status: %d\n", ret); | |
515 | return ret; | |
516 | } else if (val & ARIZONA_JD1_ENA) { | |
517 | return 1; | |
518 | } else { | |
519 | return 0; | |
520 | } | |
521 | } | |
522 | ||
3cc72986 MB |
523 | static int arizona_runtime_resume(struct device *dev) |
524 | { | |
525 | struct arizona *arizona = dev_get_drvdata(dev); | |
526 | int ret; | |
527 | ||
508c8299 MB |
528 | dev_dbg(arizona->dev, "Leaving AoD mode\n"); |
529 | ||
e6cb7341 CK |
530 | if (arizona->has_fully_powered_off) { |
531 | dev_dbg(arizona->dev, "Re-enabling core supplies\n"); | |
532 | ||
533 | ret = regulator_bulk_enable(arizona->num_core_supplies, | |
534 | arizona->core_supplies); | |
535 | if (ret) { | |
536 | dev_err(dev, "Failed to enable core supplies: %d\n", | |
537 | ret); | |
538 | return ret; | |
539 | } | |
540 | } | |
541 | ||
59db9691 MB |
542 | ret = regulator_enable(arizona->dcvdd); |
543 | if (ret != 0) { | |
544 | dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret); | |
e6cb7341 CK |
545 | if (arizona->has_fully_powered_off) |
546 | regulator_bulk_disable(arizona->num_core_supplies, | |
547 | arizona->core_supplies); | |
59db9691 MB |
548 | return ret; |
549 | } | |
3cc72986 | 550 | |
e6cb7341 CK |
551 | if (arizona->has_fully_powered_off) { |
552 | arizona_disable_reset(arizona); | |
553 | enable_irq(arizona->irq); | |
554 | arizona->has_fully_powered_off = false; | |
555 | } | |
556 | ||
3cc72986 MB |
557 | regcache_cache_only(arizona->regmap, false); |
558 | ||
4c9bb8bc CK |
559 | switch (arizona->type) { |
560 | case WM5102: | |
5927467d | 561 | if (arizona->external_dcvdd) { |
e7811147 RF |
562 | ret = arizona_connect_dcvdd(arizona); |
563 | if (ret != 0) | |
5927467d | 564 | goto err; |
5927467d MB |
565 | } |
566 | ||
4c9bb8bc CK |
567 | ret = wm5102_patch(arizona); |
568 | if (ret != 0) { | |
569 | dev_err(arizona->dev, "Failed to apply patch: %d\n", | |
570 | ret); | |
571 | goto err; | |
572 | } | |
e80436bb | 573 | |
0be068a0 CK |
574 | ret = wm5102_apply_hardware_patch(arizona); |
575 | if (ret) { | |
e80436bb CK |
576 | dev_err(arizona->dev, |
577 | "Failed to apply hardware patch: %d\n", | |
578 | ret); | |
579 | goto err; | |
580 | } | |
581 | break; | |
96129a0e CK |
582 | case WM5110: |
583 | case WM8280: | |
584 | ret = arizona_wait_for_boot(arizona); | |
585 | if (ret) | |
586 | goto err; | |
587 | ||
588 | if (arizona->external_dcvdd) { | |
e7811147 RF |
589 | ret = arizona_connect_dcvdd(arizona); |
590 | if (ret != 0) | |
96129a0e | 591 | goto err; |
96129a0e CK |
592 | } else { |
593 | /* | |
594 | * As this is only called for the internal regulator | |
595 | * (where we know voltage ranges available) it is ok | |
596 | * to request an exact range. | |
597 | */ | |
598 | ret = regulator_set_voltage(arizona->dcvdd, | |
599 | 1200000, 1200000); | |
600 | if (ret < 0) { | |
601 | dev_err(arizona->dev, | |
602 | "Failed to set resume voltage: %d\n", | |
603 | ret); | |
604 | goto err; | |
605 | } | |
606 | } | |
e6cb7341 CK |
607 | |
608 | ret = wm5110_apply_sleep_patch(arizona); | |
609 | if (ret) { | |
610 | dev_err(arizona->dev, | |
611 | "Failed to re-apply sleep patch: %d\n", | |
612 | ret); | |
613 | goto err; | |
614 | } | |
96129a0e | 615 | break; |
ea1f3339 RF |
616 | case WM1831: |
617 | case CS47L24: | |
618 | ret = arizona_wait_for_boot(arizona); | |
619 | if (ret != 0) | |
620 | goto err; | |
621 | break; | |
e80436bb | 622 | default: |
12bb68ed | 623 | ret = arizona_wait_for_boot(arizona); |
3762aede | 624 | if (ret != 0) |
12bb68ed | 625 | goto err; |
12bb68ed | 626 | |
5927467d | 627 | if (arizona->external_dcvdd) { |
e7811147 RF |
628 | ret = arizona_connect_dcvdd(arizona); |
629 | if (ret != 0) | |
5927467d | 630 | goto err; |
5927467d | 631 | } |
e80436bb | 632 | break; |
4c9bb8bc CK |
633 | } |
634 | ||
9270bdf5 MB |
635 | ret = regcache_sync(arizona->regmap); |
636 | if (ret != 0) { | |
637 | dev_err(arizona->dev, "Failed to restore register cache\n"); | |
4816bd1c | 638 | goto err; |
9270bdf5 | 639 | } |
3cc72986 MB |
640 | |
641 | return 0; | |
4816bd1c MB |
642 | |
643 | err: | |
644 | regcache_cache_only(arizona->regmap, true); | |
645 | regulator_disable(arizona->dcvdd); | |
646 | return ret; | |
3cc72986 MB |
647 | } |
648 | ||
649 | static int arizona_runtime_suspend(struct device *dev) | |
650 | { | |
651 | struct arizona *arizona = dev_get_drvdata(dev); | |
a05950a4 | 652 | int jd_active = 0; |
5927467d | 653 | int ret; |
3cc72986 | 654 | |
508c8299 MB |
655 | dev_dbg(arizona->dev, "Entering AoD mode\n"); |
656 | ||
e6cb7341 CK |
657 | switch (arizona->type) { |
658 | case WM5110: | |
659 | case WM8280: | |
e3424273 RF |
660 | jd_active = arizona_is_jack_det_active(arizona); |
661 | if (jd_active < 0) | |
662 | return jd_active; | |
663 | ||
e7811147 RF |
664 | if (arizona->external_dcvdd) { |
665 | ret = arizona_isolate_dcvdd(arizona); | |
666 | if (ret != 0) | |
667 | return ret; | |
668 | } else { | |
669 | /* | |
670 | * As this is only called for the internal regulator | |
671 | * (where we know voltage ranges available) it is ok | |
672 | * to request an exact range. | |
673 | */ | |
674 | ret = regulator_set_voltage(arizona->dcvdd, | |
675 | 1175000, 1175000); | |
676 | if (ret < 0) { | |
677 | dev_err(arizona->dev, | |
678 | "Failed to set suspend voltage: %d\n", | |
679 | ret); | |
680 | return ret; | |
681 | } | |
e6cb7341 CK |
682 | } |
683 | break; | |
684 | case WM5102: | |
e3424273 RF |
685 | jd_active = arizona_is_jack_det_active(arizona); |
686 | if (jd_active < 0) | |
687 | return jd_active; | |
688 | ||
e7811147 RF |
689 | if (arizona->external_dcvdd) { |
690 | ret = arizona_isolate_dcvdd(arizona); | |
691 | if (ret != 0) | |
692 | return ret; | |
693 | } | |
694 | ||
e3424273 | 695 | if (!jd_active) { |
e6cb7341 CK |
696 | ret = regmap_write(arizona->regmap, |
697 | ARIZONA_WRITE_SEQUENCER_CTRL_3, 0x0); | |
698 | if (ret) { | |
96129a0e | 699 | dev_err(arizona->dev, |
e6cb7341 | 700 | "Failed to clear write sequencer: %d\n", |
96129a0e CK |
701 | ret); |
702 | return ret; | |
703 | } | |
96129a0e | 704 | } |
e6cb7341 | 705 | break; |
ea1f3339 RF |
706 | case WM1831: |
707 | case CS47L24: | |
708 | break; | |
e6cb7341 | 709 | default: |
e3424273 RF |
710 | jd_active = arizona_is_jack_det_active(arizona); |
711 | if (jd_active < 0) | |
712 | return jd_active; | |
713 | ||
e7811147 RF |
714 | if (arizona->external_dcvdd) { |
715 | ret = arizona_isolate_dcvdd(arizona); | |
716 | if (ret != 0) | |
717 | return ret; | |
718 | } | |
e6cb7341 | 719 | break; |
5927467d MB |
720 | } |
721 | ||
59db9691 MB |
722 | regcache_cache_only(arizona->regmap, true); |
723 | regcache_mark_dirty(arizona->regmap); | |
e293e847 | 724 | regulator_disable(arizona->dcvdd); |
3cc72986 | 725 | |
e6cb7341 | 726 | /* Allow us to completely power down if no jack detection */ |
e3424273 | 727 | if (!jd_active) { |
e6cb7341 CK |
728 | dev_dbg(arizona->dev, "Fully powering off\n"); |
729 | ||
730 | arizona->has_fully_powered_off = true; | |
731 | ||
11150929 | 732 | disable_irq_nosync(arizona->irq); |
e6cb7341 CK |
733 | arizona_enable_reset(arizona); |
734 | regulator_bulk_disable(arizona->num_core_supplies, | |
735 | arizona->core_supplies); | |
736 | } | |
737 | ||
3cc72986 MB |
738 | return 0; |
739 | } | |
740 | #endif | |
741 | ||
dc781d0e | 742 | #ifdef CONFIG_PM_SLEEP |
67c99296 MB |
743 | static int arizona_suspend(struct device *dev) |
744 | { | |
745 | struct arizona *arizona = dev_get_drvdata(dev); | |
746 | ||
747 | dev_dbg(arizona->dev, "Suspend, disabling IRQ\n"); | |
748 | disable_irq(arizona->irq); | |
749 | ||
750 | return 0; | |
751 | } | |
752 | ||
3612b27c | 753 | static int arizona_suspend_noirq(struct device *dev) |
67c99296 MB |
754 | { |
755 | struct arizona *arizona = dev_get_drvdata(dev); | |
756 | ||
757 | dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n"); | |
758 | enable_irq(arizona->irq); | |
759 | ||
760 | return 0; | |
761 | } | |
762 | ||
dc781d0e MB |
763 | static int arizona_resume_noirq(struct device *dev) |
764 | { | |
765 | struct arizona *arizona = dev_get_drvdata(dev); | |
766 | ||
767 | dev_dbg(arizona->dev, "Early resume, disabling IRQ\n"); | |
768 | disable_irq(arizona->irq); | |
769 | ||
770 | return 0; | |
771 | } | |
772 | ||
773 | static int arizona_resume(struct device *dev) | |
774 | { | |
775 | struct arizona *arizona = dev_get_drvdata(dev); | |
776 | ||
3612b27c | 777 | dev_dbg(arizona->dev, "Resume, reenabling IRQ\n"); |
dc781d0e MB |
778 | enable_irq(arizona->irq); |
779 | ||
780 | return 0; | |
781 | } | |
782 | #endif | |
783 | ||
3cc72986 MB |
784 | const struct dev_pm_ops arizona_pm_ops = { |
785 | SET_RUNTIME_PM_OPS(arizona_runtime_suspend, | |
786 | arizona_runtime_resume, | |
787 | NULL) | |
67c99296 | 788 | SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume) |
3612b27c CK |
789 | SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(arizona_suspend_noirq, |
790 | arizona_resume_noirq) | |
3cc72986 MB |
791 | }; |
792 | EXPORT_SYMBOL_GPL(arizona_pm_ops); | |
793 | ||
d781009c | 794 | #ifdef CONFIG_OF |
942786e6 | 795 | unsigned long arizona_of_get_type(struct device *dev) |
d781009c MB |
796 | { |
797 | const struct of_device_id *id = of_match_device(arizona_of_match, dev); | |
798 | ||
799 | if (id) | |
942786e6 | 800 | return (unsigned long)id->data; |
d781009c MB |
801 | else |
802 | return 0; | |
803 | } | |
804 | EXPORT_SYMBOL_GPL(arizona_of_get_type); | |
805 | ||
806 | static int arizona_of_get_core_pdata(struct arizona *arizona) | |
807 | { | |
e4fcb1d6 | 808 | struct arizona_pdata *pdata = &arizona->pdata; |
cc47aed9 IS |
809 | struct property *prop; |
810 | const __be32 *cur; | |
811 | u32 val; | |
f4c05262 | 812 | u32 pdm_val[ARIZONA_MAX_PDM_SPK]; |
d781009c | 813 | int ret, i; |
cc47aed9 | 814 | int count = 0; |
d781009c | 815 | |
1961531d CK |
816 | pdata->reset = of_get_named_gpio(arizona->dev->of_node, "wlf,reset", 0); |
817 | if (pdata->reset < 0) { | |
818 | dev_err(arizona->dev, "Reset GPIO missing/malformed: %d\n", | |
819 | pdata->reset); | |
820 | ||
821 | pdata->reset = 0; | |
822 | } | |
d781009c MB |
823 | |
824 | ret = of_property_read_u32_array(arizona->dev->of_node, | |
825 | "wlf,gpio-defaults", | |
3762aede CK |
826 | pdata->gpio_defaults, |
827 | ARRAY_SIZE(pdata->gpio_defaults)); | |
d781009c MB |
828 | if (ret >= 0) { |
829 | /* | |
830 | * All values are literal except out of range values | |
831 | * which are chip default, translate into platform | |
832 | * data which uses 0 as chip default and out of range | |
833 | * as zero. | |
834 | */ | |
3762aede CK |
835 | for (i = 0; i < ARRAY_SIZE(pdata->gpio_defaults); i++) { |
836 | if (pdata->gpio_defaults[i] > 0xffff) | |
837 | pdata->gpio_defaults[i] = 0; | |
838 | else if (pdata->gpio_defaults[i] == 0) | |
839 | pdata->gpio_defaults[i] = 0x10000; | |
d781009c MB |
840 | } |
841 | } else { | |
842 | dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n", | |
843 | ret); | |
844 | } | |
845 | ||
cc47aed9 IS |
846 | of_property_for_each_u32(arizona->dev->of_node, "wlf,inmode", prop, |
847 | cur, val) { | |
3762aede | 848 | if (count == ARRAY_SIZE(pdata->inmode)) |
cc47aed9 IS |
849 | break; |
850 | ||
3762aede | 851 | pdata->inmode[count] = val; |
cc47aed9 IS |
852 | count++; |
853 | } | |
854 | ||
e7ad27ca CK |
855 | count = 0; |
856 | of_property_for_each_u32(arizona->dev->of_node, "wlf,dmic-ref", prop, | |
857 | cur, val) { | |
3762aede | 858 | if (count == ARRAY_SIZE(pdata->dmic_ref)) |
e7ad27ca CK |
859 | break; |
860 | ||
3762aede | 861 | pdata->dmic_ref[count] = val; |
e7ad27ca CK |
862 | count++; |
863 | } | |
864 | ||
f199d393 CK |
865 | count = 0; |
866 | of_property_for_each_u32(arizona->dev->of_node, "wlf,out-mono", prop, | |
867 | cur, val) { | |
868 | if (count == ARRAY_SIZE(pdata->out_mono)) | |
869 | break; | |
870 | ||
871 | pdata->out_mono[count] = !!val; | |
872 | count++; | |
873 | } | |
874 | ||
f4c05262 RF |
875 | count = 0; |
876 | of_property_for_each_u32(arizona->dev->of_node, | |
877 | "wlf,max-channels-clocked", | |
878 | prop, cur, val) { | |
879 | if (count == ARRAY_SIZE(pdata->max_channels_clocked)) | |
880 | break; | |
881 | ||
882 | pdata->max_channels_clocked[count] = val; | |
883 | count++; | |
884 | } | |
885 | ||
886 | ret = of_property_read_u32_array(arizona->dev->of_node, | |
887 | "wlf,spk-fmt", | |
888 | pdm_val, | |
889 | ARRAY_SIZE(pdm_val)); | |
890 | ||
891 | if (ret >= 0) | |
892 | for (count = 0; count < ARRAY_SIZE(pdata->spk_fmt); ++count) | |
893 | pdata->spk_fmt[count] = pdm_val[count]; | |
894 | ||
895 | ret = of_property_read_u32_array(arizona->dev->of_node, | |
896 | "wlf,spk-mute", | |
897 | pdm_val, | |
898 | ARRAY_SIZE(pdm_val)); | |
899 | ||
900 | if (ret >= 0) | |
901 | for (count = 0; count < ARRAY_SIZE(pdata->spk_mute); ++count) | |
902 | pdata->spk_mute[count] = pdm_val[count]; | |
903 | ||
d781009c MB |
904 | return 0; |
905 | } | |
906 | ||
907 | const struct of_device_id arizona_of_match[] = { | |
908 | { .compatible = "wlf,wm5102", .data = (void *)WM5102 }, | |
909 | { .compatible = "wlf,wm5110", .data = (void *)WM5110 }, | |
e5d4ef0d | 910 | { .compatible = "wlf,wm8280", .data = (void *)WM8280 }, |
dc7d4863 | 911 | { .compatible = "wlf,wm8997", .data = (void *)WM8997 }, |
6887b042 RF |
912 | { .compatible = "wlf,wm8998", .data = (void *)WM8998 }, |
913 | { .compatible = "wlf,wm1814", .data = (void *)WM1814 }, | |
ea1f3339 RF |
914 | { .compatible = "wlf,wm1831", .data = (void *)WM1831 }, |
915 | { .compatible = "cirrus,cs47l24", .data = (void *)CS47L24 }, | |
d781009c MB |
916 | {}, |
917 | }; | |
918 | EXPORT_SYMBOL_GPL(arizona_of_match); | |
919 | #else | |
920 | static inline int arizona_of_get_core_pdata(struct arizona *arizona) | |
921 | { | |
922 | return 0; | |
923 | } | |
924 | #endif | |
925 | ||
5ac98553 | 926 | static const struct mfd_cell early_devs[] = { |
3cc72986 MB |
927 | { .name = "arizona-ldo1" }, |
928 | }; | |
929 | ||
3762aede | 930 | static const char * const wm5102_supplies[] = { |
5fc6c396 | 931 | "MICVDD", |
32dadef2 CK |
932 | "DBVDD2", |
933 | "DBVDD3", | |
934 | "CPVDD", | |
935 | "SPKVDDL", | |
936 | "SPKVDDR", | |
937 | }; | |
938 | ||
5ac98553 | 939 | static const struct mfd_cell wm5102_devs[] = { |
d7768111 | 940 | { .name = "arizona-micsupp" }, |
f83c218c | 941 | { .name = "arizona-gpio" }, |
5fc6c396 CK |
942 | { |
943 | .name = "arizona-extcon", | |
944 | .parent_supplies = wm5102_supplies, | |
945 | .num_parent_supplies = 1, /* We only need MICVDD */ | |
946 | }, | |
503b1cac | 947 | { .name = "arizona-haptics" }, |
3cc72986 | 948 | { .name = "arizona-pwm" }, |
32dadef2 CK |
949 | { |
950 | .name = "wm5102-codec", | |
951 | .parent_supplies = wm5102_supplies, | |
952 | .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), | |
953 | }, | |
3cc72986 MB |
954 | }; |
955 | ||
5ac98553 | 956 | static const struct mfd_cell wm5110_devs[] = { |
d7768111 | 957 | { .name = "arizona-micsupp" }, |
f83c218c | 958 | { .name = "arizona-gpio" }, |
5fc6c396 CK |
959 | { |
960 | .name = "arizona-extcon", | |
961 | .parent_supplies = wm5102_supplies, | |
962 | .num_parent_supplies = 1, /* We only need MICVDD */ | |
963 | }, | |
503b1cac | 964 | { .name = "arizona-haptics" }, |
e102befe | 965 | { .name = "arizona-pwm" }, |
32dadef2 CK |
966 | { |
967 | .name = "wm5110-codec", | |
968 | .parent_supplies = wm5102_supplies, | |
969 | .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), | |
970 | }, | |
971 | }; | |
972 | ||
ea1f3339 RF |
973 | static const char * const cs47l24_supplies[] = { |
974 | "MICVDD", | |
975 | "CPVDD", | |
976 | "SPKVDD", | |
977 | }; | |
978 | ||
979 | static const struct mfd_cell cs47l24_devs[] = { | |
980 | { .name = "arizona-gpio" }, | |
981 | { .name = "arizona-haptics" }, | |
982 | { .name = "arizona-pwm" }, | |
983 | { | |
984 | .name = "cs47l24-codec", | |
985 | .parent_supplies = cs47l24_supplies, | |
986 | .num_parent_supplies = ARRAY_SIZE(cs47l24_supplies), | |
987 | }, | |
988 | }; | |
989 | ||
3762aede | 990 | static const char * const wm8997_supplies[] = { |
996c2d4f | 991 | "MICVDD", |
32dadef2 CK |
992 | "DBVDD2", |
993 | "CPVDD", | |
994 | "SPKVDD", | |
e102befe MB |
995 | }; |
996 | ||
5ac98553 | 997 | static const struct mfd_cell wm8997_devs[] = { |
dc7d4863 | 998 | { .name = "arizona-micsupp" }, |
f83c218c | 999 | { .name = "arizona-gpio" }, |
5fc6c396 CK |
1000 | { |
1001 | .name = "arizona-extcon", | |
1002 | .parent_supplies = wm8997_supplies, | |
1003 | .num_parent_supplies = 1, /* We only need MICVDD */ | |
1004 | }, | |
dc7d4863 CK |
1005 | { .name = "arizona-haptics" }, |
1006 | { .name = "arizona-pwm" }, | |
32dadef2 CK |
1007 | { |
1008 | .name = "wm8997-codec", | |
1009 | .parent_supplies = wm8997_supplies, | |
1010 | .num_parent_supplies = ARRAY_SIZE(wm8997_supplies), | |
1011 | }, | |
dc7d4863 CK |
1012 | }; |
1013 | ||
6887b042 | 1014 | static const struct mfd_cell wm8998_devs[] = { |
f83c218c CK |
1015 | { .name = "arizona-micsupp" }, |
1016 | { .name = "arizona-gpio" }, | |
6887b042 RF |
1017 | { |
1018 | .name = "arizona-extcon", | |
1019 | .parent_supplies = wm5102_supplies, | |
1020 | .num_parent_supplies = 1, /* We only need MICVDD */ | |
1021 | }, | |
6887b042 RF |
1022 | { .name = "arizona-haptics" }, |
1023 | { .name = "arizona-pwm" }, | |
1024 | { | |
1025 | .name = "wm8998-codec", | |
1026 | .parent_supplies = wm5102_supplies, | |
1027 | .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), | |
1028 | }, | |
6887b042 RF |
1029 | }; |
1030 | ||
f791be49 | 1031 | int arizona_dev_init(struct arizona *arizona) |
3cc72986 | 1032 | { |
cdd8da8c | 1033 | const char * const mclk_name[] = { "mclk1", "mclk2" }; |
3cc72986 | 1034 | struct device *dev = arizona->dev; |
ea1f3339 | 1035 | const char *type_name = NULL; |
6887b042 | 1036 | unsigned int reg, val, mask; |
62d62b59 | 1037 | int (*apply_patch)(struct arizona *) = NULL; |
ae05ea36 RF |
1038 | const struct mfd_cell *subdevs = NULL; |
1039 | int n_subdevs, ret, i; | |
3cc72986 MB |
1040 | |
1041 | dev_set_drvdata(arizona->dev, arizona); | |
1042 | mutex_init(&arizona->clk_lock); | |
1043 | ||
1044 | if (dev_get_platdata(arizona->dev)) | |
1045 | memcpy(&arizona->pdata, dev_get_platdata(arizona->dev), | |
1046 | sizeof(arizona->pdata)); | |
22d7dc8a LJ |
1047 | else |
1048 | arizona_of_get_core_pdata(arizona); | |
3cc72986 | 1049 | |
cdd8da8c SN |
1050 | BUILD_BUG_ON(ARRAY_SIZE(arizona->mclk) != ARRAY_SIZE(mclk_name)); |
1051 | for (i = 0; i < ARRAY_SIZE(arizona->mclk); i++) { | |
1052 | arizona->mclk[i] = devm_clk_get(arizona->dev, mclk_name[i]); | |
1053 | if (IS_ERR(arizona->mclk[i])) { | |
1054 | dev_info(arizona->dev, "Failed to get %s: %ld\n", | |
1055 | mclk_name[i], PTR_ERR(arizona->mclk[i])); | |
1056 | arizona->mclk[i] = NULL; | |
1057 | } | |
1058 | } | |
1059 | ||
3cc72986 MB |
1060 | regcache_cache_only(arizona->regmap, true); |
1061 | ||
1062 | switch (arizona->type) { | |
1063 | case WM5102: | |
e102befe | 1064 | case WM5110: |
e5d4ef0d | 1065 | case WM8280: |
dc7d4863 | 1066 | case WM8997: |
6887b042 RF |
1067 | case WM8998: |
1068 | case WM1814: | |
ea1f3339 RF |
1069 | case WM1831: |
1070 | case CS47L24: | |
3cc72986 MB |
1071 | for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++) |
1072 | arizona->core_supplies[i].supply | |
1073 | = wm5102_core_supplies[i]; | |
1074 | arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies); | |
1075 | break; | |
1076 | default: | |
1077 | dev_err(arizona->dev, "Unknown device type %d\n", | |
1078 | arizona->type); | |
75d8a2b0 | 1079 | return -ENODEV; |
3cc72986 MB |
1080 | } |
1081 | ||
4a8c475f CK |
1082 | /* Mark DCVDD as external, LDO1 driver will clear if internal */ |
1083 | arizona->external_dcvdd = true; | |
1084 | ||
ea1f3339 RF |
1085 | switch (arizona->type) { |
1086 | case WM1831: | |
1087 | case CS47L24: | |
1088 | break; /* No LDO1 regulator */ | |
1089 | default: | |
1090 | ret = mfd_add_devices(arizona->dev, -1, early_devs, | |
1091 | ARRAY_SIZE(early_devs), NULL, 0, NULL); | |
1092 | if (ret != 0) { | |
1093 | dev_err(dev, "Failed to add early children: %d\n", ret); | |
1094 | return ret; | |
1095 | } | |
1096 | break; | |
3cc72986 MB |
1097 | } |
1098 | ||
1099 | ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies, | |
1100 | arizona->core_supplies); | |
1101 | if (ret != 0) { | |
1102 | dev_err(dev, "Failed to request core supplies: %d\n", | |
1103 | ret); | |
1104 | goto err_early; | |
1105 | } | |
1106 | ||
0c2d0ffb CK |
1107 | /** |
1108 | * Don't use devres here because the only device we have to get | |
1109 | * against is the MFD device and DCVDD will likely be supplied by | |
1110 | * one of its children. Meaning that the regulator will be | |
1111 | * destroyed by the time devres calls regulator put. | |
1112 | */ | |
e6021511 | 1113 | arizona->dcvdd = regulator_get(arizona->dev, "DCVDD"); |
59db9691 MB |
1114 | if (IS_ERR(arizona->dcvdd)) { |
1115 | ret = PTR_ERR(arizona->dcvdd); | |
1116 | dev_err(dev, "Failed to request DCVDD: %d\n", ret); | |
1117 | goto err_early; | |
1118 | } | |
1119 | ||
87d3af4a MB |
1120 | if (arizona->pdata.reset) { |
1121 | /* Start out with /RESET low to put the chip into reset */ | |
5f056bf0 CK |
1122 | ret = devm_gpio_request_one(arizona->dev, arizona->pdata.reset, |
1123 | GPIOF_DIR_OUT | GPIOF_INIT_LOW, | |
1124 | "arizona /RESET"); | |
87d3af4a MB |
1125 | if (ret != 0) { |
1126 | dev_err(dev, "Failed to request /RESET: %d\n", ret); | |
e6021511 | 1127 | goto err_dcvdd; |
87d3af4a MB |
1128 | } |
1129 | } | |
1130 | ||
3cc72986 MB |
1131 | ret = regulator_bulk_enable(arizona->num_core_supplies, |
1132 | arizona->core_supplies); | |
1133 | if (ret != 0) { | |
1134 | dev_err(dev, "Failed to enable core supplies: %d\n", | |
1135 | ret); | |
e6021511 | 1136 | goto err_dcvdd; |
3cc72986 MB |
1137 | } |
1138 | ||
59db9691 MB |
1139 | ret = regulator_enable(arizona->dcvdd); |
1140 | if (ret != 0) { | |
1141 | dev_err(dev, "Failed to enable DCVDD: %d\n", ret); | |
1142 | goto err_enable; | |
1143 | } | |
1144 | ||
2229875d | 1145 | arizona_disable_reset(arizona); |
3cc72986 | 1146 | |
3cc72986 MB |
1147 | regcache_cache_only(arizona->regmap, false); |
1148 | ||
ca76ceb8 | 1149 | /* Verify that this is a chip we know about */ |
3cc72986 MB |
1150 | ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); |
1151 | if (ret != 0) { | |
1152 | dev_err(dev, "Failed to read ID register: %d\n", ret); | |
59db9691 | 1153 | goto err_reset; |
3cc72986 MB |
1154 | } |
1155 | ||
3cc72986 MB |
1156 | switch (reg) { |
1157 | case 0x5102: | |
e102befe | 1158 | case 0x5110: |
6887b042 | 1159 | case 0x6349: |
ea1f3339 | 1160 | case 0x6363: |
dc7d4863 | 1161 | case 0x8997: |
e102befe | 1162 | break; |
3cc72986 | 1163 | default: |
ca76ceb8 | 1164 | dev_err(arizona->dev, "Unknown device ID: %x\n", reg); |
75d8a2b0 | 1165 | ret = -ENODEV; |
59db9691 | 1166 | goto err_reset; |
3cc72986 MB |
1167 | } |
1168 | ||
3cc72986 MB |
1169 | /* If we have a /RESET GPIO we'll already be reset */ |
1170 | if (!arizona->pdata.reset) { | |
1171 | ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0); | |
1172 | if (ret != 0) { | |
1173 | dev_err(dev, "Failed to reset device: %d\n", ret); | |
59db9691 | 1174 | goto err_reset; |
3cc72986 | 1175 | } |
46b9d13a | 1176 | |
b79a980f | 1177 | usleep_range(1000, 5000); |
3cc72986 MB |
1178 | } |
1179 | ||
ca76ceb8 | 1180 | /* Ensure device startup is complete */ |
d955cba8 CK |
1181 | switch (arizona->type) { |
1182 | case WM5102: | |
48018943 MB |
1183 | ret = regmap_read(arizona->regmap, |
1184 | ARIZONA_WRITE_SEQUENCER_CTRL_3, &val); | |
1c1c6bba | 1185 | if (ret) { |
d955cba8 CK |
1186 | dev_err(dev, |
1187 | "Failed to check write sequencer state: %d\n", | |
1188 | ret); | |
1c1c6bba CK |
1189 | } else if (val & 0x01) { |
1190 | ret = wm5102_clear_write_sequencer(arizona); | |
1191 | if (ret) | |
1192 | return ret; | |
d955cba8 CK |
1193 | } |
1194 | break; | |
1c1c6bba CK |
1195 | default: |
1196 | break; | |
1197 | } | |
1198 | ||
1199 | ret = arizona_wait_for_boot(arizona); | |
1200 | if (ret) { | |
1201 | dev_err(arizona->dev, "Device failed initial boot: %d\n", ret); | |
1202 | goto err_reset; | |
af65a361 | 1203 | } |
3cc72986 | 1204 | |
ca76ceb8 MB |
1205 | /* Read the device ID information & do device specific stuff */ |
1206 | ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); | |
1207 | if (ret != 0) { | |
1208 | dev_err(dev, "Failed to read ID register: %d\n", ret); | |
1209 | goto err_reset; | |
1210 | } | |
1211 | ||
1212 | ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION, | |
1213 | &arizona->rev); | |
1214 | if (ret != 0) { | |
1215 | dev_err(dev, "Failed to read revision register: %d\n", ret); | |
1216 | goto err_reset; | |
1217 | } | |
1218 | arizona->rev &= ARIZONA_DEVICE_REVISION_MASK; | |
1219 | ||
1220 | switch (reg) { | |
ca76ceb8 | 1221 | case 0x5102: |
b61c1ec0 RF |
1222 | if (IS_ENABLED(CONFIG_MFD_WM5102)) { |
1223 | type_name = "WM5102"; | |
1224 | if (arizona->type != WM5102) { | |
1225 | dev_warn(arizona->dev, | |
1226 | "WM5102 registered as %d\n", | |
1227 | arizona->type); | |
1228 | arizona->type = WM5102; | |
1229 | } | |
1230 | ||
1231 | apply_patch = wm5102_patch; | |
1232 | arizona->rev &= 0x7; | |
1233 | subdevs = wm5102_devs; | |
1234 | n_subdevs = ARRAY_SIZE(wm5102_devs); | |
ca76ceb8 | 1235 | } |
ca76ceb8 | 1236 | break; |
ca76ceb8 | 1237 | case 0x5110: |
b61c1ec0 RF |
1238 | if (IS_ENABLED(CONFIG_MFD_WM5110)) { |
1239 | switch (arizona->type) { | |
1240 | case WM5110: | |
1241 | type_name = "WM5110"; | |
1242 | break; | |
1243 | case WM8280: | |
1244 | type_name = "WM8280"; | |
1245 | break; | |
1246 | default: | |
1247 | type_name = "WM5110"; | |
1248 | dev_warn(arizona->dev, | |
1249 | "WM5110 registered as %d\n", | |
1250 | arizona->type); | |
1251 | arizona->type = WM5110; | |
1252 | break; | |
1253 | } | |
1254 | ||
1255 | apply_patch = wm5110_patch; | |
1256 | subdevs = wm5110_devs; | |
1257 | n_subdevs = ARRAY_SIZE(wm5110_devs); | |
ca76ceb8 | 1258 | } |
ca76ceb8 | 1259 | break; |
ea1f3339 RF |
1260 | case 0x6363: |
1261 | if (IS_ENABLED(CONFIG_MFD_CS47L24)) { | |
1262 | switch (arizona->type) { | |
1263 | case CS47L24: | |
1264 | type_name = "CS47L24"; | |
1265 | break; | |
1266 | ||
1267 | case WM1831: | |
1268 | type_name = "WM1831"; | |
1269 | break; | |
1270 | ||
1271 | default: | |
1272 | dev_warn(arizona->dev, | |
1273 | "CS47L24 registered as %d\n", | |
1274 | arizona->type); | |
1275 | arizona->type = CS47L24; | |
1276 | break; | |
1277 | } | |
1278 | ||
1279 | apply_patch = cs47l24_patch; | |
1280 | subdevs = cs47l24_devs; | |
1281 | n_subdevs = ARRAY_SIZE(cs47l24_devs); | |
1282 | } | |
1283 | break; | |
dc7d4863 | 1284 | case 0x8997: |
b61c1ec0 RF |
1285 | if (IS_ENABLED(CONFIG_MFD_WM8997)) { |
1286 | type_name = "WM8997"; | |
1287 | if (arizona->type != WM8997) { | |
1288 | dev_warn(arizona->dev, | |
1289 | "WM8997 registered as %d\n", | |
1290 | arizona->type); | |
1291 | arizona->type = WM8997; | |
1292 | } | |
1293 | ||
1294 | apply_patch = wm8997_patch; | |
1295 | subdevs = wm8997_devs; | |
1296 | n_subdevs = ARRAY_SIZE(wm8997_devs); | |
dc7d4863 | 1297 | } |
dc7d4863 | 1298 | break; |
6887b042 | 1299 | case 0x6349: |
b61c1ec0 RF |
1300 | if (IS_ENABLED(CONFIG_MFD_WM8998)) { |
1301 | switch (arizona->type) { | |
1302 | case WM8998: | |
1303 | type_name = "WM8998"; | |
1304 | break; | |
1305 | ||
1306 | case WM1814: | |
1307 | type_name = "WM1814"; | |
1308 | break; | |
1309 | ||
1310 | default: | |
1311 | type_name = "WM8998"; | |
1312 | dev_warn(arizona->dev, | |
1313 | "WM8998 registered as %d\n", | |
1314 | arizona->type); | |
1315 | arizona->type = WM8998; | |
1316 | } | |
6887b042 | 1317 | |
b61c1ec0 RF |
1318 | apply_patch = wm8998_patch; |
1319 | subdevs = wm8998_devs; | |
1320 | n_subdevs = ARRAY_SIZE(wm8998_devs); | |
6887b042 | 1321 | } |
6887b042 | 1322 | break; |
ca76ceb8 MB |
1323 | default: |
1324 | dev_err(arizona->dev, "Unknown device ID %x\n", reg); | |
75d8a2b0 | 1325 | ret = -ENODEV; |
ca76ceb8 MB |
1326 | goto err_reset; |
1327 | } | |
1328 | ||
b61c1ec0 RF |
1329 | if (!subdevs) { |
1330 | dev_err(arizona->dev, | |
1331 | "No kernel support for device ID %x\n", reg); | |
75d8a2b0 | 1332 | ret = -ENODEV; |
b61c1ec0 RF |
1333 | goto err_reset; |
1334 | } | |
1335 | ||
ca76ceb8 MB |
1336 | dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A'); |
1337 | ||
62d62b59 MB |
1338 | if (apply_patch) { |
1339 | ret = apply_patch(arizona); | |
1340 | if (ret != 0) { | |
1341 | dev_err(arizona->dev, "Failed to apply patch: %d\n", | |
1342 | ret); | |
1343 | goto err_reset; | |
1344 | } | |
e80436bb CK |
1345 | |
1346 | switch (arizona->type) { | |
1347 | case WM5102: | |
0be068a0 CK |
1348 | ret = wm5102_apply_hardware_patch(arizona); |
1349 | if (ret) { | |
e80436bb CK |
1350 | dev_err(arizona->dev, |
1351 | "Failed to apply hardware patch: %d\n", | |
1352 | ret); | |
1353 | goto err_reset; | |
1354 | } | |
1355 | break; | |
882bc468 CK |
1356 | case WM5110: |
1357 | case WM8280: | |
1358 | ret = wm5110_apply_sleep_patch(arizona); | |
1359 | if (ret) { | |
1360 | dev_err(arizona->dev, | |
1361 | "Failed to apply sleep patch: %d\n", | |
1362 | ret); | |
1363 | goto err_reset; | |
1364 | } | |
1365 | break; | |
e80436bb CK |
1366 | default: |
1367 | break; | |
1368 | } | |
62d62b59 MB |
1369 | } |
1370 | ||
3cc72986 MB |
1371 | for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) { |
1372 | if (!arizona->pdata.gpio_defaults[i]) | |
1373 | continue; | |
1374 | ||
1375 | regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i, | |
1376 | arizona->pdata.gpio_defaults[i]); | |
1377 | } | |
1378 | ||
3cc72986 MB |
1379 | /* Chip default */ |
1380 | if (!arizona->pdata.clk32k_src) | |
1381 | arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2; | |
1382 | ||
1383 | switch (arizona->pdata.clk32k_src) { | |
1384 | case ARIZONA_32KZ_MCLK1: | |
1385 | case ARIZONA_32KZ_MCLK2: | |
1386 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, | |
1387 | ARIZONA_CLK_32K_SRC_MASK, | |
1388 | arizona->pdata.clk32k_src - 1); | |
767c6dc0 | 1389 | arizona_clk32k_enable(arizona); |
3cc72986 MB |
1390 | break; |
1391 | case ARIZONA_32KZ_NONE: | |
1392 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, | |
1393 | ARIZONA_CLK_32K_SRC_MASK, 2); | |
1394 | break; | |
1395 | default: | |
1396 | dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n", | |
1397 | arizona->pdata.clk32k_src); | |
1398 | ret = -EINVAL; | |
59db9691 | 1399 | goto err_reset; |
3cc72986 MB |
1400 | } |
1401 | ||
3d91f828 | 1402 | for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) { |
544c7aad MB |
1403 | if (!arizona->pdata.micbias[i].mV && |
1404 | !arizona->pdata.micbias[i].bypass) | |
3d91f828 MB |
1405 | continue; |
1406 | ||
544c7aad MB |
1407 | /* Apply default for bypass mode */ |
1408 | if (!arizona->pdata.micbias[i].mV) | |
1409 | arizona->pdata.micbias[i].mV = 2800; | |
1410 | ||
3d91f828 | 1411 | val = (arizona->pdata.micbias[i].mV - 1500) / 100; |
544c7aad | 1412 | |
3d91f828 MB |
1413 | val <<= ARIZONA_MICB1_LVL_SHIFT; |
1414 | ||
1415 | if (arizona->pdata.micbias[i].ext_cap) | |
1416 | val |= ARIZONA_MICB1_EXT_CAP; | |
1417 | ||
1418 | if (arizona->pdata.micbias[i].discharge) | |
1419 | val |= ARIZONA_MICB1_DISCH; | |
1420 | ||
f773fc6d | 1421 | if (arizona->pdata.micbias[i].soft_start) |
3d91f828 MB |
1422 | val |= ARIZONA_MICB1_RATE; |
1423 | ||
544c7aad MB |
1424 | if (arizona->pdata.micbias[i].bypass) |
1425 | val |= ARIZONA_MICB1_BYPASS; | |
1426 | ||
3d91f828 MB |
1427 | regmap_update_bits(arizona->regmap, |
1428 | ARIZONA_MIC_BIAS_CTRL_1 + i, | |
1429 | ARIZONA_MICB1_LVL_MASK | | |
71d134b9 | 1430 | ARIZONA_MICB1_EXT_CAP | |
3d91f828 | 1431 | ARIZONA_MICB1_DISCH | |
544c7aad | 1432 | ARIZONA_MICB1_BYPASS | |
3d91f828 MB |
1433 | ARIZONA_MICB1_RATE, val); |
1434 | } | |
1435 | ||
3cc72986 MB |
1436 | for (i = 0; i < ARIZONA_MAX_INPUT; i++) { |
1437 | /* Default for both is 0 so noop with defaults */ | |
1438 | val = arizona->pdata.dmic_ref[i] | |
1439 | << ARIZONA_IN1_DMIC_SUP_SHIFT; | |
fc027d13 RF |
1440 | if (arizona->pdata.inmode[i] & ARIZONA_INMODE_DMIC) |
1441 | val |= 1 << ARIZONA_IN1_MODE_SHIFT; | |
6887b042 RF |
1442 | |
1443 | switch (arizona->type) { | |
1444 | case WM8998: | |
1445 | case WM1814: | |
1446 | regmap_update_bits(arizona->regmap, | |
1447 | ARIZONA_ADC_DIGITAL_VOLUME_1L + (i * 8), | |
1448 | ARIZONA_IN1L_SRC_SE_MASK, | |
1449 | (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE) | |
1450 | << ARIZONA_IN1L_SRC_SE_SHIFT); | |
1451 | ||
1452 | regmap_update_bits(arizona->regmap, | |
1453 | ARIZONA_ADC_DIGITAL_VOLUME_1R + (i * 8), | |
1454 | ARIZONA_IN1R_SRC_SE_MASK, | |
1455 | (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE) | |
1456 | << ARIZONA_IN1R_SRC_SE_SHIFT); | |
1457 | ||
1458 | mask = ARIZONA_IN1_DMIC_SUP_MASK | | |
1459 | ARIZONA_IN1_MODE_MASK; | |
1460 | break; | |
1461 | default: | |
1462 | if (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE) | |
1463 | val |= 1 << ARIZONA_IN1_SINGLE_ENDED_SHIFT; | |
1464 | ||
1465 | mask = ARIZONA_IN1_DMIC_SUP_MASK | | |
1466 | ARIZONA_IN1_MODE_MASK | | |
1467 | ARIZONA_IN1_SINGLE_ENDED_MASK; | |
1468 | break; | |
1469 | } | |
3cc72986 MB |
1470 | |
1471 | regmap_update_bits(arizona->regmap, | |
1472 | ARIZONA_IN1L_CONTROL + (i * 8), | |
6887b042 | 1473 | mask, val); |
3cc72986 MB |
1474 | } |
1475 | ||
1476 | for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) { | |
1477 | /* Default is 0 so noop with defaults */ | |
1478 | if (arizona->pdata.out_mono[i]) | |
1479 | val = ARIZONA_OUT1_MONO; | |
1480 | else | |
1481 | val = 0; | |
1482 | ||
1483 | regmap_update_bits(arizona->regmap, | |
1484 | ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8), | |
1485 | ARIZONA_OUT1_MONO, val); | |
1486 | } | |
1487 | ||
3cc72986 MB |
1488 | for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) { |
1489 | if (arizona->pdata.spk_mute[i]) | |
1490 | regmap_update_bits(arizona->regmap, | |
2a51da04 | 1491 | ARIZONA_PDM_SPK1_CTRL_1 + (i * 2), |
3cc72986 MB |
1492 | ARIZONA_SPK1_MUTE_ENDIAN_MASK | |
1493 | ARIZONA_SPK1_MUTE_SEQ1_MASK, | |
1494 | arizona->pdata.spk_mute[i]); | |
1495 | ||
1496 | if (arizona->pdata.spk_fmt[i]) | |
1497 | regmap_update_bits(arizona->regmap, | |
2a51da04 | 1498 | ARIZONA_PDM_SPK1_CTRL_2 + (i * 2), |
3cc72986 MB |
1499 | ARIZONA_SPK1_FMT_MASK, |
1500 | arizona->pdata.spk_fmt[i]); | |
1501 | } | |
1502 | ||
72e43164 CK |
1503 | pm_runtime_set_active(arizona->dev); |
1504 | pm_runtime_enable(arizona->dev); | |
1505 | ||
3cc72986 MB |
1506 | /* Set up for interrupts */ |
1507 | ret = arizona_irq_init(arizona); | |
1508 | if (ret != 0) | |
d347792c | 1509 | goto err_pm; |
3cc72986 | 1510 | |
72e43164 CK |
1511 | pm_runtime_set_autosuspend_delay(arizona->dev, 100); |
1512 | pm_runtime_use_autosuspend(arizona->dev); | |
1513 | ||
3cc72986 MB |
1514 | arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error", |
1515 | arizona_clkgen_err, arizona); | |
1516 | arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked", | |
1517 | arizona_overclocked, arizona); | |
1518 | arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked", | |
1519 | arizona_underclocked, arizona); | |
1520 | ||
ae05ea36 RF |
1521 | ret = mfd_add_devices(arizona->dev, PLATFORM_DEVID_NONE, |
1522 | subdevs, n_subdevs, NULL, 0, NULL); | |
3cc72986 | 1523 | |
ae05ea36 | 1524 | if (ret) { |
3cc72986 MB |
1525 | dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret); |
1526 | goto err_irq; | |
1527 | } | |
1528 | ||
1529 | return 0; | |
1530 | ||
1531 | err_irq: | |
1532 | arizona_irq_exit(arizona); | |
d347792c CK |
1533 | err_pm: |
1534 | pm_runtime_disable(arizona->dev); | |
3cc72986 | 1535 | err_reset: |
2229875d | 1536 | arizona_enable_reset(arizona); |
59db9691 | 1537 | regulator_disable(arizona->dcvdd); |
3cc72986 | 1538 | err_enable: |
3a36a0db | 1539 | regulator_bulk_disable(arizona->num_core_supplies, |
3cc72986 | 1540 | arizona->core_supplies); |
e6021511 CK |
1541 | err_dcvdd: |
1542 | regulator_put(arizona->dcvdd); | |
3cc72986 MB |
1543 | err_early: |
1544 | mfd_remove_devices(dev); | |
1545 | return ret; | |
1546 | } | |
1547 | EXPORT_SYMBOL_GPL(arizona_dev_init); | |
1548 | ||
4740f73f | 1549 | int arizona_dev_exit(struct arizona *arizona) |
3cc72986 | 1550 | { |
b804020a CK |
1551 | pm_runtime_disable(arizona->dev); |
1552 | ||
df6b3352 | 1553 | regulator_disable(arizona->dcvdd); |
e6021511 | 1554 | regulator_put(arizona->dcvdd); |
df6b3352 | 1555 | |
3cc72986 MB |
1556 | mfd_remove_devices(arizona->dev); |
1557 | arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona); | |
1558 | arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona); | |
1559 | arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona); | |
3cc72986 | 1560 | arizona_irq_exit(arizona); |
2229875d | 1561 | arizona_enable_reset(arizona); |
df6b3352 | 1562 | |
4420286e | 1563 | regulator_bulk_disable(arizona->num_core_supplies, |
1d017b6b | 1564 | arizona->core_supplies); |
3cc72986 MB |
1565 | return 0; |
1566 | } | |
1567 | EXPORT_SYMBOL_GPL(arizona_dev_exit); |