Commit | Line | Data |
---|---|---|
3cc72986 MB |
1 | /* |
2 | * Arizona core driver | |
3 | * | |
4 | * Copyright 2012 Wolfson Microelectronics plc | |
5 | * | |
6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/delay.h> | |
59db9691 | 14 | #include <linux/err.h> |
3cc72986 MB |
15 | #include <linux/gpio.h> |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/mfd/core.h> | |
18 | #include <linux/module.h> | |
d781009c MB |
19 | #include <linux/of.h> |
20 | #include <linux/of_device.h> | |
21 | #include <linux/of_gpio.h> | |
3cc72986 MB |
22 | #include <linux/pm_runtime.h> |
23 | #include <linux/regmap.h> | |
24 | #include <linux/regulator/consumer.h> | |
5927467d | 25 | #include <linux/regulator/machine.h> |
3cc72986 MB |
26 | #include <linux/slab.h> |
27 | ||
28 | #include <linux/mfd/arizona/core.h> | |
29 | #include <linux/mfd/arizona/registers.h> | |
30 | ||
31 | #include "arizona.h" | |
32 | ||
3762aede | 33 | static const char * const wm5102_core_supplies[] = { |
3cc72986 MB |
34 | "AVDD", |
35 | "DBVDD1", | |
3cc72986 MB |
36 | }; |
37 | ||
38 | int arizona_clk32k_enable(struct arizona *arizona) | |
39 | { | |
40 | int ret = 0; | |
41 | ||
42 | mutex_lock(&arizona->clk_lock); | |
43 | ||
44 | arizona->clk32k_ref++; | |
45 | ||
247fa192 MB |
46 | if (arizona->clk32k_ref == 1) { |
47 | switch (arizona->pdata.clk32k_src) { | |
48 | case ARIZONA_32KZ_MCLK1: | |
49 | ret = pm_runtime_get_sync(arizona->dev); | |
50 | if (ret != 0) | |
51 | goto out; | |
52 | break; | |
53 | } | |
54 | ||
3cc72986 MB |
55 | ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, |
56 | ARIZONA_CLK_32K_ENA, | |
57 | ARIZONA_CLK_32K_ENA); | |
247fa192 | 58 | } |
3cc72986 | 59 | |
247fa192 | 60 | out: |
3cc72986 MB |
61 | if (ret != 0) |
62 | arizona->clk32k_ref--; | |
63 | ||
64 | mutex_unlock(&arizona->clk_lock); | |
65 | ||
66 | return ret; | |
67 | } | |
68 | EXPORT_SYMBOL_GPL(arizona_clk32k_enable); | |
69 | ||
70 | int arizona_clk32k_disable(struct arizona *arizona) | |
71 | { | |
3cc72986 MB |
72 | mutex_lock(&arizona->clk_lock); |
73 | ||
74 | BUG_ON(arizona->clk32k_ref <= 0); | |
75 | ||
76 | arizona->clk32k_ref--; | |
77 | ||
247fa192 | 78 | if (arizona->clk32k_ref == 0) { |
3cc72986 MB |
79 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, |
80 | ARIZONA_CLK_32K_ENA, 0); | |
81 | ||
247fa192 MB |
82 | switch (arizona->pdata.clk32k_src) { |
83 | case ARIZONA_32KZ_MCLK1: | |
84 | pm_runtime_put_sync(arizona->dev); | |
85 | break; | |
86 | } | |
87 | } | |
88 | ||
3cc72986 MB |
89 | mutex_unlock(&arizona->clk_lock); |
90 | ||
a260fba1 | 91 | return 0; |
3cc72986 MB |
92 | } |
93 | EXPORT_SYMBOL_GPL(arizona_clk32k_disable); | |
94 | ||
95 | static irqreturn_t arizona_clkgen_err(int irq, void *data) | |
96 | { | |
97 | struct arizona *arizona = data; | |
98 | ||
99 | dev_err(arizona->dev, "CLKGEN error\n"); | |
100 | ||
101 | return IRQ_HANDLED; | |
102 | } | |
103 | ||
104 | static irqreturn_t arizona_underclocked(int irq, void *data) | |
105 | { | |
106 | struct arizona *arizona = data; | |
107 | unsigned int val; | |
108 | int ret; | |
109 | ||
110 | ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8, | |
111 | &val); | |
112 | if (ret != 0) { | |
113 | dev_err(arizona->dev, "Failed to read underclock status: %d\n", | |
114 | ret); | |
115 | return IRQ_NONE; | |
116 | } | |
117 | ||
3cc72986 MB |
118 | if (val & ARIZONA_AIF3_UNDERCLOCKED_STS) |
119 | dev_err(arizona->dev, "AIF3 underclocked\n"); | |
120 | if (val & ARIZONA_AIF2_UNDERCLOCKED_STS) | |
3ebef34d CK |
121 | dev_err(arizona->dev, "AIF2 underclocked\n"); |
122 | if (val & ARIZONA_AIF1_UNDERCLOCKED_STS) | |
3cc72986 | 123 | dev_err(arizona->dev, "AIF1 underclocked\n"); |
6e440d27 CK |
124 | if (val & ARIZONA_ISRC3_UNDERCLOCKED_STS) |
125 | dev_err(arizona->dev, "ISRC3 underclocked\n"); | |
3cc72986 MB |
126 | if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS) |
127 | dev_err(arizona->dev, "ISRC2 underclocked\n"); | |
128 | if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS) | |
129 | dev_err(arizona->dev, "ISRC1 underclocked\n"); | |
130 | if (val & ARIZONA_FX_UNDERCLOCKED_STS) | |
131 | dev_err(arizona->dev, "FX underclocked\n"); | |
132 | if (val & ARIZONA_ASRC_UNDERCLOCKED_STS) | |
133 | dev_err(arizona->dev, "ASRC underclocked\n"); | |
134 | if (val & ARIZONA_DAC_UNDERCLOCKED_STS) | |
135 | dev_err(arizona->dev, "DAC underclocked\n"); | |
136 | if (val & ARIZONA_ADC_UNDERCLOCKED_STS) | |
137 | dev_err(arizona->dev, "ADC underclocked\n"); | |
138 | if (val & ARIZONA_MIXER_UNDERCLOCKED_STS) | |
648a9880 | 139 | dev_err(arizona->dev, "Mixer dropped sample\n"); |
3cc72986 MB |
140 | |
141 | return IRQ_HANDLED; | |
142 | } | |
143 | ||
144 | static irqreturn_t arizona_overclocked(int irq, void *data) | |
145 | { | |
146 | struct arizona *arizona = data; | |
6887b042 | 147 | unsigned int val[3]; |
3cc72986 | 148 | int ret; |
3762aede | 149 | |
3cc72986 | 150 | ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6, |
6887b042 | 151 | &val[0], 3); |
3cc72986 MB |
152 | if (ret != 0) { |
153 | dev_err(arizona->dev, "Failed to read overclock status: %d\n", | |
154 | ret); | |
155 | return IRQ_NONE; | |
156 | } | |
157 | ||
6887b042 RF |
158 | switch (arizona->type) { |
159 | case WM8998: | |
160 | case WM1814: | |
161 | /* Some bits are shifted on WM8998, | |
162 | * rearrange to match the standard bit layout | |
163 | */ | |
164 | val[0] = ((val[0] & 0x60e0) >> 1) | | |
165 | ((val[0] & 0x1e00) >> 2) | | |
166 | (val[0] & 0x000f); | |
167 | break; | |
168 | default: | |
169 | break; | |
170 | } | |
171 | ||
3cc72986 MB |
172 | if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS) |
173 | dev_err(arizona->dev, "PWM overclocked\n"); | |
174 | if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS) | |
175 | dev_err(arizona->dev, "FX core overclocked\n"); | |
176 | if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS) | |
177 | dev_err(arizona->dev, "DAC SYS overclocked\n"); | |
178 | if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS) | |
179 | dev_err(arizona->dev, "DAC WARP overclocked\n"); | |
180 | if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS) | |
181 | dev_err(arizona->dev, "ADC overclocked\n"); | |
182 | if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS) | |
183 | dev_err(arizona->dev, "Mixer overclocked\n"); | |
184 | if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS) | |
185 | dev_err(arizona->dev, "AIF3 overclocked\n"); | |
186 | if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS) | |
187 | dev_err(arizona->dev, "AIF2 overclocked\n"); | |
188 | if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS) | |
189 | dev_err(arizona->dev, "AIF1 overclocked\n"); | |
190 | if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS) | |
191 | dev_err(arizona->dev, "Pad control overclocked\n"); | |
192 | ||
193 | if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS) | |
194 | dev_err(arizona->dev, "Slimbus subsystem overclocked\n"); | |
195 | if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS) | |
196 | dev_err(arizona->dev, "Slimbus async overclocked\n"); | |
197 | if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS) | |
198 | dev_err(arizona->dev, "Slimbus sync overclocked\n"); | |
199 | if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS) | |
200 | dev_err(arizona->dev, "ASRC async system overclocked\n"); | |
201 | if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS) | |
202 | dev_err(arizona->dev, "ASRC async WARP overclocked\n"); | |
203 | if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS) | |
204 | dev_err(arizona->dev, "ASRC sync system overclocked\n"); | |
205 | if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS) | |
206 | dev_err(arizona->dev, "ASRC sync WARP overclocked\n"); | |
207 | if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS) | |
208 | dev_err(arizona->dev, "DSP1 overclocked\n"); | |
6e440d27 CK |
209 | if (val[1] & ARIZONA_ISRC3_OVERCLOCKED_STS) |
210 | dev_err(arizona->dev, "ISRC3 overclocked\n"); | |
3cc72986 MB |
211 | if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS) |
212 | dev_err(arizona->dev, "ISRC2 overclocked\n"); | |
213 | if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS) | |
214 | dev_err(arizona->dev, "ISRC1 overclocked\n"); | |
215 | ||
6887b042 RF |
216 | if (val[2] & ARIZONA_SPDIF_OVERCLOCKED_STS) |
217 | dev_err(arizona->dev, "SPDIF overclocked\n"); | |
218 | ||
3cc72986 MB |
219 | return IRQ_HANDLED; |
220 | } | |
221 | ||
9d53dfdc CK |
222 | static int arizona_poll_reg(struct arizona *arizona, |
223 | int timeout, unsigned int reg, | |
224 | unsigned int mask, unsigned int target) | |
3cc72986 | 225 | { |
9d53dfdc | 226 | unsigned int val = 0; |
3cc72986 MB |
227 | int ret, i; |
228 | ||
9d53dfdc CK |
229 | for (i = 0; i < timeout; i++) { |
230 | ret = regmap_read(arizona->regmap, reg, &val); | |
3cc72986 | 231 | if (ret != 0) { |
9d53dfdc CK |
232 | dev_err(arizona->dev, "Failed to read reg %u: %d\n", |
233 | reg, ret); | |
cfe775ce | 234 | continue; |
3cc72986 MB |
235 | } |
236 | ||
9d53dfdc CK |
237 | if ((val & mask) == target) |
238 | return 0; | |
239 | ||
240 | msleep(1); | |
3cc72986 MB |
241 | } |
242 | ||
9d53dfdc CK |
243 | dev_err(arizona->dev, "Polling reg %u timed out: %x\n", reg, val); |
244 | return -ETIMEDOUT; | |
245 | } | |
246 | ||
247 | static int arizona_wait_for_boot(struct arizona *arizona) | |
248 | { | |
249 | int ret; | |
250 | ||
251 | /* | |
252 | * We can't use an interrupt as we need to runtime resume to do so, | |
253 | * we won't race with the interrupt handler as it'll be blocked on | |
254 | * runtime resume. | |
255 | */ | |
256 | ret = arizona_poll_reg(arizona, 5, ARIZONA_INTERRUPT_RAW_STATUS_5, | |
257 | ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS); | |
258 | ||
259 | if (!ret) | |
3cc72986 MB |
260 | regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5, |
261 | ARIZONA_BOOT_DONE_STS); | |
3cc72986 MB |
262 | |
263 | pm_runtime_mark_last_busy(arizona->dev); | |
264 | ||
9d53dfdc | 265 | return ret; |
3cc72986 MB |
266 | } |
267 | ||
2229875d CK |
268 | static inline void arizona_enable_reset(struct arizona *arizona) |
269 | { | |
270 | if (arizona->pdata.reset) | |
271 | gpio_set_value_cansleep(arizona->pdata.reset, 0); | |
272 | } | |
273 | ||
274 | static void arizona_disable_reset(struct arizona *arizona) | |
275 | { | |
276 | if (arizona->pdata.reset) { | |
121c075c CK |
277 | switch (arizona->type) { |
278 | case WM5110: | |
279 | case WM8280: | |
280 | /* Meet requirements for minimum reset duration */ | |
281 | msleep(5); | |
282 | break; | |
283 | default: | |
284 | break; | |
285 | } | |
286 | ||
2229875d CK |
287 | gpio_set_value_cansleep(arizona->pdata.reset, 1); |
288 | msleep(1); | |
289 | } | |
290 | } | |
291 | ||
3850e3ee CK |
292 | struct arizona_sysclk_state { |
293 | unsigned int fll; | |
294 | unsigned int sysclk; | |
295 | }; | |
296 | ||
297 | static int arizona_enable_freerun_sysclk(struct arizona *arizona, | |
298 | struct arizona_sysclk_state *state) | |
e80436bb | 299 | { |
e80436bb CK |
300 | int ret, err; |
301 | ||
e80436bb | 302 | /* Cache existing FLL and SYSCLK settings */ |
3850e3ee | 303 | ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &state->fll); |
0be068a0 | 304 | if (ret) { |
e80436bb CK |
305 | dev_err(arizona->dev, "Failed to cache FLL settings: %d\n", |
306 | ret); | |
307 | return ret; | |
308 | } | |
3850e3ee CK |
309 | ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, |
310 | &state->sysclk); | |
0be068a0 | 311 | if (ret) { |
e80436bb CK |
312 | dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n", |
313 | ret); | |
314 | return ret; | |
315 | } | |
316 | ||
317 | /* Start up SYSCLK using the FLL in free running mode */ | |
318 | ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, | |
319 | ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN); | |
0be068a0 | 320 | if (ret) { |
e80436bb CK |
321 | dev_err(arizona->dev, |
322 | "Failed to start FLL in freerunning mode: %d\n", | |
323 | ret); | |
324 | return ret; | |
325 | } | |
326 | ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5, | |
327 | ARIZONA_FLL1_CLOCK_OK_STS, | |
328 | ARIZONA_FLL1_CLOCK_OK_STS); | |
0be068a0 | 329 | if (ret) { |
e80436bb CK |
330 | ret = -ETIMEDOUT; |
331 | goto err_fll; | |
332 | } | |
333 | ||
334 | ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144); | |
0be068a0 | 335 | if (ret) { |
e80436bb CK |
336 | dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret); |
337 | goto err_fll; | |
338 | } | |
339 | ||
3850e3ee CK |
340 | return 0; |
341 | ||
342 | err_fll: | |
343 | err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll); | |
344 | if (err) | |
345 | dev_err(arizona->dev, | |
346 | "Failed to re-apply old FLL settings: %d\n", err); | |
347 | ||
348 | return ret; | |
349 | } | |
350 | ||
351 | static int arizona_disable_freerun_sysclk(struct arizona *arizona, | |
352 | struct arizona_sysclk_state *state) | |
353 | { | |
354 | int ret; | |
355 | ||
356 | ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, | |
357 | state->sysclk); | |
358 | if (ret) { | |
359 | dev_err(arizona->dev, | |
360 | "Failed to re-apply old SYSCLK settings: %d\n", ret); | |
361 | return ret; | |
362 | } | |
363 | ||
364 | ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll); | |
365 | if (ret) { | |
366 | dev_err(arizona->dev, | |
367 | "Failed to re-apply old FLL settings: %d\n", ret); | |
368 | return ret; | |
369 | } | |
370 | ||
371 | return 0; | |
372 | } | |
373 | ||
374 | static int wm5102_apply_hardware_patch(struct arizona *arizona) | |
375 | { | |
376 | struct arizona_sysclk_state state; | |
377 | int err, ret; | |
378 | ||
379 | ret = arizona_enable_freerun_sysclk(arizona, &state); | |
380 | if (ret) | |
381 | return ret; | |
382 | ||
e80436bb CK |
383 | /* Start the write sequencer and wait for it to finish */ |
384 | ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, | |
0be068a0 CK |
385 | ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160); |
386 | if (ret) { | |
e80436bb CK |
387 | dev_err(arizona->dev, "Failed to start write sequencer: %d\n", |
388 | ret); | |
3850e3ee | 389 | goto err; |
e80436bb | 390 | } |
3850e3ee | 391 | |
e80436bb CK |
392 | ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1, |
393 | ARIZONA_WSEQ_BUSY, 0); | |
0be068a0 | 394 | if (ret) { |
e80436bb | 395 | regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0, |
0be068a0 | 396 | ARIZONA_WSEQ_ABORT); |
e80436bb CK |
397 | ret = -ETIMEDOUT; |
398 | } | |
399 | ||
3850e3ee CK |
400 | err: |
401 | err = arizona_disable_freerun_sysclk(arizona, &state); | |
e80436bb | 402 | |
0be068a0 | 403 | return ret ?: err; |
e80436bb CK |
404 | } |
405 | ||
882bc468 CK |
406 | /* |
407 | * Register patch to some of the CODECs internal write sequences | |
408 | * to ensure a clean exit from the low power sleep state. | |
409 | */ | |
8019ff6c | 410 | static const struct reg_sequence wm5110_sleep_patch[] = { |
882bc468 CK |
411 | { 0x337A, 0xC100 }, |
412 | { 0x337B, 0x0041 }, | |
413 | { 0x3300, 0xA210 }, | |
414 | { 0x3301, 0x050C }, | |
415 | }; | |
416 | ||
417 | static int wm5110_apply_sleep_patch(struct arizona *arizona) | |
418 | { | |
419 | struct arizona_sysclk_state state; | |
420 | int err, ret; | |
421 | ||
422 | ret = arizona_enable_freerun_sysclk(arizona, &state); | |
423 | if (ret) | |
424 | return ret; | |
425 | ||
426 | ret = regmap_multi_reg_write_bypassed(arizona->regmap, | |
427 | wm5110_sleep_patch, | |
428 | ARRAY_SIZE(wm5110_sleep_patch)); | |
429 | ||
430 | err = arizona_disable_freerun_sysclk(arizona, &state); | |
431 | ||
432 | return ret ?: err; | |
433 | } | |
434 | ||
1c1c6bba CK |
435 | static int wm5102_clear_write_sequencer(struct arizona *arizona) |
436 | { | |
437 | int ret; | |
438 | ||
439 | ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_3, | |
440 | 0x0); | |
441 | if (ret) { | |
442 | dev_err(arizona->dev, | |
443 | "Failed to clear write sequencer state: %d\n", ret); | |
444 | return ret; | |
445 | } | |
446 | ||
447 | arizona_enable_reset(arizona); | |
448 | regulator_disable(arizona->dcvdd); | |
449 | ||
450 | msleep(20); | |
451 | ||
452 | ret = regulator_enable(arizona->dcvdd); | |
453 | if (ret) { | |
454 | dev_err(arizona->dev, "Failed to re-enable DCVDD: %d\n", ret); | |
455 | return ret; | |
456 | } | |
457 | arizona_disable_reset(arizona); | |
458 | ||
459 | return 0; | |
460 | } | |
461 | ||
48bb9fe4 | 462 | #ifdef CONFIG_PM |
e7811147 RF |
463 | static int arizona_isolate_dcvdd(struct arizona *arizona) |
464 | { | |
465 | int ret; | |
466 | ||
467 | ret = regmap_update_bits(arizona->regmap, | |
468 | ARIZONA_ISOLATION_CONTROL, | |
469 | ARIZONA_ISOLATE_DCVDD1, | |
470 | ARIZONA_ISOLATE_DCVDD1); | |
471 | if (ret != 0) | |
472 | dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n", ret); | |
473 | ||
474 | return ret; | |
475 | } | |
476 | ||
477 | static int arizona_connect_dcvdd(struct arizona *arizona) | |
478 | { | |
479 | int ret; | |
480 | ||
481 | ret = regmap_update_bits(arizona->regmap, | |
482 | ARIZONA_ISOLATION_CONTROL, | |
483 | ARIZONA_ISOLATE_DCVDD1, 0); | |
484 | if (ret != 0) | |
485 | dev_err(arizona->dev, "Failed to connect DCVDD: %d\n", ret); | |
486 | ||
487 | return ret; | |
488 | } | |
489 | ||
e3424273 RF |
490 | static int arizona_is_jack_det_active(struct arizona *arizona) |
491 | { | |
492 | unsigned int val; | |
493 | int ret; | |
494 | ||
495 | ret = regmap_read(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, &val); | |
496 | if (ret) { | |
497 | dev_err(arizona->dev, | |
498 | "Failed to check jack det status: %d\n", ret); | |
499 | return ret; | |
500 | } else if (val & ARIZONA_JD1_ENA) { | |
501 | return 1; | |
502 | } else { | |
503 | return 0; | |
504 | } | |
505 | } | |
506 | ||
3cc72986 MB |
507 | static int arizona_runtime_resume(struct device *dev) |
508 | { | |
509 | struct arizona *arizona = dev_get_drvdata(dev); | |
510 | int ret; | |
511 | ||
508c8299 MB |
512 | dev_dbg(arizona->dev, "Leaving AoD mode\n"); |
513 | ||
e6cb7341 CK |
514 | if (arizona->has_fully_powered_off) { |
515 | dev_dbg(arizona->dev, "Re-enabling core supplies\n"); | |
516 | ||
517 | ret = regulator_bulk_enable(arizona->num_core_supplies, | |
518 | arizona->core_supplies); | |
519 | if (ret) { | |
520 | dev_err(dev, "Failed to enable core supplies: %d\n", | |
521 | ret); | |
522 | return ret; | |
523 | } | |
524 | } | |
525 | ||
59db9691 MB |
526 | ret = regulator_enable(arizona->dcvdd); |
527 | if (ret != 0) { | |
528 | dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret); | |
e6cb7341 CK |
529 | if (arizona->has_fully_powered_off) |
530 | regulator_bulk_disable(arizona->num_core_supplies, | |
531 | arizona->core_supplies); | |
59db9691 MB |
532 | return ret; |
533 | } | |
3cc72986 | 534 | |
e6cb7341 CK |
535 | if (arizona->has_fully_powered_off) { |
536 | arizona_disable_reset(arizona); | |
537 | enable_irq(arizona->irq); | |
538 | arizona->has_fully_powered_off = false; | |
539 | } | |
540 | ||
3cc72986 MB |
541 | regcache_cache_only(arizona->regmap, false); |
542 | ||
4c9bb8bc CK |
543 | switch (arizona->type) { |
544 | case WM5102: | |
5927467d | 545 | if (arizona->external_dcvdd) { |
e7811147 RF |
546 | ret = arizona_connect_dcvdd(arizona); |
547 | if (ret != 0) | |
5927467d | 548 | goto err; |
5927467d MB |
549 | } |
550 | ||
4c9bb8bc CK |
551 | ret = wm5102_patch(arizona); |
552 | if (ret != 0) { | |
553 | dev_err(arizona->dev, "Failed to apply patch: %d\n", | |
554 | ret); | |
555 | goto err; | |
556 | } | |
e80436bb | 557 | |
0be068a0 CK |
558 | ret = wm5102_apply_hardware_patch(arizona); |
559 | if (ret) { | |
e80436bb CK |
560 | dev_err(arizona->dev, |
561 | "Failed to apply hardware patch: %d\n", | |
562 | ret); | |
563 | goto err; | |
564 | } | |
565 | break; | |
96129a0e CK |
566 | case WM5110: |
567 | case WM8280: | |
568 | ret = arizona_wait_for_boot(arizona); | |
569 | if (ret) | |
570 | goto err; | |
571 | ||
572 | if (arizona->external_dcvdd) { | |
e7811147 RF |
573 | ret = arizona_connect_dcvdd(arizona); |
574 | if (ret != 0) | |
96129a0e | 575 | goto err; |
96129a0e CK |
576 | } else { |
577 | /* | |
578 | * As this is only called for the internal regulator | |
579 | * (where we know voltage ranges available) it is ok | |
580 | * to request an exact range. | |
581 | */ | |
582 | ret = regulator_set_voltage(arizona->dcvdd, | |
583 | 1200000, 1200000); | |
584 | if (ret < 0) { | |
585 | dev_err(arizona->dev, | |
586 | "Failed to set resume voltage: %d\n", | |
587 | ret); | |
588 | goto err; | |
589 | } | |
590 | } | |
e6cb7341 CK |
591 | |
592 | ret = wm5110_apply_sleep_patch(arizona); | |
593 | if (ret) { | |
594 | dev_err(arizona->dev, | |
595 | "Failed to re-apply sleep patch: %d\n", | |
596 | ret); | |
597 | goto err; | |
598 | } | |
96129a0e | 599 | break; |
e80436bb | 600 | default: |
12bb68ed | 601 | ret = arizona_wait_for_boot(arizona); |
3762aede | 602 | if (ret != 0) |
12bb68ed | 603 | goto err; |
12bb68ed | 604 | |
5927467d | 605 | if (arizona->external_dcvdd) { |
e7811147 RF |
606 | ret = arizona_connect_dcvdd(arizona); |
607 | if (ret != 0) | |
5927467d | 608 | goto err; |
5927467d | 609 | } |
e80436bb | 610 | break; |
4c9bb8bc CK |
611 | } |
612 | ||
9270bdf5 MB |
613 | ret = regcache_sync(arizona->regmap); |
614 | if (ret != 0) { | |
615 | dev_err(arizona->dev, "Failed to restore register cache\n"); | |
4816bd1c | 616 | goto err; |
9270bdf5 | 617 | } |
3cc72986 MB |
618 | |
619 | return 0; | |
4816bd1c MB |
620 | |
621 | err: | |
622 | regcache_cache_only(arizona->regmap, true); | |
623 | regulator_disable(arizona->dcvdd); | |
624 | return ret; | |
3cc72986 MB |
625 | } |
626 | ||
627 | static int arizona_runtime_suspend(struct device *dev) | |
628 | { | |
629 | struct arizona *arizona = dev_get_drvdata(dev); | |
e3424273 | 630 | unsigned int jd_active = 0; |
5927467d | 631 | int ret; |
3cc72986 | 632 | |
508c8299 MB |
633 | dev_dbg(arizona->dev, "Entering AoD mode\n"); |
634 | ||
e6cb7341 CK |
635 | switch (arizona->type) { |
636 | case WM5110: | |
637 | case WM8280: | |
e3424273 RF |
638 | jd_active = arizona_is_jack_det_active(arizona); |
639 | if (jd_active < 0) | |
640 | return jd_active; | |
641 | ||
e7811147 RF |
642 | if (arizona->external_dcvdd) { |
643 | ret = arizona_isolate_dcvdd(arizona); | |
644 | if (ret != 0) | |
645 | return ret; | |
646 | } else { | |
647 | /* | |
648 | * As this is only called for the internal regulator | |
649 | * (where we know voltage ranges available) it is ok | |
650 | * to request an exact range. | |
651 | */ | |
652 | ret = regulator_set_voltage(arizona->dcvdd, | |
653 | 1175000, 1175000); | |
654 | if (ret < 0) { | |
655 | dev_err(arizona->dev, | |
656 | "Failed to set suspend voltage: %d\n", | |
657 | ret); | |
658 | return ret; | |
659 | } | |
e6cb7341 CK |
660 | } |
661 | break; | |
662 | case WM5102: | |
e3424273 RF |
663 | jd_active = arizona_is_jack_det_active(arizona); |
664 | if (jd_active < 0) | |
665 | return jd_active; | |
666 | ||
e7811147 RF |
667 | if (arizona->external_dcvdd) { |
668 | ret = arizona_isolate_dcvdd(arizona); | |
669 | if (ret != 0) | |
670 | return ret; | |
671 | } | |
672 | ||
e3424273 | 673 | if (!jd_active) { |
e6cb7341 CK |
674 | ret = regmap_write(arizona->regmap, |
675 | ARIZONA_WRITE_SEQUENCER_CTRL_3, 0x0); | |
676 | if (ret) { | |
96129a0e | 677 | dev_err(arizona->dev, |
e6cb7341 | 678 | "Failed to clear write sequencer: %d\n", |
96129a0e CK |
679 | ret); |
680 | return ret; | |
681 | } | |
96129a0e | 682 | } |
e6cb7341 CK |
683 | break; |
684 | default: | |
e3424273 RF |
685 | jd_active = arizona_is_jack_det_active(arizona); |
686 | if (jd_active < 0) | |
687 | return jd_active; | |
688 | ||
e7811147 RF |
689 | if (arizona->external_dcvdd) { |
690 | ret = arizona_isolate_dcvdd(arizona); | |
691 | if (ret != 0) | |
692 | return ret; | |
693 | } | |
e6cb7341 | 694 | break; |
5927467d MB |
695 | } |
696 | ||
59db9691 MB |
697 | regcache_cache_only(arizona->regmap, true); |
698 | regcache_mark_dirty(arizona->regmap); | |
e293e847 | 699 | regulator_disable(arizona->dcvdd); |
3cc72986 | 700 | |
e6cb7341 | 701 | /* Allow us to completely power down if no jack detection */ |
e3424273 | 702 | if (!jd_active) { |
e6cb7341 CK |
703 | dev_dbg(arizona->dev, "Fully powering off\n"); |
704 | ||
705 | arizona->has_fully_powered_off = true; | |
706 | ||
11150929 | 707 | disable_irq_nosync(arizona->irq); |
e6cb7341 CK |
708 | arizona_enable_reset(arizona); |
709 | regulator_bulk_disable(arizona->num_core_supplies, | |
710 | arizona->core_supplies); | |
711 | } | |
712 | ||
3cc72986 MB |
713 | return 0; |
714 | } | |
715 | #endif | |
716 | ||
dc781d0e | 717 | #ifdef CONFIG_PM_SLEEP |
67c99296 MB |
718 | static int arizona_suspend(struct device *dev) |
719 | { | |
720 | struct arizona *arizona = dev_get_drvdata(dev); | |
721 | ||
722 | dev_dbg(arizona->dev, "Suspend, disabling IRQ\n"); | |
723 | disable_irq(arizona->irq); | |
724 | ||
725 | return 0; | |
726 | } | |
727 | ||
728 | static int arizona_suspend_late(struct device *dev) | |
729 | { | |
730 | struct arizona *arizona = dev_get_drvdata(dev); | |
731 | ||
732 | dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n"); | |
733 | enable_irq(arizona->irq); | |
734 | ||
735 | return 0; | |
736 | } | |
737 | ||
dc781d0e MB |
738 | static int arizona_resume_noirq(struct device *dev) |
739 | { | |
740 | struct arizona *arizona = dev_get_drvdata(dev); | |
741 | ||
742 | dev_dbg(arizona->dev, "Early resume, disabling IRQ\n"); | |
743 | disable_irq(arizona->irq); | |
744 | ||
745 | return 0; | |
746 | } | |
747 | ||
748 | static int arizona_resume(struct device *dev) | |
749 | { | |
750 | struct arizona *arizona = dev_get_drvdata(dev); | |
751 | ||
752 | dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n"); | |
753 | enable_irq(arizona->irq); | |
754 | ||
755 | return 0; | |
756 | } | |
757 | #endif | |
758 | ||
3cc72986 MB |
759 | const struct dev_pm_ops arizona_pm_ops = { |
760 | SET_RUNTIME_PM_OPS(arizona_runtime_suspend, | |
761 | arizona_runtime_resume, | |
762 | NULL) | |
67c99296 | 763 | SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume) |
dc781d0e | 764 | #ifdef CONFIG_PM_SLEEP |
67c99296 | 765 | .suspend_late = arizona_suspend_late, |
dc781d0e MB |
766 | .resume_noirq = arizona_resume_noirq, |
767 | #endif | |
3cc72986 MB |
768 | }; |
769 | EXPORT_SYMBOL_GPL(arizona_pm_ops); | |
770 | ||
d781009c | 771 | #ifdef CONFIG_OF |
942786e6 | 772 | unsigned long arizona_of_get_type(struct device *dev) |
d781009c MB |
773 | { |
774 | const struct of_device_id *id = of_match_device(arizona_of_match, dev); | |
775 | ||
776 | if (id) | |
942786e6 | 777 | return (unsigned long)id->data; |
d781009c MB |
778 | else |
779 | return 0; | |
780 | } | |
781 | EXPORT_SYMBOL_GPL(arizona_of_get_type); | |
782 | ||
e4fcb1d6 CK |
783 | int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop, |
784 | bool mandatory) | |
785 | { | |
786 | int gpio; | |
787 | ||
788 | gpio = of_get_named_gpio(arizona->dev->of_node, prop, 0); | |
789 | if (gpio < 0) { | |
790 | if (mandatory) | |
791 | dev_err(arizona->dev, | |
792 | "Mandatory DT gpio %s missing/malformed: %d\n", | |
793 | prop, gpio); | |
794 | ||
795 | gpio = 0; | |
796 | } | |
797 | ||
798 | return gpio; | |
799 | } | |
800 | EXPORT_SYMBOL_GPL(arizona_of_get_named_gpio); | |
801 | ||
d781009c MB |
802 | static int arizona_of_get_core_pdata(struct arizona *arizona) |
803 | { | |
e4fcb1d6 | 804 | struct arizona_pdata *pdata = &arizona->pdata; |
cc47aed9 IS |
805 | struct property *prop; |
806 | const __be32 *cur; | |
807 | u32 val; | |
d781009c | 808 | int ret, i; |
cc47aed9 | 809 | int count = 0; |
d781009c | 810 | |
e4fcb1d6 | 811 | pdata->reset = arizona_of_get_named_gpio(arizona, "wlf,reset", true); |
d781009c MB |
812 | |
813 | ret = of_property_read_u32_array(arizona->dev->of_node, | |
814 | "wlf,gpio-defaults", | |
3762aede CK |
815 | pdata->gpio_defaults, |
816 | ARRAY_SIZE(pdata->gpio_defaults)); | |
d781009c MB |
817 | if (ret >= 0) { |
818 | /* | |
819 | * All values are literal except out of range values | |
820 | * which are chip default, translate into platform | |
821 | * data which uses 0 as chip default and out of range | |
822 | * as zero. | |
823 | */ | |
3762aede CK |
824 | for (i = 0; i < ARRAY_SIZE(pdata->gpio_defaults); i++) { |
825 | if (pdata->gpio_defaults[i] > 0xffff) | |
826 | pdata->gpio_defaults[i] = 0; | |
827 | else if (pdata->gpio_defaults[i] == 0) | |
828 | pdata->gpio_defaults[i] = 0x10000; | |
d781009c MB |
829 | } |
830 | } else { | |
831 | dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n", | |
832 | ret); | |
833 | } | |
834 | ||
cc47aed9 IS |
835 | of_property_for_each_u32(arizona->dev->of_node, "wlf,inmode", prop, |
836 | cur, val) { | |
3762aede | 837 | if (count == ARRAY_SIZE(pdata->inmode)) |
cc47aed9 IS |
838 | break; |
839 | ||
3762aede | 840 | pdata->inmode[count] = val; |
cc47aed9 IS |
841 | count++; |
842 | } | |
843 | ||
e7ad27ca CK |
844 | count = 0; |
845 | of_property_for_each_u32(arizona->dev->of_node, "wlf,dmic-ref", prop, | |
846 | cur, val) { | |
3762aede | 847 | if (count == ARRAY_SIZE(pdata->dmic_ref)) |
e7ad27ca CK |
848 | break; |
849 | ||
3762aede | 850 | pdata->dmic_ref[count] = val; |
e7ad27ca CK |
851 | count++; |
852 | } | |
853 | ||
d781009c MB |
854 | return 0; |
855 | } | |
856 | ||
857 | const struct of_device_id arizona_of_match[] = { | |
858 | { .compatible = "wlf,wm5102", .data = (void *)WM5102 }, | |
859 | { .compatible = "wlf,wm5110", .data = (void *)WM5110 }, | |
e5d4ef0d | 860 | { .compatible = "wlf,wm8280", .data = (void *)WM8280 }, |
dc7d4863 | 861 | { .compatible = "wlf,wm8997", .data = (void *)WM8997 }, |
6887b042 RF |
862 | { .compatible = "wlf,wm8998", .data = (void *)WM8998 }, |
863 | { .compatible = "wlf,wm1814", .data = (void *)WM1814 }, | |
d781009c MB |
864 | {}, |
865 | }; | |
866 | EXPORT_SYMBOL_GPL(arizona_of_match); | |
867 | #else | |
868 | static inline int arizona_of_get_core_pdata(struct arizona *arizona) | |
869 | { | |
870 | return 0; | |
871 | } | |
872 | #endif | |
873 | ||
5ac98553 | 874 | static const struct mfd_cell early_devs[] = { |
3cc72986 MB |
875 | { .name = "arizona-ldo1" }, |
876 | }; | |
877 | ||
3762aede | 878 | static const char * const wm5102_supplies[] = { |
5fc6c396 | 879 | "MICVDD", |
32dadef2 CK |
880 | "DBVDD2", |
881 | "DBVDD3", | |
882 | "CPVDD", | |
883 | "SPKVDDL", | |
884 | "SPKVDDR", | |
885 | }; | |
886 | ||
5ac98553 | 887 | static const struct mfd_cell wm5102_devs[] = { |
d7768111 | 888 | { .name = "arizona-micsupp" }, |
5fc6c396 CK |
889 | { |
890 | .name = "arizona-extcon", | |
891 | .parent_supplies = wm5102_supplies, | |
892 | .num_parent_supplies = 1, /* We only need MICVDD */ | |
893 | }, | |
3cc72986 | 894 | { .name = "arizona-gpio" }, |
503b1cac | 895 | { .name = "arizona-haptics" }, |
3cc72986 | 896 | { .name = "arizona-pwm" }, |
32dadef2 CK |
897 | { |
898 | .name = "wm5102-codec", | |
899 | .parent_supplies = wm5102_supplies, | |
900 | .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), | |
901 | }, | |
3cc72986 MB |
902 | }; |
903 | ||
5ac98553 | 904 | static const struct mfd_cell wm5110_devs[] = { |
d7768111 | 905 | { .name = "arizona-micsupp" }, |
5fc6c396 CK |
906 | { |
907 | .name = "arizona-extcon", | |
908 | .parent_supplies = wm5102_supplies, | |
909 | .num_parent_supplies = 1, /* We only need MICVDD */ | |
910 | }, | |
e102befe | 911 | { .name = "arizona-gpio" }, |
503b1cac | 912 | { .name = "arizona-haptics" }, |
e102befe | 913 | { .name = "arizona-pwm" }, |
32dadef2 CK |
914 | { |
915 | .name = "wm5110-codec", | |
916 | .parent_supplies = wm5102_supplies, | |
917 | .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), | |
918 | }, | |
919 | }; | |
920 | ||
3762aede | 921 | static const char * const wm8997_supplies[] = { |
996c2d4f | 922 | "MICVDD", |
32dadef2 CK |
923 | "DBVDD2", |
924 | "CPVDD", | |
925 | "SPKVDD", | |
e102befe MB |
926 | }; |
927 | ||
5ac98553 | 928 | static const struct mfd_cell wm8997_devs[] = { |
dc7d4863 | 929 | { .name = "arizona-micsupp" }, |
5fc6c396 CK |
930 | { |
931 | .name = "arizona-extcon", | |
932 | .parent_supplies = wm8997_supplies, | |
933 | .num_parent_supplies = 1, /* We only need MICVDD */ | |
934 | }, | |
dc7d4863 CK |
935 | { .name = "arizona-gpio" }, |
936 | { .name = "arizona-haptics" }, | |
937 | { .name = "arizona-pwm" }, | |
32dadef2 CK |
938 | { |
939 | .name = "wm8997-codec", | |
940 | .parent_supplies = wm8997_supplies, | |
941 | .num_parent_supplies = ARRAY_SIZE(wm8997_supplies), | |
942 | }, | |
dc7d4863 CK |
943 | }; |
944 | ||
6887b042 RF |
945 | static const struct mfd_cell wm8998_devs[] = { |
946 | { | |
947 | .name = "arizona-extcon", | |
948 | .parent_supplies = wm5102_supplies, | |
949 | .num_parent_supplies = 1, /* We only need MICVDD */ | |
950 | }, | |
951 | { .name = "arizona-gpio" }, | |
952 | { .name = "arizona-haptics" }, | |
953 | { .name = "arizona-pwm" }, | |
954 | { | |
955 | .name = "wm8998-codec", | |
956 | .parent_supplies = wm5102_supplies, | |
957 | .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), | |
958 | }, | |
959 | { .name = "arizona-micsupp" }, | |
960 | }; | |
961 | ||
f791be49 | 962 | int arizona_dev_init(struct arizona *arizona) |
3cc72986 MB |
963 | { |
964 | struct device *dev = arizona->dev; | |
965 | const char *type_name; | |
6887b042 | 966 | unsigned int reg, val, mask; |
62d62b59 | 967 | int (*apply_patch)(struct arizona *) = NULL; |
3cc72986 MB |
968 | int ret, i; |
969 | ||
970 | dev_set_drvdata(arizona->dev, arizona); | |
971 | mutex_init(&arizona->clk_lock); | |
972 | ||
973 | if (dev_get_platdata(arizona->dev)) | |
974 | memcpy(&arizona->pdata, dev_get_platdata(arizona->dev), | |
975 | sizeof(arizona->pdata)); | |
22d7dc8a LJ |
976 | else |
977 | arizona_of_get_core_pdata(arizona); | |
3cc72986 MB |
978 | |
979 | regcache_cache_only(arizona->regmap, true); | |
980 | ||
981 | switch (arizona->type) { | |
982 | case WM5102: | |
e102befe | 983 | case WM5110: |
e5d4ef0d | 984 | case WM8280: |
dc7d4863 | 985 | case WM8997: |
6887b042 RF |
986 | case WM8998: |
987 | case WM1814: | |
3cc72986 MB |
988 | for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++) |
989 | arizona->core_supplies[i].supply | |
990 | = wm5102_core_supplies[i]; | |
991 | arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies); | |
992 | break; | |
993 | default: | |
994 | dev_err(arizona->dev, "Unknown device type %d\n", | |
995 | arizona->type); | |
996 | return -EINVAL; | |
997 | } | |
998 | ||
4a8c475f CK |
999 | /* Mark DCVDD as external, LDO1 driver will clear if internal */ |
1000 | arizona->external_dcvdd = true; | |
1001 | ||
3cc72986 | 1002 | ret = mfd_add_devices(arizona->dev, -1, early_devs, |
0848c94f | 1003 | ARRAY_SIZE(early_devs), NULL, 0, NULL); |
3cc72986 MB |
1004 | if (ret != 0) { |
1005 | dev_err(dev, "Failed to add early children: %d\n", ret); | |
1006 | return ret; | |
1007 | } | |
1008 | ||
1009 | ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies, | |
1010 | arizona->core_supplies); | |
1011 | if (ret != 0) { | |
1012 | dev_err(dev, "Failed to request core supplies: %d\n", | |
1013 | ret); | |
1014 | goto err_early; | |
1015 | } | |
1016 | ||
0c2d0ffb CK |
1017 | /** |
1018 | * Don't use devres here because the only device we have to get | |
1019 | * against is the MFD device and DCVDD will likely be supplied by | |
1020 | * one of its children. Meaning that the regulator will be | |
1021 | * destroyed by the time devres calls regulator put. | |
1022 | */ | |
e6021511 | 1023 | arizona->dcvdd = regulator_get(arizona->dev, "DCVDD"); |
59db9691 MB |
1024 | if (IS_ERR(arizona->dcvdd)) { |
1025 | ret = PTR_ERR(arizona->dcvdd); | |
1026 | dev_err(dev, "Failed to request DCVDD: %d\n", ret); | |
1027 | goto err_early; | |
1028 | } | |
1029 | ||
87d3af4a MB |
1030 | if (arizona->pdata.reset) { |
1031 | /* Start out with /RESET low to put the chip into reset */ | |
5f056bf0 CK |
1032 | ret = devm_gpio_request_one(arizona->dev, arizona->pdata.reset, |
1033 | GPIOF_DIR_OUT | GPIOF_INIT_LOW, | |
1034 | "arizona /RESET"); | |
87d3af4a MB |
1035 | if (ret != 0) { |
1036 | dev_err(dev, "Failed to request /RESET: %d\n", ret); | |
e6021511 | 1037 | goto err_dcvdd; |
87d3af4a MB |
1038 | } |
1039 | } | |
1040 | ||
3cc72986 MB |
1041 | ret = regulator_bulk_enable(arizona->num_core_supplies, |
1042 | arizona->core_supplies); | |
1043 | if (ret != 0) { | |
1044 | dev_err(dev, "Failed to enable core supplies: %d\n", | |
1045 | ret); | |
e6021511 | 1046 | goto err_dcvdd; |
3cc72986 MB |
1047 | } |
1048 | ||
59db9691 MB |
1049 | ret = regulator_enable(arizona->dcvdd); |
1050 | if (ret != 0) { | |
1051 | dev_err(dev, "Failed to enable DCVDD: %d\n", ret); | |
1052 | goto err_enable; | |
1053 | } | |
1054 | ||
2229875d | 1055 | arizona_disable_reset(arizona); |
3cc72986 | 1056 | |
3cc72986 MB |
1057 | regcache_cache_only(arizona->regmap, false); |
1058 | ||
ca76ceb8 | 1059 | /* Verify that this is a chip we know about */ |
3cc72986 MB |
1060 | ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); |
1061 | if (ret != 0) { | |
1062 | dev_err(dev, "Failed to read ID register: %d\n", ret); | |
59db9691 | 1063 | goto err_reset; |
3cc72986 MB |
1064 | } |
1065 | ||
3cc72986 MB |
1066 | switch (reg) { |
1067 | case 0x5102: | |
e102befe | 1068 | case 0x5110: |
6887b042 | 1069 | case 0x6349: |
dc7d4863 | 1070 | case 0x8997: |
e102befe | 1071 | break; |
3cc72986 | 1072 | default: |
ca76ceb8 | 1073 | dev_err(arizona->dev, "Unknown device ID: %x\n", reg); |
59db9691 | 1074 | goto err_reset; |
3cc72986 MB |
1075 | } |
1076 | ||
3cc72986 MB |
1077 | /* If we have a /RESET GPIO we'll already be reset */ |
1078 | if (!arizona->pdata.reset) { | |
1079 | ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0); | |
1080 | if (ret != 0) { | |
1081 | dev_err(dev, "Failed to reset device: %d\n", ret); | |
59db9691 | 1082 | goto err_reset; |
3cc72986 | 1083 | } |
46b9d13a | 1084 | |
c25feaa5 | 1085 | msleep(1); |
3cc72986 MB |
1086 | } |
1087 | ||
ca76ceb8 | 1088 | /* Ensure device startup is complete */ |
d955cba8 CK |
1089 | switch (arizona->type) { |
1090 | case WM5102: | |
48018943 MB |
1091 | ret = regmap_read(arizona->regmap, |
1092 | ARIZONA_WRITE_SEQUENCER_CTRL_3, &val); | |
1c1c6bba | 1093 | if (ret) { |
d955cba8 CK |
1094 | dev_err(dev, |
1095 | "Failed to check write sequencer state: %d\n", | |
1096 | ret); | |
1c1c6bba CK |
1097 | } else if (val & 0x01) { |
1098 | ret = wm5102_clear_write_sequencer(arizona); | |
1099 | if (ret) | |
1100 | return ret; | |
d955cba8 CK |
1101 | } |
1102 | break; | |
1c1c6bba CK |
1103 | default: |
1104 | break; | |
1105 | } | |
1106 | ||
1107 | ret = arizona_wait_for_boot(arizona); | |
1108 | if (ret) { | |
1109 | dev_err(arizona->dev, "Device failed initial boot: %d\n", ret); | |
1110 | goto err_reset; | |
af65a361 | 1111 | } |
3cc72986 | 1112 | |
ca76ceb8 MB |
1113 | /* Read the device ID information & do device specific stuff */ |
1114 | ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®); | |
1115 | if (ret != 0) { | |
1116 | dev_err(dev, "Failed to read ID register: %d\n", ret); | |
1117 | goto err_reset; | |
1118 | } | |
1119 | ||
1120 | ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION, | |
1121 | &arizona->rev); | |
1122 | if (ret != 0) { | |
1123 | dev_err(dev, "Failed to read revision register: %d\n", ret); | |
1124 | goto err_reset; | |
1125 | } | |
1126 | arizona->rev &= ARIZONA_DEVICE_REVISION_MASK; | |
1127 | ||
1128 | switch (reg) { | |
1129 | #ifdef CONFIG_MFD_WM5102 | |
1130 | case 0x5102: | |
1131 | type_name = "WM5102"; | |
1132 | if (arizona->type != WM5102) { | |
161ad30b RF |
1133 | dev_warn(arizona->dev, "WM5102 registered as %d\n", |
1134 | arizona->type); | |
ca76ceb8 MB |
1135 | arizona->type = WM5102; |
1136 | } | |
1137 | apply_patch = wm5102_patch; | |
1138 | arizona->rev &= 0x7; | |
1139 | break; | |
1140 | #endif | |
1141 | #ifdef CONFIG_MFD_WM5110 | |
1142 | case 0x5110: | |
e5d4ef0d RF |
1143 | switch (arizona->type) { |
1144 | case WM5110: | |
1145 | type_name = "WM5110"; | |
1146 | break; | |
1147 | case WM8280: | |
1148 | type_name = "WM8280"; | |
1149 | break; | |
1150 | default: | |
1151 | type_name = "WM5110"; | |
161ad30b RF |
1152 | dev_warn(arizona->dev, "WM5110 registered as %d\n", |
1153 | arizona->type); | |
ca76ceb8 | 1154 | arizona->type = WM5110; |
e5d4ef0d | 1155 | break; |
ca76ceb8 MB |
1156 | } |
1157 | apply_patch = wm5110_patch; | |
1158 | break; | |
dc7d4863 CK |
1159 | #endif |
1160 | #ifdef CONFIG_MFD_WM8997 | |
1161 | case 0x8997: | |
1162 | type_name = "WM8997"; | |
1163 | if (arizona->type != WM8997) { | |
161ad30b RF |
1164 | dev_warn(arizona->dev, "WM8997 registered as %d\n", |
1165 | arizona->type); | |
dc7d4863 CK |
1166 | arizona->type = WM8997; |
1167 | } | |
1168 | apply_patch = wm8997_patch; | |
1169 | break; | |
6887b042 RF |
1170 | #endif |
1171 | #ifdef CONFIG_MFD_WM8998 | |
1172 | case 0x6349: | |
1173 | switch (arizona->type) { | |
1174 | case WM8998: | |
1175 | type_name = "WM8998"; | |
1176 | break; | |
1177 | ||
1178 | case WM1814: | |
1179 | type_name = "WM1814"; | |
1180 | break; | |
1181 | ||
1182 | default: | |
1183 | type_name = "WM8998"; | |
161ad30b RF |
1184 | dev_warn(arizona->dev, "WM8998 registered as %d\n", |
1185 | arizona->type); | |
6887b042 RF |
1186 | arizona->type = WM8998; |
1187 | } | |
1188 | ||
1189 | apply_patch = wm8998_patch; | |
1190 | break; | |
ca76ceb8 MB |
1191 | #endif |
1192 | default: | |
1193 | dev_err(arizona->dev, "Unknown device ID %x\n", reg); | |
1194 | goto err_reset; | |
1195 | } | |
1196 | ||
1197 | dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A'); | |
1198 | ||
62d62b59 MB |
1199 | if (apply_patch) { |
1200 | ret = apply_patch(arizona); | |
1201 | if (ret != 0) { | |
1202 | dev_err(arizona->dev, "Failed to apply patch: %d\n", | |
1203 | ret); | |
1204 | goto err_reset; | |
1205 | } | |
e80436bb CK |
1206 | |
1207 | switch (arizona->type) { | |
1208 | case WM5102: | |
0be068a0 CK |
1209 | ret = wm5102_apply_hardware_patch(arizona); |
1210 | if (ret) { | |
e80436bb CK |
1211 | dev_err(arizona->dev, |
1212 | "Failed to apply hardware patch: %d\n", | |
1213 | ret); | |
1214 | goto err_reset; | |
1215 | } | |
1216 | break; | |
882bc468 CK |
1217 | case WM5110: |
1218 | case WM8280: | |
1219 | ret = wm5110_apply_sleep_patch(arizona); | |
1220 | if (ret) { | |
1221 | dev_err(arizona->dev, | |
1222 | "Failed to apply sleep patch: %d\n", | |
1223 | ret); | |
1224 | goto err_reset; | |
1225 | } | |
1226 | break; | |
e80436bb CK |
1227 | default: |
1228 | break; | |
1229 | } | |
62d62b59 MB |
1230 | } |
1231 | ||
3cc72986 MB |
1232 | for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) { |
1233 | if (!arizona->pdata.gpio_defaults[i]) | |
1234 | continue; | |
1235 | ||
1236 | regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i, | |
1237 | arizona->pdata.gpio_defaults[i]); | |
1238 | } | |
1239 | ||
3cc72986 MB |
1240 | /* Chip default */ |
1241 | if (!arizona->pdata.clk32k_src) | |
1242 | arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2; | |
1243 | ||
1244 | switch (arizona->pdata.clk32k_src) { | |
1245 | case ARIZONA_32KZ_MCLK1: | |
1246 | case ARIZONA_32KZ_MCLK2: | |
1247 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, | |
1248 | ARIZONA_CLK_32K_SRC_MASK, | |
1249 | arizona->pdata.clk32k_src - 1); | |
767c6dc0 | 1250 | arizona_clk32k_enable(arizona); |
3cc72986 MB |
1251 | break; |
1252 | case ARIZONA_32KZ_NONE: | |
1253 | regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1, | |
1254 | ARIZONA_CLK_32K_SRC_MASK, 2); | |
1255 | break; | |
1256 | default: | |
1257 | dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n", | |
1258 | arizona->pdata.clk32k_src); | |
1259 | ret = -EINVAL; | |
59db9691 | 1260 | goto err_reset; |
3cc72986 MB |
1261 | } |
1262 | ||
3d91f828 | 1263 | for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) { |
544c7aad MB |
1264 | if (!arizona->pdata.micbias[i].mV && |
1265 | !arizona->pdata.micbias[i].bypass) | |
3d91f828 MB |
1266 | continue; |
1267 | ||
544c7aad MB |
1268 | /* Apply default for bypass mode */ |
1269 | if (!arizona->pdata.micbias[i].mV) | |
1270 | arizona->pdata.micbias[i].mV = 2800; | |
1271 | ||
3d91f828 | 1272 | val = (arizona->pdata.micbias[i].mV - 1500) / 100; |
544c7aad | 1273 | |
3d91f828 MB |
1274 | val <<= ARIZONA_MICB1_LVL_SHIFT; |
1275 | ||
1276 | if (arizona->pdata.micbias[i].ext_cap) | |
1277 | val |= ARIZONA_MICB1_EXT_CAP; | |
1278 | ||
1279 | if (arizona->pdata.micbias[i].discharge) | |
1280 | val |= ARIZONA_MICB1_DISCH; | |
1281 | ||
f773fc6d | 1282 | if (arizona->pdata.micbias[i].soft_start) |
3d91f828 MB |
1283 | val |= ARIZONA_MICB1_RATE; |
1284 | ||
544c7aad MB |
1285 | if (arizona->pdata.micbias[i].bypass) |
1286 | val |= ARIZONA_MICB1_BYPASS; | |
1287 | ||
3d91f828 MB |
1288 | regmap_update_bits(arizona->regmap, |
1289 | ARIZONA_MIC_BIAS_CTRL_1 + i, | |
1290 | ARIZONA_MICB1_LVL_MASK | | |
71d134b9 | 1291 | ARIZONA_MICB1_EXT_CAP | |
3d91f828 | 1292 | ARIZONA_MICB1_DISCH | |
544c7aad | 1293 | ARIZONA_MICB1_BYPASS | |
3d91f828 MB |
1294 | ARIZONA_MICB1_RATE, val); |
1295 | } | |
1296 | ||
3cc72986 MB |
1297 | for (i = 0; i < ARIZONA_MAX_INPUT; i++) { |
1298 | /* Default for both is 0 so noop with defaults */ | |
1299 | val = arizona->pdata.dmic_ref[i] | |
1300 | << ARIZONA_IN1_DMIC_SUP_SHIFT; | |
fc027d13 RF |
1301 | if (arizona->pdata.inmode[i] & ARIZONA_INMODE_DMIC) |
1302 | val |= 1 << ARIZONA_IN1_MODE_SHIFT; | |
6887b042 RF |
1303 | |
1304 | switch (arizona->type) { | |
1305 | case WM8998: | |
1306 | case WM1814: | |
1307 | regmap_update_bits(arizona->regmap, | |
1308 | ARIZONA_ADC_DIGITAL_VOLUME_1L + (i * 8), | |
1309 | ARIZONA_IN1L_SRC_SE_MASK, | |
1310 | (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE) | |
1311 | << ARIZONA_IN1L_SRC_SE_SHIFT); | |
1312 | ||
1313 | regmap_update_bits(arizona->regmap, | |
1314 | ARIZONA_ADC_DIGITAL_VOLUME_1R + (i * 8), | |
1315 | ARIZONA_IN1R_SRC_SE_MASK, | |
1316 | (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE) | |
1317 | << ARIZONA_IN1R_SRC_SE_SHIFT); | |
1318 | ||
1319 | mask = ARIZONA_IN1_DMIC_SUP_MASK | | |
1320 | ARIZONA_IN1_MODE_MASK; | |
1321 | break; | |
1322 | default: | |
1323 | if (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE) | |
1324 | val |= 1 << ARIZONA_IN1_SINGLE_ENDED_SHIFT; | |
1325 | ||
1326 | mask = ARIZONA_IN1_DMIC_SUP_MASK | | |
1327 | ARIZONA_IN1_MODE_MASK | | |
1328 | ARIZONA_IN1_SINGLE_ENDED_MASK; | |
1329 | break; | |
1330 | } | |
3cc72986 MB |
1331 | |
1332 | regmap_update_bits(arizona->regmap, | |
1333 | ARIZONA_IN1L_CONTROL + (i * 8), | |
6887b042 | 1334 | mask, val); |
3cc72986 MB |
1335 | } |
1336 | ||
1337 | for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) { | |
1338 | /* Default is 0 so noop with defaults */ | |
1339 | if (arizona->pdata.out_mono[i]) | |
1340 | val = ARIZONA_OUT1_MONO; | |
1341 | else | |
1342 | val = 0; | |
1343 | ||
1344 | regmap_update_bits(arizona->regmap, | |
1345 | ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8), | |
1346 | ARIZONA_OUT1_MONO, val); | |
1347 | } | |
1348 | ||
3cc72986 MB |
1349 | for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) { |
1350 | if (arizona->pdata.spk_mute[i]) | |
1351 | regmap_update_bits(arizona->regmap, | |
2a51da04 | 1352 | ARIZONA_PDM_SPK1_CTRL_1 + (i * 2), |
3cc72986 MB |
1353 | ARIZONA_SPK1_MUTE_ENDIAN_MASK | |
1354 | ARIZONA_SPK1_MUTE_SEQ1_MASK, | |
1355 | arizona->pdata.spk_mute[i]); | |
1356 | ||
1357 | if (arizona->pdata.spk_fmt[i]) | |
1358 | regmap_update_bits(arizona->regmap, | |
2a51da04 | 1359 | ARIZONA_PDM_SPK1_CTRL_2 + (i * 2), |
3cc72986 MB |
1360 | ARIZONA_SPK1_FMT_MASK, |
1361 | arizona->pdata.spk_fmt[i]); | |
1362 | } | |
1363 | ||
72e43164 CK |
1364 | pm_runtime_set_active(arizona->dev); |
1365 | pm_runtime_enable(arizona->dev); | |
1366 | ||
3cc72986 MB |
1367 | /* Set up for interrupts */ |
1368 | ret = arizona_irq_init(arizona); | |
1369 | if (ret != 0) | |
59db9691 | 1370 | goto err_reset; |
3cc72986 | 1371 | |
72e43164 CK |
1372 | pm_runtime_set_autosuspend_delay(arizona->dev, 100); |
1373 | pm_runtime_use_autosuspend(arizona->dev); | |
1374 | ||
3cc72986 MB |
1375 | arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error", |
1376 | arizona_clkgen_err, arizona); | |
1377 | arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked", | |
1378 | arizona_overclocked, arizona); | |
1379 | arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked", | |
1380 | arizona_underclocked, arizona); | |
1381 | ||
1382 | switch (arizona->type) { | |
1383 | case WM5102: | |
1384 | ret = mfd_add_devices(arizona->dev, -1, wm5102_devs, | |
0848c94f | 1385 | ARRAY_SIZE(wm5102_devs), NULL, 0, NULL); |
e102befe MB |
1386 | break; |
1387 | case WM5110: | |
e5d4ef0d | 1388 | case WM8280: |
e102befe | 1389 | ret = mfd_add_devices(arizona->dev, -1, wm5110_devs, |
78566afd | 1390 | ARRAY_SIZE(wm5110_devs), NULL, 0, NULL); |
3cc72986 | 1391 | break; |
dc7d4863 CK |
1392 | case WM8997: |
1393 | ret = mfd_add_devices(arizona->dev, -1, wm8997_devs, | |
1394 | ARRAY_SIZE(wm8997_devs), NULL, 0, NULL); | |
1395 | break; | |
6887b042 RF |
1396 | case WM8998: |
1397 | case WM1814: | |
1398 | ret = mfd_add_devices(arizona->dev, -1, wm8998_devs, | |
1399 | ARRAY_SIZE(wm8998_devs), NULL, 0, NULL); | |
1400 | break; | |
3cc72986 MB |
1401 | } |
1402 | ||
1403 | if (ret != 0) { | |
1404 | dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret); | |
1405 | goto err_irq; | |
1406 | } | |
1407 | ||
1408 | return 0; | |
1409 | ||
1410 | err_irq: | |
1411 | arizona_irq_exit(arizona); | |
3cc72986 | 1412 | err_reset: |
2229875d | 1413 | arizona_enable_reset(arizona); |
59db9691 | 1414 | regulator_disable(arizona->dcvdd); |
3cc72986 | 1415 | err_enable: |
3a36a0db | 1416 | regulator_bulk_disable(arizona->num_core_supplies, |
3cc72986 | 1417 | arizona->core_supplies); |
e6021511 CK |
1418 | err_dcvdd: |
1419 | regulator_put(arizona->dcvdd); | |
3cc72986 MB |
1420 | err_early: |
1421 | mfd_remove_devices(dev); | |
1422 | return ret; | |
1423 | } | |
1424 | EXPORT_SYMBOL_GPL(arizona_dev_init); | |
1425 | ||
4740f73f | 1426 | int arizona_dev_exit(struct arizona *arizona) |
3cc72986 | 1427 | { |
b804020a CK |
1428 | pm_runtime_disable(arizona->dev); |
1429 | ||
df6b3352 | 1430 | regulator_disable(arizona->dcvdd); |
e6021511 | 1431 | regulator_put(arizona->dcvdd); |
df6b3352 | 1432 | |
3cc72986 MB |
1433 | mfd_remove_devices(arizona->dev); |
1434 | arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona); | |
1435 | arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona); | |
1436 | arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona); | |
3cc72986 | 1437 | arizona_irq_exit(arizona); |
2229875d | 1438 | arizona_enable_reset(arizona); |
df6b3352 | 1439 | |
4420286e | 1440 | regulator_bulk_disable(arizona->num_core_supplies, |
1d017b6b | 1441 | arizona->core_supplies); |
3cc72986 MB |
1442 | return 0; |
1443 | } | |
1444 | EXPORT_SYMBOL_GPL(arizona_dev_exit); |