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mfd: arizona: Fix formating/style issues in arizona_apply_hardware_patch
[linux-block.git] / drivers / mfd / arizona-core.c
CommitLineData
3cc72986
MB		 1/*
2 * Arizona core driver
3 *
4 * Copyright 2012 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/delay.h>
59db9691 14#include <linux/err.h>
3cc72986
MB		 15#include <linux/gpio.h>
16#include <linux/interrupt.h>
17#include <linux/mfd/core.h>
18#include <linux/module.h>
d781009c
MB		 19#include <linux/of.h>
20#include <linux/of_device.h>
21#include <linux/of_gpio.h>
3cc72986
MB		 22#include <linux/pm_runtime.h>
23#include <linux/regmap.h>
24#include <linux/regulator/consumer.h>
5927467d 25#include <linux/regulator/machine.h>
3cc72986
MB		 26#include <linux/slab.h>
27
28#include <linux/mfd/arizona/core.h>
29#include <linux/mfd/arizona/registers.h>
30
31#include "arizona.h"
32
33static const char *wm5102_core_supplies[] = {
34 "AVDD",
35 "DBVDD1",
3cc72986
MB		 36};
37
38int arizona_clk32k_enable(struct arizona *arizona)
39{
40 int ret = 0;
41
42 mutex_lock(&arizona->clk_lock);
43
44 arizona->clk32k_ref++;
45
247fa192
MB		 46 if (arizona->clk32k_ref == 1) {
47 switch (arizona->pdata.clk32k_src) {
48 case ARIZONA_32KZ_MCLK1:
49 ret = pm_runtime_get_sync(arizona->dev);
50 if (ret != 0)
51 goto out;
52 break;
53 }
54
3cc72986
MB		 55 ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
56 ARIZONA_CLK_32K_ENA,
57 ARIZONA_CLK_32K_ENA);
247fa192 58 }
3cc72986 59
247fa192 60out:
3cc72986
MB		 61 if (ret != 0)
62 arizona->clk32k_ref--;
63
64 mutex_unlock(&arizona->clk_lock);
65
66 return ret;
67}
68EXPORT_SYMBOL_GPL(arizona_clk32k_enable);
69
70int arizona_clk32k_disable(struct arizona *arizona)
71{
72 int ret = 0;
73
74 mutex_lock(&arizona->clk_lock);
75
76 BUG_ON(arizona->clk32k_ref <= 0);
77
78 arizona->clk32k_ref--;
79
247fa192 80 if (arizona->clk32k_ref == 0) {
3cc72986
MB		 81 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
82 ARIZONA_CLK_32K_ENA, 0);
83
247fa192
MB		 84 switch (arizona->pdata.clk32k_src) {
85 case ARIZONA_32KZ_MCLK1:
86 pm_runtime_put_sync(arizona->dev);
87 break;
88 }
89 }
90
3cc72986
MB		 91 mutex_unlock(&arizona->clk_lock);
92
93 return ret;
94}
95EXPORT_SYMBOL_GPL(arizona_clk32k_disable);
96
97static irqreturn_t arizona_clkgen_err(int irq, void *data)
98{
99 struct arizona *arizona = data;
100
101 dev_err(arizona->dev, "CLKGEN error\n");
102
103 return IRQ_HANDLED;
104}
105
106static irqreturn_t arizona_underclocked(int irq, void *data)
107{
108 struct arizona *arizona = data;
109 unsigned int val;
110 int ret;
111
112 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8,
113 &val);
114 if (ret != 0) {
115 dev_err(arizona->dev, "Failed to read underclock status: %d\n",
116 ret);
117 return IRQ_NONE;
118 }
119
3cc72986
MB		 120 if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
121 dev_err(arizona->dev, "AIF3 underclocked\n");
122 if (val & ARIZONA_AIF2_UNDERCLOCKED_STS)
3ebef34d
CK		 123 dev_err(arizona->dev, "AIF2 underclocked\n");
124 if (val & ARIZONA_AIF1_UNDERCLOCKED_STS)
3cc72986 125 dev_err(arizona->dev, "AIF1 underclocked\n");
6e440d27
CK		 126 if (val & ARIZONA_ISRC3_UNDERCLOCKED_STS)
127 dev_err(arizona->dev, "ISRC3 underclocked\n");
3cc72986
MB		 128 if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS)
129 dev_err(arizona->dev, "ISRC2 underclocked\n");
130 if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS)
131 dev_err(arizona->dev, "ISRC1 underclocked\n");
132 if (val & ARIZONA_FX_UNDERCLOCKED_STS)
133 dev_err(arizona->dev, "FX underclocked\n");
134 if (val & ARIZONA_ASRC_UNDERCLOCKED_STS)
135 dev_err(arizona->dev, "ASRC underclocked\n");
136 if (val & ARIZONA_DAC_UNDERCLOCKED_STS)
137 dev_err(arizona->dev, "DAC underclocked\n");
138 if (val & ARIZONA_ADC_UNDERCLOCKED_STS)
139 dev_err(arizona->dev, "ADC underclocked\n");
140 if (val & ARIZONA_MIXER_UNDERCLOCKED_STS)
648a9880 141 dev_err(arizona->dev, "Mixer dropped sample\n");
3cc72986
MB		 142
143 return IRQ_HANDLED;
144}
145
146static irqreturn_t arizona_overclocked(int irq, void *data)
147{
148 struct arizona *arizona = data;
149 unsigned int val[2];
150 int ret;
151
152 ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
153 &val[0], 2);
154 if (ret != 0) {
155 dev_err(arizona->dev, "Failed to read overclock status: %d\n",
156 ret);
157 return IRQ_NONE;
158 }
159
160 if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
161 dev_err(arizona->dev, "PWM overclocked\n");
162 if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
163 dev_err(arizona->dev, "FX core overclocked\n");
164 if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS)
165 dev_err(arizona->dev, "DAC SYS overclocked\n");
166 if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS)
167 dev_err(arizona->dev, "DAC WARP overclocked\n");
168 if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS)
169 dev_err(arizona->dev, "ADC overclocked\n");
170 if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS)
171 dev_err(arizona->dev, "Mixer overclocked\n");
172 if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS)
173 dev_err(arizona->dev, "AIF3 overclocked\n");
174 if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS)
175 dev_err(arizona->dev, "AIF2 overclocked\n");
176 if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS)
177 dev_err(arizona->dev, "AIF1 overclocked\n");
178 if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS)
179 dev_err(arizona->dev, "Pad control overclocked\n");
180
181 if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS)
182 dev_err(arizona->dev, "Slimbus subsystem overclocked\n");
183 if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS)
184 dev_err(arizona->dev, "Slimbus async overclocked\n");
185 if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS)
186 dev_err(arizona->dev, "Slimbus sync overclocked\n");
187 if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS)
188 dev_err(arizona->dev, "ASRC async system overclocked\n");
189 if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS)
190 dev_err(arizona->dev, "ASRC async WARP overclocked\n");
191 if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS)
192 dev_err(arizona->dev, "ASRC sync system overclocked\n");
193 if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS)
194 dev_err(arizona->dev, "ASRC sync WARP overclocked\n");
195 if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS)
196 dev_err(arizona->dev, "DSP1 overclocked\n");
6e440d27
CK		 197 if (val[1] & ARIZONA_ISRC3_OVERCLOCKED_STS)
198 dev_err(arizona->dev, "ISRC3 overclocked\n");
3cc72986
MB		 199 if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS)
200 dev_err(arizona->dev, "ISRC2 overclocked\n");
201 if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
202 dev_err(arizona->dev, "ISRC1 overclocked\n");
203
204 return IRQ_HANDLED;
205}
206
9d53dfdc
CK		 207static int arizona_poll_reg(struct arizona *arizona,
208 int timeout, unsigned int reg,
209 unsigned int mask, unsigned int target)
3cc72986 210{
9d53dfdc 211 unsigned int val = 0;
3cc72986
MB		 212 int ret, i;
213
9d53dfdc
CK		 214 for (i = 0; i < timeout; i++) {
215 ret = regmap_read(arizona->regmap, reg, &val);
3cc72986 216 if (ret != 0) {
9d53dfdc
CK		 217 dev_err(arizona->dev, "Failed to read reg %u: %d\n",
218 reg, ret);
cfe775ce 219 continue;
3cc72986
MB		 220 }
221
9d53dfdc
CK		 222 if ((val & mask) == target)
223 return 0;
224
225 msleep(1);
3cc72986
MB		 226 }
227
9d53dfdc
CK		 228 dev_err(arizona->dev, "Polling reg %u timed out: %x\n", reg, val);
229 return -ETIMEDOUT;
230}
231
232static int arizona_wait_for_boot(struct arizona *arizona)
233{
234 int ret;
235
236 /*
237 * We can't use an interrupt as we need to runtime resume to do so,
238 * we won't race with the interrupt handler as it'll be blocked on
239 * runtime resume.
240 */
241 ret = arizona_poll_reg(arizona, 5, ARIZONA_INTERRUPT_RAW_STATUS_5,
242 ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS);
243
244 if (!ret)
3cc72986
MB		 245 regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5,
246 ARIZONA_BOOT_DONE_STS);
3cc72986
MB		 247
248 pm_runtime_mark_last_busy(arizona->dev);
249
9d53dfdc 250 return ret;
3cc72986
MB		 251}
252
2229875d
CK		 253static inline void arizona_enable_reset(struct arizona *arizona)
254{
255 if (arizona->pdata.reset)
256 gpio_set_value_cansleep(arizona->pdata.reset, 0);
257}
258
259static void arizona_disable_reset(struct arizona *arizona)
260{
261 if (arizona->pdata.reset) {
262 gpio_set_value_cansleep(arizona->pdata.reset, 1);
263 msleep(1);
264 }
265}
266
0be068a0 267static int wm5102_apply_hardware_patch(struct arizona *arizona)
e80436bb
CK		 268{
269 unsigned int fll, sysclk;
270 int ret, err;
271
e80436bb
CK		 272 /* Cache existing FLL and SYSCLK settings */
273 ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &fll);
0be068a0 274 if (ret) {
e80436bb
CK		 275 dev_err(arizona->dev, "Failed to cache FLL settings: %d\n",
276 ret);
277 return ret;
278 }
279 ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &sysclk);
0be068a0 280 if (ret) {
e80436bb
CK		 281 dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n",
282 ret);
283 return ret;
284 }
285
286 /* Start up SYSCLK using the FLL in free running mode */
287 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1,
288 ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN);
0be068a0 289 if (ret) {
e80436bb
CK		 290 dev_err(arizona->dev,
291 "Failed to start FLL in freerunning mode: %d\n",
292 ret);
293 return ret;
294 }
295 ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5,
296 ARIZONA_FLL1_CLOCK_OK_STS,
297 ARIZONA_FLL1_CLOCK_OK_STS);
0be068a0 298 if (ret) {
e80436bb
CK		 299 ret = -ETIMEDOUT;
300 goto err_fll;
301 }
302
303 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144);
0be068a0 304 if (ret) {
e80436bb
CK		 305 dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret);
306 goto err_fll;
307 }
308
309 /* Start the write sequencer and wait for it to finish */
310 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
0be068a0
CK		 311 ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160);
312 if (ret) {
e80436bb
CK		 313 dev_err(arizona->dev, "Failed to start write sequencer: %d\n",
314 ret);
315 goto err_sysclk;
316 }
317 ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1,
318 ARIZONA_WSEQ_BUSY, 0);
0be068a0 319 if (ret) {
e80436bb 320 regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
0be068a0 321 ARIZONA_WSEQ_ABORT);
e80436bb
CK		 322 ret = -ETIMEDOUT;
323 }
324
325err_sysclk:
326 err = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, sysclk);
0be068a0 327 if (err) {
e80436bb
CK		 328 dev_err(arizona->dev,
329 "Failed to re-apply old SYSCLK settings: %d\n",
330 err);
331 }
332
333err_fll:
334 err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, fll);
0be068a0 335 if (err) {
e80436bb
CK		 336 dev_err(arizona->dev,
337 "Failed to re-apply old FLL settings: %d\n",
338 err);
339 }
340
0be068a0 341 return ret ?: err;
e80436bb
CK		 342}
343
1c1c6bba
CK		 344static int wm5102_clear_write_sequencer(struct arizona *arizona)
345{
346 int ret;
347
348 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_3,
349 0x0);
350 if (ret) {
351 dev_err(arizona->dev,
352 "Failed to clear write sequencer state: %d\n", ret);
353 return ret;
354 }
355
356 arizona_enable_reset(arizona);
357 regulator_disable(arizona->dcvdd);
358
359 msleep(20);
360
361 ret = regulator_enable(arizona->dcvdd);
362 if (ret) {
363 dev_err(arizona->dev, "Failed to re-enable DCVDD: %d\n", ret);
364 return ret;
365 }
366 arizona_disable_reset(arizona);
367
368 return 0;
369}
370
48bb9fe4 371#ifdef CONFIG_PM
3cc72986
MB		 372static int arizona_runtime_resume(struct device *dev)
373{
374 struct arizona *arizona = dev_get_drvdata(dev);
375 int ret;
376
508c8299
MB		 377 dev_dbg(arizona->dev, "Leaving AoD mode\n");
378
59db9691
MB		 379 ret = regulator_enable(arizona->dcvdd);
380 if (ret != 0) {
381 dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret);
382 return ret;
383 }
3cc72986
MB		 384
385 regcache_cache_only(arizona->regmap, false);
386
4c9bb8bc
CK		 387 switch (arizona->type) {
388 case WM5102:
5927467d
MB		 389 if (arizona->external_dcvdd) {
390 ret = regmap_update_bits(arizona->regmap,
391 ARIZONA_ISOLATION_CONTROL,
392 ARIZONA_ISOLATE_DCVDD1, 0);
393 if (ret != 0) {
394 dev_err(arizona->dev,
395 "Failed to connect DCVDD: %d\n", ret);
396 goto err;
397 }
398 }
399
4c9bb8bc
CK		 400 ret = wm5102_patch(arizona);
401 if (ret != 0) {
402 dev_err(arizona->dev, "Failed to apply patch: %d\n",
403 ret);
404 goto err;
405 }
e80436bb 406
0be068a0
CK		 407 ret = wm5102_apply_hardware_patch(arizona);
408 if (ret) {
e80436bb
CK		 409 dev_err(arizona->dev,
410 "Failed to apply hardware patch: %d\n",
411 ret);
412 goto err;
413 }
414 break;
415 default:
12bb68ed
CK		 416 ret = arizona_wait_for_boot(arizona);
417 if (ret != 0) {
418 goto err;
419 }
420
5927467d
MB		 421 if (arizona->external_dcvdd) {
422 ret = regmap_update_bits(arizona->regmap,
423 ARIZONA_ISOLATION_CONTROL,
424 ARIZONA_ISOLATE_DCVDD1, 0);
425 if (ret != 0) {
426 dev_err(arizona->dev,
427 "Failed to connect DCVDD: %d\n", ret);
428 goto err;
429 }
430 }
e80436bb 431 break;
4c9bb8bc
CK		 432 }
433
9270bdf5
MB		 434 ret = regcache_sync(arizona->regmap);
435 if (ret != 0) {
436 dev_err(arizona->dev, "Failed to restore register cache\n");
4816bd1c 437 goto err;
9270bdf5 438 }
3cc72986
MB		 439
440 return 0;
4816bd1c
MB		 441
442err:
443 regcache_cache_only(arizona->regmap, true);
444 regulator_disable(arizona->dcvdd);
445 return ret;
3cc72986
MB		 446}
447
448static int arizona_runtime_suspend(struct device *dev)
449{
450 struct arizona *arizona = dev_get_drvdata(dev);
5927467d 451 int ret;
3cc72986 452
508c8299
MB		 453 dev_dbg(arizona->dev, "Entering AoD mode\n");
454
5927467d
MB		 455 if (arizona->external_dcvdd) {
456 ret = regmap_update_bits(arizona->regmap,
457 ARIZONA_ISOLATION_CONTROL,
458 ARIZONA_ISOLATE_DCVDD1,
459 ARIZONA_ISOLATE_DCVDD1);
460 if (ret != 0) {
461 dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n",
462 ret);
463 return ret;
464 }
465 }
466
59db9691
MB		 467 regcache_cache_only(arizona->regmap, true);
468 regcache_mark_dirty(arizona->regmap);
e293e847 469 regulator_disable(arizona->dcvdd);
3cc72986
MB		 470
471 return 0;
472}
473#endif
474
dc781d0e 475#ifdef CONFIG_PM_SLEEP
67c99296
MB		 476static int arizona_suspend(struct device *dev)
477{
478 struct arizona *arizona = dev_get_drvdata(dev);
479
480 dev_dbg(arizona->dev, "Suspend, disabling IRQ\n");
481 disable_irq(arizona->irq);
482
483 return 0;
484}
485
486static int arizona_suspend_late(struct device *dev)
487{
488 struct arizona *arizona = dev_get_drvdata(dev);
489
490 dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n");
491 enable_irq(arizona->irq);
492
493 return 0;
494}
495
dc781d0e
MB		 496static int arizona_resume_noirq(struct device *dev)
497{
498 struct arizona *arizona = dev_get_drvdata(dev);
499
500 dev_dbg(arizona->dev, "Early resume, disabling IRQ\n");
501 disable_irq(arizona->irq);
502
503 return 0;
504}
505
506static int arizona_resume(struct device *dev)
507{
508 struct arizona *arizona = dev_get_drvdata(dev);
509
510 dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n");
511 enable_irq(arizona->irq);
512
513 return 0;
514}
515#endif
516
3cc72986
MB		 517const struct dev_pm_ops arizona_pm_ops = {
518 SET_RUNTIME_PM_OPS(arizona_runtime_suspend,
519 arizona_runtime_resume,
520 NULL)
67c99296 521 SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume)
dc781d0e 522#ifdef CONFIG_PM_SLEEP
67c99296 523 .suspend_late = arizona_suspend_late,
dc781d0e
MB		 524 .resume_noirq = arizona_resume_noirq,
525#endif
3cc72986
MB		 526};
527EXPORT_SYMBOL_GPL(arizona_pm_ops);
528
d781009c 529#ifdef CONFIG_OF
942786e6 530unsigned long arizona_of_get_type(struct device *dev)
d781009c
MB		 531{
532 const struct of_device_id *id = of_match_device(arizona_of_match, dev);
533
534 if (id)
942786e6 535 return (unsigned long)id->data;
d781009c
MB		 536 else
537 return 0;
538}
539EXPORT_SYMBOL_GPL(arizona_of_get_type);
540
e4fcb1d6
CK		 541int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop,
542 bool mandatory)
543{
544 int gpio;
545
546 gpio = of_get_named_gpio(arizona->dev->of_node, prop, 0);
547 if (gpio < 0) {
548 if (mandatory)
549 dev_err(arizona->dev,
550 "Mandatory DT gpio %s missing/malformed: %d\n",
551 prop, gpio);
552
553 gpio = 0;
554 }
555
556 return gpio;
557}
558EXPORT_SYMBOL_GPL(arizona_of_get_named_gpio);
559
d781009c
MB		 560static int arizona_of_get_core_pdata(struct arizona *arizona)
561{
e4fcb1d6 562 struct arizona_pdata *pdata = &arizona->pdata;
cc47aed9
IS		 563 struct property *prop;
564 const __be32 *cur;
565 u32 val;
d781009c 566 int ret, i;
cc47aed9 567 int count = 0;
d781009c 568
e4fcb1d6 569 pdata->reset = arizona_of_get_named_gpio(arizona, "wlf,reset", true);
d781009c
MB		 570
571 ret = of_property_read_u32_array(arizona->dev->of_node,
572 "wlf,gpio-defaults",
573 arizona->pdata.gpio_defaults,
574 ARRAY_SIZE(arizona->pdata.gpio_defaults));
575 if (ret >= 0) {
576 /*
577 * All values are literal except out of range values
578 * which are chip default, translate into platform
579 * data which uses 0 as chip default and out of range
580 * as zero.
581 */
582 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
583 if (arizona->pdata.gpio_defaults[i] > 0xffff)
584 arizona->pdata.gpio_defaults[i] = 0;
91c73935 585 else if (arizona->pdata.gpio_defaults[i] == 0)
d781009c
MB		 586 arizona->pdata.gpio_defaults[i] = 0x10000;
587 }
588 } else {
589 dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n",
590 ret);
591 }
592
cc47aed9
IS		 593 of_property_for_each_u32(arizona->dev->of_node, "wlf,inmode", prop,
594 cur, val) {
595 if (count == ARRAY_SIZE(arizona->pdata.inmode))
596 break;
597
598 arizona->pdata.inmode[count] = val;
599 count++;
600 }
601
e7ad27ca
CK		 602 count = 0;
603 of_property_for_each_u32(arizona->dev->of_node, "wlf,dmic-ref", prop,
604 cur, val) {
605 if (count == ARRAY_SIZE(arizona->pdata.dmic_ref))
606 break;
607
608 arizona->pdata.dmic_ref[count] = val;
609 count++;
610 }
611
d781009c
MB		 612 return 0;
613}
614
615const struct of_device_id arizona_of_match[] = {
616 { .compatible = "wlf,wm5102", .data = (void *)WM5102 },
617 { .compatible = "wlf,wm5110", .data = (void *)WM5110 },
e5d4ef0d 618 { .compatible = "wlf,wm8280", .data = (void *)WM8280 },
dc7d4863 619 { .compatible = "wlf,wm8997", .data = (void *)WM8997 },
d781009c
MB		 620 {},
621};
622EXPORT_SYMBOL_GPL(arizona_of_match);
623#else
624static inline int arizona_of_get_core_pdata(struct arizona *arizona)
625{
626 return 0;
627}
628#endif
629
5ac98553 630static const struct mfd_cell early_devs[] = {
3cc72986
MB		 631 { .name = "arizona-ldo1" },
632};
633
32dadef2 634static const char *wm5102_supplies[] = {
5fc6c396 635 "MICVDD",
32dadef2
CK		 636 "DBVDD2",
637 "DBVDD3",
638 "CPVDD",
639 "SPKVDDL",
640 "SPKVDDR",
641};
642
5ac98553 643static const struct mfd_cell wm5102_devs[] = {
d7768111 644 { .name = "arizona-micsupp" },
5fc6c396
CK		 645 {
646 .name = "arizona-extcon",
647 .parent_supplies = wm5102_supplies,
648 .num_parent_supplies = 1, /* We only need MICVDD */
649 },
3cc72986 650 { .name = "arizona-gpio" },
503b1cac 651 { .name = "arizona-haptics" },
3cc72986 652 { .name = "arizona-pwm" },
32dadef2
CK		 653 {
654 .name = "wm5102-codec",
655 .parent_supplies = wm5102_supplies,
656 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
657 },
3cc72986
MB		 658};
659
5ac98553 660static const struct mfd_cell wm5110_devs[] = {
d7768111 661 { .name = "arizona-micsupp" },
5fc6c396
CK		 662 {
663 .name = "arizona-extcon",
664 .parent_supplies = wm5102_supplies,
665 .num_parent_supplies = 1, /* We only need MICVDD */
666 },
e102befe 667 { .name = "arizona-gpio" },
503b1cac 668 { .name = "arizona-haptics" },
e102befe 669 { .name = "arizona-pwm" },
32dadef2
CK		 670 {
671 .name = "wm5110-codec",
672 .parent_supplies = wm5102_supplies,
673 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
674 },
675};
676
677static const char *wm8997_supplies[] = {
996c2d4f 678 "MICVDD",
32dadef2
CK		 679 "DBVDD2",
680 "CPVDD",
681 "SPKVDD",
e102befe
MB		 682};
683
5ac98553 684static const struct mfd_cell wm8997_devs[] = {
dc7d4863 685 { .name = "arizona-micsupp" },
5fc6c396
CK		 686 {
687 .name = "arizona-extcon",
688 .parent_supplies = wm8997_supplies,
689 .num_parent_supplies = 1, /* We only need MICVDD */
690 },
dc7d4863
CK		 691 { .name = "arizona-gpio" },
692 { .name = "arizona-haptics" },
693 { .name = "arizona-pwm" },
32dadef2
CK		 694 {
695 .name = "wm8997-codec",
696 .parent_supplies = wm8997_supplies,
697 .num_parent_supplies = ARRAY_SIZE(wm8997_supplies),
698 },
dc7d4863
CK		 699};
700
f791be49 701int arizona_dev_init(struct arizona *arizona)
3cc72986
MB		 702{
703 struct device *dev = arizona->dev;
704 const char *type_name;
705 unsigned int reg, val;
62d62b59 706 int (*apply_patch)(struct arizona *) = NULL;
3cc72986
MB		 707 int ret, i;
708
709 dev_set_drvdata(arizona->dev, arizona);
710 mutex_init(&arizona->clk_lock);
711
712 if (dev_get_platdata(arizona->dev))
713 memcpy(&arizona->pdata, dev_get_platdata(arizona->dev),
714 sizeof(arizona->pdata));
22d7dc8a
LJ		 715 else
716 arizona_of_get_core_pdata(arizona);
3cc72986
MB		 717
718 regcache_cache_only(arizona->regmap, true);
719
720 switch (arizona->type) {
721 case WM5102:
e102befe 722 case WM5110:
e5d4ef0d 723 case WM8280:
dc7d4863 724 case WM8997:
3cc72986
MB		 725 for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
726 arizona->core_supplies[i].supply
727 = wm5102_core_supplies[i];
728 arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies);
729 break;
730 default:
731 dev_err(arizona->dev, "Unknown device type %d\n",
732 arizona->type);
733 return -EINVAL;
734 }
735
4a8c475f
CK		 736 /* Mark DCVDD as external, LDO1 driver will clear if internal */
737 arizona->external_dcvdd = true;
738
3cc72986 739 ret = mfd_add_devices(arizona->dev, -1, early_devs,
0848c94f 740 ARRAY_SIZE(early_devs), NULL, 0, NULL);
3cc72986
MB		 741 if (ret != 0) {
742 dev_err(dev, "Failed to add early children: %d\n", ret);
743 return ret;
744 }
745
746 ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies,
747 arizona->core_supplies);
748 if (ret != 0) {
749 dev_err(dev, "Failed to request core supplies: %d\n",
750 ret);
751 goto err_early;
752 }
753
0c2d0ffb
CK		 754 /**
755 * Don't use devres here because the only device we have to get
756 * against is the MFD device and DCVDD will likely be supplied by
757 * one of its children. Meaning that the regulator will be
758 * destroyed by the time devres calls regulator put.
759 */
e6021511 760 arizona->dcvdd = regulator_get(arizona->dev, "DCVDD");
59db9691
MB		 761 if (IS_ERR(arizona->dcvdd)) {
762 ret = PTR_ERR(arizona->dcvdd);
763 dev_err(dev, "Failed to request DCVDD: %d\n", ret);
764 goto err_early;
765 }
766
87d3af4a
MB		 767 if (arizona->pdata.reset) {
768 /* Start out with /RESET low to put the chip into reset */
5f056bf0
CK		 769 ret = devm_gpio_request_one(arizona->dev, arizona->pdata.reset,
770 GPIOF_DIR_OUT | GPIOF_INIT_LOW,
771 "arizona /RESET");
87d3af4a
MB		 772 if (ret != 0) {
773 dev_err(dev, "Failed to request /RESET: %d\n", ret);
e6021511 774 goto err_dcvdd;
87d3af4a
MB		 775 }
776 }
777
3cc72986
MB		 778 ret = regulator_bulk_enable(arizona->num_core_supplies,
779 arizona->core_supplies);
780 if (ret != 0) {
781 dev_err(dev, "Failed to enable core supplies: %d\n",
782 ret);
e6021511 783 goto err_dcvdd;
3cc72986
MB		 784 }
785
59db9691
MB		 786 ret = regulator_enable(arizona->dcvdd);
787 if (ret != 0) {
788 dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
789 goto err_enable;
790 }
791
2229875d 792 arizona_disable_reset(arizona);
3cc72986 793
3cc72986
MB		 794 regcache_cache_only(arizona->regmap, false);
795
ca76ceb8 796 /* Verify that this is a chip we know about */
3cc72986
MB		 797 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
798 if (ret != 0) {
799 dev_err(dev, "Failed to read ID register: %d\n", ret);
59db9691 800 goto err_reset;
3cc72986
MB		 801 }
802
3cc72986
MB		 803 switch (reg) {
804 case 0x5102:
e102befe 805 case 0x5110:
dc7d4863 806 case 0x8997:
e102befe 807 break;
3cc72986 808 default:
ca76ceb8 809 dev_err(arizona->dev, "Unknown device ID: %x\n", reg);
59db9691 810 goto err_reset;
3cc72986
MB		 811 }
812
3cc72986
MB		 813 /* If we have a /RESET GPIO we'll already be reset */
814 if (!arizona->pdata.reset) {
815 ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0);
816 if (ret != 0) {
817 dev_err(dev, "Failed to reset device: %d\n", ret);
59db9691 818 goto err_reset;
3cc72986 819 }
46b9d13a 820
c25feaa5 821 msleep(1);
3cc72986
MB		 822 }
823
ca76ceb8 824 /* Ensure device startup is complete */
d955cba8
CK		 825 switch (arizona->type) {
826 case WM5102:
48018943
MB		 827 ret = regmap_read(arizona->regmap,
828 ARIZONA_WRITE_SEQUENCER_CTRL_3, &val);
1c1c6bba 829 if (ret) {
d955cba8
CK		 830 dev_err(dev,
831 "Failed to check write sequencer state: %d\n",
832 ret);
1c1c6bba
CK		 833 } else if (val & 0x01) {
834 ret = wm5102_clear_write_sequencer(arizona);
835 if (ret)
836 return ret;
d955cba8
CK		 837 }
838 break;
1c1c6bba
CK		 839 default:
840 break;
841 }
842
843 ret = arizona_wait_for_boot(arizona);
844 if (ret) {
845 dev_err(arizona->dev, "Device failed initial boot: %d\n", ret);
846 goto err_reset;
af65a361 847 }
3cc72986 848
ca76ceb8
MB		 849 /* Read the device ID information & do device specific stuff */
850 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
851 if (ret != 0) {
852 dev_err(dev, "Failed to read ID register: %d\n", ret);
853 goto err_reset;
854 }
855
856 ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION,
857 &arizona->rev);
858 if (ret != 0) {
859 dev_err(dev, "Failed to read revision register: %d\n", ret);
860 goto err_reset;
861 }
862 arizona->rev &= ARIZONA_DEVICE_REVISION_MASK;
863
864 switch (reg) {
865#ifdef CONFIG_MFD_WM5102
866 case 0x5102:
867 type_name = "WM5102";
868 if (arizona->type != WM5102) {
869 dev_err(arizona->dev, "WM5102 registered as %d\n",
870 arizona->type);
871 arizona->type = WM5102;
872 }
873 apply_patch = wm5102_patch;
874 arizona->rev &= 0x7;
875 break;
876#endif
877#ifdef CONFIG_MFD_WM5110
878 case 0x5110:
e5d4ef0d
RF		 879 switch (arizona->type) {
880 case WM5110:
881 type_name = "WM5110";
882 break;
883 case WM8280:
884 type_name = "WM8280";
885 break;
886 default:
887 type_name = "WM5110";
ca76ceb8
MB		 888 dev_err(arizona->dev, "WM5110 registered as %d\n",
889 arizona->type);
890 arizona->type = WM5110;
e5d4ef0d 891 break;
ca76ceb8
MB		 892 }
893 apply_patch = wm5110_patch;
894 break;
dc7d4863
CK		 895#endif
896#ifdef CONFIG_MFD_WM8997
897 case 0x8997:
898 type_name = "WM8997";
899 if (arizona->type != WM8997) {
900 dev_err(arizona->dev, "WM8997 registered as %d\n",
901 arizona->type);
902 arizona->type = WM8997;
903 }
904 apply_patch = wm8997_patch;
905 break;
ca76ceb8
MB		 906#endif
907 default:
908 dev_err(arizona->dev, "Unknown device ID %x\n", reg);
909 goto err_reset;
910 }
911
912 dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A');
913
62d62b59
MB		 914 if (apply_patch) {
915 ret = apply_patch(arizona);
916 if (ret != 0) {
917 dev_err(arizona->dev, "Failed to apply patch: %d\n",
918 ret);
919 goto err_reset;
920 }
e80436bb
CK		 921
922 switch (arizona->type) {
923 case WM5102:
0be068a0
CK		 924 ret = wm5102_apply_hardware_patch(arizona);
925 if (ret) {
e80436bb
CK		 926 dev_err(arizona->dev,
927 "Failed to apply hardware patch: %d\n",
928 ret);
929 goto err_reset;
930 }
931 break;
932 default:
933 break;
934 }
62d62b59
MB		 935 }
936
3cc72986
MB		 937 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
938 if (!arizona->pdata.gpio_defaults[i])
939 continue;
940
941 regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i,
942 arizona->pdata.gpio_defaults[i]);
943 }
944
945 pm_runtime_set_autosuspend_delay(arizona->dev, 100);
946 pm_runtime_use_autosuspend(arizona->dev);
947 pm_runtime_enable(arizona->dev);
948
949 /* Chip default */
950 if (!arizona->pdata.clk32k_src)
951 arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2;
952
953 switch (arizona->pdata.clk32k_src) {
954 case ARIZONA_32KZ_MCLK1:
955 case ARIZONA_32KZ_MCLK2:
956 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
957 ARIZONA_CLK_32K_SRC_MASK,
958 arizona->pdata.clk32k_src - 1);
767c6dc0 959 arizona_clk32k_enable(arizona);
3cc72986
MB		 960 break;
961 case ARIZONA_32KZ_NONE:
962 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
963 ARIZONA_CLK_32K_SRC_MASK, 2);
964 break;
965 default:
966 dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n",
967 arizona->pdata.clk32k_src);
968 ret = -EINVAL;
59db9691 969 goto err_reset;
3cc72986
MB		 970 }
971
3d91f828 972 for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) {
544c7aad
MB		 973 if (!arizona->pdata.micbias[i].mV &&
974 !arizona->pdata.micbias[i].bypass)
3d91f828
MB		 975 continue;
976
544c7aad
MB		 977 /* Apply default for bypass mode */
978 if (!arizona->pdata.micbias[i].mV)
979 arizona->pdata.micbias[i].mV = 2800;
980
3d91f828 981 val = (arizona->pdata.micbias[i].mV - 1500) / 100;
544c7aad 982
3d91f828
MB		 983 val <<= ARIZONA_MICB1_LVL_SHIFT;
984
985 if (arizona->pdata.micbias[i].ext_cap)
986 val |= ARIZONA_MICB1_EXT_CAP;
987
988 if (arizona->pdata.micbias[i].discharge)
989 val |= ARIZONA_MICB1_DISCH;
990
f773fc6d 991 if (arizona->pdata.micbias[i].soft_start)
3d91f828
MB		 992 val |= ARIZONA_MICB1_RATE;
993
544c7aad
MB		 994 if (arizona->pdata.micbias[i].bypass)
995 val |= ARIZONA_MICB1_BYPASS;
996
3d91f828
MB		 997 regmap_update_bits(arizona->regmap,
998 ARIZONA_MIC_BIAS_CTRL_1 + i,
999 ARIZONA_MICB1_LVL_MASK |
71d134b9 1000 ARIZONA_MICB1_EXT_CAP |
3d91f828 1001 ARIZONA_MICB1_DISCH |
544c7aad 1002 ARIZONA_MICB1_BYPASS |
3d91f828
MB		 1003 ARIZONA_MICB1_RATE, val);
1004 }
1005
3cc72986
MB		 1006 for (i = 0; i < ARIZONA_MAX_INPUT; i++) {
1007 /* Default for both is 0 so noop with defaults */
1008 val = arizona->pdata.dmic_ref[i]
1009 << ARIZONA_IN1_DMIC_SUP_SHIFT;
1010 val |= arizona->pdata.inmode[i] << ARIZONA_IN1_MODE_SHIFT;
1011
1012 regmap_update_bits(arizona->regmap,
1013 ARIZONA_IN1L_CONTROL + (i * 8),
1014 ARIZONA_IN1_DMIC_SUP_MASK |
1015 ARIZONA_IN1_MODE_MASK, val);
1016 }
1017
1018 for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) {
1019 /* Default is 0 so noop with defaults */
1020 if (arizona->pdata.out_mono[i])
1021 val = ARIZONA_OUT1_MONO;
1022 else
1023 val = 0;
1024
1025 regmap_update_bits(arizona->regmap,
1026 ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8),
1027 ARIZONA_OUT1_MONO, val);
1028 }
1029
3cc72986
MB		 1030 for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) {
1031 if (arizona->pdata.spk_mute[i])
1032 regmap_update_bits(arizona->regmap,
2a51da04 1033 ARIZONA_PDM_SPK1_CTRL_1 + (i * 2),
3cc72986
MB		 1034 ARIZONA_SPK1_MUTE_ENDIAN_MASK |
1035 ARIZONA_SPK1_MUTE_SEQ1_MASK,
1036 arizona->pdata.spk_mute[i]);
1037
1038 if (arizona->pdata.spk_fmt[i])
1039 regmap_update_bits(arizona->regmap,
2a51da04 1040 ARIZONA_PDM_SPK1_CTRL_2 + (i * 2),
3cc72986
MB		 1041 ARIZONA_SPK1_FMT_MASK,
1042 arizona->pdata.spk_fmt[i]);
1043 }
1044
1045 /* Set up for interrupts */
1046 ret = arizona_irq_init(arizona);
1047 if (ret != 0)
59db9691 1048 goto err_reset;
3cc72986
MB		 1049
1050 arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error",
1051 arizona_clkgen_err, arizona);
1052 arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked",
1053 arizona_overclocked, arizona);
1054 arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked",
1055 arizona_underclocked, arizona);
1056
1057 switch (arizona->type) {
1058 case WM5102:
1059 ret = mfd_add_devices(arizona->dev, -1, wm5102_devs,
0848c94f 1060 ARRAY_SIZE(wm5102_devs), NULL, 0, NULL);
e102befe
MB		 1061 break;
1062 case WM5110:
e5d4ef0d 1063 case WM8280:
e102befe 1064 ret = mfd_add_devices(arizona->dev, -1, wm5110_devs,
78566afd 1065 ARRAY_SIZE(wm5110_devs), NULL, 0, NULL);
3cc72986 1066 break;
dc7d4863
CK		 1067 case WM8997:
1068 ret = mfd_add_devices(arizona->dev, -1, wm8997_devs,
1069 ARRAY_SIZE(wm8997_devs), NULL, 0, NULL);
1070 break;
3cc72986
MB		 1071 }
1072
1073 if (ret != 0) {
1074 dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret);
1075 goto err_irq;
1076 }
1077
48bb9fe4 1078#ifdef CONFIG_PM
59db9691
MB		 1079 regulator_disable(arizona->dcvdd);
1080#endif
1081
3cc72986
MB		 1082 return 0;
1083
1084err_irq:
1085 arizona_irq_exit(arizona);
3cc72986 1086err_reset:
2229875d 1087 arizona_enable_reset(arizona);
59db9691 1088 regulator_disable(arizona->dcvdd);
3cc72986 1089err_enable:
3a36a0db 1090 regulator_bulk_disable(arizona->num_core_supplies,
3cc72986 1091 arizona->core_supplies);
e6021511
CK		 1092err_dcvdd:
1093 regulator_put(arizona->dcvdd);
3cc72986
MB		 1094err_early:
1095 mfd_remove_devices(dev);
1096 return ret;
1097}
1098EXPORT_SYMBOL_GPL(arizona_dev_init);
1099
4740f73f 1100int arizona_dev_exit(struct arizona *arizona)
3cc72986 1101{
b804020a
CK		 1102 pm_runtime_disable(arizona->dev);
1103
df6b3352 1104 regulator_disable(arizona->dcvdd);
e6021511 1105 regulator_put(arizona->dcvdd);
df6b3352 1106
3cc72986
MB		 1107 mfd_remove_devices(arizona->dev);
1108 arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona);
1109 arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona);
1110 arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona);
3cc72986 1111 arizona_irq_exit(arizona);
2229875d 1112 arizona_enable_reset(arizona);
df6b3352 1113
4420286e 1114 regulator_bulk_disable(arizona->num_core_supplies,
1d017b6b 1115 arizona->core_supplies);
3cc72986
MB		 1116 return 0;
1117}
1118EXPORT_SYMBOL_GPL(arizona_dev_exit);
Linux 6.x block layer and io_uring tree(s)