[linux-2.6-block.git] / drivers / mfd / altera-sysmgr.c

// SPDX-License-Identifier: GPL-2.0
/*
 *  Copyright (C) 2018-2019, Intel Corporation.
 *  Copyright (C) 2012 Freescale Semiconductor, Inc.
 *  Copyright (C) 2012 Linaro Ltd.
 *
 *  Based on syscon driver.
 */

#include <linux/arm-smccc.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/mfd/altera-sysmgr.h>
#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_platform.h>
#include <linux/regmap.h>
#include <linux/slab.h>

/**
 * struct altr_sysmgr - Altera SOCFPGA System Manager
 * @regmap: the regmap used for System Manager accesses.
 * @base  : the base address for the System Manager
 */
struct altr_sysmgr {
	struct regmap   *regmap;
	resource_size_t *base;
};

static struct platform_driver altr_sysmgr_driver;

/**
 * s10_protected_reg_write
 * Write to a protected SMC register.
 * @base: Base address of System Manager
 * @reg:  Address offset of register
 * @val:  Value to write
 * Return: INTEL_SIP_SMC_STATUS_OK (0) on success
 *	   INTEL_SIP_SMC_REG_ERROR on error
 *	   INTEL_SIP_SMC_RETURN_UNKNOWN_FUNCTION if not supported
 */
static int s10_protected_reg_write(void *base,
				   unsigned int reg, unsigned int val)
{
	struct arm_smccc_res result;
	unsigned long sysmgr_base = (unsigned long)base;

	arm_smccc_smc(INTEL_SIP_SMC_REG_WRITE, sysmgr_base + reg,
		      val, 0, 0, 0, 0, 0, &result);

	return (int)result.a0;
}

/**
 * s10_protected_reg_read
 * Read the status of a protected SMC register
 * @base: Base address of System Manager.
 * @reg:  Address of register
 * @val:  Value read.
 * Return: INTEL_SIP_SMC_STATUS_OK (0) on success
 *	   INTEL_SIP_SMC_REG_ERROR on error
 *	   INTEL_SIP_SMC_RETURN_UNKNOWN_FUNCTION if not supported
 */
static int s10_protected_reg_read(void *base,
				  unsigned int reg, unsigned int *val)
{
	struct arm_smccc_res result;
	unsigned long sysmgr_base = (unsigned long)base;

	arm_smccc_smc(INTEL_SIP_SMC_REG_READ, sysmgr_base + reg,
		      0, 0, 0, 0, 0, 0, &result);

	*val = (unsigned int)result.a1;

	return (int)result.a0;
}

static struct regmap_config altr_sysmgr_regmap_cfg = {
	.name = "altr_sysmgr",
	.reg_bits = 32,
	.reg_stride = 4,
	.val_bits = 32,
	.fast_io = true,
	.use_single_read = true,
	.use_single_write = true,
};

/**
 * altr_sysmgr_regmap_lookup_by_phandle
 * Find the sysmgr previous configured in probe() and return regmap property.
 * Return: regmap if found or error if not found.
 */
struct regmap *altr_sysmgr_regmap_lookup_by_phandle(struct device_node *np,
						    const char *property)
{
	struct device *dev;
	struct altr_sysmgr *sysmgr;
	struct device_node *sysmgr_np;

	if (property)
		sysmgr_np = of_parse_phandle(np, property, 0);
	else
		sysmgr_np = np;

	if (!sysmgr_np)
		return ERR_PTR(-ENODEV);

	dev = driver_find_device_by_of_node(&altr_sysmgr_driver.driver,
					    (void *)sysmgr_np);
	of_node_put(sysmgr_np);
	if (!dev)
		return ERR_PTR(-EPROBE_DEFER);

	sysmgr = dev_get_drvdata(dev);

	return sysmgr->regmap;
}
EXPORT_SYMBOL_GPL(altr_sysmgr_regmap_lookup_by_phandle);

static int sysmgr_probe(struct platform_device *pdev)
{
	struct altr_sysmgr *sysmgr;
	struct regmap *regmap;
	struct resource *res;
	struct regmap_config sysmgr_config = altr_sysmgr_regmap_cfg;
	struct device *dev = &pdev->dev;
	struct device_node *np = dev->of_node;

	sysmgr = devm_kzalloc(dev, sizeof(*sysmgr), GFP_KERNEL);
	if (!sysmgr)
		return -ENOMEM;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!res)
		return -ENOENT;

	sysmgr_config.max_register = resource_size(res) -
				     sysmgr_config.reg_stride;
	if (of_device_is_compatible(np, "altr,sys-mgr-s10")) {
		/* Need physical address for SMCC call */
		sysmgr->base = (resource_size_t *)res->start;
		sysmgr_config.reg_read = s10_protected_reg_read;
		sysmgr_config.reg_write = s10_protected_reg_write;

		regmap = devm_regmap_init(dev, NULL, sysmgr->base,
					  &sysmgr_config);
	} else {
		sysmgr->base = devm_ioremap(dev, res->start,
					    resource_size(res));
		if (!sysmgr->base)
			return -ENOMEM;

		sysmgr_config.max_register = res->end - res->start - 3;
		regmap = devm_regmap_init_mmio(dev, sysmgr->base,
					       &sysmgr_config);
	}

	if (IS_ERR(regmap)) {
		pr_err("regmap init failed\n");
		return PTR_ERR(regmap);
	}

	sysmgr->regmap = regmap;

	platform_set_drvdata(pdev, sysmgr);

	return 0;
}

static const struct of_device_id altr_sysmgr_of_match[] = {
	{ .compatible = "altr,sys-mgr" },
	{ .compatible = "altr,sys-mgr-s10" },
	{},
};
MODULE_DEVICE_TABLE(of, altr_sysmgr_of_match);

static struct platform_driver altr_sysmgr_driver = {
	.probe =  sysmgr_probe,
	.driver = {
		.name = "altr,system_manager",
		.of_match_table = altr_sysmgr_of_match,
	},
};

static int __init altr_sysmgr_init(void)
{
	return platform_driver_register(&altr_sysmgr_driver);
}
core_initcall(altr_sysmgr_init);

static void __exit altr_sysmgr_exit(void)
{
	platform_driver_unregister(&altr_sysmgr_driver);
}
module_exit(altr_sysmgr_exit);

MODULE_AUTHOR("Thor Thayer <>");
MODULE_DESCRIPTION("SOCFPGA System Manager driver");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
f36e789a TT	1	// SPDX-License-Identifier: GPL-2.0
	2	/*
	3	* Copyright (C) 2018-2019, Intel Corporation.
	4	* Copyright (C) 2012 Freescale Semiconductor, Inc.
	5	* Copyright (C) 2012 Linaro Ltd.
	6	*
	7	* Based on syscon driver.
	8	*/
	9
	10	#include <linux/arm-smccc.h>
	11	#include <linux/err.h>
	12	#include <linux/io.h>
	13	#include <linux/mfd/altera-sysmgr.h>
	14	#include <linux/mfd/syscon.h>
	15	#include <linux/module.h>
	16	#include <linux/of.h>
	17	#include <linux/of_address.h>
	18	#include <linux/of_platform.h>
	19	#include <linux/regmap.h>
	20	#include <linux/slab.h>
	21
	22	/**
	23	* struct altr_sysmgr - Altera SOCFPGA System Manager
	24	* @regmap: the regmap used for System Manager accesses.
	25	* @base : the base address for the System Manager
	26	*/
	27	struct altr_sysmgr {
	28	struct regmap *regmap;
	29	resource_size_t *base;
	30	};
	31
	32	static struct platform_driver altr_sysmgr_driver;
	33
	34	/**
	35	* s10_protected_reg_write
	36	* Write to a protected SMC register.
	37	* @base: Base address of System Manager
	38	* @reg: Address offset of register
	39	* @val: Value to write
	40	* Return: INTEL_SIP_SMC_STATUS_OK (0) on success
	41	* INTEL_SIP_SMC_REG_ERROR on error
	42	* INTEL_SIP_SMC_RETURN_UNKNOWN_FUNCTION if not supported
	43	*/
	44	static int s10_protected_reg_write(void *base,
	45	unsigned int reg, unsigned int val)
	46	{
	47	struct arm_smccc_res result;
	48	unsigned long sysmgr_base = (unsigned long)base;
	49
	50	arm_smccc_smc(INTEL_SIP_SMC_REG_WRITE, sysmgr_base + reg,
	51	val, 0, 0, 0, 0, 0, &result);
	52
	53	return (int)result.a0;
	54	}
	55
	56	/**
	57	* s10_protected_reg_read
	58	* Read the status of a protected SMC register
	59	* @base: Base address of System Manager.
	60	* @reg: Address of register
	61	* @val: Value read.
	62	* Return: INTEL_SIP_SMC_STATUS_OK (0) on success
	63	* INTEL_SIP_SMC_REG_ERROR on error
	64	* INTEL_SIP_SMC_RETURN_UNKNOWN_FUNCTION if not supported
65	*/
66	static int s10_protected_reg_read(void *base,
67	unsigned int reg, unsigned int *val)
68	{
69	struct arm_smccc_res result;
70	unsigned long sysmgr_base = (unsigned long)base;
71
72	arm_smccc_smc(INTEL_SIP_SMC_REG_READ, sysmgr_base + reg,
73	0, 0, 0, 0, 0, 0, &result);
74
75	*val = (unsigned int)result.a1;
76
77	return (int)result.a0;
78	}
79
80	static struct regmap_config altr_sysmgr_regmap_cfg = {
81	.name = "altr_sysmgr",
82	.reg_bits = 32,
83	.reg_stride = 4,
84	.val_bits = 32,
85	.fast_io = true,
86	.use_single_read = true,
87	.use_single_write = true,
88	};
89
f36e789a TT	90	/**
	91	* altr_sysmgr_regmap_lookup_by_phandle
	92	* Find the sysmgr previous configured in probe() and return regmap property.
	93	* Return: regmap if found or error if not found.
	94	*/
	95	struct regmap altr_sysmgr_regmap_lookup_by_phandle(struct device_node np,
	96	const char *property)
	97	{
	98	struct device *dev;
	99	struct altr_sysmgr *sysmgr;
	100	struct device_node *sysmgr_np;
	101
	102	if (property)
	103	sysmgr_np = of_parse_phandle(np, property, 0);
	104	else
	105	sysmgr_np = np;
	106
	107	if (!sysmgr_np)
	108	return ERR_PTR(-ENODEV);
	109
cfba5de9 SP	110	dev = driver_find_device_by_of_node(&altr_sysmgr_driver.driver,
cfba5de9 SP	111	(void *)sysmgr_np);
f36e789a TT	112	of_node_put(sysmgr_np);
	113	if (!dev)
	114	return ERR_PTR(-EPROBE_DEFER);
	115
	116	sysmgr = dev_get_drvdata(dev);
	117
	118	return sysmgr->regmap;
	119	}
	120	EXPORT_SYMBOL_GPL(altr_sysmgr_regmap_lookup_by_phandle);
	121
	122	static int sysmgr_probe(struct platform_device *pdev)
	123	{
	124	struct altr_sysmgr *sysmgr;
	125	struct regmap *regmap;
	126	struct resource *res;
	127	struct regmap_config sysmgr_config = altr_sysmgr_regmap_cfg;
	128	struct device *dev = &pdev->dev;
	129	struct device_node *np = dev->of_node;
	130
	131	sysmgr = devm_kzalloc(dev, sizeof(*sysmgr), GFP_KERNEL);
	132	if (!sysmgr)
	133	return -ENOMEM;
	134
	135	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	136	if (!res)
	137	return -ENOENT;
	138
	139	sysmgr_config.max_register = resource_size(res) -
	140	sysmgr_config.reg_stride;
	141	if (of_device_is_compatible(np, "altr,sys-mgr-s10")) {
	142	/* Need physical address for SMCC call */
	143	sysmgr->base = (resource_size_t *)res->start;
	144	sysmgr_config.reg_read = s10_protected_reg_read;
	145	sysmgr_config.reg_write = s10_protected_reg_write;
	146
	147	regmap = devm_regmap_init(dev, NULL, sysmgr->base,
	148	&sysmgr_config);
	149	} else {
	150	sysmgr->base = devm_ioremap(dev, res->start,
	151	resource_size(res));
	152	if (!sysmgr->base)
	153	return -ENOMEM;
	154
	155	sysmgr_config.max_register = res->end - res->start - 3;
	156	regmap = devm_regmap_init_mmio(dev, sysmgr->base,
	157	&sysmgr_config);
	158	}
	159
	160	if (IS_ERR(regmap)) {
	161	pr_err("regmap init failed\n");
	162	return PTR_ERR(regmap);
	163	}
	164
	165	sysmgr->regmap = regmap;
	166
	167	platform_set_drvdata(pdev, sysmgr);
	168
	169	return 0;
	170	}
	171
	172	static const struct of_device_id altr_sysmgr_of_match[] = {
	173	{ .compatible = "altr,sys-mgr" },
	174	{ .compatible = "altr,sys-mgr-s10" },
	175	{},
176	};
177	MODULE_DEVICE_TABLE(of, altr_sysmgr_of_match);
178
179	static struct platform_driver altr_sysmgr_driver = {
180	.probe = sysmgr_probe,
181	.driver = {
182	.name = "altr,system_manager",
183	.of_match_table = altr_sysmgr_of_match,
184	},
185	};
186
187	static int __init altr_sysmgr_init(void)
188	{
189	return platform_driver_register(&altr_sysmgr_driver);
190	}
191	core_initcall(altr_sysmgr_init);
192
193	static void __exit altr_sysmgr_exit(void)
194	{
195	platform_driver_unregister(&altr_sysmgr_driver);
196	}
197	module_exit(altr_sysmgr_exit);
198
199	MODULE_AUTHOR("Thor Thayer <>");
200	MODULE_DESCRIPTION("SOCFPGA System Manager driver");
201	MODULE_LICENSE("GPL v2");