mfd: ab8500-gpadc: Reread on failure
[linux-2.6-block.git] / drivers / mfd / ab8500-gpadc.c
CommitLineData
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1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License v2
5 * Author: Arun R Murthy <arun.murthy@stericsson.com>
6321992c 6 * Author: Daniel Willerud <daniel.willerud@stericsson.com>
586f3318 7 * Author: Johan Palsson <johan.palsson@stericsson.com>
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AM
8 */
9#include <linux/init.h>
10#include <linux/module.h>
11#include <linux/device.h>
12#include <linux/interrupt.h>
13#include <linux/spinlock.h>
14#include <linux/delay.h>
5f8aaef4 15#include <linux/pm_runtime.h>
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AM
16#include <linux/platform_device.h>
17#include <linux/completion.h>
18#include <linux/regulator/consumer.h>
19#include <linux/err.h>
20#include <linux/slab.h>
6321992c 21#include <linux/list.h>
dae2db30 22#include <linux/mfd/abx500.h>
ee66e653
LW
23#include <linux/mfd/abx500/ab8500.h>
24#include <linux/mfd/abx500/ab8500-gpadc.h>
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25
26/*
27 * GPADC register offsets
28 * Bank : 0x0A
29 */
30#define AB8500_GPADC_CTRL1_REG 0x00
31#define AB8500_GPADC_CTRL2_REG 0x01
32#define AB8500_GPADC_CTRL3_REG 0x02
33#define AB8500_GPADC_AUTO_TIMER_REG 0x03
34#define AB8500_GPADC_STAT_REG 0x04
35#define AB8500_GPADC_MANDATAL_REG 0x05
36#define AB8500_GPADC_MANDATAH_REG 0x06
37#define AB8500_GPADC_AUTODATAL_REG 0x07
38#define AB8500_GPADC_AUTODATAH_REG 0x08
39#define AB8500_GPADC_MUX_CTRL_REG 0x09
40
586f3318
JP
41/*
42 * OTP register offsets
43 * Bank : 0x15
44 */
45#define AB8500_GPADC_CAL_1 0x0F
46#define AB8500_GPADC_CAL_2 0x10
47#define AB8500_GPADC_CAL_3 0x11
48#define AB8500_GPADC_CAL_4 0x12
49#define AB8500_GPADC_CAL_5 0x13
50#define AB8500_GPADC_CAL_6 0x14
51#define AB8500_GPADC_CAL_7 0x15
52
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53/* gpadc constants */
54#define EN_VINTCORE12 0x04
55#define EN_VTVOUT 0x02
56#define EN_GPADC 0x01
57#define DIS_GPADC 0x00
58#define SW_AVG_16 0x60
59#define ADC_SW_CONV 0x04
4aad5a91 60#define EN_ICHAR 0x80
ed139416 61#define BTEMP_PULL_UP 0x08
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62#define EN_BUF 0x40
63#define DIS_ZERO 0x00
64#define GPADC_BUSY 0x01
65
586f3318
JP
66/* GPADC constants from AB8500 spec, UM0836 */
67#define ADC_RESOLUTION 1024
68#define ADC_CH_BTEMP_MIN 0
69#define ADC_CH_BTEMP_MAX 1350
70#define ADC_CH_DIETEMP_MIN 0
71#define ADC_CH_DIETEMP_MAX 1350
72#define ADC_CH_CHG_V_MIN 0
73#define ADC_CH_CHG_V_MAX 20030
74#define ADC_CH_ACCDET2_MIN 0
75#define ADC_CH_ACCDET2_MAX 2500
76#define ADC_CH_VBAT_MIN 2300
77#define ADC_CH_VBAT_MAX 4800
78#define ADC_CH_CHG_I_MIN 0
79#define ADC_CH_CHG_I_MAX 1500
80#define ADC_CH_BKBAT_MIN 0
81#define ADC_CH_BKBAT_MAX 3200
82
83/* This is used to not lose precision when dividing to get gain and offset */
84#define CALIB_SCALE 1000
85
5f8aaef4
LJ
86/* Time in ms before disabling regulator */
87#define GPADC_AUDOSUSPEND_DELAY 1
88
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89#define CONVERSION_TIME 500 /* ms */
90
586f3318
JP
91enum cal_channels {
92 ADC_INPUT_VMAIN = 0,
93 ADC_INPUT_BTEMP,
94 ADC_INPUT_VBAT,
95 NBR_CAL_INPUTS,
96};
97
98/**
99 * struct adc_cal_data - Table for storing gain and offset for the calibrated
100 * ADC channels
101 * @gain: Gain of the ADC channel
102 * @offset: Offset of the ADC channel
103 */
104struct adc_cal_data {
105 u64 gain;
106 u64 offset;
107};
108
dae2db30 109/**
586f3318 110 * struct ab8500_gpadc - AB8500 GPADC device information
dae2db30 111 * @dev: pointer to the struct device
6321992c
DW
112 * @node: a list of AB8500 GPADCs, hence prepared for
113 reentrance
20bf4283 114 * @parent: pointer to the struct ab8500
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115 * @ab8500_gpadc_complete: pointer to the struct completion, to indicate
116 * the completion of gpadc conversion
117 * @ab8500_gpadc_lock: structure of type mutex
118 * @regu: pointer to the struct regulator
119 * @irq: interrupt number that is used by gpadc
586f3318 120 * @cal_data array of ADC calibration data structs
dae2db30 121 */
6321992c 122struct ab8500_gpadc {
dae2db30 123 struct device *dev;
6321992c 124 struct list_head node;
20bf4283 125 struct ab8500 *parent;
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126 struct completion ab8500_gpadc_complete;
127 struct mutex ab8500_gpadc_lock;
128 struct regulator *regu;
129 int irq;
586f3318 130 struct adc_cal_data cal_data[NBR_CAL_INPUTS];
6321992c
DW
131};
132
133static LIST_HEAD(ab8500_gpadc_list);
134
135/**
136 * ab8500_gpadc_get() - returns a reference to the primary AB8500 GPADC
137 * (i.e. the first GPADC in the instance list)
138 */
139struct ab8500_gpadc *ab8500_gpadc_get(char *name)
140{
141 struct ab8500_gpadc *gpadc;
142
143 list_for_each_entry(gpadc, &ab8500_gpadc_list, node) {
144 if (!strcmp(name, dev_name(gpadc->dev)))
145 return gpadc;
146 }
147
148 return ERR_PTR(-ENOENT);
149}
150EXPORT_SYMBOL(ab8500_gpadc_get);
dae2db30 151
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152/**
153 * ab8500_gpadc_ad_to_voltage() - Convert a raw ADC value to a voltage
154 */
155int ab8500_gpadc_ad_to_voltage(struct ab8500_gpadc *gpadc, u8 channel,
586f3318
JP
156 int ad_value)
157{
158 int res;
159
bd4a40b5 160 switch (channel) {
586f3318
JP
161 case MAIN_CHARGER_V:
162 /* For some reason we don't have calibrated data */
163 if (!gpadc->cal_data[ADC_INPUT_VMAIN].gain) {
164 res = ADC_CH_CHG_V_MIN + (ADC_CH_CHG_V_MAX -
165 ADC_CH_CHG_V_MIN) * ad_value /
166 ADC_RESOLUTION;
167 break;
168 }
169 /* Here we can use the calibrated data */
170 res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_VMAIN].gain +
171 gpadc->cal_data[ADC_INPUT_VMAIN].offset) / CALIB_SCALE;
172 break;
173
174 case BAT_CTRL:
175 case BTEMP_BALL:
176 case ACC_DETECT1:
177 case ADC_AUX1:
178 case ADC_AUX2:
179 /* For some reason we don't have calibrated data */
180 if (!gpadc->cal_data[ADC_INPUT_BTEMP].gain) {
181 res = ADC_CH_BTEMP_MIN + (ADC_CH_BTEMP_MAX -
182 ADC_CH_BTEMP_MIN) * ad_value /
183 ADC_RESOLUTION;
184 break;
185 }
186 /* Here we can use the calibrated data */
187 res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_BTEMP].gain +
188 gpadc->cal_data[ADC_INPUT_BTEMP].offset) / CALIB_SCALE;
189 break;
190
191 case MAIN_BAT_V:
192 /* For some reason we don't have calibrated data */
193 if (!gpadc->cal_data[ADC_INPUT_VBAT].gain) {
194 res = ADC_CH_VBAT_MIN + (ADC_CH_VBAT_MAX -
195 ADC_CH_VBAT_MIN) * ad_value /
196 ADC_RESOLUTION;
197 break;
198 }
199 /* Here we can use the calibrated data */
200 res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_VBAT].gain +
201 gpadc->cal_data[ADC_INPUT_VBAT].offset) / CALIB_SCALE;
202 break;
203
204 case DIE_TEMP:
205 res = ADC_CH_DIETEMP_MIN +
206 (ADC_CH_DIETEMP_MAX - ADC_CH_DIETEMP_MIN) * ad_value /
207 ADC_RESOLUTION;
208 break;
209
210 case ACC_DETECT2:
211 res = ADC_CH_ACCDET2_MIN +
212 (ADC_CH_ACCDET2_MAX - ADC_CH_ACCDET2_MIN) * ad_value /
213 ADC_RESOLUTION;
214 break;
215
216 case VBUS_V:
217 res = ADC_CH_CHG_V_MIN +
218 (ADC_CH_CHG_V_MAX - ADC_CH_CHG_V_MIN) * ad_value /
219 ADC_RESOLUTION;
220 break;
221
222 case MAIN_CHARGER_C:
223 case USB_CHARGER_C:
224 res = ADC_CH_CHG_I_MIN +
225 (ADC_CH_CHG_I_MAX - ADC_CH_CHG_I_MIN) * ad_value /
226 ADC_RESOLUTION;
227 break;
228
229 case BK_BAT_V:
230 res = ADC_CH_BKBAT_MIN +
231 (ADC_CH_BKBAT_MAX - ADC_CH_BKBAT_MIN) * ad_value /
232 ADC_RESOLUTION;
233 break;
234
235 default:
236 dev_err(gpadc->dev,
237 "unknown channel, not possible to convert\n");
238 res = -EINVAL;
239 break;
240
241 }
242 return res;
243}
bd4a40b5 244EXPORT_SYMBOL(ab8500_gpadc_ad_to_voltage);
586f3318 245
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246/**
247 * ab8500_gpadc_convert() - gpadc conversion
bd4a40b5 248 * @channel: analog channel to be converted to digital data
dae2db30
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249 *
250 * This function converts the selected analog i/p to digital
586f3318 251 * data.
dae2db30 252 */
bd4a40b5
KK
253int ab8500_gpadc_convert(struct ab8500_gpadc *gpadc, u8 channel)
254{
255 int ad_value;
256 int voltage;
257
258 ad_value = ab8500_gpadc_read_raw(gpadc, channel);
d89cc5aa
JA
259
260 /* On failure retry a second time */
261 if (ad_value < 0)
262 ad_value = ab8500_gpadc_read_raw(gpadc, channel);
263
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264 if (ad_value < 0) {
265 dev_err(gpadc->dev, "GPADC raw value failed ch: %d\n", channel);
266 return ad_value;
267 }
268
269 voltage = ab8500_gpadc_ad_to_voltage(gpadc, channel, ad_value);
270
271 if (voltage < 0)
272 dev_err(gpadc->dev, "GPADC to voltage conversion failed ch:"
273 " %d AD: 0x%x\n", channel, ad_value);
274
275 return voltage;
276}
277EXPORT_SYMBOL(ab8500_gpadc_convert);
278
279/**
280 * ab8500_gpadc_read_raw() - gpadc read
281 * @channel: analog channel to be read
282 *
283 * This function obtains the raw ADC value, this then needs
284 * to be converted by calling ab8500_gpadc_ad_to_voltage()
285 */
286int ab8500_gpadc_read_raw(struct ab8500_gpadc *gpadc, u8 channel)
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287{
288 int ret;
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289 int looplimit = 0;
290 u8 val, low_data, high_data;
291
6321992c 292 if (!gpadc)
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293 return -ENODEV;
294
6321992c 295 mutex_lock(&gpadc->ab8500_gpadc_lock);
5f8aaef4 296
dae2db30 297 /* Enable VTVout LDO this is required for GPADC */
5f8aaef4 298 pm_runtime_get_sync(gpadc->dev);
dae2db30
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299
300 /* Check if ADC is not busy, lock and proceed */
301 do {
6321992c
DW
302 ret = abx500_get_register_interruptible(gpadc->dev,
303 AB8500_GPADC, AB8500_GPADC_STAT_REG, &val);
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AM
304 if (ret < 0)
305 goto out;
306 if (!(val & GPADC_BUSY))
307 break;
308 msleep(10);
309 } while (++looplimit < 10);
310 if (looplimit >= 10 && (val & GPADC_BUSY)) {
6321992c 311 dev_err(gpadc->dev, "gpadc_conversion: GPADC busy");
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312 ret = -EINVAL;
313 goto out;
314 }
315
316 /* Enable GPADC */
6321992c
DW
317 ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
318 AB8500_GPADC, AB8500_GPADC_CTRL1_REG, EN_GPADC, EN_GPADC);
dae2db30 319 if (ret < 0) {
6321992c 320 dev_err(gpadc->dev, "gpadc_conversion: enable gpadc failed\n");
dae2db30
AM
321 goto out;
322 }
c9c9513f 323
bd4a40b5 324 /* Select the channel source and set average samples to 16 */
6321992c 325 ret = abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
bd4a40b5 326 AB8500_GPADC_CTRL2_REG, (channel | SW_AVG_16));
dae2db30 327 if (ret < 0) {
6321992c 328 dev_err(gpadc->dev,
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AM
329 "gpadc_conversion: set avg samples failed\n");
330 goto out;
331 }
c9c9513f 332
4aad5a91
KK
333 /*
334 * Enable ADC, buffering, select rising edge and enable ADC path
c9c9513f
KK
335 * charging current sense if it needed, ABB 3.0 needs some special
336 * treatment too.
4aad5a91 337 */
bd4a40b5 338 switch (channel) {
4aad5a91
KK
339 case MAIN_CHARGER_C:
340 case USB_CHARGER_C:
341 ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
342 AB8500_GPADC, AB8500_GPADC_CTRL1_REG,
343 EN_BUF | EN_ICHAR,
344 EN_BUF | EN_ICHAR);
345 break;
c9c9513f 346 case BTEMP_BALL:
20bf4283 347 if (!is_ab8500_2p0_or_earlier(gpadc->parent)) {
c9c9513f
KK
348 /* Turn on btemp pull-up on ABB 3.0 */
349 ret = abx500_mask_and_set_register_interruptible(
350 gpadc->dev,
351 AB8500_GPADC, AB8500_GPADC_CTRL1_REG,
ed139416
JP
352 EN_BUF | BTEMP_PULL_UP,
353 EN_BUF | BTEMP_PULL_UP);
c9c9513f
KK
354
355 /*
356 * Delay might be needed for ABB8500 cut 3.0, if not, remove
5a4432b9 357 * when hardware will be available
c9c9513f 358 */
d0b32fa1 359 usleep_range(1000, 1000);
c9c9513f
KK
360 break;
361 }
362 /* Intentional fallthrough */
4aad5a91
KK
363 default:
364 ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
365 AB8500_GPADC, AB8500_GPADC_CTRL1_REG, EN_BUF, EN_BUF);
366 break;
367 }
dae2db30 368 if (ret < 0) {
6321992c 369 dev_err(gpadc->dev,
dae2db30
AM
370 "gpadc_conversion: select falling edge failed\n");
371 goto out;
372 }
c9c9513f 373
6321992c
DW
374 ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
375 AB8500_GPADC, AB8500_GPADC_CTRL1_REG, ADC_SW_CONV, ADC_SW_CONV);
dae2db30 376 if (ret < 0) {
6321992c 377 dev_err(gpadc->dev,
dae2db30
AM
378 "gpadc_conversion: start s/w conversion failed\n");
379 goto out;
380 }
381 /* wait for completion of conversion */
f825ebe5
LJ
382 if (!wait_for_completion_timeout(&gpadc->ab8500_gpadc_complete,
383 msecs_to_jiffies(CONVERSION_TIME))) {
6321992c 384 dev_err(gpadc->dev,
25985edc 385 "timeout: didn't receive GPADC conversion interrupt\n");
dae2db30
AM
386 ret = -EINVAL;
387 goto out;
388 }
389
390 /* Read the converted RAW data */
6321992c 391 ret = abx500_get_register_interruptible(gpadc->dev, AB8500_GPADC,
dae2db30
AM
392 AB8500_GPADC_MANDATAL_REG, &low_data);
393 if (ret < 0) {
6321992c 394 dev_err(gpadc->dev, "gpadc_conversion: read low data failed\n");
dae2db30
AM
395 goto out;
396 }
397
6321992c 398 ret = abx500_get_register_interruptible(gpadc->dev, AB8500_GPADC,
dae2db30
AM
399 AB8500_GPADC_MANDATAH_REG, &high_data);
400 if (ret < 0) {
6321992c
DW
401 dev_err(gpadc->dev,
402 "gpadc_conversion: read high data failed\n");
dae2db30
AM
403 goto out;
404 }
405
dae2db30 406 /* Disable GPADC */
6321992c 407 ret = abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
dae2db30
AM
408 AB8500_GPADC_CTRL1_REG, DIS_GPADC);
409 if (ret < 0) {
6321992c 410 dev_err(gpadc->dev, "gpadc_conversion: disable gpadc failed\n");
dae2db30
AM
411 goto out;
412 }
5f8aaef4
LJ
413
414 pm_runtime_mark_last_busy(gpadc->dev);
415 pm_runtime_put_autosuspend(gpadc->dev);
416
6321992c 417 mutex_unlock(&gpadc->ab8500_gpadc_lock);
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KK
418
419 return (high_data << 8) | low_data;
dae2db30
AM
420
421out:
422 /*
423 * It has shown to be needed to turn off the GPADC if an error occurs,
424 * otherwise we might have problem when waiting for the busy bit in the
425 * GPADC status register to go low. In V1.1 there wait_for_completion
426 * seems to timeout when waiting for an interrupt.. Not seen in V2.0
427 */
6321992c 428 (void) abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
dae2db30 429 AB8500_GPADC_CTRL1_REG, DIS_GPADC);
5f8aaef4
LJ
430
431 pm_runtime_put(gpadc->dev);
432
6321992c
DW
433 mutex_unlock(&gpadc->ab8500_gpadc_lock);
434 dev_err(gpadc->dev,
bd4a40b5 435 "gpadc_conversion: Failed to AD convert channel %d\n", channel);
dae2db30
AM
436 return ret;
437}
bd4a40b5 438EXPORT_SYMBOL(ab8500_gpadc_read_raw);
dae2db30
AM
439
440/**
441 * ab8500_bm_gpswadcconvend_handler() - isr for s/w gpadc conversion completion
442 * @irq: irq number
443 * @data: pointer to the data passed during request irq
444 *
445 * This is a interrupt service routine for s/w gpadc conversion completion.
446 * Notifies the gpadc completion is completed and the converted raw value
447 * can be read from the registers.
448 * Returns IRQ status(IRQ_HANDLED)
449 */
6321992c 450static irqreturn_t ab8500_bm_gpswadcconvend_handler(int irq, void *_gpadc)
dae2db30 451{
6321992c 452 struct ab8500_gpadc *gpadc = _gpadc;
dae2db30
AM
453
454 complete(&gpadc->ab8500_gpadc_complete);
455
456 return IRQ_HANDLED;
457}
458
586f3318
JP
459static int otp_cal_regs[] = {
460 AB8500_GPADC_CAL_1,
461 AB8500_GPADC_CAL_2,
462 AB8500_GPADC_CAL_3,
463 AB8500_GPADC_CAL_4,
464 AB8500_GPADC_CAL_5,
465 AB8500_GPADC_CAL_6,
466 AB8500_GPADC_CAL_7,
467};
468
469static void ab8500_gpadc_read_calibration_data(struct ab8500_gpadc *gpadc)
470{
471 int i;
472 int ret[ARRAY_SIZE(otp_cal_regs)];
473 u8 gpadc_cal[ARRAY_SIZE(otp_cal_regs)];
474
475 int vmain_high, vmain_low;
476 int btemp_high, btemp_low;
477 int vbat_high, vbat_low;
478
479 /* First we read all OTP registers and store the error code */
480 for (i = 0; i < ARRAY_SIZE(otp_cal_regs); i++) {
481 ret[i] = abx500_get_register_interruptible(gpadc->dev,
482 AB8500_OTP_EMUL, otp_cal_regs[i], &gpadc_cal[i]);
483 if (ret[i] < 0)
484 dev_err(gpadc->dev, "%s: read otp reg 0x%02x failed\n",
485 __func__, otp_cal_regs[i]);
486 }
487
488 /*
489 * The ADC calibration data is stored in OTP registers.
490 * The layout of the calibration data is outlined below and a more
491 * detailed description can be found in UM0836
492 *
493 * vm_h/l = vmain_high/low
494 * bt_h/l = btemp_high/low
495 * vb_h/l = vbat_high/low
496 *
497 * Data bits:
498 * | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
499 * |.......|.......|.......|.......|.......|.......|.......|.......
500 * | | vm_h9 | vm_h8
501 * |.......|.......|.......|.......|.......|.......|.......|.......
502 * | | vm_h7 | vm_h6 | vm_h5 | vm_h4 | vm_h3 | vm_h2
503 * |.......|.......|.......|.......|.......|.......|.......|.......
504 * | vm_h1 | vm_h0 | vm_l4 | vm_l3 | vm_l2 | vm_l1 | vm_l0 | bt_h9
505 * |.......|.......|.......|.......|.......|.......|.......|.......
506 * | bt_h8 | bt_h7 | bt_h6 | bt_h5 | bt_h4 | bt_h3 | bt_h2 | bt_h1
507 * |.......|.......|.......|.......|.......|.......|.......|.......
508 * | bt_h0 | bt_l4 | bt_l3 | bt_l2 | bt_l1 | bt_l0 | vb_h9 | vb_h8
509 * |.......|.......|.......|.......|.......|.......|.......|.......
510 * | vb_h7 | vb_h6 | vb_h5 | vb_h4 | vb_h3 | vb_h2 | vb_h1 | vb_h0
511 * |.......|.......|.......|.......|.......|.......|.......|.......
512 * | vb_l5 | vb_l4 | vb_l3 | vb_l2 | vb_l1 | vb_l0 |
513 * |.......|.......|.......|.......|.......|.......|.......|.......
514 *
515 *
516 * Ideal output ADC codes corresponding to injected input voltages
517 * during manufacturing is:
518 *
519 * vmain_high: Vin = 19500mV / ADC ideal code = 997
520 * vmain_low: Vin = 315mV / ADC ideal code = 16
521 * btemp_high: Vin = 1300mV / ADC ideal code = 985
522 * btemp_low: Vin = 21mV / ADC ideal code = 16
523 * vbat_high: Vin = 4700mV / ADC ideal code = 982
524 * vbat_low: Vin = 2380mV / ADC ideal code = 33
525 */
526
527 /* Calculate gain and offset for VMAIN if all reads succeeded */
528 if (!(ret[0] < 0 || ret[1] < 0 || ret[2] < 0)) {
529 vmain_high = (((gpadc_cal[0] & 0x03) << 8) |
530 ((gpadc_cal[1] & 0x3F) << 2) |
531 ((gpadc_cal[2] & 0xC0) >> 6));
532
533 vmain_low = ((gpadc_cal[2] & 0x3E) >> 1);
534
535 gpadc->cal_data[ADC_INPUT_VMAIN].gain = CALIB_SCALE *
536 (19500 - 315) / (vmain_high - vmain_low);
537
538 gpadc->cal_data[ADC_INPUT_VMAIN].offset = CALIB_SCALE * 19500 -
539 (CALIB_SCALE * (19500 - 315) /
540 (vmain_high - vmain_low)) * vmain_high;
541 } else {
542 gpadc->cal_data[ADC_INPUT_VMAIN].gain = 0;
543 }
544
545 /* Calculate gain and offset for BTEMP if all reads succeeded */
546 if (!(ret[2] < 0 || ret[3] < 0 || ret[4] < 0)) {
547 btemp_high = (((gpadc_cal[2] & 0x01) << 9) |
548 (gpadc_cal[3] << 1) |
549 ((gpadc_cal[4] & 0x80) >> 7));
550
551 btemp_low = ((gpadc_cal[4] & 0x7C) >> 2);
552
553 gpadc->cal_data[ADC_INPUT_BTEMP].gain =
554 CALIB_SCALE * (1300 - 21) / (btemp_high - btemp_low);
555
556 gpadc->cal_data[ADC_INPUT_BTEMP].offset = CALIB_SCALE * 1300 -
557 (CALIB_SCALE * (1300 - 21) /
558 (btemp_high - btemp_low)) * btemp_high;
559 } else {
560 gpadc->cal_data[ADC_INPUT_BTEMP].gain = 0;
561 }
562
563 /* Calculate gain and offset for VBAT if all reads succeeded */
564 if (!(ret[4] < 0 || ret[5] < 0 || ret[6] < 0)) {
565 vbat_high = (((gpadc_cal[4] & 0x03) << 8) | gpadc_cal[5]);
566 vbat_low = ((gpadc_cal[6] & 0xFC) >> 2);
567
568 gpadc->cal_data[ADC_INPUT_VBAT].gain = CALIB_SCALE *
569 (4700 - 2380) / (vbat_high - vbat_low);
570
571 gpadc->cal_data[ADC_INPUT_VBAT].offset = CALIB_SCALE * 4700 -
572 (CALIB_SCALE * (4700 - 2380) /
573 (vbat_high - vbat_low)) * vbat_high;
574 } else {
575 gpadc->cal_data[ADC_INPUT_VBAT].gain = 0;
576 }
577
578 dev_dbg(gpadc->dev, "VMAIN gain %llu offset %llu\n",
579 gpadc->cal_data[ADC_INPUT_VMAIN].gain,
580 gpadc->cal_data[ADC_INPUT_VMAIN].offset);
581
582 dev_dbg(gpadc->dev, "BTEMP gain %llu offset %llu\n",
583 gpadc->cal_data[ADC_INPUT_BTEMP].gain,
584 gpadc->cal_data[ADC_INPUT_BTEMP].offset);
585
586 dev_dbg(gpadc->dev, "VBAT gain %llu offset %llu\n",
587 gpadc->cal_data[ADC_INPUT_VBAT].gain,
588 gpadc->cal_data[ADC_INPUT_VBAT].offset);
589}
590
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LJ
591static int ab8500_gpadc_runtime_suspend(struct device *dev)
592{
593 struct ab8500_gpadc *gpadc = dev_get_drvdata(dev);
594
595 regulator_disable(gpadc->regu);
596 return 0;
597}
598
599static int ab8500_gpadc_runtime_resume(struct device *dev)
600{
601 struct ab8500_gpadc *gpadc = dev_get_drvdata(dev);
602
603 regulator_enable(gpadc->regu);
604 return 0;
605}
606
607static int ab8500_gpadc_runtime_idle(struct device *dev)
608{
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LJ
609 pm_runtime_suspend(dev);
610 return 0;
611}
612
774c50ab
DW
613static int ab8500_gpadc_suspend(struct device *dev)
614{
615 struct ab8500_gpadc *gpadc = dev_get_drvdata(dev);
616
617 mutex_lock(&gpadc->ab8500_gpadc_lock);
618
619 pm_runtime_get_sync(dev);
620
621 regulator_disable(gpadc->regu);
622 return 0;
623}
624
625static int ab8500_gpadc_resume(struct device *dev)
626{
627 struct ab8500_gpadc *gpadc = dev_get_drvdata(dev);
628
629 regulator_enable(gpadc->regu);
630
631 pm_runtime_mark_last_busy(gpadc->dev);
632 pm_runtime_put_autosuspend(gpadc->dev);
633
634 mutex_unlock(&gpadc->ab8500_gpadc_lock);
635 return 0;
636}
637
f791be49 638static int ab8500_gpadc_probe(struct platform_device *pdev)
dae2db30
AM
639{
640 int ret = 0;
641 struct ab8500_gpadc *gpadc;
642
643 gpadc = kzalloc(sizeof(struct ab8500_gpadc), GFP_KERNEL);
644 if (!gpadc) {
645 dev_err(&pdev->dev, "Error: No memory\n");
646 return -ENOMEM;
647 }
648
dae2db30
AM
649 gpadc->irq = platform_get_irq_byname(pdev, "SW_CONV_END");
650 if (gpadc->irq < 0) {
6dff11e5 651 dev_err(&pdev->dev, "failed to get platform irq-%d\n",
6321992c 652 gpadc->irq);
dae2db30
AM
653 ret = gpadc->irq;
654 goto fail;
655 }
656
657 gpadc->dev = &pdev->dev;
20bf4283 658 gpadc->parent = dev_get_drvdata(pdev->dev.parent);
6321992c 659 mutex_init(&gpadc->ab8500_gpadc_lock);
dae2db30
AM
660
661 /* Initialize completion used to notify completion of conversion */
662 init_completion(&gpadc->ab8500_gpadc_complete);
663
664 /* Register interrupt - SwAdcComplete */
665 ret = request_threaded_irq(gpadc->irq, NULL,
666 ab8500_bm_gpswadcconvend_handler,
6e19e837
LJ
667 IRQF_ONESHOT | IRQF_NO_SUSPEND | IRQF_SHARED,
668 "ab8500-gpadc", gpadc);
dae2db30
AM
669 if (ret < 0) {
670 dev_err(gpadc->dev, "Failed to register interrupt, irq: %d\n",
671 gpadc->irq);
672 goto fail;
673 }
674
675 /* VTVout LDO used to power up ab8500-GPADC */
676 gpadc->regu = regulator_get(&pdev->dev, "vddadc");
677 if (IS_ERR(gpadc->regu)) {
678 ret = PTR_ERR(gpadc->regu);
679 dev_err(gpadc->dev, "failed to get vtvout LDO\n");
633e0fa5 680 goto fail_irq;
dae2db30 681 }
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LJ
682
683 platform_set_drvdata(pdev, gpadc);
684
685 regulator_enable(gpadc->regu);
686
687 pm_runtime_set_autosuspend_delay(gpadc->dev, GPADC_AUDOSUSPEND_DELAY);
688 pm_runtime_use_autosuspend(gpadc->dev);
689 pm_runtime_set_active(gpadc->dev);
690 pm_runtime_enable(gpadc->dev);
691
586f3318 692 ab8500_gpadc_read_calibration_data(gpadc);
6321992c 693 list_add_tail(&gpadc->node, &ab8500_gpadc_list);
dae2db30
AM
694 dev_dbg(gpadc->dev, "probe success\n");
695 return 0;
633e0fa5
DW
696fail_irq:
697 free_irq(gpadc->irq, gpadc);
dae2db30
AM
698fail:
699 kfree(gpadc);
700 gpadc = NULL;
701 return ret;
702}
703
4740f73f 704static int ab8500_gpadc_remove(struct platform_device *pdev)
dae2db30
AM
705{
706 struct ab8500_gpadc *gpadc = platform_get_drvdata(pdev);
707
6321992c
DW
708 /* remove this gpadc entry from the list */
709 list_del(&gpadc->node);
dae2db30 710 /* remove interrupt - completion of Sw ADC conversion */
6321992c 711 free_irq(gpadc->irq, gpadc);
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LJ
712
713 pm_runtime_get_sync(gpadc->dev);
714 pm_runtime_disable(gpadc->dev);
715
716 regulator_disable(gpadc->regu);
717
718 pm_runtime_set_suspended(gpadc->dev);
719
720 pm_runtime_put_noidle(gpadc->dev);
721
dae2db30
AM
722 kfree(gpadc);
723 gpadc = NULL;
724 return 0;
725}
726
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LJ
727static const struct dev_pm_ops ab8500_gpadc_pm_ops = {
728 SET_RUNTIME_PM_OPS(ab8500_gpadc_runtime_suspend,
729 ab8500_gpadc_runtime_resume,
730 ab8500_gpadc_runtime_idle)
774c50ab
DW
731 SET_SYSTEM_SLEEP_PM_OPS(ab8500_gpadc_suspend,
732 ab8500_gpadc_resume)
733
5f8aaef4
LJ
734};
735
dae2db30
AM
736static struct platform_driver ab8500_gpadc_driver = {
737 .probe = ab8500_gpadc_probe,
84449216 738 .remove = ab8500_gpadc_remove,
dae2db30
AM
739 .driver = {
740 .name = "ab8500-gpadc",
741 .owner = THIS_MODULE,
5f8aaef4 742 .pm = &ab8500_gpadc_pm_ops,
dae2db30
AM
743 },
744};
745
746static int __init ab8500_gpadc_init(void)
747{
748 return platform_driver_register(&ab8500_gpadc_driver);
749}
750
751static void __exit ab8500_gpadc_exit(void)
752{
753 platform_driver_unregister(&ab8500_gpadc_driver);
754}
755
756subsys_initcall_sync(ab8500_gpadc_init);
757module_exit(ab8500_gpadc_exit);
758
759MODULE_LICENSE("GPL v2");
586f3318 760MODULE_AUTHOR("Arun R Murthy, Daniel Willerud, Johan Palsson");
dae2db30
AM
761MODULE_ALIAS("platform:ab8500_gpadc");
762MODULE_DESCRIPTION("AB8500 GPADC driver");