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mfd: ab8500-debug: Function to save all ABB registers to mem
[linux-2.6-block.git] / drivers / mfd / ab8500-gpadc.c
CommitLineData
dae2db30
AM		 1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License v2
5 * Author: Arun R Murthy <arun.murthy@stericsson.com>
6321992c 6 * Author: Daniel Willerud <daniel.willerud@stericsson.com>
586f3318 7 * Author: Johan Palsson <johan.palsson@stericsson.com>
dae2db30
AM		 8 */
9#include <linux/init.h>
10#include <linux/module.h>
11#include <linux/device.h>
12#include <linux/interrupt.h>
13#include <linux/spinlock.h>
14#include <linux/delay.h>
5f8aaef4 15#include <linux/pm_runtime.h>
dae2db30
AM		 16#include <linux/platform_device.h>
17#include <linux/completion.h>
18#include <linux/regulator/consumer.h>
19#include <linux/err.h>
20#include <linux/slab.h>
6321992c 21#include <linux/list.h>
dae2db30 22#include <linux/mfd/abx500.h>
ee66e653
LW		 23#include <linux/mfd/abx500/ab8500.h>
24#include <linux/mfd/abx500/ab8500-gpadc.h>
dae2db30
AM		 25
26/*
27 * GPADC register offsets
28 * Bank : 0x0A
29 */
30#define AB8500_GPADC_CTRL1_REG 0x00
31#define AB8500_GPADC_CTRL2_REG 0x01
32#define AB8500_GPADC_CTRL3_REG 0x02
33#define AB8500_GPADC_AUTO_TIMER_REG 0x03
34#define AB8500_GPADC_STAT_REG 0x04
35#define AB8500_GPADC_MANDATAL_REG 0x05
36#define AB8500_GPADC_MANDATAH_REG 0x06
37#define AB8500_GPADC_AUTODATAL_REG 0x07
38#define AB8500_GPADC_AUTODATAH_REG 0x08
39#define AB8500_GPADC_MUX_CTRL_REG 0x09
40
586f3318
JP		 41/*
42 * OTP register offsets
43 * Bank : 0x15
44 */
45#define AB8500_GPADC_CAL_1 0x0F
46#define AB8500_GPADC_CAL_2 0x10
47#define AB8500_GPADC_CAL_3 0x11
48#define AB8500_GPADC_CAL_4 0x12
49#define AB8500_GPADC_CAL_5 0x13
50#define AB8500_GPADC_CAL_6 0x14
51#define AB8500_GPADC_CAL_7 0x15
52
dae2db30
AM		 53/* gpadc constants */
54#define EN_VINTCORE12 0x04
55#define EN_VTVOUT 0x02
56#define EN_GPADC 0x01
57#define DIS_GPADC 0x00
73482346
LJ		 58#define AVG_1 0x00
59#define AVG_4 0x20
60#define AVG_8 0x40
61#define AVG_16 0x60
dae2db30 62#define ADC_SW_CONV 0x04
4aad5a91 63#define EN_ICHAR 0x80
ed139416 64#define BTEMP_PULL_UP 0x08
dae2db30
AM		 65#define EN_BUF 0x40
66#define DIS_ZERO 0x00
67#define GPADC_BUSY 0x01
73482346
LJ		 68#define EN_FALLING 0x10
69#define EN_TRIG_EDGE 0x02
dae2db30 70
586f3318
JP		 71/* GPADC constants from AB8500 spec, UM0836 */
72#define ADC_RESOLUTION 1024
73#define ADC_CH_BTEMP_MIN 0
74#define ADC_CH_BTEMP_MAX 1350
75#define ADC_CH_DIETEMP_MIN 0
76#define ADC_CH_DIETEMP_MAX 1350
77#define ADC_CH_CHG_V_MIN 0
78#define ADC_CH_CHG_V_MAX 20030
79#define ADC_CH_ACCDET2_MIN 0
80#define ADC_CH_ACCDET2_MAX 2500
81#define ADC_CH_VBAT_MIN 2300
82#define ADC_CH_VBAT_MAX 4800
83#define ADC_CH_CHG_I_MIN 0
84#define ADC_CH_CHG_I_MAX 1500
85#define ADC_CH_BKBAT_MIN 0
86#define ADC_CH_BKBAT_MAX 3200
87
88/* This is used to not lose precision when dividing to get gain and offset */
89#define CALIB_SCALE 1000
90
5f8aaef4
LJ		 91/* Time in ms before disabling regulator */
92#define GPADC_AUDOSUSPEND_DELAY 1
93
f825ebe5
LJ		 94#define CONVERSION_TIME 500 /* ms */
95
586f3318
JP		 96enum cal_channels {
97 ADC_INPUT_VMAIN = 0,
98 ADC_INPUT_BTEMP,
99 ADC_INPUT_VBAT,
100 NBR_CAL_INPUTS,
101};
102
103/**
104 * struct adc_cal_data - Table for storing gain and offset for the calibrated
105 * ADC channels
106 * @gain: Gain of the ADC channel
107 * @offset: Offset of the ADC channel
108 */
109struct adc_cal_data {
110 u64 gain;
111 u64 offset;
112};
113
dae2db30 114/**
586f3318 115 * struct ab8500_gpadc - AB8500 GPADC device information
dae2db30 116 * @dev: pointer to the struct device
6321992c
DW		 117 * @node: a list of AB8500 GPADCs, hence prepared for
118 reentrance
20bf4283 119 * @parent: pointer to the struct ab8500
dae2db30
AM		 120 * @ab8500_gpadc_complete: pointer to the struct completion, to indicate
121 * the completion of gpadc conversion
122 * @ab8500_gpadc_lock: structure of type mutex
123 * @regu: pointer to the struct regulator
73482346
LJ		 124 * @irq_sw: interrupt number that is used by gpadc for Sw
125 * conversion
126 * @irq_hw: interrupt number that is used by gpadc for Hw
127 * conversion
586f3318 128 * @cal_data array of ADC calibration data structs
dae2db30 129 */
6321992c 130struct ab8500_gpadc {
dae2db30 131 struct device *dev;
6321992c 132 struct list_head node;
20bf4283 133 struct ab8500 *parent;
dae2db30
AM		 134 struct completion ab8500_gpadc_complete;
135 struct mutex ab8500_gpadc_lock;
136 struct regulator *regu;
73482346
LJ		 137 int irq_sw;
138 int irq_hw;
586f3318 139 struct adc_cal_data cal_data[NBR_CAL_INPUTS];
6321992c
DW		 140};
141
142static LIST_HEAD(ab8500_gpadc_list);
143
144/**
145 * ab8500_gpadc_get() - returns a reference to the primary AB8500 GPADC
146 * (i.e. the first GPADC in the instance list)
147 */
148struct ab8500_gpadc *ab8500_gpadc_get(char *name)
149{
150 struct ab8500_gpadc *gpadc;
151
152 list_for_each_entry(gpadc, &ab8500_gpadc_list, node) {
153 if (!strcmp(name, dev_name(gpadc->dev)))
154 return gpadc;
155 }
156
157 return ERR_PTR(-ENOENT);
158}
159EXPORT_SYMBOL(ab8500_gpadc_get);
dae2db30 160
bd4a40b5
KK		 161/**
162 * ab8500_gpadc_ad_to_voltage() - Convert a raw ADC value to a voltage
163 */
164int ab8500_gpadc_ad_to_voltage(struct ab8500_gpadc *gpadc, u8 channel,
586f3318
JP		 165 int ad_value)
166{
167 int res;
168
bd4a40b5 169 switch (channel) {
586f3318
JP		 170 case MAIN_CHARGER_V:
171 /* For some reason we don't have calibrated data */
172 if (!gpadc->cal_data[ADC_INPUT_VMAIN].gain) {
173 res = ADC_CH_CHG_V_MIN + (ADC_CH_CHG_V_MAX -
174 ADC_CH_CHG_V_MIN) * ad_value /
175 ADC_RESOLUTION;
176 break;
177 }
178 /* Here we can use the calibrated data */
179 res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_VMAIN].gain +
180 gpadc->cal_data[ADC_INPUT_VMAIN].offset) / CALIB_SCALE;
181 break;
182
183 case BAT_CTRL:
184 case BTEMP_BALL:
185 case ACC_DETECT1:
186 case ADC_AUX1:
187 case ADC_AUX2:
188 /* For some reason we don't have calibrated data */
189 if (!gpadc->cal_data[ADC_INPUT_BTEMP].gain) {
190 res = ADC_CH_BTEMP_MIN + (ADC_CH_BTEMP_MAX -
191 ADC_CH_BTEMP_MIN) * ad_value /
192 ADC_RESOLUTION;
193 break;
194 }
195 /* Here we can use the calibrated data */
196 res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_BTEMP].gain +
197 gpadc->cal_data[ADC_INPUT_BTEMP].offset) / CALIB_SCALE;
198 break;
199
200 case MAIN_BAT_V:
201 /* For some reason we don't have calibrated data */
202 if (!gpadc->cal_data[ADC_INPUT_VBAT].gain) {
203 res = ADC_CH_VBAT_MIN + (ADC_CH_VBAT_MAX -
204 ADC_CH_VBAT_MIN) * ad_value /
205 ADC_RESOLUTION;
206 break;
207 }
208 /* Here we can use the calibrated data */
209 res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_VBAT].gain +
210 gpadc->cal_data[ADC_INPUT_VBAT].offset) / CALIB_SCALE;
211 break;
212
213 case DIE_TEMP:
214 res = ADC_CH_DIETEMP_MIN +
215 (ADC_CH_DIETEMP_MAX - ADC_CH_DIETEMP_MIN) * ad_value /
216 ADC_RESOLUTION;
217 break;
218
219 case ACC_DETECT2:
220 res = ADC_CH_ACCDET2_MIN +
221 (ADC_CH_ACCDET2_MAX - ADC_CH_ACCDET2_MIN) * ad_value /
222 ADC_RESOLUTION;
223 break;
224
225 case VBUS_V:
226 res = ADC_CH_CHG_V_MIN +
227 (ADC_CH_CHG_V_MAX - ADC_CH_CHG_V_MIN) * ad_value /
228 ADC_RESOLUTION;
229 break;
230
231 case MAIN_CHARGER_C:
232 case USB_CHARGER_C:
233 res = ADC_CH_CHG_I_MIN +
234 (ADC_CH_CHG_I_MAX - ADC_CH_CHG_I_MIN) * ad_value /
235 ADC_RESOLUTION;
236 break;
237
238 case BK_BAT_V:
239 res = ADC_CH_BKBAT_MIN +
240 (ADC_CH_BKBAT_MAX - ADC_CH_BKBAT_MIN) * ad_value /
241 ADC_RESOLUTION;
242 break;
243
244 default:
245 dev_err(gpadc->dev,
246 "unknown channel, not possible to convert\n");
247 res = -EINVAL;
248 break;
249
250 }
251 return res;
252}
bd4a40b5 253EXPORT_SYMBOL(ab8500_gpadc_ad_to_voltage);
586f3318 254
dae2db30 255/**
73482346 256 * ab8500_gpadc_sw_hw_convert() - gpadc conversion
bd4a40b5 257 * @channel: analog channel to be converted to digital data
73482346
LJ		 258 * @avg_sample: number of ADC sample to average
259 * @trig_egde: selected ADC trig edge
260 * @trig_timer: selected ADC trigger delay timer
261 * @conv_type: selected conversion type (HW or SW conversion)
dae2db30
AM		 262 *
263 * This function converts the selected analog i/p to digital
586f3318 264 * data.
dae2db30 265 */
73482346
LJ		 266int ab8500_gpadc_sw_hw_convert(struct ab8500_gpadc *gpadc, u8 channel,
267 u8 avg_sample, u8 trig_edge, u8 trig_timer, u8 conv_type)
bd4a40b5
KK		 268{
269 int ad_value;
270 int voltage;
271
73482346
LJ		 272 ad_value = ab8500_gpadc_read_raw(gpadc, channel, avg_sample,
273 trig_edge, trig_timer, conv_type);
274/* On failure retry a second time */
d89cc5aa 275 if (ad_value < 0)
73482346
LJ		 276 ad_value = ab8500_gpadc_read_raw(gpadc, channel, avg_sample,
277 trig_edge, trig_timer, conv_type);
278if (ad_value < 0) {
279 dev_err(gpadc->dev, "GPADC raw value failed ch: %d\n",
280 channel);
bd4a40b5
KK		 281 return ad_value;
282 }
283
284 voltage = ab8500_gpadc_ad_to_voltage(gpadc, channel, ad_value);
bd4a40b5
KK		 285 if (voltage < 0)
286 dev_err(gpadc->dev, "GPADC to voltage conversion failed ch:"
287 " %d AD: 0x%x\n", channel, ad_value);
288
289 return voltage;
290}
291EXPORT_SYMBOL(ab8500_gpadc_convert);
292
293/**
294 * ab8500_gpadc_read_raw() - gpadc read
295 * @channel: analog channel to be read
73482346
LJ		 296 * @avg_sample: number of ADC sample to average
297 * @trig_edge: selected trig edge
298 * @trig_timer: selected ADC trigger delay timer
299 * @conv_type: selected conversion type (HW or SW conversion)
bd4a40b5 300 *
73482346
LJ		 301 * This function obtains the raw ADC value for an hardware conversion,
302 * this then needs to be converted by calling ab8500_gpadc_ad_to_voltage()
bd4a40b5 303 */
73482346
LJ		 304int ab8500_gpadc_read_raw(struct ab8500_gpadc *gpadc, u8 channel,
305 u8 avg_sample, u8 trig_edge, u8 trig_timer, u8 conv_type)
dae2db30
AM		 306{
307 int ret;
dae2db30
AM		 308 int looplimit = 0;
309 u8 val, low_data, high_data;
310
6321992c 311 if (!gpadc)
dae2db30
AM		 312 return -ENODEV;
313
6321992c 314 mutex_lock(&gpadc->ab8500_gpadc_lock);
dae2db30 315 /* Enable VTVout LDO this is required for GPADC */
5f8aaef4 316 pm_runtime_get_sync(gpadc->dev);
dae2db30
AM		 317
318 /* Check if ADC is not busy, lock and proceed */
319 do {
6321992c
DW		 320 ret = abx500_get_register_interruptible(gpadc->dev,
321 AB8500_GPADC, AB8500_GPADC_STAT_REG, &val);
dae2db30
AM		 322 if (ret < 0)
323 goto out;
324 if (!(val & GPADC_BUSY))
325 break;
326 msleep(10);
327 } while (++looplimit < 10);
328 if (looplimit >= 10 && (val & GPADC_BUSY)) {
6321992c 329 dev_err(gpadc->dev, "gpadc_conversion: GPADC busy");
dae2db30
AM		 330 ret = -EINVAL;
331 goto out;
332 }
333
334 /* Enable GPADC */
6321992c
DW		 335 ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
336 AB8500_GPADC, AB8500_GPADC_CTRL1_REG, EN_GPADC, EN_GPADC);
dae2db30 337 if (ret < 0) {
6321992c 338 dev_err(gpadc->dev, "gpadc_conversion: enable gpadc failed\n");
dae2db30
AM		 339 goto out;
340 }
c9c9513f 341
73482346
LJ		 342 /* Select the channel source and set average samples */
343 switch (avg_sample) {
344 case SAMPLE_1:
345 val = channel | AVG_1;
346 break;
347 case SAMPLE_4:
348 val = channel | AVG_4;
349 break;
350 case SAMPLE_8:
351 val = channel | AVG_8;
352 break;
353 default:
354 val = channel | AVG_16;
355 break;
356
357 }
358
359 if (conv_type == ADC_HW)
360 ret = abx500_set_register_interruptible(gpadc->dev,
361 AB8500_GPADC, AB8500_GPADC_CTRL3_REG, val);
362 else
363 ret = abx500_set_register_interruptible(gpadc->dev,
364 AB8500_GPADC, AB8500_GPADC_CTRL2_REG, val);
dae2db30 365 if (ret < 0) {
6321992c 366 dev_err(gpadc->dev,
dae2db30
AM		 367 "gpadc_conversion: set avg samples failed\n");
368 goto out;
369 }
c9c9513f 370
4aad5a91
KK		 371 /*
372 * Enable ADC, buffering, select rising edge and enable ADC path
c9c9513f
KK		 373 * charging current sense if it needed, ABB 3.0 needs some special
374 * treatment too.
4aad5a91 375 */
73482346
LJ		 376 if ((conv_type == ADC_HW) && (trig_edge)) {
377 ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
378 AB8500_GPADC, AB8500_GPADC_CTRL1_REG,
379 EN_FALLING, EN_FALLING);
380
381 }
bd4a40b5 382 switch (channel) {
4aad5a91
KK		 383 case MAIN_CHARGER_C:
384 case USB_CHARGER_C:
73482346 385 if (conv_type == ADC_HW)
c9c9513f
KK		 386 ret = abx500_mask_and_set_register_interruptible(
387 gpadc->dev,
388 AB8500_GPADC, AB8500_GPADC_CTRL1_REG,
73482346
LJ		 389 EN_BUF | EN_ICHAR | EN_TRIG_EDGE,
390 EN_BUF | EN_ICHAR | EN_TRIG_EDGE);
391 else
392 ret = abx500_mask_and_set_register_interruptible(
393 gpadc->dev,
394 AB8500_GPADC, AB8500_GPADC_CTRL1_REG,
395 EN_BUF | EN_ICHAR,
396 EN_BUF | EN_ICHAR);
397 break;
398 case BTEMP_BALL:
399 if (!is_ab8500_2p0_or_earlier(gpadc->parent)) {
400 if (conv_type == ADC_HW)
401 /* Turn on btemp pull-up on ABB 3.0 */
402 ret = abx500_mask_and_set_register_interruptible
403 (gpadc->dev,
404 AB8500_GPADC, AB8500_GPADC_CTRL1_REG,
405 EN_BUF | BTEMP_PULL_UP | EN_TRIG_EDGE,
406 EN_BUF | BTEMP_PULL_UP | EN_TRIG_EDGE);
407 else
408 ret = abx500_mask_and_set_register_interruptible
409 (gpadc->dev,
410 AB8500_GPADC, AB8500_GPADC_CTRL1_REG,
411 EN_BUF | BTEMP_PULL_UP,
412 EN_BUF | BTEMP_PULL_UP);
c9c9513f
KK		 413
414 /*
415 * Delay might be needed for ABB8500 cut 3.0, if not, remove
5a4432b9 416 * when hardware will be available
c9c9513f 417 */
d0b32fa1 418 usleep_range(1000, 1000);
c9c9513f
KK		 419 break;
420 }
421 /* Intentional fallthrough */
4aad5a91 422 default:
73482346
LJ		 423 if (conv_type == ADC_HW)
424 ret = abx500_mask_and_set_register_interruptible(
425 gpadc->dev,
426 AB8500_GPADC, AB8500_GPADC_CTRL1_REG,
427 EN_BUF | EN_TRIG_EDGE,
428 EN_BUF | EN_TRIG_EDGE);
429 else
430 ret = abx500_mask_and_set_register_interruptible(
431 gpadc->dev,
432 AB8500_GPADC,
433 AB8500_GPADC_CTRL1_REG, EN_BUF, EN_BUF);
4aad5a91
KK		 434 break;
435 }
dae2db30 436 if (ret < 0) {
6321992c 437 dev_err(gpadc->dev,
dae2db30
AM		 438 "gpadc_conversion: select falling edge failed\n");
439 goto out;
440 }
c9c9513f 441
73482346
LJ		 442 /* Set trigger delay timer */
443 if (conv_type == ADC_HW) {
444 ret = abx500_set_register_interruptible(gpadc->dev,
445 AB8500_GPADC, AB8500_GPADC_AUTO_TIMER_REG, trig_timer);
446 if (ret < 0) {
447 dev_err(gpadc->dev,
448 "gpadc_conversion: trig timer failed\n");
449 goto out;
450 }
451 }
452
453 /* Start SW conversion */
454 if (conv_type == ADC_SW) {
455 ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
456 AB8500_GPADC, AB8500_GPADC_CTRL1_REG,
457 ADC_SW_CONV, ADC_SW_CONV);
458 if (ret < 0) {
459 dev_err(gpadc->dev,
460 "gpadc_conversion: start s/w conv failed\n");
461 goto out;
462 }
dae2db30 463 }
73482346 464
dae2db30 465 /* wait for completion of conversion */
73482346
LJ		 466 if (conv_type == ADC_HW) {
467 if (!wait_for_completion_timeout(&gpadc->ab8500_gpadc_complete,
468 2*HZ)) {
469 dev_err(gpadc->dev,
470 "timeout didn't receive"
471 " hw GPADC conv interrupt\n");
472 ret = -EINVAL;
473 goto out;
474 }
475 } else {
476 if (!wait_for_completion_timeout(&gpadc->ab8500_gpadc_complete,
477 msecs_to_jiffies(CONVERSION_TIME))) {
478 dev_err(gpadc->dev,
479 "timeout didn't receive"
480 " sw GPADC conv interrupt\n");
481 ret = -EINVAL;
482 goto out;
483 }
dae2db30
AM		 484 }
485
486 /* Read the converted RAW data */
73482346
LJ		 487 if (conv_type == ADC_HW) {
488 ret = abx500_get_register_interruptible(gpadc->dev,
489 AB8500_GPADC, AB8500_GPADC_AUTODATAL_REG, &low_data);
490 if (ret < 0) {
491 dev_err(gpadc->dev,
492 "gpadc_conversion: read hw low data failed\n");
493 goto out;
494 }
dae2db30 495
73482346
LJ		 496 ret = abx500_get_register_interruptible(gpadc->dev,
497 AB8500_GPADC, AB8500_GPADC_AUTODATAH_REG, &high_data);
498 if (ret < 0) {
499 dev_err(gpadc->dev,
500 "gpadc_conversion: read hw high data failed\n");
501 goto out;
502 }
503 } else {
504 ret = abx500_get_register_interruptible(gpadc->dev,
505 AB8500_GPADC, AB8500_GPADC_MANDATAL_REG, &low_data);
506 if (ret < 0) {
507 dev_err(gpadc->dev,
508 "gpadc_conversion: read sw low data failed\n");
509 goto out;
510 }
511
512 ret = abx500_get_register_interruptible(gpadc->dev,
513 AB8500_GPADC, AB8500_GPADC_MANDATAH_REG, &high_data);
514 if (ret < 0) {
515 dev_err(gpadc->dev,
516 "gpadc_conversion: read sw high data failed\n");
517 goto out;
518 }
dae2db30
AM		 519 }
520
dae2db30 521 /* Disable GPADC */
6321992c 522 ret = abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
dae2db30
AM		 523 AB8500_GPADC_CTRL1_REG, DIS_GPADC);
524 if (ret < 0) {
6321992c 525 dev_err(gpadc->dev, "gpadc_conversion: disable gpadc failed\n");
dae2db30
AM		 526 goto out;
527 }
5f8aaef4 528
73482346 529 /* Disable VTVout LDO this is required for GPADC */
5f8aaef4
LJ		 530 pm_runtime_mark_last_busy(gpadc->dev);
531 pm_runtime_put_autosuspend(gpadc->dev);
532
6321992c 533 mutex_unlock(&gpadc->ab8500_gpadc_lock);
bd4a40b5
KK		 534
535 return (high_data << 8) | low_data;
dae2db30
AM		 536
537out:
538 /*
539 * It has shown to be needed to turn off the GPADC if an error occurs,
540 * otherwise we might have problem when waiting for the busy bit in the
541 * GPADC status register to go low. In V1.1 there wait_for_completion
542 * seems to timeout when waiting for an interrupt.. Not seen in V2.0
543 */
6321992c 544 (void) abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
dae2db30 545 AB8500_GPADC_CTRL1_REG, DIS_GPADC);
5f8aaef4 546 pm_runtime_put(gpadc->dev);
6321992c
DW		 547 mutex_unlock(&gpadc->ab8500_gpadc_lock);
548 dev_err(gpadc->dev,
bd4a40b5 549 "gpadc_conversion: Failed to AD convert channel %d\n", channel);
dae2db30
AM		 550 return ret;
551}
bd4a40b5 552EXPORT_SYMBOL(ab8500_gpadc_read_raw);
dae2db30
AM		 553
554/**
73482346 555 * ab8500_bm_gpadcconvend_handler() - isr for gpadc conversion completion
dae2db30
AM		 556 * @irq: irq number
557 * @data: pointer to the data passed during request irq
558 *
73482346 559 * This is a interrupt service routine for gpadc conversion completion.
dae2db30
AM		 560 * Notifies the gpadc completion is completed and the converted raw value
561 * can be read from the registers.
562 * Returns IRQ status(IRQ_HANDLED)
563 */
73482346 564static irqreturn_t ab8500_bm_gpadcconvend_handler(int irq, void *_gpadc)
dae2db30 565{
6321992c 566 struct ab8500_gpadc *gpadc = _gpadc;
dae2db30
AM		 567
568 complete(&gpadc->ab8500_gpadc_complete);
569
570 return IRQ_HANDLED;
571}
572
586f3318
JP		 573static int otp_cal_regs[] = {
574 AB8500_GPADC_CAL_1,
575 AB8500_GPADC_CAL_2,
576 AB8500_GPADC_CAL_3,
577 AB8500_GPADC_CAL_4,
578 AB8500_GPADC_CAL_5,
579 AB8500_GPADC_CAL_6,
580 AB8500_GPADC_CAL_7,
581};
582
583static void ab8500_gpadc_read_calibration_data(struct ab8500_gpadc *gpadc)
584{
585 int i;
586 int ret[ARRAY_SIZE(otp_cal_regs)];
587 u8 gpadc_cal[ARRAY_SIZE(otp_cal_regs)];
588
589 int vmain_high, vmain_low;
590 int btemp_high, btemp_low;
591 int vbat_high, vbat_low;
592
593 /* First we read all OTP registers and store the error code */
594 for (i = 0; i < ARRAY_SIZE(otp_cal_regs); i++) {
595 ret[i] = abx500_get_register_interruptible(gpadc->dev,
596 AB8500_OTP_EMUL, otp_cal_regs[i], &gpadc_cal[i]);
597 if (ret[i] < 0)
598 dev_err(gpadc->dev, "%s: read otp reg 0x%02x failed\n",
599 __func__, otp_cal_regs[i]);
600 }
601
602 /*
603 * The ADC calibration data is stored in OTP registers.
604 * The layout of the calibration data is outlined below and a more
605 * detailed description can be found in UM0836
606 *
607 * vm_h/l = vmain_high/low
608 * bt_h/l = btemp_high/low
609 * vb_h/l = vbat_high/low
610 *
611 * Data bits:
612 * | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
613 * |.......|.......|.......|.......|.......|.......|.......|.......
614 * | | vm_h9 | vm_h8
615 * |.......|.......|.......|.......|.......|.......|.......|.......
616 * | | vm_h7 | vm_h6 | vm_h5 | vm_h4 | vm_h3 | vm_h2
617 * |.......|.......|.......|.......|.......|.......|.......|.......
618 * | vm_h1 | vm_h0 | vm_l4 | vm_l3 | vm_l2 | vm_l1 | vm_l0 | bt_h9
619 * |.......|.......|.......|.......|.......|.......|.......|.......
620 * | bt_h8 | bt_h7 | bt_h6 | bt_h5 | bt_h4 | bt_h3 | bt_h2 | bt_h1
621 * |.......|.......|.......|.......|.......|.......|.......|.......
622 * | bt_h0 | bt_l4 | bt_l3 | bt_l2 | bt_l1 | bt_l0 | vb_h9 | vb_h8
623 * |.......|.......|.......|.......|.......|.......|.......|.......
624 * | vb_h7 | vb_h6 | vb_h5 | vb_h4 | vb_h3 | vb_h2 | vb_h1 | vb_h0
625 * |.......|.......|.......|.......|.......|.......|.......|.......
626 * | vb_l5 | vb_l4 | vb_l3 | vb_l2 | vb_l1 | vb_l0 |
627 * |.......|.......|.......|.......|.......|.......|.......|.......
628 *
629 *
630 * Ideal output ADC codes corresponding to injected input voltages
631 * during manufacturing is:
632 *
633 * vmain_high: Vin = 19500mV / ADC ideal code = 997
634 * vmain_low: Vin = 315mV / ADC ideal code = 16
635 * btemp_high: Vin = 1300mV / ADC ideal code = 985
636 * btemp_low: Vin = 21mV / ADC ideal code = 16
637 * vbat_high: Vin = 4700mV / ADC ideal code = 982
638 * vbat_low: Vin = 2380mV / ADC ideal code = 33
639 */
640
641 /* Calculate gain and offset for VMAIN if all reads succeeded */
642 if (!(ret[0] < 0 || ret[1] < 0 || ret[2] < 0)) {
643 vmain_high = (((gpadc_cal[0] & 0x03) << 8) |
644 ((gpadc_cal[1] & 0x3F) << 2) |
645 ((gpadc_cal[2] & 0xC0) >> 6));
646
647 vmain_low = ((gpadc_cal[2] & 0x3E) >> 1);
648
649 gpadc->cal_data[ADC_INPUT_VMAIN].gain = CALIB_SCALE *
650 (19500 - 315) / (vmain_high - vmain_low);
651
652 gpadc->cal_data[ADC_INPUT_VMAIN].offset = CALIB_SCALE * 19500 -
653 (CALIB_SCALE * (19500 - 315) /
654 (vmain_high - vmain_low)) * vmain_high;
655 } else {
656 gpadc->cal_data[ADC_INPUT_VMAIN].gain = 0;
657 }
658
659 /* Calculate gain and offset for BTEMP if all reads succeeded */
660 if (!(ret[2] < 0 || ret[3] < 0 || ret[4] < 0)) {
661 btemp_high = (((gpadc_cal[2] & 0x01) << 9) |
662 (gpadc_cal[3] << 1) |
663 ((gpadc_cal[4] & 0x80) >> 7));
664
665 btemp_low = ((gpadc_cal[4] & 0x7C) >> 2);
666
667 gpadc->cal_data[ADC_INPUT_BTEMP].gain =
668 CALIB_SCALE * (1300 - 21) / (btemp_high - btemp_low);
669
670 gpadc->cal_data[ADC_INPUT_BTEMP].offset = CALIB_SCALE * 1300 -
671 (CALIB_SCALE * (1300 - 21) /
672 (btemp_high - btemp_low)) * btemp_high;
673 } else {
674 gpadc->cal_data[ADC_INPUT_BTEMP].gain = 0;
675 }
676
677 /* Calculate gain and offset for VBAT if all reads succeeded */
678 if (!(ret[4] < 0 || ret[5] < 0 || ret[6] < 0)) {
679 vbat_high = (((gpadc_cal[4] & 0x03) << 8) | gpadc_cal[5]);
680 vbat_low = ((gpadc_cal[6] & 0xFC) >> 2);
681
682 gpadc->cal_data[ADC_INPUT_VBAT].gain = CALIB_SCALE *
683 (4700 - 2380) / (vbat_high - vbat_low);
684
685 gpadc->cal_data[ADC_INPUT_VBAT].offset = CALIB_SCALE * 4700 -
686 (CALIB_SCALE * (4700 - 2380) /
687 (vbat_high - vbat_low)) * vbat_high;
688 } else {
689 gpadc->cal_data[ADC_INPUT_VBAT].gain = 0;
690 }
691
692 dev_dbg(gpadc->dev, "VMAIN gain %llu offset %llu\n",
693 gpadc->cal_data[ADC_INPUT_VMAIN].gain,
694 gpadc->cal_data[ADC_INPUT_VMAIN].offset);
695
696 dev_dbg(gpadc->dev, "BTEMP gain %llu offset %llu\n",
697 gpadc->cal_data[ADC_INPUT_BTEMP].gain,
698 gpadc->cal_data[ADC_INPUT_BTEMP].offset);
699
700 dev_dbg(gpadc->dev, "VBAT gain %llu offset %llu\n",
701 gpadc->cal_data[ADC_INPUT_VBAT].gain,
702 gpadc->cal_data[ADC_INPUT_VBAT].offset);
703}
704
5f8aaef4
LJ		 705static int ab8500_gpadc_runtime_suspend(struct device *dev)
706{
707 struct ab8500_gpadc *gpadc = dev_get_drvdata(dev);
708
709 regulator_disable(gpadc->regu);
710 return 0;
711}
712
713static int ab8500_gpadc_runtime_resume(struct device *dev)
714{
715 struct ab8500_gpadc *gpadc = dev_get_drvdata(dev);
716
717 regulator_enable(gpadc->regu);
718 return 0;
719}
720
721static int ab8500_gpadc_runtime_idle(struct device *dev)
722{
5f8aaef4
LJ		 723 pm_runtime_suspend(dev);
724 return 0;
725}
726
774c50ab
DW		 727static int ab8500_gpadc_suspend(struct device *dev)
728{
729 struct ab8500_gpadc *gpadc = dev_get_drvdata(dev);
730
731 mutex_lock(&gpadc->ab8500_gpadc_lock);
732
733 pm_runtime_get_sync(dev);
734
735 regulator_disable(gpadc->regu);
736 return 0;
737}
738
739static int ab8500_gpadc_resume(struct device *dev)
740{
741 struct ab8500_gpadc *gpadc = dev_get_drvdata(dev);
742
743 regulator_enable(gpadc->regu);
744
745 pm_runtime_mark_last_busy(gpadc->dev);
746 pm_runtime_put_autosuspend(gpadc->dev);
747
748 mutex_unlock(&gpadc->ab8500_gpadc_lock);
749 return 0;
750}
751
f791be49 752static int ab8500_gpadc_probe(struct platform_device *pdev)
dae2db30
AM		 753{
754 int ret = 0;
755 struct ab8500_gpadc *gpadc;
756
757 gpadc = kzalloc(sizeof(struct ab8500_gpadc), GFP_KERNEL);
758 if (!gpadc) {
759 dev_err(&pdev->dev, "Error: No memory\n");
760 return -ENOMEM;
761 }
762
73482346
LJ		 763 gpadc->irq_sw = platform_get_irq_byname(pdev, "SW_CONV_END");
764 if (gpadc->irq_sw < 0) {
765 dev_err(gpadc->dev, "failed to get platform irq-%d\n",
766 gpadc->irq_sw);
767 ret = gpadc->irq_sw;
768 goto fail;
769 }
770
771 gpadc->irq_hw = platform_get_irq_byname(pdev, "HW_CONV_END");
772 if (gpadc->irq_hw < 0) {
773 dev_err(gpadc->dev, "failed to get platform irq-%d\n",
774 gpadc->irq_hw);
775 ret = gpadc->irq_hw;
dae2db30
AM		 776 goto fail;
777 }
778
779 gpadc->dev = &pdev->dev;
20bf4283 780 gpadc->parent = dev_get_drvdata(pdev->dev.parent);
6321992c 781 mutex_init(&gpadc->ab8500_gpadc_lock);
dae2db30
AM		 782
783 /* Initialize completion used to notify completion of conversion */
784 init_completion(&gpadc->ab8500_gpadc_complete);
785
73482346
LJ		 786 /* Register interrupts */
787 ret = request_threaded_irq(gpadc->irq_sw, NULL,
788 ab8500_bm_gpadcconvend_handler,
789 IRQF_NO_SUSPEND | IRQF_SHARED, "ab8500-gpadc-sw", gpadc);
790 if (ret < 0) {
791 dev_err(gpadc->dev, "Failed to register interrupt, irq: %d\n",
792 gpadc->irq_sw);
793 goto fail;
794 }
795 ret = request_threaded_irq(gpadc->irq_hw, NULL,
796 ab8500_bm_gpadcconvend_handler,
797 IRQF_NO_SUSPEND | IRQF_SHARED, "ab8500-gpadc-hw", gpadc);
dae2db30
AM		 798 if (ret < 0) {
799 dev_err(gpadc->dev, "Failed to register interrupt, irq: %d\n",
73482346 800 gpadc->irq_hw);
dae2db30
AM		 801 goto fail;
802 }
803
804 /* VTVout LDO used to power up ab8500-GPADC */
805 gpadc->regu = regulator_get(&pdev->dev, "vddadc");
806 if (IS_ERR(gpadc->regu)) {
807 ret = PTR_ERR(gpadc->regu);
808 dev_err(gpadc->dev, "failed to get vtvout LDO\n");
633e0fa5 809 goto fail_irq;
dae2db30 810 }
5f8aaef4
LJ		 811
812 platform_set_drvdata(pdev, gpadc);
813
814 regulator_enable(gpadc->regu);
815
816 pm_runtime_set_autosuspend_delay(gpadc->dev, GPADC_AUDOSUSPEND_DELAY);
817 pm_runtime_use_autosuspend(gpadc->dev);
818 pm_runtime_set_active(gpadc->dev);
819 pm_runtime_enable(gpadc->dev);
820
586f3318 821 ab8500_gpadc_read_calibration_data(gpadc);
6321992c 822 list_add_tail(&gpadc->node, &ab8500_gpadc_list);
dae2db30
AM		 823 dev_dbg(gpadc->dev, "probe success\n");
824 return 0;
633e0fa5 825fail_irq:
73482346
LJ		 826 free_irq(gpadc->irq_sw, gpadc);
827 free_irq(gpadc->irq_hw, gpadc);
dae2db30
AM		 828fail:
829 kfree(gpadc);
830 gpadc = NULL;
831 return ret;
832}
833
4740f73f 834static int ab8500_gpadc_remove(struct platform_device *pdev)
dae2db30
AM		 835{
836 struct ab8500_gpadc *gpadc = platform_get_drvdata(pdev);
837
6321992c
DW		 838 /* remove this gpadc entry from the list */
839 list_del(&gpadc->node);
dae2db30 840 /* remove interrupt - completion of Sw ADC conversion */
73482346
LJ		 841 free_irq(gpadc->irq_sw, gpadc);
842 free_irq(gpadc->irq_hw, gpadc);
5f8aaef4
LJ		 843
844 pm_runtime_get_sync(gpadc->dev);
845 pm_runtime_disable(gpadc->dev);
846
847 regulator_disable(gpadc->regu);
848
849 pm_runtime_set_suspended(gpadc->dev);
850
851 pm_runtime_put_noidle(gpadc->dev);
852
dae2db30
AM		 853 kfree(gpadc);
854 gpadc = NULL;
855 return 0;
856}
857
5f8aaef4
LJ		 858static const struct dev_pm_ops ab8500_gpadc_pm_ops = {
859 SET_RUNTIME_PM_OPS(ab8500_gpadc_runtime_suspend,
860 ab8500_gpadc_runtime_resume,
861 ab8500_gpadc_runtime_idle)
774c50ab
DW		 862 SET_SYSTEM_SLEEP_PM_OPS(ab8500_gpadc_suspend,
863 ab8500_gpadc_resume)
864
5f8aaef4
LJ		 865};
866
dae2db30
AM		 867static struct platform_driver ab8500_gpadc_driver = {
868 .probe = ab8500_gpadc_probe,
84449216 869 .remove = ab8500_gpadc_remove,
dae2db30
AM		 870 .driver = {
871 .name = "ab8500-gpadc",
872 .owner = THIS_MODULE,
5f8aaef4 873 .pm = &ab8500_gpadc_pm_ops,
dae2db30
AM		 874 },
875};
876
877static int __init ab8500_gpadc_init(void)
878{
879 return platform_driver_register(&ab8500_gpadc_driver);
880}
881
882static void __exit ab8500_gpadc_exit(void)
883{
884 platform_driver_unregister(&ab8500_gpadc_driver);
885}
886
887subsys_initcall_sync(ab8500_gpadc_init);
888module_exit(ab8500_gpadc_exit);
889
890MODULE_LICENSE("GPL v2");
73482346
LJ		 891MODULE_AUTHOR("Arun R Murthy, Daniel Willerud, Johan Palsson,"
892 "M'boumba Cedric Madianga");
dae2db30
AM		 893MODULE_ALIAS("platform:ab8500_gpadc");
894MODULE_DESCRIPTION("AB8500 GPADC driver");
Linux 6.x block layer and io_uring tree(s)