[linux-2.6-block.git] / drivers / mfd / ab8500-gpadc.c

/*
 * Copyright (C) ST-Ericsson SA 2010
 *
 * License Terms: GNU General Public License v2
 * Author: Arun R Murthy <arun.murthy@stericsson.com>
 * Author: Daniel Willerud <daniel.willerud@stericsson.com>
 * Author: Johan Palsson <johan.palsson@stericsson.com>
 */
#include <linux/init.h>
#include <linux/module.h>
#include <linux/device.h>
#include <linux/interrupt.h>
#include <linux/spinlock.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <linux/completion.h>
#include <linux/regulator/consumer.h>
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/list.h>
#include <linux/mfd/ab8500.h>
#include <linux/mfd/abx500.h>
#include <linux/mfd/ab8500/ab8500-gpadc.h>

/*
 * GPADC register offsets
 * Bank : 0x0A
 */
#define AB8500_GPADC_CTRL1_REG		0x00
#define AB8500_GPADC_CTRL2_REG		0x01
#define AB8500_GPADC_CTRL3_REG		0x02
#define AB8500_GPADC_AUTO_TIMER_REG	0x03
#define AB8500_GPADC_STAT_REG		0x04
#define AB8500_GPADC_MANDATAL_REG	0x05
#define AB8500_GPADC_MANDATAH_REG	0x06
#define AB8500_GPADC_AUTODATAL_REG	0x07
#define AB8500_GPADC_AUTODATAH_REG	0x08
#define AB8500_GPADC_MUX_CTRL_REG	0x09

/*
 * OTP register offsets
 * Bank : 0x15
 */
#define AB8500_GPADC_CAL_1		0x0F
#define AB8500_GPADC_CAL_2		0x10
#define AB8500_GPADC_CAL_3		0x11
#define AB8500_GPADC_CAL_4		0x12
#define AB8500_GPADC_CAL_5		0x13
#define AB8500_GPADC_CAL_6		0x14
#define AB8500_GPADC_CAL_7		0x15

/* gpadc constants */
#define EN_VINTCORE12			0x04
#define EN_VTVOUT			0x02
#define EN_GPADC			0x01
#define DIS_GPADC			0x00
#define SW_AVG_16			0x60
#define ADC_SW_CONV			0x04
#define EN_BUF				0x40
#define DIS_ZERO			0x00
#define GPADC_BUSY			0x01

/* GPADC constants from AB8500 spec, UM0836 */
#define ADC_RESOLUTION			1024
#define ADC_CH_BTEMP_MIN		0
#define ADC_CH_BTEMP_MAX		1350
#define ADC_CH_DIETEMP_MIN		0
#define ADC_CH_DIETEMP_MAX		1350
#define ADC_CH_CHG_V_MIN		0
#define ADC_CH_CHG_V_MAX		20030
#define ADC_CH_ACCDET2_MIN		0
#define ADC_CH_ACCDET2_MAX		2500
#define ADC_CH_VBAT_MIN			2300
#define ADC_CH_VBAT_MAX			4800
#define ADC_CH_CHG_I_MIN		0
#define ADC_CH_CHG_I_MAX		1500
#define ADC_CH_BKBAT_MIN		0
#define ADC_CH_BKBAT_MAX		3200

/* This is used to not lose precision when dividing to get gain and offset */
#define CALIB_SCALE			1000

enum cal_channels {
	ADC_INPUT_VMAIN = 0,
	ADC_INPUT_BTEMP,
	ADC_INPUT_VBAT,
	NBR_CAL_INPUTS,
};

/**
 * struct adc_cal_data - Table for storing gain and offset for the calibrated
 * ADC channels
 * @gain:		Gain of the ADC channel
 * @offset:		Offset of the ADC channel
 */
struct adc_cal_data {
	u64 gain;
	u64 offset;
};

/**
 * struct ab8500_gpadc - AB8500 GPADC device information
 * @dev:			pointer to the struct device
 * @node:			a list of AB8500 GPADCs, hence prepared for
				reentrance
 * @ab8500_gpadc_complete:	pointer to the struct completion, to indicate
 *				the completion of gpadc conversion
 * @ab8500_gpadc_lock:		structure of type mutex
 * @regu:			pointer to the struct regulator
 * @irq:			interrupt number that is used by gpadc
 * @cal_data			array of ADC calibration data structs
 */
struct ab8500_gpadc {
	struct device *dev;
	struct list_head node;
	struct completion ab8500_gpadc_complete;
	struct mutex ab8500_gpadc_lock;
	struct regulator *regu;
	int irq;
	struct adc_cal_data cal_data[NBR_CAL_INPUTS];
};

static LIST_HEAD(ab8500_gpadc_list);

/**
 * ab8500_gpadc_get() - returns a reference to the primary AB8500 GPADC
 * (i.e. the first GPADC in the instance list)
 */
struct ab8500_gpadc *ab8500_gpadc_get(char *name)
{
	struct ab8500_gpadc *gpadc;

	list_for_each_entry(gpadc, &ab8500_gpadc_list, node) {
		if (!strcmp(name, dev_name(gpadc->dev)))
		    return gpadc;
	}

	return ERR_PTR(-ENOENT);
}
EXPORT_SYMBOL(ab8500_gpadc_get);

static int ab8500_gpadc_ad_to_voltage(struct ab8500_gpadc *gpadc, u8 input,
	int ad_value)
{
	int res;

	switch (input) {
	case MAIN_CHARGER_V:
		/* For some reason we don't have calibrated data */
		if (!gpadc->cal_data[ADC_INPUT_VMAIN].gain) {
			res = ADC_CH_CHG_V_MIN + (ADC_CH_CHG_V_MAX -
				ADC_CH_CHG_V_MIN) * ad_value /
				ADC_RESOLUTION;
			break;
		}
		/* Here we can use the calibrated data */
		res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_VMAIN].gain +
			gpadc->cal_data[ADC_INPUT_VMAIN].offset) / CALIB_SCALE;
		break;

	case BAT_CTRL:
	case BTEMP_BALL:
	case ACC_DETECT1:
	case ADC_AUX1:
	case ADC_AUX2:
		/* For some reason we don't have calibrated data */
		if (!gpadc->cal_data[ADC_INPUT_BTEMP].gain) {
			res = ADC_CH_BTEMP_MIN + (ADC_CH_BTEMP_MAX -
				ADC_CH_BTEMP_MIN) * ad_value /
				ADC_RESOLUTION;
			break;
		}
		/* Here we can use the calibrated data */
		res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_BTEMP].gain +
			gpadc->cal_data[ADC_INPUT_BTEMP].offset) / CALIB_SCALE;
		break;

	case MAIN_BAT_V:
		/* For some reason we don't have calibrated data */
		if (!gpadc->cal_data[ADC_INPUT_VBAT].gain) {
			res = ADC_CH_VBAT_MIN + (ADC_CH_VBAT_MAX -
				ADC_CH_VBAT_MIN) * ad_value /
				ADC_RESOLUTION;
			break;
		}
		/* Here we can use the calibrated data */
		res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_VBAT].gain +
			gpadc->cal_data[ADC_INPUT_VBAT].offset) / CALIB_SCALE;
		break;

	case DIE_TEMP:
		res = ADC_CH_DIETEMP_MIN +
			(ADC_CH_DIETEMP_MAX - ADC_CH_DIETEMP_MIN) * ad_value /
			ADC_RESOLUTION;
		break;

	case ACC_DETECT2:
		res = ADC_CH_ACCDET2_MIN +
			(ADC_CH_ACCDET2_MAX - ADC_CH_ACCDET2_MIN) * ad_value /
			ADC_RESOLUTION;
		break;

	case VBUS_V:
		res = ADC_CH_CHG_V_MIN +
			(ADC_CH_CHG_V_MAX - ADC_CH_CHG_V_MIN) * ad_value /
			ADC_RESOLUTION;
		break;

	case MAIN_CHARGER_C:
	case USB_CHARGER_C:
		res = ADC_CH_CHG_I_MIN +
			(ADC_CH_CHG_I_MAX - ADC_CH_CHG_I_MIN) * ad_value /
			ADC_RESOLUTION;
		break;

	case BK_BAT_V:
		res = ADC_CH_BKBAT_MIN +
			(ADC_CH_BKBAT_MAX - ADC_CH_BKBAT_MIN) * ad_value /
			ADC_RESOLUTION;
		break;

	default:
		dev_err(gpadc->dev,
			"unknown channel, not possible to convert\n");
		res = -EINVAL;
		break;

	}
	return res;
}

/**
 * ab8500_gpadc_convert() - gpadc conversion
 * @input:	analog input to be converted to digital data
 *
 * This function converts the selected analog i/p to digital
 * data.
 */
int ab8500_gpadc_convert(struct ab8500_gpadc *gpadc, u8 input)
{
	int ret;
	u16 data = 0;
	int looplimit = 0;
	u8 val, low_data, high_data;

	if (!gpadc)
		return -ENODEV;

	mutex_lock(&gpadc->ab8500_gpadc_lock);
	/* Enable VTVout LDO this is required for GPADC */
	regulator_enable(gpadc->regu);

	/* Check if ADC is not busy, lock and proceed */
	do {
		ret = abx500_get_register_interruptible(gpadc->dev,
			AB8500_GPADC, AB8500_GPADC_STAT_REG, &val);
		if (ret < 0)
			goto out;
		if (!(val & GPADC_BUSY))
			break;
		msleep(10);
	} while (++looplimit < 10);
	if (looplimit >= 10 && (val & GPADC_BUSY)) {
		dev_err(gpadc->dev, "gpadc_conversion: GPADC busy");
		ret = -EINVAL;
		goto out;
	}

	/* Enable GPADC */
	ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
		AB8500_GPADC, AB8500_GPADC_CTRL1_REG, EN_GPADC, EN_GPADC);
	if (ret < 0) {
		dev_err(gpadc->dev, "gpadc_conversion: enable gpadc failed\n");
		goto out;
	}
	/* Select the input source and set average samples to 16 */
	ret = abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
		AB8500_GPADC_CTRL2_REG, (input | SW_AVG_16));
	if (ret < 0) {
		dev_err(gpadc->dev,
			"gpadc_conversion: set avg samples failed\n");
		goto out;
	}
	/* Enable ADC, Buffering and select rising edge, start Conversion */
	ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
		AB8500_GPADC, AB8500_GPADC_CTRL1_REG, EN_BUF, EN_BUF);
	if (ret < 0) {
		dev_err(gpadc->dev,
			"gpadc_conversion: select falling edge failed\n");
		goto out;
	}
	ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
		AB8500_GPADC, AB8500_GPADC_CTRL1_REG, ADC_SW_CONV, ADC_SW_CONV);
	if (ret < 0) {
		dev_err(gpadc->dev,
			"gpadc_conversion: start s/w conversion failed\n");
		goto out;
	}
	/* wait for completion of conversion */
	if (!wait_for_completion_timeout(&gpadc->ab8500_gpadc_complete, 2*HZ)) {
		dev_err(gpadc->dev,
			"timeout: didnt recieve GPADC conversion interrupt\n");
		ret = -EINVAL;
		goto out;
	}

	/* Read the converted RAW data */
	ret = abx500_get_register_interruptible(gpadc->dev, AB8500_GPADC,
		AB8500_GPADC_MANDATAL_REG, &low_data);
	if (ret < 0) {
		dev_err(gpadc->dev, "gpadc_conversion: read low data failed\n");
		goto out;
	}

	ret = abx500_get_register_interruptible(gpadc->dev, AB8500_GPADC,
		AB8500_GPADC_MANDATAH_REG, &high_data);
	if (ret < 0) {
		dev_err(gpadc->dev,
			"gpadc_conversion: read high data failed\n");
		goto out;
	}

	data = (high_data << 8) | low_data;
	/* Disable GPADC */
	ret = abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
		AB8500_GPADC_CTRL1_REG, DIS_GPADC);
	if (ret < 0) {
		dev_err(gpadc->dev, "gpadc_conversion: disable gpadc failed\n");
		goto out;
	}
	/* Disable VTVout LDO this is required for GPADC */
	regulator_disable(gpadc->regu);
	mutex_unlock(&gpadc->ab8500_gpadc_lock);
	ret = ab8500_gpadc_ad_to_voltage(gpadc, input, data);
	return ret;

out:
	/*
	 * It has shown to be needed to turn off the GPADC if an error occurs,
	 * otherwise we might have problem when waiting for the busy bit in the
	 * GPADC status register to go low. In V1.1 there wait_for_completion
	 * seems to timeout when waiting for an interrupt.. Not seen in V2.0
	 */
	(void) abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
		AB8500_GPADC_CTRL1_REG, DIS_GPADC);
	regulator_disable(gpadc->regu);
	mutex_unlock(&gpadc->ab8500_gpadc_lock);
	dev_err(gpadc->dev,
		"gpadc_conversion: Failed to AD convert channel %d\n", input);
	return ret;
}
EXPORT_SYMBOL(ab8500_gpadc_convert);

/**
 * ab8500_bm_gpswadcconvend_handler() - isr for s/w gpadc conversion completion
 * @irq:	irq number
 * @data:	pointer to the data passed during request irq
 *
 * This is a interrupt service routine for s/w gpadc conversion completion.
 * Notifies the gpadc completion is completed and the converted raw value
 * can be read from the registers.
 * Returns IRQ status(IRQ_HANDLED)
 */
static irqreturn_t ab8500_bm_gpswadcconvend_handler(int irq, void *_gpadc)
{
	struct ab8500_gpadc *gpadc = _gpadc;

	complete(&gpadc->ab8500_gpadc_complete);

	return IRQ_HANDLED;
}

static int otp_cal_regs[] = {
	AB8500_GPADC_CAL_1,
	AB8500_GPADC_CAL_2,
	AB8500_GPADC_CAL_3,
	AB8500_GPADC_CAL_4,
	AB8500_GPADC_CAL_5,
	AB8500_GPADC_CAL_6,
	AB8500_GPADC_CAL_7,
};

static void ab8500_gpadc_read_calibration_data(struct ab8500_gpadc *gpadc)
{
	int i;
	int ret[ARRAY_SIZE(otp_cal_regs)];
	u8 gpadc_cal[ARRAY_SIZE(otp_cal_regs)];

	int vmain_high, vmain_low;
	int btemp_high, btemp_low;
	int vbat_high, vbat_low;

	/* First we read all OTP registers and store the error code */
	for (i = 0; i < ARRAY_SIZE(otp_cal_regs); i++) {
		ret[i] = abx500_get_register_interruptible(gpadc->dev,
			AB8500_OTP_EMUL, otp_cal_regs[i],  &gpadc_cal[i]);
		if (ret[i] < 0)
			dev_err(gpadc->dev, "%s: read otp reg 0x%02x failed\n",
				__func__, otp_cal_regs[i]);
	}

	/*
	 * The ADC calibration data is stored in OTP registers.
	 * The layout of the calibration data is outlined below and a more
	 * detailed description can be found in UM0836
	 *
	 * vm_h/l = vmain_high/low
	 * bt_h/l = btemp_high/low
	 * vb_h/l = vbat_high/low
	 *
	 * Data bits:
	 * | 7	   | 6	   | 5	   | 4	   | 3	   | 2	   | 1	   | 0
	 * |.......|.......|.......|.......|.......|.......|.......|.......
	 * |						   | vm_h9 | vm_h8
	 * |.......|.......|.......|.......|.......|.......|.......|.......
	 * |		   | vm_h7 | vm_h6 | vm_h5 | vm_h4 | vm_h3 | vm_h2
	 * |.......|.......|.......|.......|.......|.......|.......|.......
	 * | vm_h1 | vm_h0 | vm_l4 | vm_l3 | vm_l2 | vm_l1 | vm_l0 | bt_h9
	 * |.......|.......|.......|.......|.......|.......|.......|.......
	 * | bt_h8 | bt_h7 | bt_h6 | bt_h5 | bt_h4 | bt_h3 | bt_h2 | bt_h1
	 * |.......|.......|.......|.......|.......|.......|.......|.......
	 * | bt_h0 | bt_l4 | bt_l3 | bt_l2 | bt_l1 | bt_l0 | vb_h9 | vb_h8
	 * |.......|.......|.......|.......|.......|.......|.......|.......
	 * | vb_h7 | vb_h6 | vb_h5 | vb_h4 | vb_h3 | vb_h2 | vb_h1 | vb_h0
	 * |.......|.......|.......|.......|.......|.......|.......|.......
	 * | vb_l5 | vb_l4 | vb_l3 | vb_l2 | vb_l1 | vb_l0 |
	 * |.......|.......|.......|.......|.......|.......|.......|.......
	 *
	 *
	 * Ideal output ADC codes corresponding to injected input voltages
	 * during manufacturing is:
	 *
	 * vmain_high: Vin = 19500mV / ADC ideal code = 997
	 * vmain_low:  Vin = 315mV   / ADC ideal code = 16
	 * btemp_high: Vin = 1300mV  / ADC ideal code = 985
	 * btemp_low:  Vin = 21mV    / ADC ideal code = 16
	 * vbat_high:  Vin = 4700mV  / ADC ideal code = 982
	 * vbat_low:   Vin = 2380mV  / ADC ideal code = 33
	 */

	/* Calculate gain and offset for VMAIN if all reads succeeded */
	if (!(ret[0] < 0 || ret[1] < 0 || ret[2] < 0)) {
		vmain_high = (((gpadc_cal[0] & 0x03) << 8) |
			((gpadc_cal[1] & 0x3F) << 2) |
			((gpadc_cal[2] & 0xC0) >> 6));

		vmain_low = ((gpadc_cal[2] & 0x3E) >> 1);

		gpadc->cal_data[ADC_INPUT_VMAIN].gain = CALIB_SCALE *
			(19500 - 315) /	(vmain_high - vmain_low);

		gpadc->cal_data[ADC_INPUT_VMAIN].offset = CALIB_SCALE * 19500 -
			(CALIB_SCALE * (19500 - 315) /
			 (vmain_high - vmain_low)) * vmain_high;
	} else {
		gpadc->cal_data[ADC_INPUT_VMAIN].gain = 0;
	}

	/* Calculate gain and offset for BTEMP if all reads succeeded */
	if (!(ret[2] < 0 || ret[3] < 0 || ret[4] < 0)) {
		btemp_high = (((gpadc_cal[2] & 0x01) << 9) |
			(gpadc_cal[3] << 1) |
			((gpadc_cal[4] & 0x80) >> 7));

		btemp_low = ((gpadc_cal[4] & 0x7C) >> 2);

		gpadc->cal_data[ADC_INPUT_BTEMP].gain =
			CALIB_SCALE * (1300 - 21) / (btemp_high - btemp_low);

		gpadc->cal_data[ADC_INPUT_BTEMP].offset = CALIB_SCALE * 1300 -
			(CALIB_SCALE * (1300 - 21) /
			(btemp_high - btemp_low)) * btemp_high;
	} else {
		gpadc->cal_data[ADC_INPUT_BTEMP].gain = 0;
	}

	/* Calculate gain and offset for VBAT if all reads succeeded */
	if (!(ret[4] < 0 || ret[5] < 0 || ret[6] < 0)) {
		vbat_high = (((gpadc_cal[4] & 0x03) << 8) | gpadc_cal[5]);
		vbat_low = ((gpadc_cal[6] & 0xFC) >> 2);

		gpadc->cal_data[ADC_INPUT_VBAT].gain = CALIB_SCALE *
			(4700 - 2380) /	(vbat_high - vbat_low);

		gpadc->cal_data[ADC_INPUT_VBAT].offset = CALIB_SCALE * 4700 -
			(CALIB_SCALE * (4700 - 2380) /
			(vbat_high - vbat_low)) * vbat_high;
	} else {
		gpadc->cal_data[ADC_INPUT_VBAT].gain = 0;
	}

	dev_dbg(gpadc->dev, "VMAIN gain %llu offset %llu\n",
		gpadc->cal_data[ADC_INPUT_VMAIN].gain,
		gpadc->cal_data[ADC_INPUT_VMAIN].offset);

	dev_dbg(gpadc->dev, "BTEMP gain %llu offset %llu\n",
		gpadc->cal_data[ADC_INPUT_BTEMP].gain,
		gpadc->cal_data[ADC_INPUT_BTEMP].offset);

	dev_dbg(gpadc->dev, "VBAT gain %llu offset %llu\n",
		gpadc->cal_data[ADC_INPUT_VBAT].gain,
		gpadc->cal_data[ADC_INPUT_VBAT].offset);
}

static int __devinit ab8500_gpadc_probe(struct platform_device *pdev)
{
	int ret = 0;
	struct ab8500_gpadc *gpadc;

	gpadc = kzalloc(sizeof(struct ab8500_gpadc), GFP_KERNEL);
	if (!gpadc) {
		dev_err(&pdev->dev, "Error: No memory\n");
		return -ENOMEM;
	}

	gpadc->irq = platform_get_irq_byname(pdev, "SW_CONV_END");
	if (gpadc->irq < 0) {
		dev_err(gpadc->dev, "failed to get platform irq-%d\n",
			gpadc->irq);
		ret = gpadc->irq;
		goto fail;
	}

	gpadc->dev = &pdev->dev;
	mutex_init(&gpadc->ab8500_gpadc_lock);

	/* Initialize completion used to notify completion of conversion */
	init_completion(&gpadc->ab8500_gpadc_complete);

	/* Register interrupt  - SwAdcComplete */
	ret = request_threaded_irq(gpadc->irq, NULL,
		ab8500_bm_gpswadcconvend_handler,
		IRQF_NO_SUSPEND | IRQF_SHARED, "ab8500-gpadc", gpadc);
	if (ret < 0) {
		dev_err(gpadc->dev, "Failed to register interrupt, irq: %d\n",
			gpadc->irq);
		goto fail;
	}

	/* VTVout LDO used to power up ab8500-GPADC */
	gpadc->regu = regulator_get(&pdev->dev, "vddadc");
	if (IS_ERR(gpadc->regu)) {
		ret = PTR_ERR(gpadc->regu);
		dev_err(gpadc->dev, "failed to get vtvout LDO\n");
		goto fail_irq;
	}
	ab8500_gpadc_read_calibration_data(gpadc);
	list_add_tail(&gpadc->node, &ab8500_gpadc_list);
	dev_dbg(gpadc->dev, "probe success\n");
	return 0;
fail_irq:
	free_irq(gpadc->irq, gpadc);
fail:
	kfree(gpadc);
	gpadc = NULL;
	return ret;
}

static int __devexit ab8500_gpadc_remove(struct platform_device *pdev)
{
	struct ab8500_gpadc *gpadc = platform_get_drvdata(pdev);

	/* remove this gpadc entry from the list */
	list_del(&gpadc->node);
	/* remove interrupt  - completion of Sw ADC conversion */
	free_irq(gpadc->irq, gpadc);
	/* disable VTVout LDO that is being used by GPADC */
	regulator_put(gpadc->regu);
	kfree(gpadc);
	gpadc = NULL;
	return 0;
}

static struct platform_driver ab8500_gpadc_driver = {
	.probe = ab8500_gpadc_probe,
	.remove = __devexit_p(ab8500_gpadc_remove),
	.driver = {
		.name = "ab8500-gpadc",
		.owner = THIS_MODULE,
	},
};

static int __init ab8500_gpadc_init(void)
{
	return platform_driver_register(&ab8500_gpadc_driver);
}

static void __exit ab8500_gpadc_exit(void)
{
	platform_driver_unregister(&ab8500_gpadc_driver);
}

subsys_initcall_sync(ab8500_gpadc_init);
module_exit(ab8500_gpadc_exit);

MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Arun R Murthy, Daniel Willerud, Johan Palsson");
MODULE_ALIAS("platform:ab8500_gpadc");
MODULE_DESCRIPTION("AB8500 GPADC driver");
Commit	Line	Data
dae2db30 AM	1	/*
	2	* Copyright (C) ST-Ericsson SA 2010
	3	*
	4	* License Terms: GNU General Public License v2
	5	* Author: Arun R Murthy <arun.murthy@stericsson.com>
6321992c	6	* Author: Daniel Willerud <daniel.willerud@stericsson.com>
586f3318	7	* Author: Johan Palsson <johan.palsson@stericsson.com>
dae2db30 AM	8	*/
	9	#include <linux/init.h>
	10	#include <linux/module.h>
	11	#include <linux/device.h>
	12	#include <linux/interrupt.h>
	13	#include <linux/spinlock.h>
	14	#include <linux/delay.h>
	15	#include <linux/platform_device.h>
	16	#include <linux/completion.h>
	17	#include <linux/regulator/consumer.h>
	18	#include <linux/err.h>
	19	#include <linux/slab.h>
6321992c	20	#include <linux/list.h>
dae2db30 AM	21	#include <linux/mfd/ab8500.h>
dae2db30 AM	22	#include <linux/mfd/abx500.h>
cf169439	23	#include <linux/mfd/ab8500/ab8500-gpadc.h>
dae2db30 AM	24
	25	/*
	26	* GPADC register offsets
	27	* Bank : 0x0A
	28	*/
	29	#define AB8500_GPADC_CTRL1_REG 0x00
	30	#define AB8500_GPADC_CTRL2_REG 0x01
	31	#define AB8500_GPADC_CTRL3_REG 0x02
	32	#define AB8500_GPADC_AUTO_TIMER_REG 0x03
	33	#define AB8500_GPADC_STAT_REG 0x04
	34	#define AB8500_GPADC_MANDATAL_REG 0x05
	35	#define AB8500_GPADC_MANDATAH_REG 0x06
	36	#define AB8500_GPADC_AUTODATAL_REG 0x07
	37	#define AB8500_GPADC_AUTODATAH_REG 0x08
	38	#define AB8500_GPADC_MUX_CTRL_REG 0x09
	39
586f3318 JP	40	/*
	41	* OTP register offsets
	42	* Bank : 0x15
	43	*/
	44	#define AB8500_GPADC_CAL_1 0x0F
	45	#define AB8500_GPADC_CAL_2 0x10
	46	#define AB8500_GPADC_CAL_3 0x11
	47	#define AB8500_GPADC_CAL_4 0x12
	48	#define AB8500_GPADC_CAL_5 0x13
	49	#define AB8500_GPADC_CAL_6 0x14
	50	#define AB8500_GPADC_CAL_7 0x15
	51
dae2db30 AM	52	/* gpadc constants */
	53	#define EN_VINTCORE12 0x04
	54	#define EN_VTVOUT 0x02
	55	#define EN_GPADC 0x01
	56	#define DIS_GPADC 0x00
	57	#define SW_AVG_16 0x60
	58	#define ADC_SW_CONV 0x04
	59	#define EN_BUF 0x40
	60	#define DIS_ZERO 0x00
	61	#define GPADC_BUSY 0x01
	62
586f3318 JP	63	/* GPADC constants from AB8500 spec, UM0836 */
	64	#define ADC_RESOLUTION 1024
	65	#define ADC_CH_BTEMP_MIN 0
	66	#define ADC_CH_BTEMP_MAX 1350
	67	#define ADC_CH_DIETEMP_MIN 0
	68	#define ADC_CH_DIETEMP_MAX 1350
	69	#define ADC_CH_CHG_V_MIN 0
	70	#define ADC_CH_CHG_V_MAX 20030
	71	#define ADC_CH_ACCDET2_MIN 0
	72	#define ADC_CH_ACCDET2_MAX 2500
	73	#define ADC_CH_VBAT_MIN 2300
	74	#define ADC_CH_VBAT_MAX 4800
	75	#define ADC_CH_CHG_I_MIN 0
	76	#define ADC_CH_CHG_I_MAX 1500
	77	#define ADC_CH_BKBAT_MIN 0
	78	#define ADC_CH_BKBAT_MAX 3200
	79
	80	/* This is used to not lose precision when dividing to get gain and offset */
	81	#define CALIB_SCALE 1000
	82
	83	enum cal_channels {
	84	ADC_INPUT_VMAIN = 0,
	85	ADC_INPUT_BTEMP,
	86	ADC_INPUT_VBAT,
	87	NBR_CAL_INPUTS,
	88	};
	89
	90	/**
	91	* struct adc_cal_data - Table for storing gain and offset for the calibrated
	92	* ADC channels
	93	* @gain: Gain of the ADC channel
	94	* @offset: Offset of the ADC channel
	95	*/
	96	struct adc_cal_data {
	97	u64 gain;
	98	u64 offset;
	99	};
	100
dae2db30	101	/**
586f3318	102	* struct ab8500_gpadc - AB8500 GPADC device information
dae2db30	103	* @dev: pointer to the struct device
6321992c DW	104	* @node: a list of AB8500 GPADCs, hence prepared for
6321992c DW	105	reentrance
dae2db30 AM	106	* @ab8500_gpadc_complete: pointer to the struct completion, to indicate
	107	* the completion of gpadc conversion
	108	* @ab8500_gpadc_lock: structure of type mutex
	109	* @regu: pointer to the struct regulator
	110	* @irq: interrupt number that is used by gpadc
586f3318	111	* @cal_data array of ADC calibration data structs
dae2db30	112	*/
6321992c	113	struct ab8500_gpadc {
dae2db30	114	struct device *dev;
6321992c	115	struct list_head node;
dae2db30 AM	116	struct completion ab8500_gpadc_complete;
	117	struct mutex ab8500_gpadc_lock;
	118	struct regulator *regu;
	119	int irq;
586f3318	120	struct adc_cal_data cal_data[NBR_CAL_INPUTS];
6321992c DW	121	};
	122
	123	static LIST_HEAD(ab8500_gpadc_list);
	124
	125	/**
	126	* ab8500_gpadc_get() - returns a reference to the primary AB8500 GPADC
	127	* (i.e. the first GPADC in the instance list)
	128	*/
	129	struct ab8500_gpadc ab8500_gpadc_get(char name)
	130	{
	131	struct ab8500_gpadc *gpadc;
	132
	133	list_for_each_entry(gpadc, &ab8500_gpadc_list, node) {
	134	if (!strcmp(name, dev_name(gpadc->dev)))
	135	return gpadc;
	136	}
	137
	138	return ERR_PTR(-ENOENT);
	139	}
	140	EXPORT_SYMBOL(ab8500_gpadc_get);
dae2db30	141
586f3318 JP	142	static int ab8500_gpadc_ad_to_voltage(struct ab8500_gpadc *gpadc, u8 input,
	143	int ad_value)
	144	{
	145	int res;
	146
	147	switch (input) {
	148	case MAIN_CHARGER_V:
	149	/* For some reason we don't have calibrated data */
	150	if (!gpadc->cal_data[ADC_INPUT_VMAIN].gain) {
	151	res = ADC_CH_CHG_V_MIN + (ADC_CH_CHG_V_MAX -
	152	ADC_CH_CHG_V_MIN) * ad_value /
	153	ADC_RESOLUTION;
	154	break;
	155	}
	156	/* Here we can use the calibrated data */
	157	res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_VMAIN].gain +
	158	gpadc->cal_data[ADC_INPUT_VMAIN].offset) / CALIB_SCALE;
	159	break;
	160
	161	case BAT_CTRL:
	162	case BTEMP_BALL:
	163	case ACC_DETECT1:
	164	case ADC_AUX1:
	165	case ADC_AUX2:
	166	/* For some reason we don't have calibrated data */
	167	if (!gpadc->cal_data[ADC_INPUT_BTEMP].gain) {
	168	res = ADC_CH_BTEMP_MIN + (ADC_CH_BTEMP_MAX -
	169	ADC_CH_BTEMP_MIN) * ad_value /
	170	ADC_RESOLUTION;
	171	break;
	172	}
	173	/* Here we can use the calibrated data */
	174	res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_BTEMP].gain +
	175	gpadc->cal_data[ADC_INPUT_BTEMP].offset) / CALIB_SCALE;
	176	break;
	177
	178	case MAIN_BAT_V:
	179	/* For some reason we don't have calibrated data */
	180	if (!gpadc->cal_data[ADC_INPUT_VBAT].gain) {
	181	res = ADC_CH_VBAT_MIN + (ADC_CH_VBAT_MAX -
	182	ADC_CH_VBAT_MIN) * ad_value /
	183	ADC_RESOLUTION;
	184	break;
	185	}
	186	/* Here we can use the calibrated data */
	187	res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_VBAT].gain +
	188	gpadc->cal_data[ADC_INPUT_VBAT].offset) / CALIB_SCALE;
	189	break;
	190
	191	case DIE_TEMP:
	192	res = ADC_CH_DIETEMP_MIN +
	193	(ADC_CH_DIETEMP_MAX - ADC_CH_DIETEMP_MIN) * ad_value /
	194	ADC_RESOLUTION;
	195	break;
	196
	197	case ACC_DETECT2:
	198	res = ADC_CH_ACCDET2_MIN +
	199	(ADC_CH_ACCDET2_MAX - ADC_CH_ACCDET2_MIN) * ad_value /
	200	ADC_RESOLUTION;
	201	break;
	202
	203	case VBUS_V:
	204	res = ADC_CH_CHG_V_MIN +
	205	(ADC_CH_CHG_V_MAX - ADC_CH_CHG_V_MIN) * ad_value /
206	ADC_RESOLUTION;
207	break;
208
209	case MAIN_CHARGER_C:
210	case USB_CHARGER_C:
211	res = ADC_CH_CHG_I_MIN +
212	(ADC_CH_CHG_I_MAX - ADC_CH_CHG_I_MIN) * ad_value /
213	ADC_RESOLUTION;
214	break;
215
216	case BK_BAT_V:
217	res = ADC_CH_BKBAT_MIN +
218	(ADC_CH_BKBAT_MAX - ADC_CH_BKBAT_MIN) * ad_value /
219	ADC_RESOLUTION;
220	break;
221
222	default:
223	dev_err(gpadc->dev,
224	"unknown channel, not possible to convert\n");
225	res = -EINVAL;
226	break;
227
228	}
229	return res;
230	}
231
dae2db30 AM	232	/**
	233	* ab8500_gpadc_convert() - gpadc conversion
	234	* @input: analog input to be converted to digital data
	235	*
	236	* This function converts the selected analog i/p to digital
586f3318	237	* data.
dae2db30	238	*/
6321992c	239	int ab8500_gpadc_convert(struct ab8500_gpadc *gpadc, u8 input)
dae2db30 AM	240	{
	241	int ret;
	242	u16 data = 0;
	243	int looplimit = 0;
	244	u8 val, low_data, high_data;
	245
6321992c	246	if (!gpadc)
dae2db30 AM	247	return -ENODEV;
dae2db30 AM	248
6321992c	249	mutex_lock(&gpadc->ab8500_gpadc_lock);
dae2db30	250	/* Enable VTVout LDO this is required for GPADC */
6321992c	251	regulator_enable(gpadc->regu);
dae2db30 AM	252
	253	/* Check if ADC is not busy, lock and proceed */
	254	do {
6321992c DW	255	ret = abx500_get_register_interruptible(gpadc->dev,
6321992c DW	256	AB8500_GPADC, AB8500_GPADC_STAT_REG, &val);
dae2db30 AM	257	if (ret < 0)
	258	goto out;
	259	if (!(val & GPADC_BUSY))
	260	break;
	261	msleep(10);
	262	} while (++looplimit < 10);
	263	if (looplimit >= 10 && (val & GPADC_BUSY)) {
6321992c	264	dev_err(gpadc->dev, "gpadc_conversion: GPADC busy");
dae2db30 AM	265	ret = -EINVAL;
	266	goto out;
	267	}
	268
	269	/* Enable GPADC */
6321992c DW	270	ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
6321992c DW	271	AB8500_GPADC, AB8500_GPADC_CTRL1_REG, EN_GPADC, EN_GPADC);
dae2db30	272	if (ret < 0) {
6321992c	273	dev_err(gpadc->dev, "gpadc_conversion: enable gpadc failed\n");
dae2db30 AM	274	goto out;
	275	}
	276	/* Select the input source and set average samples to 16 */
6321992c	277	ret = abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
dae2db30 AM	278	AB8500_GPADC_CTRL2_REG, (input \| SW_AVG_16));
dae2db30 AM	279	if (ret < 0) {
6321992c	280	dev_err(gpadc->dev,
dae2db30 AM	281	"gpadc_conversion: set avg samples failed\n");
	282	goto out;
	283	}
	284	/* Enable ADC, Buffering and select rising edge, start Conversion */
6321992c DW	285	ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
6321992c DW	286	AB8500_GPADC, AB8500_GPADC_CTRL1_REG, EN_BUF, EN_BUF);
dae2db30	287	if (ret < 0) {
6321992c	288	dev_err(gpadc->dev,
dae2db30 AM	289	"gpadc_conversion: select falling edge failed\n");
	290	goto out;
	291	}
6321992c DW	292	ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
6321992c DW	293	AB8500_GPADC, AB8500_GPADC_CTRL1_REG, ADC_SW_CONV, ADC_SW_CONV);
dae2db30	294	if (ret < 0) {
6321992c	295	dev_err(gpadc->dev,
dae2db30 AM	296	"gpadc_conversion: start s/w conversion failed\n");
	297	goto out;
	298	}
	299	/* wait for completion of conversion */
6321992c DW	300	if (!wait_for_completion_timeout(&gpadc->ab8500_gpadc_complete, 2*HZ)) {
6321992c DW	301	dev_err(gpadc->dev,
dae2db30 AM	302	"timeout: didnt recieve GPADC conversion interrupt\n");
	303	ret = -EINVAL;
	304	goto out;
	305	}
	306
	307	/* Read the converted RAW data */
6321992c	308	ret = abx500_get_register_interruptible(gpadc->dev, AB8500_GPADC,
dae2db30 AM	309	AB8500_GPADC_MANDATAL_REG, &low_data);
dae2db30 AM	310	if (ret < 0) {
6321992c	311	dev_err(gpadc->dev, "gpadc_conversion: read low data failed\n");
dae2db30 AM	312	goto out;
	313	}
	314
6321992c	315	ret = abx500_get_register_interruptible(gpadc->dev, AB8500_GPADC,
dae2db30 AM	316	AB8500_GPADC_MANDATAH_REG, &high_data);
dae2db30 AM	317	if (ret < 0) {
6321992c DW	318	dev_err(gpadc->dev,
6321992c DW	319	"gpadc_conversion: read high data failed\n");
dae2db30 AM	320	goto out;
	321	}
	322
	323	data = (high_data << 8) \| low_data;
	324	/* Disable GPADC */
6321992c	325	ret = abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
dae2db30 AM	326	AB8500_GPADC_CTRL1_REG, DIS_GPADC);
dae2db30 AM	327	if (ret < 0) {
6321992c	328	dev_err(gpadc->dev, "gpadc_conversion: disable gpadc failed\n");
dae2db30 AM	329	goto out;
	330	}
	331	/* Disable VTVout LDO this is required for GPADC */
6321992c DW	332	regulator_disable(gpadc->regu);
6321992c DW	333	mutex_unlock(&gpadc->ab8500_gpadc_lock);
586f3318 JP	334	ret = ab8500_gpadc_ad_to_voltage(gpadc, input, data);
586f3318 JP	335	return ret;
dae2db30 AM	336
	337	out:
	338	/*
	339	* It has shown to be needed to turn off the GPADC if an error occurs,
	340	* otherwise we might have problem when waiting for the busy bit in the
	341	* GPADC status register to go low. In V1.1 there wait_for_completion
	342	* seems to timeout when waiting for an interrupt.. Not seen in V2.0
	343	*/
6321992c	344	(void) abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
dae2db30	345	AB8500_GPADC_CTRL1_REG, DIS_GPADC);
6321992c DW	346	regulator_disable(gpadc->regu);
	347	mutex_unlock(&gpadc->ab8500_gpadc_lock);
	348	dev_err(gpadc->dev,
	349	"gpadc_conversion: Failed to AD convert channel %d\n", input);
dae2db30 AM	350	return ret;
	351	}
	352	EXPORT_SYMBOL(ab8500_gpadc_convert);
	353
	354	/**
	355	* ab8500_bm_gpswadcconvend_handler() - isr for s/w gpadc conversion completion
	356	* @irq: irq number
	357	* @data: pointer to the data passed during request irq
	358	*
	359	* This is a interrupt service routine for s/w gpadc conversion completion.
	360	* Notifies the gpadc completion is completed and the converted raw value
	361	* can be read from the registers.
	362	* Returns IRQ status(IRQ_HANDLED)
	363	*/
6321992c	364	static irqreturn_t ab8500_bm_gpswadcconvend_handler(int irq, void *_gpadc)
dae2db30	365	{
6321992c	366	struct ab8500_gpadc *gpadc = _gpadc;
dae2db30 AM	367
	368	complete(&gpadc->ab8500_gpadc_complete);
	369
	370	return IRQ_HANDLED;
	371	}
	372
586f3318 JP	373	static int otp_cal_regs[] = {
	374	AB8500_GPADC_CAL_1,
	375	AB8500_GPADC_CAL_2,
	376	AB8500_GPADC_CAL_3,
	377	AB8500_GPADC_CAL_4,
	378	AB8500_GPADC_CAL_5,
	379	AB8500_GPADC_CAL_6,
	380	AB8500_GPADC_CAL_7,
	381	};
	382
	383	static void ab8500_gpadc_read_calibration_data(struct ab8500_gpadc *gpadc)
	384	{
	385	int i;
	386	int ret[ARRAY_SIZE(otp_cal_regs)];
	387	u8 gpadc_cal[ARRAY_SIZE(otp_cal_regs)];
	388
	389	int vmain_high, vmain_low;
	390	int btemp_high, btemp_low;
	391	int vbat_high, vbat_low;
	392
	393	/* First we read all OTP registers and store the error code */
	394	for (i = 0; i < ARRAY_SIZE(otp_cal_regs); i++) {
	395	ret[i] = abx500_get_register_interruptible(gpadc->dev,
	396	AB8500_OTP_EMUL, otp_cal_regs[i], &gpadc_cal[i]);
	397	if (ret[i] < 0)
	398	dev_err(gpadc->dev, "%s: read otp reg 0x%02x failed\n",
	399	__func__, otp_cal_regs[i]);
	400	}
	401
	402	/*
	403	* The ADC calibration data is stored in OTP registers.
	404	* The layout of the calibration data is outlined below and a more
	405	* detailed description can be found in UM0836
	406	*
	407	* vm_h/l = vmain_high/low
	408	* bt_h/l = btemp_high/low
	409	* vb_h/l = vbat_high/low
	410	*
	411	* Data bits:
	412	* \| 7 \| 6 \| 5 \| 4 \| 3 \| 2 \| 1 \| 0
	413	* \|.......\|.......\|.......\|.......\|.......\|.......\|.......\|.......
	414	* \| \| vm_h9 \| vm_h8
	415	* \|.......\|.......\|.......\|.......\|.......\|.......\|.......\|.......
	416	* \| \| vm_h7 \| vm_h6 \| vm_h5 \| vm_h4 \| vm_h3 \| vm_h2
	417	* \|.......\|.......\|.......\|.......\|.......\|.......\|.......\|.......
	418	* \| vm_h1 \| vm_h0 \| vm_l4 \| vm_l3 \| vm_l2 \| vm_l1 \| vm_l0 \| bt_h9
	419	* \|.......\|.......\|.......\|.......\|.......\|.......\|.......\|.......
	420	* \| bt_h8 \| bt_h7 \| bt_h6 \| bt_h5 \| bt_h4 \| bt_h3 \| bt_h2 \| bt_h1
	421	* \|.......\|.......\|.......\|.......\|.......\|.......\|.......\|.......
	422	* \| bt_h0 \| bt_l4 \| bt_l3 \| bt_l2 \| bt_l1 \| bt_l0 \| vb_h9 \| vb_h8
	423	* \|.......\|.......\|.......\|.......\|.......\|.......\|.......\|.......
	424	* \| vb_h7 \| vb_h6 \| vb_h5 \| vb_h4 \| vb_h3 \| vb_h2 \| vb_h1 \| vb_h0
	425	* \|.......\|.......\|.......\|.......\|.......\|.......\|.......\|.......
	426	* \| vb_l5 \| vb_l4 \| vb_l3 \| vb_l2 \| vb_l1 \| vb_l0 \|
	427	* \|.......\|.......\|.......\|.......\|.......\|.......\|.......\|.......
	428	*
	429	*
	430	* Ideal output ADC codes corresponding to injected input voltages
	431	* during manufacturing is:
	432	*
	433	* vmain_high: Vin = 19500mV / ADC ideal code = 997
	434	* vmain_low: Vin = 315mV / ADC ideal code = 16
	435	* btemp_high: Vin = 1300mV / ADC ideal code = 985
	436	* btemp_low: Vin = 21mV / ADC ideal code = 16
437	* vbat_high: Vin = 4700mV / ADC ideal code = 982
438	* vbat_low: Vin = 2380mV / ADC ideal code = 33
439	*/
440
441	/* Calculate gain and offset for VMAIN if all reads succeeded */
442	if (!(ret[0] < 0 \|\| ret[1] < 0 \|\| ret[2] < 0)) {
443	vmain_high = (((gpadc_cal[0] & 0x03) << 8) \|
444	((gpadc_cal[1] & 0x3F) << 2) \|
445	((gpadc_cal[2] & 0xC0) >> 6));
446
447	vmain_low = ((gpadc_cal[2] & 0x3E) >> 1);
448
449	gpadc->cal_data[ADC_INPUT_VMAIN].gain = CALIB_SCALE *
450	(19500 - 315) / (vmain_high - vmain_low);
451
452	gpadc->cal_data[ADC_INPUT_VMAIN].offset = CALIB_SCALE * 19500 -
453	(CALIB_SCALE * (19500 - 315) /
454	(vmain_high - vmain_low)) * vmain_high;
455	} else {
456	gpadc->cal_data[ADC_INPUT_VMAIN].gain = 0;
457	}
458
459	/* Calculate gain and offset for BTEMP if all reads succeeded */
460	if (!(ret[2] < 0 \|\| ret[3] < 0 \|\| ret[4] < 0)) {
461	btemp_high = (((gpadc_cal[2] & 0x01) << 9) \|
462	(gpadc_cal[3] << 1) \|
463	((gpadc_cal[4] & 0x80) >> 7));
464
465	btemp_low = ((gpadc_cal[4] & 0x7C) >> 2);
466
467	gpadc->cal_data[ADC_INPUT_BTEMP].gain =
468	CALIB_SCALE * (1300 - 21) / (btemp_high - btemp_low);
469
470	gpadc->cal_data[ADC_INPUT_BTEMP].offset = CALIB_SCALE * 1300 -
471	(CALIB_SCALE * (1300 - 21) /
472	(btemp_high - btemp_low)) * btemp_high;
473	} else {
474	gpadc->cal_data[ADC_INPUT_BTEMP].gain = 0;
475	}
476
477	/* Calculate gain and offset for VBAT if all reads succeeded */
478	if (!(ret[4] < 0 \|\| ret[5] < 0 \|\| ret[6] < 0)) {
479	vbat_high = (((gpadc_cal[4] & 0x03) << 8) \| gpadc_cal[5]);
480	vbat_low = ((gpadc_cal[6] & 0xFC) >> 2);
481
482	gpadc->cal_data[ADC_INPUT_VBAT].gain = CALIB_SCALE *
483	(4700 - 2380) / (vbat_high - vbat_low);
484
485	gpadc->cal_data[ADC_INPUT_VBAT].offset = CALIB_SCALE * 4700 -
486	(CALIB_SCALE * (4700 - 2380) /
487	(vbat_high - vbat_low)) * vbat_high;
488	} else {
489	gpadc->cal_data[ADC_INPUT_VBAT].gain = 0;
490	}
491
492	dev_dbg(gpadc->dev, "VMAIN gain %llu offset %llu\n",
493	gpadc->cal_data[ADC_INPUT_VMAIN].gain,
494	gpadc->cal_data[ADC_INPUT_VMAIN].offset);
495
496	dev_dbg(gpadc->dev, "BTEMP gain %llu offset %llu\n",
497	gpadc->cal_data[ADC_INPUT_BTEMP].gain,
498	gpadc->cal_data[ADC_INPUT_BTEMP].offset);
499
500	dev_dbg(gpadc->dev, "VBAT gain %llu offset %llu\n",
501	gpadc->cal_data[ADC_INPUT_VBAT].gain,
502	gpadc->cal_data[ADC_INPUT_VBAT].offset);
503	}
504
dae2db30 AM	505	static int __devinit ab8500_gpadc_probe(struct platform_device *pdev)
	506	{
	507	int ret = 0;
	508	struct ab8500_gpadc *gpadc;
	509
	510	gpadc = kzalloc(sizeof(struct ab8500_gpadc), GFP_KERNEL);
	511	if (!gpadc) {
	512	dev_err(&pdev->dev, "Error: No memory\n");
	513	return -ENOMEM;
	514	}
	515
dae2db30 AM	516	gpadc->irq = platform_get_irq_byname(pdev, "SW_CONV_END");
dae2db30 AM	517	if (gpadc->irq < 0) {
6321992c DW	518	dev_err(gpadc->dev, "failed to get platform irq-%d\n",
6321992c DW	519	gpadc->irq);
dae2db30 AM	520	ret = gpadc->irq;
	521	goto fail;
	522	}
	523
	524	gpadc->dev = &pdev->dev;
6321992c	525	mutex_init(&gpadc->ab8500_gpadc_lock);
dae2db30 AM	526
	527	/* Initialize completion used to notify completion of conversion */
	528	init_completion(&gpadc->ab8500_gpadc_complete);
	529
	530	/* Register interrupt - SwAdcComplete */
	531	ret = request_threaded_irq(gpadc->irq, NULL,
	532	ab8500_bm_gpswadcconvend_handler,
	533	IRQF_NO_SUSPEND \| IRQF_SHARED, "ab8500-gpadc", gpadc);
	534	if (ret < 0) {
	535	dev_err(gpadc->dev, "Failed to register interrupt, irq: %d\n",
	536	gpadc->irq);
	537	goto fail;
	538	}
	539
	540	/* VTVout LDO used to power up ab8500-GPADC */
	541	gpadc->regu = regulator_get(&pdev->dev, "vddadc");
	542	if (IS_ERR(gpadc->regu)) {
	543	ret = PTR_ERR(gpadc->regu);
	544	dev_err(gpadc->dev, "failed to get vtvout LDO\n");
633e0fa5	545	goto fail_irq;
dae2db30	546	}
586f3318	547	ab8500_gpadc_read_calibration_data(gpadc);
6321992c	548	list_add_tail(&gpadc->node, &ab8500_gpadc_list);
dae2db30 AM	549	dev_dbg(gpadc->dev, "probe success\n");
dae2db30 AM	550	return 0;
633e0fa5 DW	551	fail_irq:
633e0fa5 DW	552	free_irq(gpadc->irq, gpadc);
dae2db30 AM	553	fail:
	554	kfree(gpadc);
	555	gpadc = NULL;
	556	return ret;
	557	}
	558
	559	static int __devexit ab8500_gpadc_remove(struct platform_device *pdev)
	560	{
	561	struct ab8500_gpadc *gpadc = platform_get_drvdata(pdev);
	562
6321992c DW	563	/* remove this gpadc entry from the list */
6321992c DW	564	list_del(&gpadc->node);
dae2db30	565	/* remove interrupt - completion of Sw ADC conversion */
6321992c	566	free_irq(gpadc->irq, gpadc);
dae2db30 AM	567	/* disable VTVout LDO that is being used by GPADC */
	568	regulator_put(gpadc->regu);
	569	kfree(gpadc);
	570	gpadc = NULL;
	571	return 0;
	572	}
	573
	574	static struct platform_driver ab8500_gpadc_driver = {
	575	.probe = ab8500_gpadc_probe,
	576	.remove = __devexit_p(ab8500_gpadc_remove),
	577	.driver = {
	578	.name = "ab8500-gpadc",
	579	.owner = THIS_MODULE,
	580	},
	581	};
	582
	583	static int __init ab8500_gpadc_init(void)
	584	{
	585	return platform_driver_register(&ab8500_gpadc_driver);
	586	}
	587
	588	static void __exit ab8500_gpadc_exit(void)
	589	{
	590	platform_driver_unregister(&ab8500_gpadc_driver);
	591	}
	592
	593	subsys_initcall_sync(ab8500_gpadc_init);
	594	module_exit(ab8500_gpadc_exit);
	595
	596	MODULE_LICENSE("GPL v2");
586f3318	597	MODULE_AUTHOR("Arun R Murthy, Daniel Willerud, Johan Palsson");
dae2db30 AM	598	MODULE_ALIAS("platform:ab8500_gpadc");
dae2db30 AM	599	MODULE_DESCRIPTION("AB8500 GPADC driver");