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mfd: ab8500-core: Rework MFD sub-device initialisation structures
[linux-2.6-block.git] / drivers / mfd / ab8500-core.c
CommitLineData
62579266
RV		 1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License v2
5 * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
6 * Author: Rabin Vincent <rabin.vincent@stericsson.com>
adceed62 7 * Author: Mattias Wallin <mattias.wallin@stericsson.com>
62579266
RV		 8 */
9
10#include <linux/kernel.h>
11#include <linux/slab.h>
12#include <linux/init.h>
13#include <linux/irq.h>
06e589ef 14#include <linux/irqdomain.h>
62579266
RV		 15#include <linux/delay.h>
16#include <linux/interrupt.h>
17#include <linux/module.h>
18#include <linux/platform_device.h>
19#include <linux/mfd/core.h>
47c16975 20#include <linux/mfd/abx500.h>
ee66e653 21#include <linux/mfd/abx500/ab8500.h>
00441b5e 22#include <linux/mfd/abx500/ab8500-bm.h>
d28f1db8 23#include <linux/mfd/dbx500-prcmu.h>
549931f9 24#include <linux/regulator/ab8500.h>
6bc4a568
LJ		 25#include <linux/of.h>
26#include <linux/of_device.h>
62579266
RV		 27
28/*
29 * Interrupt register offsets
30 * Bank : 0x0E
31 */
47c16975
MW		 32#define AB8500_IT_SOURCE1_REG 0x00
33#define AB8500_IT_SOURCE2_REG 0x01
34#define AB8500_IT_SOURCE3_REG 0x02
35#define AB8500_IT_SOURCE4_REG 0x03
36#define AB8500_IT_SOURCE5_REG 0x04
37#define AB8500_IT_SOURCE6_REG 0x05
38#define AB8500_IT_SOURCE7_REG 0x06
39#define AB8500_IT_SOURCE8_REG 0x07
d6255529 40#define AB9540_IT_SOURCE13_REG 0x0C
47c16975
MW		 41#define AB8500_IT_SOURCE19_REG 0x12
42#define AB8500_IT_SOURCE20_REG 0x13
43#define AB8500_IT_SOURCE21_REG 0x14
44#define AB8500_IT_SOURCE22_REG 0x15
45#define AB8500_IT_SOURCE23_REG 0x16
46#define AB8500_IT_SOURCE24_REG 0x17
62579266
RV		 47
48/*
49 * latch registers
50 */
47c16975
MW		 51#define AB8500_IT_LATCH1_REG 0x20
52#define AB8500_IT_LATCH2_REG 0x21
53#define AB8500_IT_LATCH3_REG 0x22
54#define AB8500_IT_LATCH4_REG 0x23
55#define AB8500_IT_LATCH5_REG 0x24
56#define AB8500_IT_LATCH6_REG 0x25
57#define AB8500_IT_LATCH7_REG 0x26
58#define AB8500_IT_LATCH8_REG 0x27
59#define AB8500_IT_LATCH9_REG 0x28
60#define AB8500_IT_LATCH10_REG 0x29
92d50a41 61#define AB8500_IT_LATCH12_REG 0x2B
d6255529 62#define AB9540_IT_LATCH13_REG 0x2C
47c16975
MW		 63#define AB8500_IT_LATCH19_REG 0x32
64#define AB8500_IT_LATCH20_REG 0x33
65#define AB8500_IT_LATCH21_REG 0x34
66#define AB8500_IT_LATCH22_REG 0x35
67#define AB8500_IT_LATCH23_REG 0x36
68#define AB8500_IT_LATCH24_REG 0x37
62579266
RV		 69
70/*
71 * mask registers
72 */
73
47c16975
MW		 74#define AB8500_IT_MASK1_REG 0x40
75#define AB8500_IT_MASK2_REG 0x41
76#define AB8500_IT_MASK3_REG 0x42
77#define AB8500_IT_MASK4_REG 0x43
78#define AB8500_IT_MASK5_REG 0x44
79#define AB8500_IT_MASK6_REG 0x45
80#define AB8500_IT_MASK7_REG 0x46
81#define AB8500_IT_MASK8_REG 0x47
82#define AB8500_IT_MASK9_REG 0x48
83#define AB8500_IT_MASK10_REG 0x49
84#define AB8500_IT_MASK11_REG 0x4A
85#define AB8500_IT_MASK12_REG 0x4B
86#define AB8500_IT_MASK13_REG 0x4C
87#define AB8500_IT_MASK14_REG 0x4D
88#define AB8500_IT_MASK15_REG 0x4E
89#define AB8500_IT_MASK16_REG 0x4F
90#define AB8500_IT_MASK17_REG 0x50
91#define AB8500_IT_MASK18_REG 0x51
92#define AB8500_IT_MASK19_REG 0x52
93#define AB8500_IT_MASK20_REG 0x53
94#define AB8500_IT_MASK21_REG 0x54
95#define AB8500_IT_MASK22_REG 0x55
96#define AB8500_IT_MASK23_REG 0x56
97#define AB8500_IT_MASK24_REG 0x57
a29264b6 98#define AB8500_IT_MASK25_REG 0x58
47c16975 99
7ccfe9b1
MJ		 100/*
101 * latch hierarchy registers
102 */
103#define AB8500_IT_LATCHHIER1_REG 0x60
104#define AB8500_IT_LATCHHIER2_REG 0x61
105#define AB8500_IT_LATCHHIER3_REG 0x62
106
107#define AB8500_IT_LATCHHIER_NUM 3
108
47c16975 109#define AB8500_REV_REG 0x80
0f620837 110#define AB8500_IC_NAME_REG 0x82
e5c238c3 111#define AB8500_SWITCH_OFF_STATUS 0x00
62579266 112
b4a31037
AL		 113#define AB8500_TURN_ON_STATUS 0x00
114
f04a9d8a
RK		 115#define AB8500_CH_USBCH_STAT1_REG 0x02
116#define VBUS_DET_DBNC100 0x02
117#define VBUS_DET_DBNC1 0x01
118
119static DEFINE_SPINLOCK(on_stat_lock);
120static u8 turn_on_stat_mask = 0xFF;
121static u8 turn_on_stat_set;
6ef9418c
RA		 122static bool no_bm; /* No battery management */
123module_param(no_bm, bool, S_IRUGO);
124
d6255529
LW		 125#define AB9540_MODEM_CTRL2_REG 0x23
126#define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT BIT(2)
127
62579266
RV		 128/*
129 * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt
2ced445e
LW		 130 * numbers are indexed into this array with (num / 8). The interupts are
131 * defined in linux/mfd/ab8500.h
62579266
RV		 132 *
133 * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at
134 * offset 0.
135 */
2ced445e 136/* AB8500 support */
62579266 137static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = {
92d50a41 138 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21,
62579266
RV		 139};
140
a29264b6 141/* AB9540 / AB8505 support */
d6255529 142static const int ab9540_irq_regoffset[AB9540_NUM_IRQ_REGS] = {
a29264b6 143 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22, 23
d6255529
LW		 144};
145
0f620837
LW		 146static const char ab8500_version_str[][7] = {
147 [AB8500_VERSION_AB8500] = "AB8500",
148 [AB8500_VERSION_AB8505] = "AB8505",
149 [AB8500_VERSION_AB9540] = "AB9540",
150 [AB8500_VERSION_AB8540] = "AB8540",
151};
152
822672a7 153static int ab8500_prcmu_write(struct ab8500 *ab8500, u16 addr, u8 data)
d28f1db8
LJ		 154{
155 int ret;
156
157 ret = prcmu_abb_write((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1);
158 if (ret < 0)
159 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
160 return ret;
161}
162
822672a7 163static int ab8500_prcmu_write_masked(struct ab8500 *ab8500, u16 addr, u8 mask,
d28f1db8
LJ		 164 u8 data)
165{
166 int ret;
167
168 ret = prcmu_abb_write_masked((u8)(addr >> 8), (u8)(addr & 0xFF), &data,
169 &mask, 1);
170 if (ret < 0)
171 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
172 return ret;
173}
174
822672a7 175static int ab8500_prcmu_read(struct ab8500 *ab8500, u16 addr)
d28f1db8
LJ		 176{
177 int ret;
178 u8 data;
179
180 ret = prcmu_abb_read((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1);
181 if (ret < 0) {
182 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
183 return ret;
184 }
185 return (int)data;
186}
187
47c16975
MW		 188static int ab8500_get_chip_id(struct device *dev)
189{
6bce7bf1
MW		 190 struct ab8500 *ab8500;
191
192 if (!dev)
193 return -EINVAL;
194 ab8500 = dev_get_drvdata(dev->parent);
195 return ab8500 ? (int)ab8500->chip_id : -EINVAL;
47c16975
MW		 196}
197
198static int set_register_interruptible(struct ab8500 *ab8500, u8 bank,
199 u8 reg, u8 data)
62579266
RV		 200{
201 int ret;
47c16975
MW		 202 /*
203 * Put the u8 bank and u8 register together into a an u16.
204 * The bank on higher 8 bits and register in lower 8 bits.
205 * */
206 u16 addr = ((u16)bank) << 8 | reg;
62579266
RV		 207
208 dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data);
209
392cbd1e 210 mutex_lock(&ab8500->lock);
47c16975 211
62579266
RV		 212 ret = ab8500->write(ab8500, addr, data);
213 if (ret < 0)
214 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
215 addr, ret);
47c16975 216 mutex_unlock(&ab8500->lock);
62579266
RV		 217
218 return ret;
219}
220
47c16975
MW		 221static int ab8500_set_register(struct device *dev, u8 bank,
222 u8 reg, u8 value)
62579266 223{
112a80d2 224 int ret;
47c16975 225 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
62579266 226
112a80d2
JA		 227 atomic_inc(&ab8500->transfer_ongoing);
228 ret = set_register_interruptible(ab8500, bank, reg, value);
229 atomic_dec(&ab8500->transfer_ongoing);
230 return ret;
62579266 231}
62579266 232
47c16975
MW		 233static int get_register_interruptible(struct ab8500 *ab8500, u8 bank,
234 u8 reg, u8 *value)
62579266
RV		 235{
236 int ret;
47c16975
MW		 237 /* put the u8 bank and u8 reg together into a an u16.
238 * bank on higher 8 bits and reg in lower */
239 u16 addr = ((u16)bank) << 8 | reg;
240
392cbd1e 241 mutex_lock(&ab8500->lock);
62579266
RV		 242
243 ret = ab8500->read(ab8500, addr);
244 if (ret < 0)
245 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
246 addr, ret);
47c16975
MW		 247 else
248 *value = ret;
62579266 249
47c16975 250 mutex_unlock(&ab8500->lock);
62579266
RV		 251 dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret);
252
253 return ret;
254}
255
47c16975
MW		 256static int ab8500_get_register(struct device *dev, u8 bank,
257 u8 reg, u8 *value)
62579266 258{
112a80d2 259 int ret;
47c16975 260 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
62579266 261
112a80d2
JA		 262 atomic_inc(&ab8500->transfer_ongoing);
263 ret = get_register_interruptible(ab8500, bank, reg, value);
264 atomic_dec(&ab8500->transfer_ongoing);
265 return ret;
62579266 266}
47c16975
MW		 267
268static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank,
269 u8 reg, u8 bitmask, u8 bitvalues)
62579266
RV		 270{
271 int ret;
47c16975
MW		 272 /* put the u8 bank and u8 reg together into a an u16.
273 * bank on higher 8 bits and reg in lower */
274 u16 addr = ((u16)bank) << 8 | reg;
62579266 275
392cbd1e 276 mutex_lock(&ab8500->lock);
62579266 277
bc628fd1
MN		 278 if (ab8500->write_masked == NULL) {
279 u8 data;
62579266 280
bc628fd1
MN		 281 ret = ab8500->read(ab8500, addr);
282 if (ret < 0) {
283 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
284 addr, ret);
285 goto out;
286 }
62579266 287
bc628fd1
MN		 288 data = (u8)ret;
289 data = (~bitmask & data) | (bitmask & bitvalues);
290
291 ret = ab8500->write(ab8500, addr, data);
292 if (ret < 0)
293 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
294 addr, ret);
62579266 295
bc628fd1
MN		 296 dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr,
297 data);
298 goto out;
299 }
300 ret = ab8500->write_masked(ab8500, addr, bitmask, bitvalues);
301 if (ret < 0)
302 dev_err(ab8500->dev, "failed to modify reg %#x: %d\n", addr,
303 ret);
62579266
RV		 304out:
305 mutex_unlock(&ab8500->lock);
306 return ret;
307}
47c16975
MW		 308
309static int ab8500_mask_and_set_register(struct device *dev,
310 u8 bank, u8 reg, u8 bitmask, u8 bitvalues)
311{
112a80d2 312 int ret;
47c16975
MW		 313 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
314
112a80d2
JA		 315 atomic_inc(&ab8500->transfer_ongoing);
316 ret= mask_and_set_register_interruptible(ab8500, bank, reg,
317 bitmask, bitvalues);
318 atomic_dec(&ab8500->transfer_ongoing);
319 return ret;
47c16975
MW		 320}
321
322static struct abx500_ops ab8500_ops = {
323 .get_chip_id = ab8500_get_chip_id,
324 .get_register = ab8500_get_register,
325 .set_register = ab8500_set_register,
326 .get_register_page = NULL,
327 .set_register_page = NULL,
328 .mask_and_set_register = ab8500_mask_and_set_register,
329 .event_registers_startup_state_get = NULL,
330 .startup_irq_enabled = NULL,
1d843a6c 331 .dump_all_banks = ab8500_dump_all_banks,
47c16975 332};
62579266 333
9505a0a0 334static void ab8500_irq_lock(struct irq_data *data)
62579266 335{
9505a0a0 336 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
62579266
RV		 337
338 mutex_lock(&ab8500->irq_lock);
112a80d2 339 atomic_inc(&ab8500->transfer_ongoing);
62579266
RV		 340}
341
9505a0a0 342static void ab8500_irq_sync_unlock(struct irq_data *data)
62579266 343{
9505a0a0 344 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
62579266
RV		 345 int i;
346
2ced445e 347 for (i = 0; i < ab8500->mask_size; i++) {
62579266
RV		 348 u8 old = ab8500->oldmask[i];
349 u8 new = ab8500->mask[i];
350 int reg;
351
352 if (new == old)
353 continue;
354
0f620837
LW		 355 /*
356 * Interrupt register 12 doesn't exist prior to AB8500 version
357 * 2.0
358 */
359 if (ab8500->irq_reg_offset[i] == 11 &&
360 is_ab8500_1p1_or_earlier(ab8500))
92d50a41
MW		 361 continue;
362
62579266
RV		 363 ab8500->oldmask[i] = new;
364
2ced445e 365 reg = AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i];
47c16975 366 set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new);
62579266 367 }
112a80d2 368 atomic_dec(&ab8500->transfer_ongoing);
62579266
RV		 369 mutex_unlock(&ab8500->irq_lock);
370}
371
9505a0a0 372static void ab8500_irq_mask(struct irq_data *data)
62579266 373{
9505a0a0 374 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
06e589ef 375 int offset = data->hwirq;
62579266
RV		 376 int index = offset / 8;
377 int mask = 1 << (offset % 8);
378
379 ab8500->mask[index] |= mask;
9c677b9b
LJ		 380
381 /* The AB8500 GPIOs have two interrupts each (rising & falling). */
382 if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R)
383 ab8500->mask[index + 2] |= mask;
384 if (offset >= AB9540_INT_GPIO50R && offset <= AB9540_INT_GPIO54R)
385 ab8500->mask[index + 1] |= mask;
386 if (offset == AB8540_INT_GPIO43R || offset == AB8540_INT_GPIO44R)
e2ddf46a
LW		 387 /* Here the falling IRQ is one bit lower */
388 ab8500->mask[index] |= (mask << 1);
62579266
RV		 389}
390
9505a0a0 391static void ab8500_irq_unmask(struct irq_data *data)
62579266 392{
9505a0a0 393 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
9c677b9b 394 unsigned int type = irqd_get_trigger_type(data);
06e589ef 395 int offset = data->hwirq;
62579266
RV		 396 int index = offset / 8;
397 int mask = 1 << (offset % 8);
398
9c677b9b
LJ		 399 if (type & IRQ_TYPE_EDGE_RISING)
400 ab8500->mask[index] &= ~mask;
401
402 /* The AB8500 GPIOs have two interrupts each (rising & falling). */
403 if (type & IRQ_TYPE_EDGE_FALLING) {
404 if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R)
405 ab8500->mask[index + 2] &= ~mask;
406 else if (offset >= AB9540_INT_GPIO50R && offset <= AB9540_INT_GPIO54R)
407 ab8500->mask[index + 1] &= ~mask;
408 else if (offset == AB8540_INT_GPIO43R || offset == AB8540_INT_GPIO44R)
e2ddf46a
LW		 409 /* Here the falling IRQ is one bit lower */
410 ab8500->mask[index] &= ~(mask << 1);
9c677b9b
LJ		 411 else
412 ab8500->mask[index] &= ~mask;
e2ddf46a 413 } else {
9c677b9b
LJ		 414 /* Satisfies the case where type is not set. */
415 ab8500->mask[index] &= ~mask;
e2ddf46a 416 }
62579266
RV		 417}
418
40f6e5a2
LJ		 419static int ab8500_irq_set_type(struct irq_data *data, unsigned int type)
420{
421 return 0;
62579266
RV		 422}
423
424static struct irq_chip ab8500_irq_chip = {
425 .name = "ab8500",
9505a0a0
MB		 426 .irq_bus_lock = ab8500_irq_lock,
427 .irq_bus_sync_unlock = ab8500_irq_sync_unlock,
428 .irq_mask = ab8500_irq_mask,
e6f9306e 429 .irq_disable = ab8500_irq_mask,
9505a0a0 430 .irq_unmask = ab8500_irq_unmask,
40f6e5a2 431 .irq_set_type = ab8500_irq_set_type,
62579266
RV		 432};
433
7ccfe9b1
MJ		 434static int ab8500_handle_hierarchical_line(struct ab8500 *ab8500,
435 int latch_offset, u8 latch_val)
436{
437 int int_bit = __ffs(latch_val);
438 int line, i;
439
440 do {
441 int_bit = __ffs(latch_val);
442
443 for (i = 0; i < ab8500->mask_size; i++)
444 if (ab8500->irq_reg_offset[i] == latch_offset)
445 break;
446
447 if (i >= ab8500->mask_size) {
448 dev_err(ab8500->dev, "Register offset 0x%2x not declared\n",
449 latch_offset);
450 return -ENXIO;
451 }
452
453 line = (i << 3) + int_bit;
454 latch_val &= ~(1 << int_bit);
455
e2ddf46a
LW		 456 /*
457 * This handles the falling edge hwirqs from the GPIO
458 * lines. Route them back to the line registered for the
459 * rising IRQ, as this is merely a flag for the same IRQ
460 * in linux terms.
461 */
462 if (line >= AB8500_INT_GPIO6F && line <= AB8500_INT_GPIO41F)
463 line -= 16;
464 if (line >= AB9540_INT_GPIO50F && line <= AB9540_INT_GPIO54F)
465 line -= 8;
466 if (line == AB8540_INT_GPIO43F || line == AB8540_INT_GPIO44F)
467 line += 1;
468
7ccfe9b1
MJ		 469 handle_nested_irq(ab8500->irq_base + line);
470 } while (latch_val);
471
472 return 0;
473}
474
475static int ab8500_handle_hierarchical_latch(struct ab8500 *ab8500,
476 int hier_offset, u8 hier_val)
477{
478 int latch_bit, status;
479 u8 latch_offset, latch_val;
480
481 do {
482 latch_bit = __ffs(hier_val);
483 latch_offset = (hier_offset << 3) + latch_bit;
484
485 /* Fix inconsistent ITFromLatch25 bit mapping... */
486 if (unlikely(latch_offset == 17))
487 latch_offset = 24;
488
489 status = get_register_interruptible(ab8500,
490 AB8500_INTERRUPT,
491 AB8500_IT_LATCH1_REG + latch_offset,
492 &latch_val);
493 if (status < 0 || latch_val == 0)
494 goto discard;
495
496 status = ab8500_handle_hierarchical_line(ab8500,
497 latch_offset, latch_val);
498 if (status < 0)
499 return status;
500discard:
501 hier_val &= ~(1 << latch_bit);
502 } while (hier_val);
503
504 return 0;
505}
506
507static irqreturn_t ab8500_hierarchical_irq(int irq, void *dev)
508{
509 struct ab8500 *ab8500 = dev;
510 u8 i;
511
512 dev_vdbg(ab8500->dev, "interrupt\n");
513
514 /* Hierarchical interrupt version */
515 for (i = 0; i < AB8500_IT_LATCHHIER_NUM; i++) {
516 int status;
517 u8 hier_val;
518
519 status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
520 AB8500_IT_LATCHHIER1_REG + i, &hier_val);
521 if (status < 0 || hier_val == 0)
522 continue;
523
524 status = ab8500_handle_hierarchical_latch(ab8500, i, hier_val);
525 if (status < 0)
526 break;
527 }
528 return IRQ_HANDLED;
529}
530
80633f05
LJ		 531/**
532 * ab8500_irq_get_virq(): Map an interrupt on a chip to a virtual IRQ
533 *
534 * @ab8500: ab8500_irq controller to operate on.
535 * @irq: index of the interrupt requested in the chip IRQs
536 *
537 * Useful for drivers to request their own IRQs.
538 */
539static int ab8500_irq_get_virq(struct ab8500 *ab8500, int irq)
540{
541 if (!ab8500)
542 return -EINVAL;
543
544 return irq_create_mapping(ab8500->domain, irq);
545}
546
62579266
RV		 547static irqreturn_t ab8500_irq(int irq, void *dev)
548{
549 struct ab8500 *ab8500 = dev;
550 int i;
551
552 dev_vdbg(ab8500->dev, "interrupt\n");
553
112a80d2
JA		 554 atomic_inc(&ab8500->transfer_ongoing);
555
2ced445e
LW		 556 for (i = 0; i < ab8500->mask_size; i++) {
557 int regoffset = ab8500->irq_reg_offset[i];
62579266 558 int status;
47c16975 559 u8 value;
62579266 560
0f620837
LW		 561 /*
562 * Interrupt register 12 doesn't exist prior to AB8500 version
563 * 2.0
564 */
565 if (regoffset == 11 && is_ab8500_1p1_or_earlier(ab8500))
92d50a41
MW		 566 continue;
567
47c16975
MW		 568 status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
569 AB8500_IT_LATCH1_REG + regoffset, &value);
570 if (status < 0 || value == 0)
62579266
RV		 571 continue;
572
573 do {
88aec4f7 574 int bit = __ffs(value);
62579266 575 int line = i * 8 + bit;
0a37fc56 576 int virq = ab8500_irq_get_virq(ab8500, line);
62579266 577
0a37fc56 578 handle_nested_irq(virq);
8f0eb43b 579 ab8500_debug_register_interrupt(line);
47c16975 580 value &= ~(1 << bit);
112a80d2 581
47c16975 582 } while (value);
62579266 583 }
112a80d2 584 atomic_dec(&ab8500->transfer_ongoing);
62579266
RV		 585 return IRQ_HANDLED;
586}
587
06e589ef
LJ		 588static int ab8500_irq_map(struct irq_domain *d, unsigned int virq,
589 irq_hw_number_t hwirq)
590{
591 struct ab8500 *ab8500 = d->host_data;
592
593 if (!ab8500)
594 return -EINVAL;
595
596 irq_set_chip_data(virq, ab8500);
597 irq_set_chip_and_handler(virq, &ab8500_irq_chip,
598 handle_simple_irq);
599 irq_set_nested_thread(virq, 1);
62579266 600#ifdef CONFIG_ARM
06e589ef 601 set_irq_flags(virq, IRQF_VALID);
62579266 602#else
06e589ef 603 irq_set_noprobe(virq);
62579266 604#endif
62579266
RV		 605
606 return 0;
607}
608
06e589ef
LJ		 609static struct irq_domain_ops ab8500_irq_ops = {
610 .map = ab8500_irq_map,
611 .xlate = irq_domain_xlate_twocell,
612};
613
614static int ab8500_irq_init(struct ab8500 *ab8500, struct device_node *np)
62579266 615{
2ced445e
LW		 616 int num_irqs;
617
d6255529
LW		 618 if (is_ab9540(ab8500))
619 num_irqs = AB9540_NR_IRQS;
a982362c
BJ		 620 else if (is_ab8505(ab8500))
621 num_irqs = AB8505_NR_IRQS;
d6255529
LW		 622 else
623 num_irqs = AB8500_NR_IRQS;
62579266 624
f1d11f39
LW		 625 /* If ->irq_base is zero this will give a linear mapping */
626 ab8500->domain = irq_domain_add_simple(NULL,
627 num_irqs, ab8500->irq_base,
628 &ab8500_irq_ops, ab8500);
06e589ef
LJ		 629
630 if (!ab8500->domain) {
631 dev_err(ab8500->dev, "Failed to create irqdomain\n");
632 return -ENOSYS;
633 }
634
635 return 0;
62579266
RV		 636}
637
112a80d2
JA		 638int ab8500_suspend(struct ab8500 *ab8500)
639{
640 if (atomic_read(&ab8500->transfer_ongoing))
641 return -EINVAL;
642 else
643 return 0;
644}
645
a9e9ce4c 646static struct resource ab8500_gpadc_resources[] = {
62579266
RV		 647 {
648 .name = "HW_CONV_END",
649 .start = AB8500_INT_GP_HW_ADC_CONV_END,
650 .end = AB8500_INT_GP_HW_ADC_CONV_END,
651 .flags = IORESOURCE_IRQ,
652 },
653 {
654 .name = "SW_CONV_END",
655 .start = AB8500_INT_GP_SW_ADC_CONV_END,
656 .end = AB8500_INT_GP_SW_ADC_CONV_END,
657 .flags = IORESOURCE_IRQ,
658 },
659};
660
4b106fb9 661static struct resource ab8505_gpadc_resources[] = {
c0eda9ae
LJ		 662 {
663 .name = "SW_CONV_END",
664 .start = AB8500_INT_GP_SW_ADC_CONV_END,
665 .end = AB8500_INT_GP_SW_ADC_CONV_END,
666 .flags = IORESOURCE_IRQ,
667 },
668};
669
a9e9ce4c 670static struct resource ab8500_rtc_resources[] = {
62579266
RV		 671 {
672 .name = "60S",
673 .start = AB8500_INT_RTC_60S,
674 .end = AB8500_INT_RTC_60S,
675 .flags = IORESOURCE_IRQ,
676 },
677 {
678 .name = "ALARM",
679 .start = AB8500_INT_RTC_ALARM,
680 .end = AB8500_INT_RTC_ALARM,
681 .flags = IORESOURCE_IRQ,
682 },
683};
684
a9e9ce4c 685static struct resource ab8500_poweronkey_db_resources[] = {
77686517
SI		 686 {
687 .name = "ONKEY_DBF",
688 .start = AB8500_INT_PON_KEY1DB_F,
689 .end = AB8500_INT_PON_KEY1DB_F,
690 .flags = IORESOURCE_IRQ,
691 },
692 {
693 .name = "ONKEY_DBR",
694 .start = AB8500_INT_PON_KEY1DB_R,
695 .end = AB8500_INT_PON_KEY1DB_R,
696 .flags = IORESOURCE_IRQ,
697 },
698};
699
a9e9ce4c 700static struct resource ab8500_av_acc_detect_resources[] = {
e098aded 701 {
6af75ecd
LW		 702 .name = "ACC_DETECT_1DB_F",
703 .start = AB8500_INT_ACC_DETECT_1DB_F,
704 .end = AB8500_INT_ACC_DETECT_1DB_F,
705 .flags = IORESOURCE_IRQ,
e098aded
MW		 706 },
707 {
6af75ecd
LW		 708 .name = "ACC_DETECT_1DB_R",
709 .start = AB8500_INT_ACC_DETECT_1DB_R,
710 .end = AB8500_INT_ACC_DETECT_1DB_R,
711 .flags = IORESOURCE_IRQ,
712 },
713 {
714 .name = "ACC_DETECT_21DB_F",
715 .start = AB8500_INT_ACC_DETECT_21DB_F,
716 .end = AB8500_INT_ACC_DETECT_21DB_F,
717 .flags = IORESOURCE_IRQ,
718 },
719 {
720 .name = "ACC_DETECT_21DB_R",
721 .start = AB8500_INT_ACC_DETECT_21DB_R,
722 .end = AB8500_INT_ACC_DETECT_21DB_R,
723 .flags = IORESOURCE_IRQ,
724 },
725 {
726 .name = "ACC_DETECT_22DB_F",
727 .start = AB8500_INT_ACC_DETECT_22DB_F,
728 .end = AB8500_INT_ACC_DETECT_22DB_F,
729 .flags = IORESOURCE_IRQ,
e098aded 730 },
6af75ecd
LW		 731 {
732 .name = "ACC_DETECT_22DB_R",
733 .start = AB8500_INT_ACC_DETECT_22DB_R,
734 .end = AB8500_INT_ACC_DETECT_22DB_R,
735 .flags = IORESOURCE_IRQ,
736 },
737};
738
a9e9ce4c 739static struct resource ab8500_charger_resources[] = {
e098aded
MW		 740 {
741 .name = "MAIN_CH_UNPLUG_DET",
742 .start = AB8500_INT_MAIN_CH_UNPLUG_DET,
743 .end = AB8500_INT_MAIN_CH_UNPLUG_DET,
744 .flags = IORESOURCE_IRQ,
745 },
746 {
747 .name = "MAIN_CHARGE_PLUG_DET",
748 .start = AB8500_INT_MAIN_CH_PLUG_DET,
749 .end = AB8500_INT_MAIN_CH_PLUG_DET,
750 .flags = IORESOURCE_IRQ,
751 },
e098aded
MW		 752 {
753 .name = "VBUS_DET_R",
754 .start = AB8500_INT_VBUS_DET_R,
755 .end = AB8500_INT_VBUS_DET_R,
756 .flags = IORESOURCE_IRQ,
757 },
758 {
6af75ecd
LW		 759 .name = "VBUS_DET_F",
760 .start = AB8500_INT_VBUS_DET_F,
761 .end = AB8500_INT_VBUS_DET_F,
e098aded
MW		 762 .flags = IORESOURCE_IRQ,
763 },
764 {
6af75ecd
LW		 765 .name = "USB_LINK_STATUS",
766 .start = AB8500_INT_USB_LINK_STATUS,
767 .end = AB8500_INT_USB_LINK_STATUS,
768 .flags = IORESOURCE_IRQ,
769 },
e098aded
MW		 770 {
771 .name = "VBUS_OVV",
772 .start = AB8500_INT_VBUS_OVV,
773 .end = AB8500_INT_VBUS_OVV,
774 .flags = IORESOURCE_IRQ,
775 },
776 {
6af75ecd
LW		 777 .name = "USB_CH_TH_PROT_R",
778 .start = AB8500_INT_USB_CH_TH_PROT_R,
779 .end = AB8500_INT_USB_CH_TH_PROT_R,
e098aded
MW		 780 .flags = IORESOURCE_IRQ,
781 },
782 {
6af75ecd
LW		 783 .name = "USB_CH_TH_PROT_F",
784 .start = AB8500_INT_USB_CH_TH_PROT_F,
785 .end = AB8500_INT_USB_CH_TH_PROT_F,
e098aded
MW		 786 .flags = IORESOURCE_IRQ,
787 },
788 {
6af75ecd
LW		 789 .name = "MAIN_EXT_CH_NOT_OK",
790 .start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
791 .end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
792 .flags = IORESOURCE_IRQ,
793 },
794 {
795 .name = "MAIN_CH_TH_PROT_R",
796 .start = AB8500_INT_MAIN_CH_TH_PROT_R,
797 .end = AB8500_INT_MAIN_CH_TH_PROT_R,
798 .flags = IORESOURCE_IRQ,
799 },
800 {
801 .name = "MAIN_CH_TH_PROT_F",
802 .start = AB8500_INT_MAIN_CH_TH_PROT_F,
803 .end = AB8500_INT_MAIN_CH_TH_PROT_F,
804 .flags = IORESOURCE_IRQ,
805 },
806 {
807 .name = "USB_CHARGER_NOT_OKR",
a982362c
BJ		 808 .start = AB8500_INT_USB_CHARGER_NOT_OKR,
809 .end = AB8500_INT_USB_CHARGER_NOT_OKR,
6af75ecd
LW		 810 .flags = IORESOURCE_IRQ,
811 },
812 {
813 .name = "CH_WD_EXP",
814 .start = AB8500_INT_CH_WD_EXP,
815 .end = AB8500_INT_CH_WD_EXP,
816 .flags = IORESOURCE_IRQ,
817 },
34c11a70
POH		 818 {
819 .name = "VBUS_CH_DROP_END",
820 .start = AB8500_INT_VBUS_CH_DROP_END,
821 .end = AB8500_INT_VBUS_CH_DROP_END,
822 .flags = IORESOURCE_IRQ,
823 },
6af75ecd
LW		 824};
825
a9e9ce4c 826static struct resource ab8500_btemp_resources[] = {
6af75ecd
LW		 827 {
828 .name = "BAT_CTRL_INDB",
829 .start = AB8500_INT_BAT_CTRL_INDB,
830 .end = AB8500_INT_BAT_CTRL_INDB,
e098aded
MW		 831 .flags = IORESOURCE_IRQ,
832 },
833 {
834 .name = "BTEMP_LOW",
835 .start = AB8500_INT_BTEMP_LOW,
836 .end = AB8500_INT_BTEMP_LOW,
837 .flags = IORESOURCE_IRQ,
838 },
839 {
840 .name = "BTEMP_HIGH",
841 .start = AB8500_INT_BTEMP_HIGH,
842 .end = AB8500_INT_BTEMP_HIGH,
843 .flags = IORESOURCE_IRQ,
844 },
845 {
6af75ecd
LW		 846 .name = "BTEMP_LOW_MEDIUM",
847 .start = AB8500_INT_BTEMP_LOW_MEDIUM,
848 .end = AB8500_INT_BTEMP_LOW_MEDIUM,
e098aded
MW		 849 .flags = IORESOURCE_IRQ,
850 },
851 {
6af75ecd
LW		 852 .name = "BTEMP_MEDIUM_HIGH",
853 .start = AB8500_INT_BTEMP_MEDIUM_HIGH,
854 .end = AB8500_INT_BTEMP_MEDIUM_HIGH,
e098aded
MW		 855 .flags = IORESOURCE_IRQ,
856 },
6af75ecd
LW		 857};
858
a9e9ce4c 859static struct resource ab8500_fg_resources[] = {
e098aded 860 {
6af75ecd
LW		 861 .name = "NCONV_ACCU",
862 .start = AB8500_INT_CCN_CONV_ACC,
863 .end = AB8500_INT_CCN_CONV_ACC,
e098aded
MW		 864 .flags = IORESOURCE_IRQ,
865 },
866 {
6af75ecd
LW		 867 .name = "BATT_OVV",
868 .start = AB8500_INT_BATT_OVV,
869 .end = AB8500_INT_BATT_OVV,
e098aded
MW		 870 .flags = IORESOURCE_IRQ,
871 },
872 {
6af75ecd
LW		 873 .name = "LOW_BAT_F",
874 .start = AB8500_INT_LOW_BAT_F,
875 .end = AB8500_INT_LOW_BAT_F,
876 .flags = IORESOURCE_IRQ,
877 },
878 {
879 .name = "LOW_BAT_R",
880 .start = AB8500_INT_LOW_BAT_R,
881 .end = AB8500_INT_LOW_BAT_R,
882 .flags = IORESOURCE_IRQ,
883 },
884 {
885 .name = "CC_INT_CALIB",
886 .start = AB8500_INT_CC_INT_CALIB,
887 .end = AB8500_INT_CC_INT_CALIB,
e098aded
MW		 888 .flags = IORESOURCE_IRQ,
889 },
a982362c
BJ		 890 {
891 .name = "CCEOC",
892 .start = AB8500_INT_CCEOC,
893 .end = AB8500_INT_CCEOC,
894 .flags = IORESOURCE_IRQ,
895 },
e098aded
MW		 896};
897
a9e9ce4c 898static struct resource ab8500_chargalg_resources[] = {};
6af75ecd 899
df720647 900#ifdef CONFIG_DEBUG_FS
a9e9ce4c 901static struct resource ab8500_debug_resources[] = {
e098aded
MW		 902 {
903 .name = "IRQ_FIRST",
904 .start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
905 .end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
906 .flags = IORESOURCE_IRQ,
907 },
908 {
909 .name = "IRQ_LAST",
a982362c
BJ		 910 .start = AB8500_INT_XTAL32K_KO,
911 .end = AB8500_INT_XTAL32K_KO,
e098aded
MW		 912 .flags = IORESOURCE_IRQ,
913 },
914};
df720647 915#endif
e098aded 916
a9e9ce4c 917static struct resource ab8500_usb_resources[] = {
e098aded
MW		 918 {
919 .name = "ID_WAKEUP_R",
920 .start = AB8500_INT_ID_WAKEUP_R,
921 .end = AB8500_INT_ID_WAKEUP_R,
922 .flags = IORESOURCE_IRQ,
923 },
924 {
925 .name = "ID_WAKEUP_F",
926 .start = AB8500_INT_ID_WAKEUP_F,
927 .end = AB8500_INT_ID_WAKEUP_F,
928 .flags = IORESOURCE_IRQ,
929 },
930 {
931 .name = "VBUS_DET_F",
932 .start = AB8500_INT_VBUS_DET_F,
933 .end = AB8500_INT_VBUS_DET_F,
934 .flags = IORESOURCE_IRQ,
935 },
936 {
937 .name = "VBUS_DET_R",
938 .start = AB8500_INT_VBUS_DET_R,
939 .end = AB8500_INT_VBUS_DET_R,
940 .flags = IORESOURCE_IRQ,
941 },
92d50a41
MW		 942 {
943 .name = "USB_LINK_STATUS",
944 .start = AB8500_INT_USB_LINK_STATUS,
945 .end = AB8500_INT_USB_LINK_STATUS,
946 .flags = IORESOURCE_IRQ,
947 },
6af75ecd
LW		 948 {
949 .name = "USB_ADP_PROBE_PLUG",
950 .start = AB8500_INT_ADP_PROBE_PLUG,
951 .end = AB8500_INT_ADP_PROBE_PLUG,
952 .flags = IORESOURCE_IRQ,
953 },
954 {
955 .name = "USB_ADP_PROBE_UNPLUG",
956 .start = AB8500_INT_ADP_PROBE_UNPLUG,
957 .end = AB8500_INT_ADP_PROBE_UNPLUG,
958 .flags = IORESOURCE_IRQ,
959 },
e098aded
MW		 960};
961
a9e9ce4c 962static struct resource ab8505_iddet_resources[] = {
44f72e53
VS		 963 {
964 .name = "KeyDeglitch",
965 .start = AB8505_INT_KEYDEGLITCH,
966 .end = AB8505_INT_KEYDEGLITCH,
967 .flags = IORESOURCE_IRQ,
968 },
969 {
970 .name = "KP",
971 .start = AB8505_INT_KP,
972 .end = AB8505_INT_KP,
973 .flags = IORESOURCE_IRQ,
974 },
975 {
976 .name = "IKP",
977 .start = AB8505_INT_IKP,
978 .end = AB8505_INT_IKP,
979 .flags = IORESOURCE_IRQ,
980 },
981 {
982 .name = "IKR",
983 .start = AB8505_INT_IKR,
984 .end = AB8505_INT_IKR,
985 .flags = IORESOURCE_IRQ,
986 },
987 {
988 .name = "KeyStuck",
989 .start = AB8505_INT_KEYSTUCK,
990 .end = AB8505_INT_KEYSTUCK,
991 .flags = IORESOURCE_IRQ,
992 },
993};
994
a9e9ce4c 995static struct resource ab8500_temp_resources[] = {
e098aded 996 {
151621a7 997 .name = "ABX500_TEMP_WARM",
e098aded
MW		 998 .start = AB8500_INT_TEMP_WARM,
999 .end = AB8500_INT_TEMP_WARM,
1000 .flags = IORESOURCE_IRQ,
1001 },
1002};
1003
4b106fb9
LJ		 1004static struct mfd_cell ab8500_bm_devs[] = {
1005 {
1006 .name = "ab8500-charger",
1007 .of_compatible = "stericsson,ab8500-charger",
1008 .num_resources = ARRAY_SIZE(ab8500_charger_resources),
1009 .resources = ab8500_charger_resources,
1010 .platform_data = &ab8500_bm_data,
1011 .pdata_size = sizeof(ab8500_bm_data),
1012 },
1013 {
1014 .name = "ab8500-btemp",
1015 .of_compatible = "stericsson,ab8500-btemp",
1016 .num_resources = ARRAY_SIZE(ab8500_btemp_resources),
1017 .resources = ab8500_btemp_resources,
1018 .platform_data = &ab8500_bm_data,
1019 .pdata_size = sizeof(ab8500_bm_data),
1020 },
1021 {
1022 .name = "ab8500-fg",
1023 .of_compatible = "stericsson,ab8500-fg",
1024 .num_resources = ARRAY_SIZE(ab8500_fg_resources),
1025 .resources = ab8500_fg_resources,
1026 .platform_data = &ab8500_bm_data,
1027 .pdata_size = sizeof(ab8500_bm_data),
1028 },
1029 {
1030 .name = "ab8500-chargalg",
1031 .of_compatible = "stericsson,ab8500-chargalg",
1032 .num_resources = ARRAY_SIZE(ab8500_chargalg_resources),
1033 .resources = ab8500_chargalg_resources,
1034 .platform_data = &ab8500_bm_data,
1035 .pdata_size = sizeof(ab8500_bm_data),
1036 },
1037};
1038
1039static struct mfd_cell ab8500_devs[] = {
5814fc35
MW		 1040#ifdef CONFIG_DEBUG_FS
1041 {
1042 .name = "ab8500-debug",
bad76991 1043 .of_compatible = "stericsson,ab8500-debug",
e098aded
MW		 1044 .num_resources = ARRAY_SIZE(ab8500_debug_resources),
1045 .resources = ab8500_debug_resources,
5814fc35
MW		 1046 },
1047#endif
e098aded
MW		 1048 {
1049 .name = "ab8500-sysctrl",
bad76991 1050 .of_compatible = "stericsson,ab8500-sysctrl",
e098aded
MW		 1051 },
1052 {
1053 .name = "ab8500-regulator",
bad76991 1054 .of_compatible = "stericsson,ab8500-regulator",
e098aded 1055 },
916a871c
UH		 1056 {
1057 .name = "abx500-clk",
1058 .of_compatible = "stericsson,abx500-clk",
1059 },
4b106fb9
LJ		 1060 {
1061 .name = "ab8500-gpadc",
1062 .num_resources = ARRAY_SIZE(ab8500_gpadc_resources),
1063 .resources = ab8500_gpadc_resources,
1064 },
62579266
RV		 1065 {
1066 .name = "ab8500-rtc",
bad76991 1067 .of_compatible = "stericsson,ab8500-rtc",
62579266
RV		 1068 .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
1069 .resources = ab8500_rtc_resources,
1070 },
6af75ecd
LW		 1071 {
1072 .name = "ab8500-acc-det",
bad76991 1073 .of_compatible = "stericsson,ab8500-acc-det",
6af75ecd
LW		 1074 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
1075 .resources = ab8500_av_acc_detect_resources,
1076 },
e098aded 1077 {
4b106fb9 1078
e098aded 1079 .name = "ab8500-poweron-key",
bad76991 1080 .of_compatible = "stericsson,ab8500-poweron-key",
e098aded
MW		 1081 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
1082 .resources = ab8500_poweronkey_db_resources,
1083 },
f0f05b1c
AM		 1084 {
1085 .name = "ab8500-pwm",
bad76991 1086 .of_compatible = "stericsson,ab8500-pwm",
f0f05b1c
AM		 1087 .id = 1,
1088 },
1089 {
1090 .name = "ab8500-pwm",
bad76991 1091 .of_compatible = "stericsson,ab8500-pwm",
f0f05b1c
AM		 1092 .id = 2,
1093 },
1094 {
1095 .name = "ab8500-pwm",
bad76991 1096 .of_compatible = "stericsson,ab8500-pwm",
f0f05b1c
AM		 1097 .id = 3,
1098 },
bad76991
LJ		 1099 {
1100 .name = "ab8500-leds",
1101 .of_compatible = "stericsson,ab8500-leds",
1102 },
77686517 1103 {
e098aded 1104 .name = "ab8500-denc",
bad76991 1105 .of_compatible = "stericsson,ab8500-denc",
e098aded 1106 },
4b106fb9
LJ		 1107 {
1108 .name = "ab8500-gpio",
1109 .of_compatible = "stericsson,ab8500-gpio",
1110 },
e098aded 1111 {
151621a7
HZ		 1112 .name = "abx500-temp",
1113 .of_compatible = "stericsson,abx500-temp",
e098aded
MW		 1114 .num_resources = ARRAY_SIZE(ab8500_temp_resources),
1115 .resources = ab8500_temp_resources,
77686517 1116 },
6ef9418c 1117 {
4b106fb9
LJ		 1118 .name = "ab8500-usb",
1119 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
1120 .resources = ab8500_usb_resources,
6ef9418c
RA		 1121 },
1122 {
4b106fb9 1123 .name = "ab8500-codec",
6ef9418c
RA		 1124 },
1125};
1126
4b106fb9
LJ		 1127static struct mfd_cell ab9540_devs[] = {
1128#ifdef CONFIG_DEBUG_FS
d6255529 1129 {
4b106fb9
LJ		 1130 .name = "ab8500-debug",
1131 .num_resources = ARRAY_SIZE(ab8500_debug_resources),
1132 .resources = ab8500_debug_resources,
d6255529 1133 },
4b106fb9 1134#endif
d6255529 1135 {
4b106fb9 1136 .name = "ab8500-sysctrl",
d6255529 1137 },
44f72e53 1138 {
4b106fb9 1139 .name = "ab8500-regulator",
44f72e53 1140 },
c0eda9ae
LJ		 1141 {
1142 .name = "ab8500-gpadc",
1143 .of_compatible = "stericsson,ab8500-gpadc",
1144 .num_resources = ARRAY_SIZE(ab8500_gpadc_resources),
1145 .resources = ab8500_gpadc_resources,
1146 },
4b106fb9
LJ		 1147 {
1148 .name = "ab8500-rtc",
1149 .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
1150 .resources = ab8500_rtc_resources,
1151 },
1152 {
1153 .name = "ab8500-acc-det",
1154 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
1155 .resources = ab8500_av_acc_detect_resources,
1156 },
1157 {
1158 .name = "ab8500-poweron-key",
1159 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
1160 .resources = ab8500_poweronkey_db_resources,
1161 },
1162 {
1163 .name = "ab8500-pwm",
1164 .id = 1,
1165 },
1166 {
1167 .name = "ab8500-leds",
1168 },
1169 {
1170 .name = "abx500-temp",
1171 .num_resources = ARRAY_SIZE(ab8500_temp_resources),
1172 .resources = ab8500_temp_resources,
1173 },
d6255529 1174 {
e64d905e
LJ		 1175 .name = "pinctrl-ab9540",
1176 .of_compatible = "stericsson,ab9540-gpio",
d6255529
LW		 1177 },
1178 {
1179 .name = "ab9540-usb",
1180 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
1181 .resources = ab8500_usb_resources,
1182 },
44f72e53
VS		 1183 {
1184 .name = "ab9540-codec",
1185 },
c0eda9ae
LJ		 1186 {
1187 .name = "ab-iddet",
1188 .num_resources = ARRAY_SIZE(ab8505_iddet_resources),
1189 .resources = ab8505_iddet_resources,
1190 },
44f72e53
VS		 1191};
1192
c0eda9ae
LJ		 1193/* Device list for ab8505 */
1194static struct mfd_cell ab8505_devs[] = {
4b106fb9
LJ		 1195#ifdef CONFIG_DEBUG_FS
1196 {
1197 .name = "ab8500-debug",
1198 .num_resources = ARRAY_SIZE(ab8500_debug_resources),
1199 .resources = ab8500_debug_resources,
1200 },
1201#endif
1202 {
1203 .name = "ab8500-sysctrl",
1204 },
1205 {
1206 .name = "ab8500-regulator",
1207 },
1208 {
1209 .name = "ab8500-gpadc",
1210 .num_resources = ARRAY_SIZE(ab8505_gpadc_resources),
1211 .resources = ab8505_gpadc_resources,
1212 },
1213 {
1214 .name = "ab8500-rtc",
1215 .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
1216 .resources = ab8500_rtc_resources,
1217 },
1218 {
1219 .name = "ab8500-acc-det",
1220 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
1221 .resources = ab8500_av_acc_detect_resources,
1222 },
1223 {
1224 .name = "ab8500-poweron-key",
1225 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
1226 .resources = ab8500_poweronkey_db_resources,
1227 },
1228 {
1229 .name = "ab8500-pwm",
1230 .id = 1,
1231 },
1232 {
1233 .name = "ab8500-leds",
1234 },
1235 {
1236 .name = "ab8500-gpio",
1237 },
1238 {
1239 .name = "ab8500-usb",
1240 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
1241 .resources = ab8500_usb_resources,
1242 },
1243 {
1244 .name = "ab8500-codec",
1245 },
c0eda9ae
LJ		 1246 {
1247 .name = "ab-iddet",
1248 .num_resources = ARRAY_SIZE(ab8505_iddet_resources),
1249 .resources = ab8505_iddet_resources,
1250 },
1251};
1252
1253static struct mfd_cell ab8540_devs[] = {
4b106fb9
LJ		 1254#ifdef CONFIG_DEBUG_FS
1255 {
1256 .name = "ab8500-debug",
1257 .num_resources = ARRAY_SIZE(ab8500_debug_resources),
1258 .resources = ab8500_debug_resources,
1259 },
1260#endif
1261 {
1262 .name = "ab8500-sysctrl",
1263 },
1264 {
1265 .name = "ab8500-regulator",
1266 },
1267 {
1268 .name = "ab8500-gpadc",
1269 .num_resources = ARRAY_SIZE(ab8505_gpadc_resources),
1270 .resources = ab8505_gpadc_resources,
1271 },
1272 {
1273 .name = "ab8500-rtc",
1274 .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
1275 .resources = ab8500_rtc_resources,
1276 },
1277 {
1278 .name = "ab8500-acc-det",
1279 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
1280 .resources = ab8500_av_acc_detect_resources,
1281 },
1282 {
1283 .name = "ab8500-poweron-key",
1284 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
1285 .resources = ab8500_poweronkey_db_resources,
1286 },
1287 {
1288 .name = "ab8500-pwm",
1289 .id = 1,
1290 },
1291 {
1292 .name = "ab8500-leds",
1293 },
1294 {
1295 .name = "abx500-temp",
1296 .num_resources = ARRAY_SIZE(ab8500_temp_resources),
1297 .resources = ab8500_temp_resources,
1298 },
c0eda9ae
LJ		 1299 {
1300 .name = "ab8500-gpio",
1301 },
1302 {
1303 .name = "ab8540-usb",
1304 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
1305 .resources = ab8500_usb_resources,
1306 },
1307 {
1308 .name = "ab8540-codec",
1309 },
44f72e53
VS		 1310 {
1311 .name = "ab-iddet",
1312 .num_resources = ARRAY_SIZE(ab8505_iddet_resources),
1313 .resources = ab8505_iddet_resources,
1314 },
d6255529
LW		 1315};
1316
cca69b67
MW		 1317static ssize_t show_chip_id(struct device *dev,
1318 struct device_attribute *attr, char *buf)
1319{
1320 struct ab8500 *ab8500;
1321
1322 ab8500 = dev_get_drvdata(dev);
1323 return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL);
1324}
1325
e5c238c3
MW		 1326/*
1327 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
1328 * 0x01 Swoff bit programming
1329 * 0x02 Thermal protection activation
1330 * 0x04 Vbat lower then BattOk falling threshold
1331 * 0x08 Watchdog expired
1332 * 0x10 Non presence of 32kHz clock
1333 * 0x20 Battery level lower than power on reset threshold
1334 * 0x40 Power on key 1 pressed longer than 10 seconds
1335 * 0x80 DB8500 thermal shutdown
1336 */
1337static ssize_t show_switch_off_status(struct device *dev,
1338 struct device_attribute *attr, char *buf)
1339{
1340 int ret;
1341 u8 value;
1342 struct ab8500 *ab8500;
1343
1344 ab8500 = dev_get_drvdata(dev);
1345 ret = get_register_interruptible(ab8500, AB8500_RTC,
1346 AB8500_SWITCH_OFF_STATUS, &value);
1347 if (ret < 0)
1348 return ret;
1349 return sprintf(buf, "%#x\n", value);
1350}
1351
f04a9d8a
RK		 1352/* use mask and set to override the register turn_on_stat value */
1353void ab8500_override_turn_on_stat(u8 mask, u8 set)
1354{
1355 spin_lock(&on_stat_lock);
1356 turn_on_stat_mask = mask;
1357 turn_on_stat_set = set;
1358 spin_unlock(&on_stat_lock);
1359}
1360
b4a31037
AL		 1361/*
1362 * ab8500 has turned on due to (TURN_ON_STATUS):
1363 * 0x01 PORnVbat
1364 * 0x02 PonKey1dbF
1365 * 0x04 PonKey2dbF
1366 * 0x08 RTCAlarm
1367 * 0x10 MainChDet
1368 * 0x20 VbusDet
1369 * 0x40 UsbIDDetect
1370 * 0x80 Reserved
1371 */
1372static ssize_t show_turn_on_status(struct device *dev,
1373 struct device_attribute *attr, char *buf)
1374{
1375 int ret;
1376 u8 value;
1377 struct ab8500 *ab8500;
1378
1379 ab8500 = dev_get_drvdata(dev);
1380 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
1381 AB8500_TURN_ON_STATUS, &value);
1382 if (ret < 0)
1383 return ret;
f04a9d8a
RK		 1384
1385 /*
1386 * In L9540, turn_on_status register is not updated correctly if
1387 * the device is rebooted with AC/USB charger connected. Due to
1388 * this, the device boots android instead of entering into charge
1389 * only mode. Read the AC/USB status register to detect the charger
1390 * presence and update the turn on status manually.
1391 */
1392 if (is_ab9540(ab8500)) {
1393 spin_lock(&on_stat_lock);
1394 value = (value & turn_on_stat_mask) | turn_on_stat_set;
1395 spin_unlock(&on_stat_lock);
1396 }
1397
b4a31037
AL		 1398 return sprintf(buf, "%#x\n", value);
1399}
1400
d6255529
LW		 1401static ssize_t show_ab9540_dbbrstn(struct device *dev,
1402 struct device_attribute *attr, char *buf)
1403{
1404 struct ab8500 *ab8500;
1405 int ret;
1406 u8 value;
1407
1408 ab8500 = dev_get_drvdata(dev);
1409
1410 ret = get_register_interruptible(ab8500, AB8500_REGU_CTRL2,
1411 AB9540_MODEM_CTRL2_REG, &value);
1412 if (ret < 0)
1413 return ret;
1414
1415 return sprintf(buf, "%d\n",
1416 (value & AB9540_MODEM_CTRL2_SWDBBRSTN_BIT) ? 1 : 0);
1417}
1418
1419static ssize_t store_ab9540_dbbrstn(struct device *dev,
1420 struct device_attribute *attr, const char *buf, size_t count)
1421{
1422 struct ab8500 *ab8500;
1423 int ret = count;
1424 int err;
1425 u8 bitvalues;
1426
1427 ab8500 = dev_get_drvdata(dev);
1428
1429 if (count > 0) {
1430 switch (buf[0]) {
1431 case '0':
1432 bitvalues = 0;
1433 break;
1434 case '1':
1435 bitvalues = AB9540_MODEM_CTRL2_SWDBBRSTN_BIT;
1436 break;
1437 default:
1438 goto exit;
1439 }
1440
1441 err = mask_and_set_register_interruptible(ab8500,
1442 AB8500_REGU_CTRL2, AB9540_MODEM_CTRL2_REG,
1443 AB9540_MODEM_CTRL2_SWDBBRSTN_BIT, bitvalues);
1444 if (err)
1445 dev_info(ab8500->dev,
1446 "Failed to set DBBRSTN %c, err %#x\n",
1447 buf[0], err);
1448 }
1449
1450exit:
1451 return ret;
1452}
1453
cca69b67 1454static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL);
e5c238c3 1455static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL);
b4a31037 1456static DEVICE_ATTR(turn_on_status, S_IRUGO, show_turn_on_status, NULL);
d6255529
LW		 1457static DEVICE_ATTR(dbbrstn, S_IRUGO | S_IWUSR,
1458 show_ab9540_dbbrstn, store_ab9540_dbbrstn);
cca69b67
MW		 1459
1460static struct attribute *ab8500_sysfs_entries[] = {
1461 &dev_attr_chip_id.attr,
e5c238c3 1462 &dev_attr_switch_off_status.attr,
b4a31037 1463 &dev_attr_turn_on_status.attr,
cca69b67
MW		 1464 NULL,
1465};
1466
d6255529
LW		 1467static struct attribute *ab9540_sysfs_entries[] = {
1468 &dev_attr_chip_id.attr,
1469 &dev_attr_switch_off_status.attr,
1470 &dev_attr_turn_on_status.attr,
1471 &dev_attr_dbbrstn.attr,
1472 NULL,
1473};
1474
cca69b67
MW		 1475static struct attribute_group ab8500_attr_group = {
1476 .attrs = ab8500_sysfs_entries,
1477};
1478
d6255529
LW		 1479static struct attribute_group ab9540_attr_group = {
1480 .attrs = ab9540_sysfs_entries,
1481};
1482
f791be49 1483static int ab8500_probe(struct platform_device *pdev)
62579266 1484{
b04c530c
JA		 1485 static char *switch_off_status[] = {
1486 "Swoff bit programming",
1487 "Thermal protection activation",
1488 "Vbat lower then BattOk falling threshold",
1489 "Watchdog expired",
1490 "Non presence of 32kHz clock",
1491 "Battery level lower than power on reset threshold",
1492 "Power on key 1 pressed longer than 10 seconds",
1493 "DB8500 thermal shutdown"};
d28f1db8
LJ		 1494 struct ab8500_platform_data *plat = dev_get_platdata(&pdev->dev);
1495 const struct platform_device_id *platid = platform_get_device_id(pdev);
6bc4a568
LJ		 1496 enum ab8500_version version = AB8500_VERSION_UNDEFINED;
1497 struct device_node *np = pdev->dev.of_node;
d28f1db8
LJ		 1498 struct ab8500 *ab8500;
1499 struct resource *resource;
62579266
RV		 1500 int ret;
1501 int i;
47c16975 1502 u8 value;
62579266 1503
8c4203cb 1504 ab8500 = devm_kzalloc(&pdev->dev, sizeof *ab8500, GFP_KERNEL);
d28f1db8
LJ		 1505 if (!ab8500)
1506 return -ENOMEM;
1507
62579266
RV		 1508 if (plat)
1509 ab8500->irq_base = plat->irq_base;
1510
d28f1db8
LJ		 1511 ab8500->dev = &pdev->dev;
1512
1513 resource = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
8c4203cb
LJ		 1514 if (!resource)
1515 return -ENODEV;
d28f1db8
LJ		 1516
1517 ab8500->irq = resource->start;
1518
822672a7
LJ		 1519 ab8500->read = ab8500_prcmu_read;
1520 ab8500->write = ab8500_prcmu_write;
1521 ab8500->write_masked = ab8500_prcmu_write_masked;
d28f1db8 1522
62579266
RV		 1523 mutex_init(&ab8500->lock);
1524 mutex_init(&ab8500->irq_lock);
112a80d2 1525 atomic_set(&ab8500->transfer_ongoing, 0);
62579266 1526
d28f1db8
LJ		 1527 platform_set_drvdata(pdev, ab8500);
1528
6bc4a568
LJ		 1529 if (platid)
1530 version = platid->driver_data;
6bc4a568 1531
0f620837
LW		 1532 if (version != AB8500_VERSION_UNDEFINED)
1533 ab8500->version = version;
1534 else {
1535 ret = get_register_interruptible(ab8500, AB8500_MISC,
1536 AB8500_IC_NAME_REG, &value);
1537 if (ret < 0)
8c4203cb 1538 return ret;
0f620837
LW		 1539
1540 ab8500->version = value;
1541 }
1542
47c16975
MW		 1543 ret = get_register_interruptible(ab8500, AB8500_MISC,
1544 AB8500_REV_REG, &value);
62579266 1545 if (ret < 0)
8c4203cb 1546 return ret;
62579266 1547
47c16975 1548 ab8500->chip_id = value;
62579266 1549
0f620837
LW		 1550 dev_info(ab8500->dev, "detected chip, %s rev. %1x.%1x\n",
1551 ab8500_version_str[ab8500->version],
1552 ab8500->chip_id >> 4,
1553 ab8500->chip_id & 0x0F);
1554
d6255529 1555 /* Configure AB8500 or AB9540 IRQ */
a982362c 1556 if (is_ab9540(ab8500) || is_ab8505(ab8500)) {
d6255529
LW		 1557 ab8500->mask_size = AB9540_NUM_IRQ_REGS;
1558 ab8500->irq_reg_offset = ab9540_irq_regoffset;
1559 } else {
1560 ab8500->mask_size = AB8500_NUM_IRQ_REGS;
1561 ab8500->irq_reg_offset = ab8500_irq_regoffset;
1562 }
8c4203cb 1563 ab8500->mask = devm_kzalloc(&pdev->dev, ab8500->mask_size, GFP_KERNEL);
2ced445e
LW		 1564 if (!ab8500->mask)
1565 return -ENOMEM;
8c4203cb
LJ		 1566 ab8500->oldmask = devm_kzalloc(&pdev->dev, ab8500->mask_size, GFP_KERNEL);
1567 if (!ab8500->oldmask)
1568 return -ENOMEM;
1569
e5c238c3
MW		 1570 /*
1571 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
1572 * 0x01 Swoff bit programming
1573 * 0x02 Thermal protection activation
1574 * 0x04 Vbat lower then BattOk falling threshold
1575 * 0x08 Watchdog expired
1576 * 0x10 Non presence of 32kHz clock
1577 * 0x20 Battery level lower than power on reset threshold
1578 * 0x40 Power on key 1 pressed longer than 10 seconds
1579 * 0x80 DB8500 thermal shutdown
1580 */
1581
1582 ret = get_register_interruptible(ab8500, AB8500_RTC,
1583 AB8500_SWITCH_OFF_STATUS, &value);
1584 if (ret < 0)
1585 return ret;
b04c530c
JA		 1586 dev_info(ab8500->dev, "switch off cause(s) (%#x): ", value);
1587
1588 if (value) {
1589 for (i = 0; i < ARRAY_SIZE(switch_off_status); i++) {
1590 if (value & 1)
1591 printk(KERN_CONT " \"%s\"",
1592 switch_off_status[i]);
1593 value = value >> 1;
1594
1595 }
1596 printk(KERN_CONT "\n");
1597 } else {
1598 printk(KERN_CONT " None\n");
1599 }
e5c238c3 1600
62579266
RV		 1601 if (plat && plat->init)
1602 plat->init(ab8500);
f04a9d8a
RK		 1603 if (is_ab9540(ab8500)) {
1604 ret = get_register_interruptible(ab8500, AB8500_CHARGER,
1605 AB8500_CH_USBCH_STAT1_REG, &value);
1606 if (ret < 0)
1607 return ret;
1608 if ((value & VBUS_DET_DBNC1) && (value & VBUS_DET_DBNC100))
1609 ab8500_override_turn_on_stat(~AB8500_POW_KEY_1_ON,
1610 AB8500_VBUS_DET);
1611 }
62579266
RV		 1612
1613 /* Clear and mask all interrupts */
2ced445e 1614 for (i = 0; i < ab8500->mask_size; i++) {
0f620837
LW		 1615 /*
1616 * Interrupt register 12 doesn't exist prior to AB8500 version
1617 * 2.0
1618 */
1619 if (ab8500->irq_reg_offset[i] == 11 &&
1620 is_ab8500_1p1_or_earlier(ab8500))
92d50a41 1621 continue;
62579266 1622
47c16975 1623 get_register_interruptible(ab8500, AB8500_INTERRUPT,
2ced445e 1624 AB8500_IT_LATCH1_REG + ab8500->irq_reg_offset[i],
92d50a41 1625 &value);
47c16975 1626 set_register_interruptible(ab8500, AB8500_INTERRUPT,
2ced445e 1627 AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i], 0xff);
62579266
RV		 1628 }
1629
47c16975
MW		 1630 ret = abx500_register_ops(ab8500->dev, &ab8500_ops);
1631 if (ret)
8c4203cb 1632 return ret;
47c16975 1633
2ced445e 1634 for (i = 0; i < ab8500->mask_size; i++)
62579266
RV		 1635 ab8500->mask[i] = ab8500->oldmask[i] = 0xff;
1636
06e589ef
LJ		 1637 ret = ab8500_irq_init(ab8500, np);
1638 if (ret)
8c4203cb 1639 return ret;
62579266 1640
06e589ef
LJ		 1641 /* Activate this feature only in ab9540 */
1642 /* till tests are done on ab8500 1p2 or later*/
1643 if (is_ab9540(ab8500)) {
8c4203cb
LJ		 1644 ret = devm_request_threaded_irq(&pdev->dev, ab8500->irq, NULL,
1645 ab8500_hierarchical_irq,
1646 IRQF_ONESHOT | IRQF_NO_SUSPEND,
1647 "ab8500", ab8500);
06e589ef
LJ		 1648 }
1649 else {
8c4203cb
LJ		 1650 ret = devm_request_threaded_irq(&pdev->dev, ab8500->irq, NULL,
1651 ab8500_irq,
1652 IRQF_ONESHOT | IRQF_NO_SUSPEND,
1653 "ab8500", ab8500);
62579266 1654 if (ret)
8c4203cb 1655 return ret;
62579266
RV		 1656 }
1657
bad76991
LJ		 1658 if (is_ab9540(ab8500))
1659 ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs,
1660 ARRAY_SIZE(ab9540_devs), NULL,
55692af5 1661 ab8500->irq_base, ab8500->domain);
c0eda9ae
LJ		 1662 else if (is_ab8540(ab8500))
1663 ret = mfd_add_devices(ab8500->dev, 0, ab8540_devs,
1664 ARRAY_SIZE(ab8540_devs), NULL,
1665 ab8500->irq_base, ab8500->domain);
1666 else if (is_ab8505(ab8500))
1667 ret = mfd_add_devices(ab8500->dev, 0, ab8505_devs,
1668 ARRAY_SIZE(ab8505_devs), NULL,
1669 ab8500->irq_base, ab8500->domain);
bad76991
LJ		 1670 else
1671 ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs,
1672 ARRAY_SIZE(ab8500_devs), NULL,
55692af5 1673 ab8500->irq_base, ab8500->domain);
bad76991 1674 if (ret)
8c4203cb 1675 return ret;
44f72e53 1676
6ef9418c
RA		 1677 if (!no_bm) {
1678 /* Add battery management devices */
1679 ret = mfd_add_devices(ab8500->dev, 0, ab8500_bm_devs,
1680 ARRAY_SIZE(ab8500_bm_devs), NULL,
55692af5 1681 ab8500->irq_base, ab8500->domain);
6ef9418c
RA		 1682 if (ret)
1683 dev_err(ab8500->dev, "error adding bm devices\n");
1684 }
1685
d6255529
LW		 1686 if (is_ab9540(ab8500))
1687 ret = sysfs_create_group(&ab8500->dev->kobj,
1688 &ab9540_attr_group);
1689 else
1690 ret = sysfs_create_group(&ab8500->dev->kobj,
1691 &ab8500_attr_group);
cca69b67
MW		 1692 if (ret)
1693 dev_err(ab8500->dev, "error creating sysfs entries\n");
06e589ef
LJ		 1694
1695 return ret;
62579266
RV		 1696}
1697
4740f73f 1698static int ab8500_remove(struct platform_device *pdev)
62579266 1699{
d28f1db8
LJ		 1700 struct ab8500 *ab8500 = platform_get_drvdata(pdev);
1701
d6255529
LW		 1702 if (is_ab9540(ab8500))
1703 sysfs_remove_group(&ab8500->dev->kobj, &ab9540_attr_group);
1704 else
1705 sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group);
06e589ef 1706
62579266 1707 mfd_remove_devices(ab8500->dev);
62579266
RV		 1708
1709 return 0;
1710}
1711
d28f1db8
LJ		 1712static const struct platform_device_id ab8500_id[] = {
1713 { "ab8500-core", AB8500_VERSION_AB8500 },
1714 { "ab8505-i2c", AB8500_VERSION_AB8505 },
1715 { "ab9540-i2c", AB8500_VERSION_AB9540 },
1716 { "ab8540-i2c", AB8500_VERSION_AB8540 },
1717 { }
1718};
1719
1720static struct platform_driver ab8500_core_driver = {
1721 .driver = {
1722 .name = "ab8500-core",
1723 .owner = THIS_MODULE,
1724 },
1725 .probe = ab8500_probe,
84449216 1726 .remove = ab8500_remove,
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LJ		 1727 .id_table = ab8500_id,
1728};
1729
1730static int __init ab8500_core_init(void)
1731{
1732 return platform_driver_register(&ab8500_core_driver);
1733}
1734
1735static void __exit ab8500_core_exit(void)
1736{
1737 platform_driver_unregister(&ab8500_core_driver);
1738}
ba7cbc3e 1739core_initcall(ab8500_core_init);
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LJ		 1740module_exit(ab8500_core_exit);
1741
adceed62 1742MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent");
62579266
RV		 1743MODULE_DESCRIPTION("AB8500 MFD core");
1744MODULE_LICENSE("GPL v2");
Linux 6.x block layer and io_uring tree(s)