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abx500-chargalg: Store the AB8500 MFD parent device for platform differentiation
[linux-2.6-block.git] / drivers / mfd / ab8500-core.c
CommitLineData
62579266
RV		 1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License v2
5 * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
6 * Author: Rabin Vincent <rabin.vincent@stericsson.com>
adceed62 7 * Author: Mattias Wallin <mattias.wallin@stericsson.com>
62579266
RV		 8 */
9
10#include <linux/kernel.h>
11#include <linux/slab.h>
12#include <linux/init.h>
13#include <linux/irq.h>
06e589ef 14#include <linux/irqdomain.h>
62579266
RV		 15#include <linux/delay.h>
16#include <linux/interrupt.h>
17#include <linux/module.h>
18#include <linux/platform_device.h>
19#include <linux/mfd/core.h>
47c16975 20#include <linux/mfd/abx500.h>
ee66e653 21#include <linux/mfd/abx500/ab8500.h>
00441b5e 22#include <linux/mfd/abx500/ab8500-bm.h>
d28f1db8 23#include <linux/mfd/dbx500-prcmu.h>
549931f9 24#include <linux/regulator/ab8500.h>
6bc4a568
LJ		 25#include <linux/of.h>
26#include <linux/of_device.h>
62579266
RV		 27
28/*
29 * Interrupt register offsets
30 * Bank : 0x0E
31 */
47c16975
MW		 32#define AB8500_IT_SOURCE1_REG 0x00
33#define AB8500_IT_SOURCE2_REG 0x01
34#define AB8500_IT_SOURCE3_REG 0x02
35#define AB8500_IT_SOURCE4_REG 0x03
36#define AB8500_IT_SOURCE5_REG 0x04
37#define AB8500_IT_SOURCE6_REG 0x05
38#define AB8500_IT_SOURCE7_REG 0x06
39#define AB8500_IT_SOURCE8_REG 0x07
d6255529 40#define AB9540_IT_SOURCE13_REG 0x0C
47c16975
MW		 41#define AB8500_IT_SOURCE19_REG 0x12
42#define AB8500_IT_SOURCE20_REG 0x13
43#define AB8500_IT_SOURCE21_REG 0x14
44#define AB8500_IT_SOURCE22_REG 0x15
45#define AB8500_IT_SOURCE23_REG 0x16
46#define AB8500_IT_SOURCE24_REG 0x17
62579266
RV		 47
48/*
49 * latch registers
50 */
47c16975
MW		 51#define AB8500_IT_LATCH1_REG 0x20
52#define AB8500_IT_LATCH2_REG 0x21
53#define AB8500_IT_LATCH3_REG 0x22
54#define AB8500_IT_LATCH4_REG 0x23
55#define AB8500_IT_LATCH5_REG 0x24
56#define AB8500_IT_LATCH6_REG 0x25
57#define AB8500_IT_LATCH7_REG 0x26
58#define AB8500_IT_LATCH8_REG 0x27
59#define AB8500_IT_LATCH9_REG 0x28
60#define AB8500_IT_LATCH10_REG 0x29
92d50a41 61#define AB8500_IT_LATCH12_REG 0x2B
d6255529 62#define AB9540_IT_LATCH13_REG 0x2C
47c16975
MW		 63#define AB8500_IT_LATCH19_REG 0x32
64#define AB8500_IT_LATCH20_REG 0x33
65#define AB8500_IT_LATCH21_REG 0x34
66#define AB8500_IT_LATCH22_REG 0x35
67#define AB8500_IT_LATCH23_REG 0x36
68#define AB8500_IT_LATCH24_REG 0x37
62579266
RV		 69
70/*
71 * mask registers
72 */
73
47c16975
MW		 74#define AB8500_IT_MASK1_REG 0x40
75#define AB8500_IT_MASK2_REG 0x41
76#define AB8500_IT_MASK3_REG 0x42
77#define AB8500_IT_MASK4_REG 0x43
78#define AB8500_IT_MASK5_REG 0x44
79#define AB8500_IT_MASK6_REG 0x45
80#define AB8500_IT_MASK7_REG 0x46
81#define AB8500_IT_MASK8_REG 0x47
82#define AB8500_IT_MASK9_REG 0x48
83#define AB8500_IT_MASK10_REG 0x49
84#define AB8500_IT_MASK11_REG 0x4A
85#define AB8500_IT_MASK12_REG 0x4B
86#define AB8500_IT_MASK13_REG 0x4C
87#define AB8500_IT_MASK14_REG 0x4D
88#define AB8500_IT_MASK15_REG 0x4E
89#define AB8500_IT_MASK16_REG 0x4F
90#define AB8500_IT_MASK17_REG 0x50
91#define AB8500_IT_MASK18_REG 0x51
92#define AB8500_IT_MASK19_REG 0x52
93#define AB8500_IT_MASK20_REG 0x53
94#define AB8500_IT_MASK21_REG 0x54
95#define AB8500_IT_MASK22_REG 0x55
96#define AB8500_IT_MASK23_REG 0x56
97#define AB8500_IT_MASK24_REG 0x57
a29264b6 98#define AB8500_IT_MASK25_REG 0x58
47c16975 99
7ccfe9b1
MJ		 100/*
101 * latch hierarchy registers
102 */
103#define AB8500_IT_LATCHHIER1_REG 0x60
104#define AB8500_IT_LATCHHIER2_REG 0x61
105#define AB8500_IT_LATCHHIER3_REG 0x62
3e1a498f 106#define AB8540_IT_LATCHHIER4_REG 0x63
7ccfe9b1
MJ		 107
108#define AB8500_IT_LATCHHIER_NUM 3
3e1a498f 109#define AB8540_IT_LATCHHIER_NUM 4
7ccfe9b1 110
47c16975 111#define AB8500_REV_REG 0x80
0f620837 112#define AB8500_IC_NAME_REG 0x82
e5c238c3 113#define AB8500_SWITCH_OFF_STATUS 0x00
62579266 114
b4a31037
AL		 115#define AB8500_TURN_ON_STATUS 0x00
116
f04a9d8a
RK		 117#define AB8500_CH_USBCH_STAT1_REG 0x02
118#define VBUS_DET_DBNC100 0x02
119#define VBUS_DET_DBNC1 0x01
120
121static DEFINE_SPINLOCK(on_stat_lock);
122static u8 turn_on_stat_mask = 0xFF;
123static u8 turn_on_stat_set;
6ef9418c
RA		 124static bool no_bm; /* No battery management */
125module_param(no_bm, bool, S_IRUGO);
126
d6255529
LW		 127#define AB9540_MODEM_CTRL2_REG 0x23
128#define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT BIT(2)
129
62579266
RV		 130/*
131 * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt
2ced445e
LW		 132 * numbers are indexed into this array with (num / 8). The interupts are
133 * defined in linux/mfd/ab8500.h
62579266
RV		 134 *
135 * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at
136 * offset 0.
137 */
2ced445e 138/* AB8500 support */
62579266 139static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = {
92d50a41 140 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21,
62579266
RV		 141};
142
a29264b6 143/* AB9540 / AB8505 support */
d6255529 144static const int ab9540_irq_regoffset[AB9540_NUM_IRQ_REGS] = {
a29264b6 145 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22, 23
d6255529
LW		 146};
147
3e1a498f
LJ		 148/* AB8540 support */
149static const int ab8540_irq_regoffset[AB8540_NUM_IRQ_REGS] = {
150 0, 1, 2, 3, 4, -1, -1, -1, -1, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22, 23,
151 25, 26, 27, 28, 29, 30, 31,
152};
153
0f620837
LW		 154static const char ab8500_version_str[][7] = {
155 [AB8500_VERSION_AB8500] = "AB8500",
156 [AB8500_VERSION_AB8505] = "AB8505",
157 [AB8500_VERSION_AB9540] = "AB9540",
158 [AB8500_VERSION_AB8540] = "AB8540",
159};
160
822672a7 161static int ab8500_prcmu_write(struct ab8500 *ab8500, u16 addr, u8 data)
d28f1db8
LJ		 162{
163 int ret;
164
165 ret = prcmu_abb_write((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1);
166 if (ret < 0)
167 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
168 return ret;
169}
170
822672a7 171static int ab8500_prcmu_write_masked(struct ab8500 *ab8500, u16 addr, u8 mask,
d28f1db8
LJ		 172 u8 data)
173{
174 int ret;
175
176 ret = prcmu_abb_write_masked((u8)(addr >> 8), (u8)(addr & 0xFF), &data,
177 &mask, 1);
178 if (ret < 0)
179 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
180 return ret;
181}
182
822672a7 183static int ab8500_prcmu_read(struct ab8500 *ab8500, u16 addr)
d28f1db8
LJ		 184{
185 int ret;
186 u8 data;
187
188 ret = prcmu_abb_read((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1);
189 if (ret < 0) {
190 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
191 return ret;
192 }
193 return (int)data;
194}
195
47c16975
MW		 196static int ab8500_get_chip_id(struct device *dev)
197{
6bce7bf1
MW		 198 struct ab8500 *ab8500;
199
200 if (!dev)
201 return -EINVAL;
202 ab8500 = dev_get_drvdata(dev->parent);
203 return ab8500 ? (int)ab8500->chip_id : -EINVAL;
47c16975
MW		 204}
205
206static int set_register_interruptible(struct ab8500 *ab8500, u8 bank,
207 u8 reg, u8 data)
62579266
RV		 208{
209 int ret;
47c16975
MW		 210 /*
211 * Put the u8 bank and u8 register together into a an u16.
212 * The bank on higher 8 bits and register in lower 8 bits.
213 * */
214 u16 addr = ((u16)bank) << 8 | reg;
62579266
RV		 215
216 dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data);
217
392cbd1e 218 mutex_lock(&ab8500->lock);
47c16975 219
62579266
RV		 220 ret = ab8500->write(ab8500, addr, data);
221 if (ret < 0)
222 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
223 addr, ret);
47c16975 224 mutex_unlock(&ab8500->lock);
62579266
RV		 225
226 return ret;
227}
228
47c16975
MW		 229static int ab8500_set_register(struct device *dev, u8 bank,
230 u8 reg, u8 value)
62579266 231{
112a80d2 232 int ret;
47c16975 233 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
62579266 234
112a80d2
JA		 235 atomic_inc(&ab8500->transfer_ongoing);
236 ret = set_register_interruptible(ab8500, bank, reg, value);
237 atomic_dec(&ab8500->transfer_ongoing);
238 return ret;
62579266 239}
62579266 240
47c16975
MW		 241static int get_register_interruptible(struct ab8500 *ab8500, u8 bank,
242 u8 reg, u8 *value)
62579266
RV		 243{
244 int ret;
47c16975
MW		 245 /* put the u8 bank and u8 reg together into a an u16.
246 * bank on higher 8 bits and reg in lower */
247 u16 addr = ((u16)bank) << 8 | reg;
248
392cbd1e 249 mutex_lock(&ab8500->lock);
62579266
RV		 250
251 ret = ab8500->read(ab8500, addr);
252 if (ret < 0)
253 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
254 addr, ret);
47c16975
MW		 255 else
256 *value = ret;
62579266 257
47c16975 258 mutex_unlock(&ab8500->lock);
62579266
RV		 259 dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret);
260
261 return ret;
262}
263
47c16975
MW		 264static int ab8500_get_register(struct device *dev, u8 bank,
265 u8 reg, u8 *value)
62579266 266{
112a80d2 267 int ret;
47c16975 268 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
62579266 269
112a80d2
JA		 270 atomic_inc(&ab8500->transfer_ongoing);
271 ret = get_register_interruptible(ab8500, bank, reg, value);
272 atomic_dec(&ab8500->transfer_ongoing);
273 return ret;
62579266 274}
47c16975
MW		 275
276static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank,
277 u8 reg, u8 bitmask, u8 bitvalues)
62579266
RV		 278{
279 int ret;
47c16975
MW		 280 /* put the u8 bank and u8 reg together into a an u16.
281 * bank on higher 8 bits and reg in lower */
282 u16 addr = ((u16)bank) << 8 | reg;
62579266 283
392cbd1e 284 mutex_lock(&ab8500->lock);
62579266 285
bc628fd1
MN		 286 if (ab8500->write_masked == NULL) {
287 u8 data;
62579266 288
bc628fd1
MN		 289 ret = ab8500->read(ab8500, addr);
290 if (ret < 0) {
291 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
292 addr, ret);
293 goto out;
294 }
62579266 295
bc628fd1
MN		 296 data = (u8)ret;
297 data = (~bitmask & data) | (bitmask & bitvalues);
298
299 ret = ab8500->write(ab8500, addr, data);
300 if (ret < 0)
301 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
302 addr, ret);
62579266 303
bc628fd1
MN		 304 dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr,
305 data);
306 goto out;
307 }
308 ret = ab8500->write_masked(ab8500, addr, bitmask, bitvalues);
309 if (ret < 0)
310 dev_err(ab8500->dev, "failed to modify reg %#x: %d\n", addr,
311 ret);
62579266
RV		 312out:
313 mutex_unlock(&ab8500->lock);
314 return ret;
315}
47c16975
MW		 316
317static int ab8500_mask_and_set_register(struct device *dev,
318 u8 bank, u8 reg, u8 bitmask, u8 bitvalues)
319{
112a80d2 320 int ret;
47c16975
MW		 321 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
322
112a80d2
JA		 323 atomic_inc(&ab8500->transfer_ongoing);
324 ret= mask_and_set_register_interruptible(ab8500, bank, reg,
325 bitmask, bitvalues);
326 atomic_dec(&ab8500->transfer_ongoing);
327 return ret;
47c16975
MW		 328}
329
330static struct abx500_ops ab8500_ops = {
331 .get_chip_id = ab8500_get_chip_id,
332 .get_register = ab8500_get_register,
333 .set_register = ab8500_set_register,
334 .get_register_page = NULL,
335 .set_register_page = NULL,
336 .mask_and_set_register = ab8500_mask_and_set_register,
337 .event_registers_startup_state_get = NULL,
338 .startup_irq_enabled = NULL,
1d843a6c 339 .dump_all_banks = ab8500_dump_all_banks,
47c16975 340};
62579266 341
9505a0a0 342static void ab8500_irq_lock(struct irq_data *data)
62579266 343{
9505a0a0 344 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
62579266
RV		 345
346 mutex_lock(&ab8500->irq_lock);
112a80d2 347 atomic_inc(&ab8500->transfer_ongoing);
62579266
RV		 348}
349
9505a0a0 350static void ab8500_irq_sync_unlock(struct irq_data *data)
62579266 351{
9505a0a0 352 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
62579266
RV		 353 int i;
354
2ced445e 355 for (i = 0; i < ab8500->mask_size; i++) {
62579266
RV		 356 u8 old = ab8500->oldmask[i];
357 u8 new = ab8500->mask[i];
358 int reg;
359
360 if (new == old)
361 continue;
362
0f620837
LW		 363 /*
364 * Interrupt register 12 doesn't exist prior to AB8500 version
365 * 2.0
366 */
367 if (ab8500->irq_reg_offset[i] == 11 &&
368 is_ab8500_1p1_or_earlier(ab8500))
92d50a41
MW		 369 continue;
370
3e1a498f
LJ		 371 if (ab8500->irq_reg_offset[i] < 0)
372 continue;
373
62579266
RV		 374 ab8500->oldmask[i] = new;
375
2ced445e 376 reg = AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i];
47c16975 377 set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new);
62579266 378 }
112a80d2 379 atomic_dec(&ab8500->transfer_ongoing);
62579266
RV		 380 mutex_unlock(&ab8500->irq_lock);
381}
382
9505a0a0 383static void ab8500_irq_mask(struct irq_data *data)
62579266 384{
9505a0a0 385 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
06e589ef 386 int offset = data->hwirq;
62579266
RV		 387 int index = offset / 8;
388 int mask = 1 << (offset % 8);
389
390 ab8500->mask[index] |= mask;
9c677b9b
LJ		 391
392 /* The AB8500 GPIOs have two interrupts each (rising & falling). */
393 if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R)
394 ab8500->mask[index + 2] |= mask;
395 if (offset >= AB9540_INT_GPIO50R && offset <= AB9540_INT_GPIO54R)
396 ab8500->mask[index + 1] |= mask;
397 if (offset == AB8540_INT_GPIO43R || offset == AB8540_INT_GPIO44R)
e2ddf46a
LW		 398 /* Here the falling IRQ is one bit lower */
399 ab8500->mask[index] |= (mask << 1);
62579266
RV		 400}
401
9505a0a0 402static void ab8500_irq_unmask(struct irq_data *data)
62579266 403{
9505a0a0 404 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
9c677b9b 405 unsigned int type = irqd_get_trigger_type(data);
06e589ef 406 int offset = data->hwirq;
62579266
RV		 407 int index = offset / 8;
408 int mask = 1 << (offset % 8);
409
9c677b9b
LJ		 410 if (type & IRQ_TYPE_EDGE_RISING)
411 ab8500->mask[index] &= ~mask;
412
413 /* The AB8500 GPIOs have two interrupts each (rising & falling). */
414 if (type & IRQ_TYPE_EDGE_FALLING) {
415 if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R)
416 ab8500->mask[index + 2] &= ~mask;
417 else if (offset >= AB9540_INT_GPIO50R && offset <= AB9540_INT_GPIO54R)
418 ab8500->mask[index + 1] &= ~mask;
419 else if (offset == AB8540_INT_GPIO43R || offset == AB8540_INT_GPIO44R)
e2ddf46a
LW		 420 /* Here the falling IRQ is one bit lower */
421 ab8500->mask[index] &= ~(mask << 1);
9c677b9b
LJ		 422 else
423 ab8500->mask[index] &= ~mask;
e2ddf46a 424 } else {
9c677b9b
LJ		 425 /* Satisfies the case where type is not set. */
426 ab8500->mask[index] &= ~mask;
e2ddf46a 427 }
62579266
RV		 428}
429
40f6e5a2
LJ		 430static int ab8500_irq_set_type(struct irq_data *data, unsigned int type)
431{
432 return 0;
62579266
RV		 433}
434
435static struct irq_chip ab8500_irq_chip = {
436 .name = "ab8500",
9505a0a0
MB		 437 .irq_bus_lock = ab8500_irq_lock,
438 .irq_bus_sync_unlock = ab8500_irq_sync_unlock,
439 .irq_mask = ab8500_irq_mask,
e6f9306e 440 .irq_disable = ab8500_irq_mask,
9505a0a0 441 .irq_unmask = ab8500_irq_unmask,
40f6e5a2 442 .irq_set_type = ab8500_irq_set_type,
62579266
RV		 443};
444
3e1a498f
LJ		 445static void update_latch_offset(u8 *offset, int i)
446{
447 /* Fix inconsistent ITFromLatch25 bit mapping... */
448 if (unlikely(*offset == 17))
449 *offset = 24;
450 /* Fix inconsistent ab8540 bit mapping... */
451 if (unlikely(*offset == 16))
452 *offset = 25;
453 if ((i==3) && (*offset >= 24))
454 *offset += 2;
455}
456
7ccfe9b1
MJ		 457static int ab8500_handle_hierarchical_line(struct ab8500 *ab8500,
458 int latch_offset, u8 latch_val)
459{
460 int int_bit = __ffs(latch_val);
461 int line, i;
462
463 do {
464 int_bit = __ffs(latch_val);
465
466 for (i = 0; i < ab8500->mask_size; i++)
467 if (ab8500->irq_reg_offset[i] == latch_offset)
468 break;
469
470 if (i >= ab8500->mask_size) {
471 dev_err(ab8500->dev, "Register offset 0x%2x not declared\n",
472 latch_offset);
473 return -ENXIO;
474 }
475
476 line = (i << 3) + int_bit;
477 latch_val &= ~(1 << int_bit);
478
e2ddf46a
LW		 479 /*
480 * This handles the falling edge hwirqs from the GPIO
481 * lines. Route them back to the line registered for the
482 * rising IRQ, as this is merely a flag for the same IRQ
483 * in linux terms.
484 */
485 if (line >= AB8500_INT_GPIO6F && line <= AB8500_INT_GPIO41F)
486 line -= 16;
487 if (line >= AB9540_INT_GPIO50F && line <= AB9540_INT_GPIO54F)
488 line -= 8;
489 if (line == AB8540_INT_GPIO43F || line == AB8540_INT_GPIO44F)
490 line += 1;
491
7ccfe9b1
MJ		 492 handle_nested_irq(ab8500->irq_base + line);
493 } while (latch_val);
494
495 return 0;
496}
497
498static int ab8500_handle_hierarchical_latch(struct ab8500 *ab8500,
499 int hier_offset, u8 hier_val)
500{
501 int latch_bit, status;
502 u8 latch_offset, latch_val;
503
504 do {
505 latch_bit = __ffs(hier_val);
506 latch_offset = (hier_offset << 3) + latch_bit;
507
3e1a498f 508 update_latch_offset(&latch_offset, hier_offset);
7ccfe9b1
MJ		 509
510 status = get_register_interruptible(ab8500,
511 AB8500_INTERRUPT,
512 AB8500_IT_LATCH1_REG + latch_offset,
513 &latch_val);
514 if (status < 0 || latch_val == 0)
515 goto discard;
516
517 status = ab8500_handle_hierarchical_line(ab8500,
518 latch_offset, latch_val);
519 if (status < 0)
520 return status;
521discard:
522 hier_val &= ~(1 << latch_bit);
523 } while (hier_val);
524
525 return 0;
526}
527
528static irqreturn_t ab8500_hierarchical_irq(int irq, void *dev)
529{
530 struct ab8500 *ab8500 = dev;
531 u8 i;
532
533 dev_vdbg(ab8500->dev, "interrupt\n");
534
535 /* Hierarchical interrupt version */
3e1a498f 536 for (i = 0; i < (ab8500->it_latchhier_num); i++) {
7ccfe9b1
MJ		 537 int status;
538 u8 hier_val;
539
540 status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
541 AB8500_IT_LATCHHIER1_REG + i, &hier_val);
542 if (status < 0 || hier_val == 0)
543 continue;
544
545 status = ab8500_handle_hierarchical_latch(ab8500, i, hier_val);
546 if (status < 0)
547 break;
548 }
549 return IRQ_HANDLED;
550}
551
06e589ef
LJ		 552static int ab8500_irq_map(struct irq_domain *d, unsigned int virq,
553 irq_hw_number_t hwirq)
554{
555 struct ab8500 *ab8500 = d->host_data;
556
557 if (!ab8500)
558 return -EINVAL;
559
560 irq_set_chip_data(virq, ab8500);
561 irq_set_chip_and_handler(virq, &ab8500_irq_chip,
562 handle_simple_irq);
563 irq_set_nested_thread(virq, 1);
62579266 564#ifdef CONFIG_ARM
06e589ef 565 set_irq_flags(virq, IRQF_VALID);
62579266 566#else
06e589ef 567 irq_set_noprobe(virq);
62579266 568#endif
62579266
RV		 569
570 return 0;
571}
572
06e589ef
LJ		 573static struct irq_domain_ops ab8500_irq_ops = {
574 .map = ab8500_irq_map,
575 .xlate = irq_domain_xlate_twocell,
576};
577
578static int ab8500_irq_init(struct ab8500 *ab8500, struct device_node *np)
62579266 579{
2ced445e
LW		 580 int num_irqs;
581
3e1a498f
LJ		 582 if (is_ab8540(ab8500))
583 num_irqs = AB8540_NR_IRQS;
584 else if (is_ab9540(ab8500))
d6255529 585 num_irqs = AB9540_NR_IRQS;
a982362c
BJ		 586 else if (is_ab8505(ab8500))
587 num_irqs = AB8505_NR_IRQS;
d6255529
LW		 588 else
589 num_irqs = AB8500_NR_IRQS;
62579266 590
f1d11f39
LW		 591 /* If ->irq_base is zero this will give a linear mapping */
592 ab8500->domain = irq_domain_add_simple(NULL,
593 num_irqs, ab8500->irq_base,
594 &ab8500_irq_ops, ab8500);
06e589ef
LJ		 595
596 if (!ab8500->domain) {
597 dev_err(ab8500->dev, "Failed to create irqdomain\n");
598 return -ENOSYS;
599 }
600
601 return 0;
62579266
RV		 602}
603
112a80d2
JA		 604int ab8500_suspend(struct ab8500 *ab8500)
605{
606 if (atomic_read(&ab8500->transfer_ongoing))
607 return -EINVAL;
608 else
609 return 0;
610}
611
a9e9ce4c 612static struct resource ab8500_gpadc_resources[] = {
62579266
RV		 613 {
614 .name = "HW_CONV_END",
615 .start = AB8500_INT_GP_HW_ADC_CONV_END,
616 .end = AB8500_INT_GP_HW_ADC_CONV_END,
617 .flags = IORESOURCE_IRQ,
618 },
619 {
620 .name = "SW_CONV_END",
621 .start = AB8500_INT_GP_SW_ADC_CONV_END,
622 .end = AB8500_INT_GP_SW_ADC_CONV_END,
623 .flags = IORESOURCE_IRQ,
624 },
625};
626
4b106fb9 627static struct resource ab8505_gpadc_resources[] = {
c0eda9ae
LJ		 628 {
629 .name = "SW_CONV_END",
630 .start = AB8500_INT_GP_SW_ADC_CONV_END,
631 .end = AB8500_INT_GP_SW_ADC_CONV_END,
632 .flags = IORESOURCE_IRQ,
633 },
634};
635
a9e9ce4c 636static struct resource ab8500_rtc_resources[] = {
62579266
RV		 637 {
638 .name = "60S",
639 .start = AB8500_INT_RTC_60S,
640 .end = AB8500_INT_RTC_60S,
641 .flags = IORESOURCE_IRQ,
642 },
643 {
644 .name = "ALARM",
645 .start = AB8500_INT_RTC_ALARM,
646 .end = AB8500_INT_RTC_ALARM,
647 .flags = IORESOURCE_IRQ,
648 },
649};
650
a9e9ce4c 651static struct resource ab8500_poweronkey_db_resources[] = {
77686517
SI		 652 {
653 .name = "ONKEY_DBF",
654 .start = AB8500_INT_PON_KEY1DB_F,
655 .end = AB8500_INT_PON_KEY1DB_F,
656 .flags = IORESOURCE_IRQ,
657 },
658 {
659 .name = "ONKEY_DBR",
660 .start = AB8500_INT_PON_KEY1DB_R,
661 .end = AB8500_INT_PON_KEY1DB_R,
662 .flags = IORESOURCE_IRQ,
663 },
664};
665
a9e9ce4c 666static struct resource ab8500_av_acc_detect_resources[] = {
e098aded 667 {
6af75ecd
LW		 668 .name = "ACC_DETECT_1DB_F",
669 .start = AB8500_INT_ACC_DETECT_1DB_F,
670 .end = AB8500_INT_ACC_DETECT_1DB_F,
671 .flags = IORESOURCE_IRQ,
e098aded
MW		 672 },
673 {
6af75ecd
LW		 674 .name = "ACC_DETECT_1DB_R",
675 .start = AB8500_INT_ACC_DETECT_1DB_R,
676 .end = AB8500_INT_ACC_DETECT_1DB_R,
677 .flags = IORESOURCE_IRQ,
678 },
679 {
680 .name = "ACC_DETECT_21DB_F",
681 .start = AB8500_INT_ACC_DETECT_21DB_F,
682 .end = AB8500_INT_ACC_DETECT_21DB_F,
683 .flags = IORESOURCE_IRQ,
684 },
685 {
686 .name = "ACC_DETECT_21DB_R",
687 .start = AB8500_INT_ACC_DETECT_21DB_R,
688 .end = AB8500_INT_ACC_DETECT_21DB_R,
689 .flags = IORESOURCE_IRQ,
690 },
691 {
692 .name = "ACC_DETECT_22DB_F",
693 .start = AB8500_INT_ACC_DETECT_22DB_F,
694 .end = AB8500_INT_ACC_DETECT_22DB_F,
695 .flags = IORESOURCE_IRQ,
e098aded 696 },
6af75ecd
LW		 697 {
698 .name = "ACC_DETECT_22DB_R",
699 .start = AB8500_INT_ACC_DETECT_22DB_R,
700 .end = AB8500_INT_ACC_DETECT_22DB_R,
701 .flags = IORESOURCE_IRQ,
702 },
703};
704
a9e9ce4c 705static struct resource ab8500_charger_resources[] = {
e098aded
MW		 706 {
707 .name = "MAIN_CH_UNPLUG_DET",
708 .start = AB8500_INT_MAIN_CH_UNPLUG_DET,
709 .end = AB8500_INT_MAIN_CH_UNPLUG_DET,
710 .flags = IORESOURCE_IRQ,
711 },
712 {
713 .name = "MAIN_CHARGE_PLUG_DET",
714 .start = AB8500_INT_MAIN_CH_PLUG_DET,
715 .end = AB8500_INT_MAIN_CH_PLUG_DET,
716 .flags = IORESOURCE_IRQ,
717 },
e098aded
MW		 718 {
719 .name = "VBUS_DET_R",
720 .start = AB8500_INT_VBUS_DET_R,
721 .end = AB8500_INT_VBUS_DET_R,
722 .flags = IORESOURCE_IRQ,
723 },
724 {
6af75ecd
LW		 725 .name = "VBUS_DET_F",
726 .start = AB8500_INT_VBUS_DET_F,
727 .end = AB8500_INT_VBUS_DET_F,
e098aded
MW		 728 .flags = IORESOURCE_IRQ,
729 },
730 {
6af75ecd
LW		 731 .name = "USB_LINK_STATUS",
732 .start = AB8500_INT_USB_LINK_STATUS,
733 .end = AB8500_INT_USB_LINK_STATUS,
734 .flags = IORESOURCE_IRQ,
735 },
e098aded
MW		 736 {
737 .name = "VBUS_OVV",
738 .start = AB8500_INT_VBUS_OVV,
739 .end = AB8500_INT_VBUS_OVV,
740 .flags = IORESOURCE_IRQ,
741 },
742 {
6af75ecd
LW		 743 .name = "USB_CH_TH_PROT_R",
744 .start = AB8500_INT_USB_CH_TH_PROT_R,
745 .end = AB8500_INT_USB_CH_TH_PROT_R,
e098aded
MW		 746 .flags = IORESOURCE_IRQ,
747 },
748 {
6af75ecd
LW		 749 .name = "USB_CH_TH_PROT_F",
750 .start = AB8500_INT_USB_CH_TH_PROT_F,
751 .end = AB8500_INT_USB_CH_TH_PROT_F,
e098aded
MW		 752 .flags = IORESOURCE_IRQ,
753 },
754 {
6af75ecd
LW		 755 .name = "MAIN_EXT_CH_NOT_OK",
756 .start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
757 .end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
758 .flags = IORESOURCE_IRQ,
759 },
760 {
761 .name = "MAIN_CH_TH_PROT_R",
762 .start = AB8500_INT_MAIN_CH_TH_PROT_R,
763 .end = AB8500_INT_MAIN_CH_TH_PROT_R,
764 .flags = IORESOURCE_IRQ,
765 },
766 {
767 .name = "MAIN_CH_TH_PROT_F",
768 .start = AB8500_INT_MAIN_CH_TH_PROT_F,
769 .end = AB8500_INT_MAIN_CH_TH_PROT_F,
770 .flags = IORESOURCE_IRQ,
771 },
772 {
773 .name = "USB_CHARGER_NOT_OKR",
a982362c
BJ		 774 .start = AB8500_INT_USB_CHARGER_NOT_OKR,
775 .end = AB8500_INT_USB_CHARGER_NOT_OKR,
6af75ecd
LW		 776 .flags = IORESOURCE_IRQ,
777 },
778 {
779 .name = "CH_WD_EXP",
780 .start = AB8500_INT_CH_WD_EXP,
781 .end = AB8500_INT_CH_WD_EXP,
782 .flags = IORESOURCE_IRQ,
783 },
34c11a70
POH		 784 {
785 .name = "VBUS_CH_DROP_END",
786 .start = AB8500_INT_VBUS_CH_DROP_END,
787 .end = AB8500_INT_VBUS_CH_DROP_END,
788 .flags = IORESOURCE_IRQ,
789 },
6af75ecd
LW		 790};
791
a9e9ce4c 792static struct resource ab8500_btemp_resources[] = {
6af75ecd
LW		 793 {
794 .name = "BAT_CTRL_INDB",
795 .start = AB8500_INT_BAT_CTRL_INDB,
796 .end = AB8500_INT_BAT_CTRL_INDB,
e098aded
MW		 797 .flags = IORESOURCE_IRQ,
798 },
799 {
800 .name = "BTEMP_LOW",
801 .start = AB8500_INT_BTEMP_LOW,
802 .end = AB8500_INT_BTEMP_LOW,
803 .flags = IORESOURCE_IRQ,
804 },
805 {
806 .name = "BTEMP_HIGH",
807 .start = AB8500_INT_BTEMP_HIGH,
808 .end = AB8500_INT_BTEMP_HIGH,
809 .flags = IORESOURCE_IRQ,
810 },
811 {
6af75ecd
LW		 812 .name = "BTEMP_LOW_MEDIUM",
813 .start = AB8500_INT_BTEMP_LOW_MEDIUM,
814 .end = AB8500_INT_BTEMP_LOW_MEDIUM,
e098aded
MW		 815 .flags = IORESOURCE_IRQ,
816 },
817 {
6af75ecd
LW		 818 .name = "BTEMP_MEDIUM_HIGH",
819 .start = AB8500_INT_BTEMP_MEDIUM_HIGH,
820 .end = AB8500_INT_BTEMP_MEDIUM_HIGH,
e098aded
MW		 821 .flags = IORESOURCE_IRQ,
822 },
6af75ecd
LW		 823};
824
a9e9ce4c 825static struct resource ab8500_fg_resources[] = {
e098aded 826 {
6af75ecd
LW		 827 .name = "NCONV_ACCU",
828 .start = AB8500_INT_CCN_CONV_ACC,
829 .end = AB8500_INT_CCN_CONV_ACC,
e098aded
MW		 830 .flags = IORESOURCE_IRQ,
831 },
832 {
6af75ecd
LW		 833 .name = "BATT_OVV",
834 .start = AB8500_INT_BATT_OVV,
835 .end = AB8500_INT_BATT_OVV,
e098aded
MW		 836 .flags = IORESOURCE_IRQ,
837 },
838 {
6af75ecd
LW		 839 .name = "LOW_BAT_F",
840 .start = AB8500_INT_LOW_BAT_F,
841 .end = AB8500_INT_LOW_BAT_F,
842 .flags = IORESOURCE_IRQ,
843 },
844 {
845 .name = "LOW_BAT_R",
846 .start = AB8500_INT_LOW_BAT_R,
847 .end = AB8500_INT_LOW_BAT_R,
848 .flags = IORESOURCE_IRQ,
849 },
850 {
851 .name = "CC_INT_CALIB",
852 .start = AB8500_INT_CC_INT_CALIB,
853 .end = AB8500_INT_CC_INT_CALIB,
e098aded
MW		 854 .flags = IORESOURCE_IRQ,
855 },
a982362c
BJ		 856 {
857 .name = "CCEOC",
858 .start = AB8500_INT_CCEOC,
859 .end = AB8500_INT_CCEOC,
860 .flags = IORESOURCE_IRQ,
861 },
e098aded
MW		 862};
863
a9e9ce4c 864static struct resource ab8500_chargalg_resources[] = {};
6af75ecd 865
df720647 866#ifdef CONFIG_DEBUG_FS
a9e9ce4c 867static struct resource ab8500_debug_resources[] = {
e098aded
MW		 868 {
869 .name = "IRQ_FIRST",
870 .start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
871 .end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
872 .flags = IORESOURCE_IRQ,
873 },
874 {
875 .name = "IRQ_LAST",
a982362c
BJ		 876 .start = AB8500_INT_XTAL32K_KO,
877 .end = AB8500_INT_XTAL32K_KO,
e098aded
MW		 878 .flags = IORESOURCE_IRQ,
879 },
880};
df720647 881#endif
e098aded 882
a9e9ce4c 883static struct resource ab8500_usb_resources[] = {
e098aded
MW		 884 {
885 .name = "ID_WAKEUP_R",
886 .start = AB8500_INT_ID_WAKEUP_R,
887 .end = AB8500_INT_ID_WAKEUP_R,
888 .flags = IORESOURCE_IRQ,
889 },
890 {
891 .name = "ID_WAKEUP_F",
892 .start = AB8500_INT_ID_WAKEUP_F,
893 .end = AB8500_INT_ID_WAKEUP_F,
894 .flags = IORESOURCE_IRQ,
895 },
896 {
897 .name = "VBUS_DET_F",
898 .start = AB8500_INT_VBUS_DET_F,
899 .end = AB8500_INT_VBUS_DET_F,
900 .flags = IORESOURCE_IRQ,
901 },
902 {
903 .name = "VBUS_DET_R",
904 .start = AB8500_INT_VBUS_DET_R,
905 .end = AB8500_INT_VBUS_DET_R,
906 .flags = IORESOURCE_IRQ,
907 },
92d50a41
MW		 908 {
909 .name = "USB_LINK_STATUS",
910 .start = AB8500_INT_USB_LINK_STATUS,
911 .end = AB8500_INT_USB_LINK_STATUS,
912 .flags = IORESOURCE_IRQ,
913 },
6af75ecd
LW		 914 {
915 .name = "USB_ADP_PROBE_PLUG",
916 .start = AB8500_INT_ADP_PROBE_PLUG,
917 .end = AB8500_INT_ADP_PROBE_PLUG,
918 .flags = IORESOURCE_IRQ,
919 },
920 {
921 .name = "USB_ADP_PROBE_UNPLUG",
922 .start = AB8500_INT_ADP_PROBE_UNPLUG,
923 .end = AB8500_INT_ADP_PROBE_UNPLUG,
924 .flags = IORESOURCE_IRQ,
925 },
e098aded
MW		 926};
927
a9e9ce4c 928static struct resource ab8505_iddet_resources[] = {
44f72e53
VS		 929 {
930 .name = "KeyDeglitch",
931 .start = AB8505_INT_KEYDEGLITCH,
932 .end = AB8505_INT_KEYDEGLITCH,
933 .flags = IORESOURCE_IRQ,
934 },
935 {
936 .name = "KP",
937 .start = AB8505_INT_KP,
938 .end = AB8505_INT_KP,
939 .flags = IORESOURCE_IRQ,
940 },
941 {
942 .name = "IKP",
943 .start = AB8505_INT_IKP,
944 .end = AB8505_INT_IKP,
945 .flags = IORESOURCE_IRQ,
946 },
947 {
948 .name = "IKR",
949 .start = AB8505_INT_IKR,
950 .end = AB8505_INT_IKR,
951 .flags = IORESOURCE_IRQ,
952 },
953 {
954 .name = "KeyStuck",
955 .start = AB8505_INT_KEYSTUCK,
956 .end = AB8505_INT_KEYSTUCK,
957 .flags = IORESOURCE_IRQ,
958 },
492390c8
LJ		 959 {
960 .name = "VBUS_DET_R",
961 .start = AB8500_INT_VBUS_DET_R,
962 .end = AB8500_INT_VBUS_DET_R,
963 .flags = IORESOURCE_IRQ,
964 },
965 {
966 .name = "VBUS_DET_F",
967 .start = AB8500_INT_VBUS_DET_F,
968 .end = AB8500_INT_VBUS_DET_F,
969 .flags = IORESOURCE_IRQ,
970 },
971 {
972 .name = "ID_DET_PLUGR",
973 .start = AB8500_INT_ID_DET_PLUGR,
974 .end = AB8500_INT_ID_DET_PLUGR,
975 .flags = IORESOURCE_IRQ,
976 },
977 {
978 .name = "ID_DET_PLUGF",
979 .start = AB8500_INT_ID_DET_PLUGF,
980 .end = AB8500_INT_ID_DET_PLUGF,
981 .flags = IORESOURCE_IRQ,
982 },
44f72e53
VS		 983};
984
a9e9ce4c 985static struct resource ab8500_temp_resources[] = {
e098aded 986 {
151621a7 987 .name = "ABX500_TEMP_WARM",
e098aded
MW		 988 .start = AB8500_INT_TEMP_WARM,
989 .end = AB8500_INT_TEMP_WARM,
990 .flags = IORESOURCE_IRQ,
991 },
992};
993
4b106fb9
LJ		 994static struct mfd_cell ab8500_bm_devs[] = {
995 {
996 .name = "ab8500-charger",
997 .of_compatible = "stericsson,ab8500-charger",
998 .num_resources = ARRAY_SIZE(ab8500_charger_resources),
999 .resources = ab8500_charger_resources,
1000 .platform_data = &ab8500_bm_data,
1001 .pdata_size = sizeof(ab8500_bm_data),
1002 },
1003 {
1004 .name = "ab8500-btemp",
1005 .of_compatible = "stericsson,ab8500-btemp",
1006 .num_resources = ARRAY_SIZE(ab8500_btemp_resources),
1007 .resources = ab8500_btemp_resources,
1008 .platform_data = &ab8500_bm_data,
1009 .pdata_size = sizeof(ab8500_bm_data),
1010 },
1011 {
1012 .name = "ab8500-fg",
1013 .of_compatible = "stericsson,ab8500-fg",
1014 .num_resources = ARRAY_SIZE(ab8500_fg_resources),
1015 .resources = ab8500_fg_resources,
1016 .platform_data = &ab8500_bm_data,
1017 .pdata_size = sizeof(ab8500_bm_data),
1018 },
1019 {
1020 .name = "ab8500-chargalg",
1021 .of_compatible = "stericsson,ab8500-chargalg",
1022 .num_resources = ARRAY_SIZE(ab8500_chargalg_resources),
1023 .resources = ab8500_chargalg_resources,
1024 .platform_data = &ab8500_bm_data,
1025 .pdata_size = sizeof(ab8500_bm_data),
1026 },
1027};
1028
1029static struct mfd_cell ab8500_devs[] = {
5814fc35
MW		 1030#ifdef CONFIG_DEBUG_FS
1031 {
1032 .name = "ab8500-debug",
bad76991 1033 .of_compatible = "stericsson,ab8500-debug",
e098aded
MW		 1034 .num_resources = ARRAY_SIZE(ab8500_debug_resources),
1035 .resources = ab8500_debug_resources,
5814fc35
MW		 1036 },
1037#endif
e098aded
MW		 1038 {
1039 .name = "ab8500-sysctrl",
bad76991 1040 .of_compatible = "stericsson,ab8500-sysctrl",
e098aded
MW		 1041 },
1042 {
1043 .name = "ab8500-regulator",
bad76991 1044 .of_compatible = "stericsson,ab8500-regulator",
e098aded 1045 },
916a871c
UH		 1046 {
1047 .name = "abx500-clk",
1048 .of_compatible = "stericsson,abx500-clk",
1049 },
4b106fb9
LJ		 1050 {
1051 .name = "ab8500-gpadc",
1052 .num_resources = ARRAY_SIZE(ab8500_gpadc_resources),
1053 .resources = ab8500_gpadc_resources,
1054 },
62579266
RV		 1055 {
1056 .name = "ab8500-rtc",
bad76991 1057 .of_compatible = "stericsson,ab8500-rtc",
62579266
RV		 1058 .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
1059 .resources = ab8500_rtc_resources,
1060 },
6af75ecd
LW		 1061 {
1062 .name = "ab8500-acc-det",
bad76991 1063 .of_compatible = "stericsson,ab8500-acc-det",
6af75ecd
LW		 1064 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
1065 .resources = ab8500_av_acc_detect_resources,
1066 },
e098aded 1067 {
4b106fb9 1068
e098aded 1069 .name = "ab8500-poweron-key",
bad76991 1070 .of_compatible = "stericsson,ab8500-poweron-key",
e098aded
MW		 1071 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
1072 .resources = ab8500_poweronkey_db_resources,
1073 },
f0f05b1c
AM		 1074 {
1075 .name = "ab8500-pwm",
bad76991 1076 .of_compatible = "stericsson,ab8500-pwm",
f0f05b1c
AM		 1077 .id = 1,
1078 },
1079 {
1080 .name = "ab8500-pwm",
bad76991 1081 .of_compatible = "stericsson,ab8500-pwm",
f0f05b1c
AM		 1082 .id = 2,
1083 },
1084 {
1085 .name = "ab8500-pwm",
bad76991 1086 .of_compatible = "stericsson,ab8500-pwm",
f0f05b1c
AM		 1087 .id = 3,
1088 },
bad76991
LJ		 1089 {
1090 .name = "ab8500-leds",
1091 .of_compatible = "stericsson,ab8500-leds",
1092 },
77686517 1093 {
e098aded 1094 .name = "ab8500-denc",
bad76991 1095 .of_compatible = "stericsson,ab8500-denc",
e098aded 1096 },
4b106fb9
LJ		 1097 {
1098 .name = "ab8500-gpio",
1099 .of_compatible = "stericsson,ab8500-gpio",
1100 },
e098aded 1101 {
151621a7
HZ		 1102 .name = "abx500-temp",
1103 .of_compatible = "stericsson,abx500-temp",
e098aded
MW		 1104 .num_resources = ARRAY_SIZE(ab8500_temp_resources),
1105 .resources = ab8500_temp_resources,
77686517 1106 },
6ef9418c 1107 {
4b106fb9
LJ		 1108 .name = "ab8500-usb",
1109 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
1110 .resources = ab8500_usb_resources,
6ef9418c
RA		 1111 },
1112 {
4b106fb9 1113 .name = "ab8500-codec",
6ef9418c
RA		 1114 },
1115};
1116
4b106fb9
LJ		 1117static struct mfd_cell ab9540_devs[] = {
1118#ifdef CONFIG_DEBUG_FS
d6255529 1119 {
4b106fb9
LJ		 1120 .name = "ab8500-debug",
1121 .num_resources = ARRAY_SIZE(ab8500_debug_resources),
1122 .resources = ab8500_debug_resources,
d6255529 1123 },
4b106fb9 1124#endif
d6255529 1125 {
4b106fb9 1126 .name = "ab8500-sysctrl",
d6255529 1127 },
44f72e53 1128 {
4b106fb9 1129 .name = "ab8500-regulator",
44f72e53 1130 },
9ee17676
UH		 1131 {
1132 .name = "abx500-clk",
1133 .of_compatible = "stericsson,abx500-clk",
1134 },
c0eda9ae
LJ		 1135 {
1136 .name = "ab8500-gpadc",
1137 .of_compatible = "stericsson,ab8500-gpadc",
1138 .num_resources = ARRAY_SIZE(ab8500_gpadc_resources),
1139 .resources = ab8500_gpadc_resources,
1140 },
4b106fb9
LJ		 1141 {
1142 .name = "ab8500-rtc",
1143 .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
1144 .resources = ab8500_rtc_resources,
1145 },
1146 {
1147 .name = "ab8500-acc-det",
1148 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
1149 .resources = ab8500_av_acc_detect_resources,
1150 },
1151 {
1152 .name = "ab8500-poweron-key",
1153 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
1154 .resources = ab8500_poweronkey_db_resources,
1155 },
1156 {
1157 .name = "ab8500-pwm",
1158 .id = 1,
1159 },
1160 {
1161 .name = "ab8500-leds",
1162 },
1163 {
1164 .name = "abx500-temp",
1165 .num_resources = ARRAY_SIZE(ab8500_temp_resources),
1166 .resources = ab8500_temp_resources,
1167 },
d6255529 1168 {
e64d905e
LJ		 1169 .name = "pinctrl-ab9540",
1170 .of_compatible = "stericsson,ab9540-gpio",
d6255529
LW		 1171 },
1172 {
1173 .name = "ab9540-usb",
1174 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
1175 .resources = ab8500_usb_resources,
1176 },
44f72e53
VS		 1177 {
1178 .name = "ab9540-codec",
1179 },
c0eda9ae
LJ		 1180 {
1181 .name = "ab-iddet",
1182 .num_resources = ARRAY_SIZE(ab8505_iddet_resources),
1183 .resources = ab8505_iddet_resources,
1184 },
44f72e53
VS		 1185};
1186
c0eda9ae
LJ		 1187/* Device list for ab8505 */
1188static struct mfd_cell ab8505_devs[] = {
4b106fb9
LJ		 1189#ifdef CONFIG_DEBUG_FS
1190 {
1191 .name = "ab8500-debug",
1192 .num_resources = ARRAY_SIZE(ab8500_debug_resources),
1193 .resources = ab8500_debug_resources,
1194 },
1195#endif
1196 {
1197 .name = "ab8500-sysctrl",
1198 },
1199 {
1200 .name = "ab8500-regulator",
1201 },
9ee17676
UH		 1202 {
1203 .name = "abx500-clk",
1204 .of_compatible = "stericsson,abx500-clk",
1205 },
4b106fb9
LJ		 1206 {
1207 .name = "ab8500-gpadc",
1208 .num_resources = ARRAY_SIZE(ab8505_gpadc_resources),
1209 .resources = ab8505_gpadc_resources,
1210 },
1211 {
1212 .name = "ab8500-rtc",
1213 .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
1214 .resources = ab8500_rtc_resources,
1215 },
1216 {
1217 .name = "ab8500-acc-det",
1218 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
1219 .resources = ab8500_av_acc_detect_resources,
1220 },
1221 {
1222 .name = "ab8500-poweron-key",
1223 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
1224 .resources = ab8500_poweronkey_db_resources,
1225 },
1226 {
1227 .name = "ab8500-pwm",
1228 .id = 1,
1229 },
1230 {
1231 .name = "ab8500-leds",
1232 },
1233 {
1234 .name = "ab8500-gpio",
1235 },
1236 {
1237 .name = "ab8500-usb",
1238 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
1239 .resources = ab8500_usb_resources,
1240 },
1241 {
1242 .name = "ab8500-codec",
1243 },
c0eda9ae
LJ		 1244 {
1245 .name = "ab-iddet",
1246 .num_resources = ARRAY_SIZE(ab8505_iddet_resources),
1247 .resources = ab8505_iddet_resources,
1248 },
1249};
1250
1251static struct mfd_cell ab8540_devs[] = {
4b106fb9
LJ		 1252#ifdef CONFIG_DEBUG_FS
1253 {
1254 .name = "ab8500-debug",
1255 .num_resources = ARRAY_SIZE(ab8500_debug_resources),
1256 .resources = ab8500_debug_resources,
1257 },
1258#endif
1259 {
1260 .name = "ab8500-sysctrl",
1261 },
1262 {
1263 .name = "ab8500-regulator",
1264 },
9ee17676
UH		 1265 {
1266 .name = "abx500-clk",
1267 .of_compatible = "stericsson,abx500-clk",
1268 },
4b106fb9
LJ		 1269 {
1270 .name = "ab8500-gpadc",
1271 .num_resources = ARRAY_SIZE(ab8505_gpadc_resources),
1272 .resources = ab8505_gpadc_resources,
1273 },
1274 {
1275 .name = "ab8500-rtc",
1276 .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
1277 .resources = ab8500_rtc_resources,
1278 },
1279 {
1280 .name = "ab8500-acc-det",
1281 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
1282 .resources = ab8500_av_acc_detect_resources,
1283 },
1284 {
1285 .name = "ab8500-poweron-key",
1286 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
1287 .resources = ab8500_poweronkey_db_resources,
1288 },
1289 {
1290 .name = "ab8500-pwm",
1291 .id = 1,
1292 },
1293 {
1294 .name = "ab8500-leds",
1295 },
1296 {
1297 .name = "abx500-temp",
1298 .num_resources = ARRAY_SIZE(ab8500_temp_resources),
1299 .resources = ab8500_temp_resources,
1300 },
c0eda9ae
LJ		 1301 {
1302 .name = "ab8500-gpio",
1303 },
1304 {
1305 .name = "ab8540-usb",
1306 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
1307 .resources = ab8500_usb_resources,
1308 },
1309 {
1310 .name = "ab8540-codec",
1311 },
44f72e53
VS		 1312 {
1313 .name = "ab-iddet",
1314 .num_resources = ARRAY_SIZE(ab8505_iddet_resources),
1315 .resources = ab8505_iddet_resources,
1316 },
d6255529
LW		 1317};
1318
cca69b67
MW		 1319static ssize_t show_chip_id(struct device *dev,
1320 struct device_attribute *attr, char *buf)
1321{
1322 struct ab8500 *ab8500;
1323
1324 ab8500 = dev_get_drvdata(dev);
e436ddff 1325
cca69b67
MW		 1326 return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL);
1327}
1328
e5c238c3
MW		 1329/*
1330 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
1331 * 0x01 Swoff bit programming
1332 * 0x02 Thermal protection activation
1333 * 0x04 Vbat lower then BattOk falling threshold
1334 * 0x08 Watchdog expired
1335 * 0x10 Non presence of 32kHz clock
1336 * 0x20 Battery level lower than power on reset threshold
1337 * 0x40 Power on key 1 pressed longer than 10 seconds
1338 * 0x80 DB8500 thermal shutdown
1339 */
1340static ssize_t show_switch_off_status(struct device *dev,
1341 struct device_attribute *attr, char *buf)
1342{
1343 int ret;
1344 u8 value;
1345 struct ab8500 *ab8500;
1346
1347 ab8500 = dev_get_drvdata(dev);
1348 ret = get_register_interruptible(ab8500, AB8500_RTC,
1349 AB8500_SWITCH_OFF_STATUS, &value);
1350 if (ret < 0)
1351 return ret;
1352 return sprintf(buf, "%#x\n", value);
1353}
1354
f04a9d8a
RK		 1355/* use mask and set to override the register turn_on_stat value */
1356void ab8500_override_turn_on_stat(u8 mask, u8 set)
1357{
1358 spin_lock(&on_stat_lock);
1359 turn_on_stat_mask = mask;
1360 turn_on_stat_set = set;
1361 spin_unlock(&on_stat_lock);
1362}
1363
b4a31037
AL		 1364/*
1365 * ab8500 has turned on due to (TURN_ON_STATUS):
1366 * 0x01 PORnVbat
1367 * 0x02 PonKey1dbF
1368 * 0x04 PonKey2dbF
1369 * 0x08 RTCAlarm
1370 * 0x10 MainChDet
1371 * 0x20 VbusDet
1372 * 0x40 UsbIDDetect
1373 * 0x80 Reserved
1374 */
1375static ssize_t show_turn_on_status(struct device *dev,
1376 struct device_attribute *attr, char *buf)
1377{
1378 int ret;
1379 u8 value;
1380 struct ab8500 *ab8500;
1381
1382 ab8500 = dev_get_drvdata(dev);
1383 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
1384 AB8500_TURN_ON_STATUS, &value);
1385 if (ret < 0)
1386 return ret;
f04a9d8a
RK		 1387
1388 /*
1389 * In L9540, turn_on_status register is not updated correctly if
1390 * the device is rebooted with AC/USB charger connected. Due to
1391 * this, the device boots android instead of entering into charge
1392 * only mode. Read the AC/USB status register to detect the charger
1393 * presence and update the turn on status manually.
1394 */
1395 if (is_ab9540(ab8500)) {
1396 spin_lock(&on_stat_lock);
1397 value = (value & turn_on_stat_mask) | turn_on_stat_set;
1398 spin_unlock(&on_stat_lock);
1399 }
1400
b4a31037
AL		 1401 return sprintf(buf, "%#x\n", value);
1402}
1403
d6255529
LW		 1404static ssize_t show_ab9540_dbbrstn(struct device *dev,
1405 struct device_attribute *attr, char *buf)
1406{
1407 struct ab8500 *ab8500;
1408 int ret;
1409 u8 value;
1410
1411 ab8500 = dev_get_drvdata(dev);
1412
1413 ret = get_register_interruptible(ab8500, AB8500_REGU_CTRL2,
1414 AB9540_MODEM_CTRL2_REG, &value);
1415 if (ret < 0)
1416 return ret;
1417
1418 return sprintf(buf, "%d\n",
1419 (value & AB9540_MODEM_CTRL2_SWDBBRSTN_BIT) ? 1 : 0);
1420}
1421
1422static ssize_t store_ab9540_dbbrstn(struct device *dev,
1423 struct device_attribute *attr, const char *buf, size_t count)
1424{
1425 struct ab8500 *ab8500;
1426 int ret = count;
1427 int err;
1428 u8 bitvalues;
1429
1430 ab8500 = dev_get_drvdata(dev);
1431
1432 if (count > 0) {
1433 switch (buf[0]) {
1434 case '0':
1435 bitvalues = 0;
1436 break;
1437 case '1':
1438 bitvalues = AB9540_MODEM_CTRL2_SWDBBRSTN_BIT;
1439 break;
1440 default:
1441 goto exit;
1442 }
1443
1444 err = mask_and_set_register_interruptible(ab8500,
1445 AB8500_REGU_CTRL2, AB9540_MODEM_CTRL2_REG,
1446 AB9540_MODEM_CTRL2_SWDBBRSTN_BIT, bitvalues);
1447 if (err)
1448 dev_info(ab8500->dev,
1449 "Failed to set DBBRSTN %c, err %#x\n",
1450 buf[0], err);
1451 }
1452
1453exit:
1454 return ret;
1455}
1456
cca69b67 1457static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL);
e5c238c3 1458static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL);
b4a31037 1459static DEVICE_ATTR(turn_on_status, S_IRUGO, show_turn_on_status, NULL);
d6255529
LW		 1460static DEVICE_ATTR(dbbrstn, S_IRUGO | S_IWUSR,
1461 show_ab9540_dbbrstn, store_ab9540_dbbrstn);
cca69b67
MW		 1462
1463static struct attribute *ab8500_sysfs_entries[] = {
1464 &dev_attr_chip_id.attr,
e5c238c3 1465 &dev_attr_switch_off_status.attr,
b4a31037 1466 &dev_attr_turn_on_status.attr,
cca69b67
MW		 1467 NULL,
1468};
1469
d6255529
LW		 1470static struct attribute *ab9540_sysfs_entries[] = {
1471 &dev_attr_chip_id.attr,
1472 &dev_attr_switch_off_status.attr,
1473 &dev_attr_turn_on_status.attr,
1474 &dev_attr_dbbrstn.attr,
1475 NULL,
1476};
1477
cca69b67
MW		 1478static struct attribute_group ab8500_attr_group = {
1479 .attrs = ab8500_sysfs_entries,
1480};
1481
d6255529
LW		 1482static struct attribute_group ab9540_attr_group = {
1483 .attrs = ab9540_sysfs_entries,
1484};
1485
f791be49 1486static int ab8500_probe(struct platform_device *pdev)
62579266 1487{
b04c530c
JA		 1488 static char *switch_off_status[] = {
1489 "Swoff bit programming",
1490 "Thermal protection activation",
1491 "Vbat lower then BattOk falling threshold",
1492 "Watchdog expired",
1493 "Non presence of 32kHz clock",
1494 "Battery level lower than power on reset threshold",
1495 "Power on key 1 pressed longer than 10 seconds",
1496 "DB8500 thermal shutdown"};
abee26cd
MW		 1497 static char *turn_on_status[] = {
1498 "Battery rising (Vbat)",
1499 "Power On Key 1 dbF",
1500 "Power On Key 2 dbF",
1501 "RTC Alarm",
1502 "Main Charger Detect",
1503 "Vbus Detect (USB)",
1504 "USB ID Detect",
1505 "UART Factory Mode Detect"};
d28f1db8
LJ		 1506 struct ab8500_platform_data *plat = dev_get_platdata(&pdev->dev);
1507 const struct platform_device_id *platid = platform_get_device_id(pdev);
6bc4a568
LJ		 1508 enum ab8500_version version = AB8500_VERSION_UNDEFINED;
1509 struct device_node *np = pdev->dev.of_node;
d28f1db8
LJ		 1510 struct ab8500 *ab8500;
1511 struct resource *resource;
62579266
RV		 1512 int ret;
1513 int i;
47c16975 1514 u8 value;
62579266 1515
8c4203cb 1516 ab8500 = devm_kzalloc(&pdev->dev, sizeof *ab8500, GFP_KERNEL);
d28f1db8
LJ		 1517 if (!ab8500)
1518 return -ENOMEM;
1519
62579266
RV		 1520 if (plat)
1521 ab8500->irq_base = plat->irq_base;
1522
d28f1db8
LJ		 1523 ab8500->dev = &pdev->dev;
1524
1525 resource = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
8c4203cb
LJ		 1526 if (!resource)
1527 return -ENODEV;
d28f1db8
LJ		 1528
1529 ab8500->irq = resource->start;
1530
822672a7
LJ		 1531 ab8500->read = ab8500_prcmu_read;
1532 ab8500->write = ab8500_prcmu_write;
1533 ab8500->write_masked = ab8500_prcmu_write_masked;
d28f1db8 1534
62579266
RV		 1535 mutex_init(&ab8500->lock);
1536 mutex_init(&ab8500->irq_lock);
112a80d2 1537 atomic_set(&ab8500->transfer_ongoing, 0);
62579266 1538
d28f1db8
LJ		 1539 platform_set_drvdata(pdev, ab8500);
1540
6bc4a568
LJ		 1541 if (platid)
1542 version = platid->driver_data;
6bc4a568 1543
0f620837
LW		 1544 if (version != AB8500_VERSION_UNDEFINED)
1545 ab8500->version = version;
1546 else {
1547 ret = get_register_interruptible(ab8500, AB8500_MISC,
1548 AB8500_IC_NAME_REG, &value);
1549 if (ret < 0)
8c4203cb 1550 return ret;
0f620837
LW		 1551
1552 ab8500->version = value;
1553 }
1554
47c16975
MW		 1555 ret = get_register_interruptible(ab8500, AB8500_MISC,
1556 AB8500_REV_REG, &value);
62579266 1557 if (ret < 0)
8c4203cb 1558 return ret;
62579266 1559
47c16975 1560 ab8500->chip_id = value;
62579266 1561
0f620837
LW		 1562 dev_info(ab8500->dev, "detected chip, %s rev. %1x.%1x\n",
1563 ab8500_version_str[ab8500->version],
1564 ab8500->chip_id >> 4,
1565 ab8500->chip_id & 0x0F);
1566
3e1a498f
LJ		 1567 /* Configure AB8540 */
1568 if (is_ab8540(ab8500)) {
1569 ab8500->mask_size = AB8540_NUM_IRQ_REGS;
1570 ab8500->irq_reg_offset = ab8540_irq_regoffset;
1571 ab8500->it_latchhier_num = AB8540_IT_LATCHHIER_NUM;
1572 }/* Configure AB8500 or AB9540 IRQ */
1573 else if (is_ab9540(ab8500) || is_ab8505(ab8500)) {
d6255529
LW		 1574 ab8500->mask_size = AB9540_NUM_IRQ_REGS;
1575 ab8500->irq_reg_offset = ab9540_irq_regoffset;
3e1a498f 1576 ab8500->it_latchhier_num = AB8500_IT_LATCHHIER_NUM;
d6255529
LW		 1577 } else {
1578 ab8500->mask_size = AB8500_NUM_IRQ_REGS;
1579 ab8500->irq_reg_offset = ab8500_irq_regoffset;
3e1a498f 1580 ab8500->it_latchhier_num = AB8500_IT_LATCHHIER_NUM;
d6255529 1581 }
8c4203cb 1582 ab8500->mask = devm_kzalloc(&pdev->dev, ab8500->mask_size, GFP_KERNEL);
2ced445e
LW		 1583 if (!ab8500->mask)
1584 return -ENOMEM;
8c4203cb
LJ		 1585 ab8500->oldmask = devm_kzalloc(&pdev->dev, ab8500->mask_size, GFP_KERNEL);
1586 if (!ab8500->oldmask)
1587 return -ENOMEM;
1588
e5c238c3
MW		 1589 /*
1590 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
1591 * 0x01 Swoff bit programming
1592 * 0x02 Thermal protection activation
1593 * 0x04 Vbat lower then BattOk falling threshold
1594 * 0x08 Watchdog expired
1595 * 0x10 Non presence of 32kHz clock
1596 * 0x20 Battery level lower than power on reset threshold
1597 * 0x40 Power on key 1 pressed longer than 10 seconds
1598 * 0x80 DB8500 thermal shutdown
1599 */
1600
1601 ret = get_register_interruptible(ab8500, AB8500_RTC,
1602 AB8500_SWITCH_OFF_STATUS, &value);
1603 if (ret < 0)
1604 return ret;
b04c530c
JA		 1605 dev_info(ab8500->dev, "switch off cause(s) (%#x): ", value);
1606
1607 if (value) {
1608 for (i = 0; i < ARRAY_SIZE(switch_off_status); i++) {
1609 if (value & 1)
1610 printk(KERN_CONT " \"%s\"",
1611 switch_off_status[i]);
1612 value = value >> 1;
1613
1614 }
1615 printk(KERN_CONT "\n");
1616 } else {
1617 printk(KERN_CONT " None\n");
1618 }
abee26cd
MW		 1619 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
1620 AB8500_TURN_ON_STATUS, &value);
1621 if (ret < 0)
1622 return ret;
1623 dev_info(ab8500->dev, "turn on reason(s) (%#x): ", value);
1624
1625 if (value) {
1626 for (i = 0; i < ARRAY_SIZE(turn_on_status); i++) {
1627 if (value & 1)
1628 printk("\"%s\" ", turn_on_status[i]);
1629 value = value >> 1;
1630 }
1631 printk("\n");
1632 } else {
1633 printk("None\n");
1634 }
e5c238c3 1635
62579266
RV		 1636 if (plat && plat->init)
1637 plat->init(ab8500);
abee26cd 1638
f04a9d8a
RK		 1639 if (is_ab9540(ab8500)) {
1640 ret = get_register_interruptible(ab8500, AB8500_CHARGER,
1641 AB8500_CH_USBCH_STAT1_REG, &value);
1642 if (ret < 0)
1643 return ret;
1644 if ((value & VBUS_DET_DBNC1) && (value & VBUS_DET_DBNC100))
1645 ab8500_override_turn_on_stat(~AB8500_POW_KEY_1_ON,
1646 AB8500_VBUS_DET);
1647 }
62579266
RV		 1648
1649 /* Clear and mask all interrupts */
2ced445e 1650 for (i = 0; i < ab8500->mask_size; i++) {
0f620837
LW		 1651 /*
1652 * Interrupt register 12 doesn't exist prior to AB8500 version
1653 * 2.0
1654 */
1655 if (ab8500->irq_reg_offset[i] == 11 &&
1656 is_ab8500_1p1_or_earlier(ab8500))
92d50a41 1657 continue;
62579266 1658
3e1a498f
LJ		 1659 if (ab8500->irq_reg_offset[i] < 0)
1660 continue;
1661
47c16975 1662 get_register_interruptible(ab8500, AB8500_INTERRUPT,
2ced445e 1663 AB8500_IT_LATCH1_REG + ab8500->irq_reg_offset[i],
92d50a41 1664 &value);
47c16975 1665 set_register_interruptible(ab8500, AB8500_INTERRUPT,
2ced445e 1666 AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i], 0xff);
62579266
RV		 1667 }
1668
47c16975
MW		 1669 ret = abx500_register_ops(ab8500->dev, &ab8500_ops);
1670 if (ret)
8c4203cb 1671 return ret;
47c16975 1672
2ced445e 1673 for (i = 0; i < ab8500->mask_size; i++)
62579266
RV		 1674 ab8500->mask[i] = ab8500->oldmask[i] = 0xff;
1675
06e589ef
LJ		 1676 ret = ab8500_irq_init(ab8500, np);
1677 if (ret)
8c4203cb 1678 return ret;
62579266 1679
f348fefd
DS		 1680 ret = devm_request_threaded_irq(&pdev->dev, ab8500->irq, NULL,
1681 ab8500_hierarchical_irq,
1682 IRQF_ONESHOT | IRQF_NO_SUSPEND,
1683 "ab8500", ab8500);
1684 if (ret)
1685 return ret;
62579266 1686
bad76991
LJ		 1687 if (is_ab9540(ab8500))
1688 ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs,
1689 ARRAY_SIZE(ab9540_devs), NULL,
55692af5 1690 ab8500->irq_base, ab8500->domain);
c0eda9ae
LJ		 1691 else if (is_ab8540(ab8500))
1692 ret = mfd_add_devices(ab8500->dev, 0, ab8540_devs,
1693 ARRAY_SIZE(ab8540_devs), NULL,
1694 ab8500->irq_base, ab8500->domain);
1695 else if (is_ab8505(ab8500))
1696 ret = mfd_add_devices(ab8500->dev, 0, ab8505_devs,
1697 ARRAY_SIZE(ab8505_devs), NULL,
1698 ab8500->irq_base, ab8500->domain);
bad76991
LJ		 1699 else
1700 ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs,
1701 ARRAY_SIZE(ab8500_devs), NULL,
55692af5 1702 ab8500->irq_base, ab8500->domain);
bad76991 1703 if (ret)
8c4203cb 1704 return ret;
44f72e53 1705
6ef9418c
RA		 1706 if (!no_bm) {
1707 /* Add battery management devices */
1708 ret = mfd_add_devices(ab8500->dev, 0, ab8500_bm_devs,
1709 ARRAY_SIZE(ab8500_bm_devs), NULL,
55692af5 1710 ab8500->irq_base, ab8500->domain);
6ef9418c
RA		 1711 if (ret)
1712 dev_err(ab8500->dev, "error adding bm devices\n");
1713 }
1714
e436ddff
LJ		 1715 if (((is_ab8505(ab8500) || is_ab9540(ab8500)) &&
1716 ab8500->chip_id >= AB8500_CUT2P0) || is_ab8540(ab8500))
d6255529
LW		 1717 ret = sysfs_create_group(&ab8500->dev->kobj,
1718 &ab9540_attr_group);
1719 else
1720 ret = sysfs_create_group(&ab8500->dev->kobj,
1721 &ab8500_attr_group);
cca69b67
MW		 1722 if (ret)
1723 dev_err(ab8500->dev, "error creating sysfs entries\n");
06e589ef
LJ		 1724
1725 return ret;
62579266
RV		 1726}
1727
4740f73f 1728static int ab8500_remove(struct platform_device *pdev)
62579266 1729{
d28f1db8
LJ		 1730 struct ab8500 *ab8500 = platform_get_drvdata(pdev);
1731
e436ddff
LJ		 1732 if (((is_ab8505(ab8500) || is_ab9540(ab8500)) &&
1733 ab8500->chip_id >= AB8500_CUT2P0) || is_ab8540(ab8500))
d6255529
LW		 1734 sysfs_remove_group(&ab8500->dev->kobj, &ab9540_attr_group);
1735 else
1736 sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group);
06e589ef 1737
62579266 1738 mfd_remove_devices(ab8500->dev);
62579266
RV		 1739
1740 return 0;
1741}
1742
d28f1db8
LJ		 1743static const struct platform_device_id ab8500_id[] = {
1744 { "ab8500-core", AB8500_VERSION_AB8500 },
1745 { "ab8505-i2c", AB8500_VERSION_AB8505 },
1746 { "ab9540-i2c", AB8500_VERSION_AB9540 },
1747 { "ab8540-i2c", AB8500_VERSION_AB8540 },
1748 { }
1749};
1750
1751static struct platform_driver ab8500_core_driver = {
1752 .driver = {
1753 .name = "ab8500-core",
1754 .owner = THIS_MODULE,
1755 },
1756 .probe = ab8500_probe,
84449216 1757 .remove = ab8500_remove,
d28f1db8
LJ		 1758 .id_table = ab8500_id,
1759};
1760
1761static int __init ab8500_core_init(void)
1762{
1763 return platform_driver_register(&ab8500_core_driver);
1764}
1765
1766static void __exit ab8500_core_exit(void)
1767{
1768 platform_driver_unregister(&ab8500_core_driver);
1769}
ba7cbc3e 1770core_initcall(ab8500_core_init);
d28f1db8
LJ		 1771module_exit(ab8500_core_exit);
1772
adceed62 1773MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent");
62579266
RV		 1774MODULE_DESCRIPTION("AB8500 MFD core");
1775MODULE_LICENSE("GPL v2");
Linux 6.x block layer and io_uring tree(s)