projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
[media] Altera FPGA firmware download module
[linux-2.6-block.git] / drivers / mfd / ab8500-core.c
CommitLineData
62579266
RV		 1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License v2
5 * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
6 * Author: Rabin Vincent <rabin.vincent@stericsson.com>
47c16975 7 * Changes: Mattias Wallin <mattias.wallin@stericsson.com>
62579266
RV		 8 */
9
10#include <linux/kernel.h>
11#include <linux/slab.h>
12#include <linux/init.h>
13#include <linux/irq.h>
14#include <linux/delay.h>
15#include <linux/interrupt.h>
16#include <linux/module.h>
17#include <linux/platform_device.h>
18#include <linux/mfd/core.h>
47c16975 19#include <linux/mfd/abx500.h>
62579266 20#include <linux/mfd/ab8500.h>
549931f9 21#include <linux/regulator/ab8500.h>
62579266
RV		 22
23/*
24 * Interrupt register offsets
25 * Bank : 0x0E
26 */
47c16975
MW		 27#define AB8500_IT_SOURCE1_REG 0x00
28#define AB8500_IT_SOURCE2_REG 0x01
29#define AB8500_IT_SOURCE3_REG 0x02
30#define AB8500_IT_SOURCE4_REG 0x03
31#define AB8500_IT_SOURCE5_REG 0x04
32#define AB8500_IT_SOURCE6_REG 0x05
33#define AB8500_IT_SOURCE7_REG 0x06
34#define AB8500_IT_SOURCE8_REG 0x07
35#define AB8500_IT_SOURCE19_REG 0x12
36#define AB8500_IT_SOURCE20_REG 0x13
37#define AB8500_IT_SOURCE21_REG 0x14
38#define AB8500_IT_SOURCE22_REG 0x15
39#define AB8500_IT_SOURCE23_REG 0x16
40#define AB8500_IT_SOURCE24_REG 0x17
62579266
RV		 41
42/*
43 * latch registers
44 */
47c16975
MW		 45#define AB8500_IT_LATCH1_REG 0x20
46#define AB8500_IT_LATCH2_REG 0x21
47#define AB8500_IT_LATCH3_REG 0x22
48#define AB8500_IT_LATCH4_REG 0x23
49#define AB8500_IT_LATCH5_REG 0x24
50#define AB8500_IT_LATCH6_REG 0x25
51#define AB8500_IT_LATCH7_REG 0x26
52#define AB8500_IT_LATCH8_REG 0x27
53#define AB8500_IT_LATCH9_REG 0x28
54#define AB8500_IT_LATCH10_REG 0x29
92d50a41 55#define AB8500_IT_LATCH12_REG 0x2B
47c16975
MW		 56#define AB8500_IT_LATCH19_REG 0x32
57#define AB8500_IT_LATCH20_REG 0x33
58#define AB8500_IT_LATCH21_REG 0x34
59#define AB8500_IT_LATCH22_REG 0x35
60#define AB8500_IT_LATCH23_REG 0x36
61#define AB8500_IT_LATCH24_REG 0x37
62579266
RV		 62
63/*
64 * mask registers
65 */
66
47c16975
MW		 67#define AB8500_IT_MASK1_REG 0x40
68#define AB8500_IT_MASK2_REG 0x41
69#define AB8500_IT_MASK3_REG 0x42
70#define AB8500_IT_MASK4_REG 0x43
71#define AB8500_IT_MASK5_REG 0x44
72#define AB8500_IT_MASK6_REG 0x45
73#define AB8500_IT_MASK7_REG 0x46
74#define AB8500_IT_MASK8_REG 0x47
75#define AB8500_IT_MASK9_REG 0x48
76#define AB8500_IT_MASK10_REG 0x49
77#define AB8500_IT_MASK11_REG 0x4A
78#define AB8500_IT_MASK12_REG 0x4B
79#define AB8500_IT_MASK13_REG 0x4C
80#define AB8500_IT_MASK14_REG 0x4D
81#define AB8500_IT_MASK15_REG 0x4E
82#define AB8500_IT_MASK16_REG 0x4F
83#define AB8500_IT_MASK17_REG 0x50
84#define AB8500_IT_MASK18_REG 0x51
85#define AB8500_IT_MASK19_REG 0x52
86#define AB8500_IT_MASK20_REG 0x53
87#define AB8500_IT_MASK21_REG 0x54
88#define AB8500_IT_MASK22_REG 0x55
89#define AB8500_IT_MASK23_REG 0x56
90#define AB8500_IT_MASK24_REG 0x57
91
92#define AB8500_REV_REG 0x80
62579266
RV		 93
94/*
95 * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt
96 * numbers are indexed into this array with (num / 8).
97 *
98 * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at
99 * offset 0.
100 */
101static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = {
92d50a41 102 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21,
62579266
RV		 103};
104
47c16975
MW		 105static int ab8500_get_chip_id(struct device *dev)
106{
6bce7bf1
MW		 107 struct ab8500 *ab8500;
108
109 if (!dev)
110 return -EINVAL;
111 ab8500 = dev_get_drvdata(dev->parent);
112 return ab8500 ? (int)ab8500->chip_id : -EINVAL;
47c16975
MW		 113}
114
115static int set_register_interruptible(struct ab8500 *ab8500, u8 bank,
116 u8 reg, u8 data)
62579266
RV		 117{
118 int ret;
47c16975
MW		 119 /*
120 * Put the u8 bank and u8 register together into a an u16.
121 * The bank on higher 8 bits and register in lower 8 bits.
122 * */
123 u16 addr = ((u16)bank) << 8 | reg;
62579266
RV		 124
125 dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data);
126
47c16975
MW		 127 ret = mutex_lock_interruptible(&ab8500->lock);
128 if (ret)
129 return ret;
130
62579266
RV		 131 ret = ab8500->write(ab8500, addr, data);
132 if (ret < 0)
133 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
134 addr, ret);
47c16975 135 mutex_unlock(&ab8500->lock);
62579266
RV		 136
137 return ret;
138}
139
47c16975
MW		 140static int ab8500_set_register(struct device *dev, u8 bank,
141 u8 reg, u8 value)
62579266 142{
47c16975 143 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
62579266 144
47c16975 145 return set_register_interruptible(ab8500, bank, reg, value);
62579266 146}
62579266 147
47c16975
MW		 148static int get_register_interruptible(struct ab8500 *ab8500, u8 bank,
149 u8 reg, u8 *value)
62579266
RV		 150{
151 int ret;
47c16975
MW		 152 /* put the u8 bank and u8 reg together into a an u16.
153 * bank on higher 8 bits and reg in lower */
154 u16 addr = ((u16)bank) << 8 | reg;
155
156 ret = mutex_lock_interruptible(&ab8500->lock);
157 if (ret)
158 return ret;
62579266
RV		 159
160 ret = ab8500->read(ab8500, addr);
161 if (ret < 0)
162 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
163 addr, ret);
47c16975
MW		 164 else
165 *value = ret;
62579266 166
47c16975 167 mutex_unlock(&ab8500->lock);
62579266
RV		 168 dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret);
169
170 return ret;
171}
172
47c16975
MW		 173static int ab8500_get_register(struct device *dev, u8 bank,
174 u8 reg, u8 *value)
62579266 175{
47c16975 176 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
62579266 177
47c16975 178 return get_register_interruptible(ab8500, bank, reg, value);
62579266 179}
47c16975
MW		 180
181static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank,
182 u8 reg, u8 bitmask, u8 bitvalues)
62579266
RV		 183{
184 int ret;
47c16975
MW		 185 u8 data;
186 /* put the u8 bank and u8 reg together into a an u16.
187 * bank on higher 8 bits and reg in lower */
188 u16 addr = ((u16)bank) << 8 | reg;
62579266 189
47c16975
MW		 190 ret = mutex_lock_interruptible(&ab8500->lock);
191 if (ret)
192 return ret;
62579266 193
47c16975
MW		 194 ret = ab8500->read(ab8500, addr);
195 if (ret < 0) {
196 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
197 addr, ret);
62579266 198 goto out;
47c16975 199 }
62579266 200
47c16975
MW		 201 data = (u8)ret;
202 data = (~bitmask & data) | (bitmask & bitvalues);
62579266 203
47c16975
MW		 204 ret = ab8500->write(ab8500, addr, data);
205 if (ret < 0)
206 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
207 addr, ret);
62579266 208
47c16975 209 dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr, data);
62579266
RV		 210out:
211 mutex_unlock(&ab8500->lock);
212 return ret;
213}
47c16975
MW		 214
215static int ab8500_mask_and_set_register(struct device *dev,
216 u8 bank, u8 reg, u8 bitmask, u8 bitvalues)
217{
218 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
219
220 return mask_and_set_register_interruptible(ab8500, bank, reg,
221 bitmask, bitvalues);
222
223}
224
225static struct abx500_ops ab8500_ops = {
226 .get_chip_id = ab8500_get_chip_id,
227 .get_register = ab8500_get_register,
228 .set_register = ab8500_set_register,
229 .get_register_page = NULL,
230 .set_register_page = NULL,
231 .mask_and_set_register = ab8500_mask_and_set_register,
232 .event_registers_startup_state_get = NULL,
233 .startup_irq_enabled = NULL,
234};
62579266 235
9505a0a0 236static void ab8500_irq_lock(struct irq_data *data)
62579266 237{
9505a0a0 238 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
62579266
RV		 239
240 mutex_lock(&ab8500->irq_lock);
241}
242
9505a0a0 243static void ab8500_irq_sync_unlock(struct irq_data *data)
62579266 244{
9505a0a0 245 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
62579266
RV		 246 int i;
247
248 for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) {
249 u8 old = ab8500->oldmask[i];
250 u8 new = ab8500->mask[i];
251 int reg;
252
253 if (new == old)
254 continue;
255
92d50a41
MW		 256 /* Interrupt register 12 does'nt exist prior to version 0x20 */
257 if (ab8500_irq_regoffset[i] == 11 && ab8500->chip_id < 0x20)
258 continue;
259
62579266
RV		 260 ab8500->oldmask[i] = new;
261
262 reg = AB8500_IT_MASK1_REG + ab8500_irq_regoffset[i];
47c16975 263 set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new);
62579266
RV		 264 }
265
266 mutex_unlock(&ab8500->irq_lock);
267}
268
9505a0a0 269static void ab8500_irq_mask(struct irq_data *data)
62579266 270{
9505a0a0
MB		 271 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
272 int offset = data->irq - ab8500->irq_base;
62579266
RV		 273 int index = offset / 8;
274 int mask = 1 << (offset % 8);
275
276 ab8500->mask[index] |= mask;
277}
278
9505a0a0 279static void ab8500_irq_unmask(struct irq_data *data)
62579266 280{
9505a0a0
MB		 281 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
282 int offset = data->irq - ab8500->irq_base;
62579266
RV		 283 int index = offset / 8;
284 int mask = 1 << (offset % 8);
285
286 ab8500->mask[index] &= ~mask;
287}
288
289static struct irq_chip ab8500_irq_chip = {
290 .name = "ab8500",
9505a0a0
MB		 291 .irq_bus_lock = ab8500_irq_lock,
292 .irq_bus_sync_unlock = ab8500_irq_sync_unlock,
293 .irq_mask = ab8500_irq_mask,
294 .irq_unmask = ab8500_irq_unmask,
62579266
RV		 295};
296
297static irqreturn_t ab8500_irq(int irq, void *dev)
298{
299 struct ab8500 *ab8500 = dev;
300 int i;
301
302 dev_vdbg(ab8500->dev, "interrupt\n");
303
304 for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) {
305 int regoffset = ab8500_irq_regoffset[i];
306 int status;
47c16975 307 u8 value;
62579266 308
92d50a41
MW		 309 /* Interrupt register 12 does'nt exist prior to version 0x20 */
310 if (regoffset == 11 && ab8500->chip_id < 0x20)
311 continue;
312
47c16975
MW		 313 status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
314 AB8500_IT_LATCH1_REG + regoffset, &value);
315 if (status < 0 || value == 0)
62579266
RV		 316 continue;
317
318 do {
88aec4f7 319 int bit = __ffs(value);
62579266
RV		 320 int line = i * 8 + bit;
321
322 handle_nested_irq(ab8500->irq_base + line);
47c16975
MW		 323 value &= ~(1 << bit);
324 } while (value);
62579266
RV		 325 }
326
327 return IRQ_HANDLED;
328}
329
330static int ab8500_irq_init(struct ab8500 *ab8500)
331{
332 int base = ab8500->irq_base;
333 int irq;
334
335 for (irq = base; irq < base + AB8500_NR_IRQS; irq++) {
336 set_irq_chip_data(irq, ab8500);
337 set_irq_chip_and_handler(irq, &ab8500_irq_chip,
338 handle_simple_irq);
339 set_irq_nested_thread(irq, 1);
340#ifdef CONFIG_ARM
341 set_irq_flags(irq, IRQF_VALID);
342#else
343 set_irq_noprobe(irq);
344#endif
345 }
346
347 return 0;
348}
349
350static void ab8500_irq_remove(struct ab8500 *ab8500)
351{
352 int base = ab8500->irq_base;
353 int irq;
354
355 for (irq = base; irq < base + AB8500_NR_IRQS; irq++) {
356#ifdef CONFIG_ARM
357 set_irq_flags(irq, 0);
358#endif
359 set_irq_chip_and_handler(irq, NULL, NULL);
360 set_irq_chip_data(irq, NULL);
361 }
362}
363
364static struct resource ab8500_gpadc_resources[] = {
365 {
366 .name = "HW_CONV_END",
367 .start = AB8500_INT_GP_HW_ADC_CONV_END,
368 .end = AB8500_INT_GP_HW_ADC_CONV_END,
369 .flags = IORESOURCE_IRQ,
370 },
371 {
372 .name = "SW_CONV_END",
373 .start = AB8500_INT_GP_SW_ADC_CONV_END,
374 .end = AB8500_INT_GP_SW_ADC_CONV_END,
375 .flags = IORESOURCE_IRQ,
376 },
377};
378
379static struct resource ab8500_rtc_resources[] = {
380 {
381 .name = "60S",
382 .start = AB8500_INT_RTC_60S,
383 .end = AB8500_INT_RTC_60S,
384 .flags = IORESOURCE_IRQ,
385 },
386 {
387 .name = "ALARM",
388 .start = AB8500_INT_RTC_ALARM,
389 .end = AB8500_INT_RTC_ALARM,
390 .flags = IORESOURCE_IRQ,
391 },
392};
393
77686517
SI		 394static struct resource ab8500_poweronkey_db_resources[] = {
395 {
396 .name = "ONKEY_DBF",
397 .start = AB8500_INT_PON_KEY1DB_F,
398 .end = AB8500_INT_PON_KEY1DB_F,
399 .flags = IORESOURCE_IRQ,
400 },
401 {
402 .name = "ONKEY_DBR",
403 .start = AB8500_INT_PON_KEY1DB_R,
404 .end = AB8500_INT_PON_KEY1DB_R,
405 .flags = IORESOURCE_IRQ,
406 },
407};
408
e098aded
MW		 409static struct resource ab8500_bm_resources[] = {
410 {
411 .name = "MAIN_EXT_CH_NOT_OK",
412 .start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
413 .end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
414 .flags = IORESOURCE_IRQ,
415 },
416 {
417 .name = "BATT_OVV",
418 .start = AB8500_INT_BATT_OVV,
419 .end = AB8500_INT_BATT_OVV,
420 .flags = IORESOURCE_IRQ,
421 },
422 {
423 .name = "MAIN_CH_UNPLUG_DET",
424 .start = AB8500_INT_MAIN_CH_UNPLUG_DET,
425 .end = AB8500_INT_MAIN_CH_UNPLUG_DET,
426 .flags = IORESOURCE_IRQ,
427 },
428 {
429 .name = "MAIN_CHARGE_PLUG_DET",
430 .start = AB8500_INT_MAIN_CH_PLUG_DET,
431 .end = AB8500_INT_MAIN_CH_PLUG_DET,
432 .flags = IORESOURCE_IRQ,
433 },
434 {
435 .name = "VBUS_DET_F",
436 .start = AB8500_INT_VBUS_DET_F,
437 .end = AB8500_INT_VBUS_DET_F,
438 .flags = IORESOURCE_IRQ,
439 },
440 {
441 .name = "VBUS_DET_R",
442 .start = AB8500_INT_VBUS_DET_R,
443 .end = AB8500_INT_VBUS_DET_R,
444 .flags = IORESOURCE_IRQ,
445 },
446 {
447 .name = "BAT_CTRL_INDB",
448 .start = AB8500_INT_BAT_CTRL_INDB,
449 .end = AB8500_INT_BAT_CTRL_INDB,
450 .flags = IORESOURCE_IRQ,
451 },
452 {
453 .name = "CH_WD_EXP",
454 .start = AB8500_INT_CH_WD_EXP,
455 .end = AB8500_INT_CH_WD_EXP,
456 .flags = IORESOURCE_IRQ,
457 },
458 {
459 .name = "VBUS_OVV",
460 .start = AB8500_INT_VBUS_OVV,
461 .end = AB8500_INT_VBUS_OVV,
462 .flags = IORESOURCE_IRQ,
463 },
464 {
465 .name = "NCONV_ACCU",
466 .start = AB8500_INT_CCN_CONV_ACC,
467 .end = AB8500_INT_CCN_CONV_ACC,
468 .flags = IORESOURCE_IRQ,
469 },
470 {
471 .name = "LOW_BAT_F",
472 .start = AB8500_INT_LOW_BAT_F,
473 .end = AB8500_INT_LOW_BAT_F,
474 .flags = IORESOURCE_IRQ,
475 },
476 {
477 .name = "LOW_BAT_R",
478 .start = AB8500_INT_LOW_BAT_R,
479 .end = AB8500_INT_LOW_BAT_R,
480 .flags = IORESOURCE_IRQ,
481 },
482 {
483 .name = "BTEMP_LOW",
484 .start = AB8500_INT_BTEMP_LOW,
485 .end = AB8500_INT_BTEMP_LOW,
486 .flags = IORESOURCE_IRQ,
487 },
488 {
489 .name = "BTEMP_HIGH",
490 .start = AB8500_INT_BTEMP_HIGH,
491 .end = AB8500_INT_BTEMP_HIGH,
492 .flags = IORESOURCE_IRQ,
493 },
494 {
495 .name = "USB_CHARGER_NOT_OKR",
496 .start = AB8500_INT_USB_CHARGER_NOT_OK,
497 .end = AB8500_INT_USB_CHARGER_NOT_OK,
498 .flags = IORESOURCE_IRQ,
499 },
500 {
501 .name = "USB_CHARGE_DET_DONE",
502 .start = AB8500_INT_USB_CHG_DET_DONE,
503 .end = AB8500_INT_USB_CHG_DET_DONE,
504 .flags = IORESOURCE_IRQ,
505 },
506 {
507 .name = "USB_CH_TH_PROT_R",
508 .start = AB8500_INT_USB_CH_TH_PROT_R,
509 .end = AB8500_INT_USB_CH_TH_PROT_R,
510 .flags = IORESOURCE_IRQ,
511 },
512 {
513 .name = "MAIN_CH_TH_PROT_R",
514 .start = AB8500_INT_MAIN_CH_TH_PROT_R,
515 .end = AB8500_INT_MAIN_CH_TH_PROT_R,
516 .flags = IORESOURCE_IRQ,
517 },
518 {
519 .name = "USB_CHARGER_NOT_OKF",
520 .start = AB8500_INT_USB_CHARGER_NOT_OKF,
521 .end = AB8500_INT_USB_CHARGER_NOT_OKF,
522 .flags = IORESOURCE_IRQ,
523 },
524};
525
526static struct resource ab8500_debug_resources[] = {
527 {
528 .name = "IRQ_FIRST",
529 .start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
530 .end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
531 .flags = IORESOURCE_IRQ,
532 },
533 {
534 .name = "IRQ_LAST",
535 .start = AB8500_INT_USB_CHARGER_NOT_OKF,
536 .end = AB8500_INT_USB_CHARGER_NOT_OKF,
537 .flags = IORESOURCE_IRQ,
538 },
539};
540
541static struct resource ab8500_usb_resources[] = {
542 {
543 .name = "ID_WAKEUP_R",
544 .start = AB8500_INT_ID_WAKEUP_R,
545 .end = AB8500_INT_ID_WAKEUP_R,
546 .flags = IORESOURCE_IRQ,
547 },
548 {
549 .name = "ID_WAKEUP_F",
550 .start = AB8500_INT_ID_WAKEUP_F,
551 .end = AB8500_INT_ID_WAKEUP_F,
552 .flags = IORESOURCE_IRQ,
553 },
554 {
555 .name = "VBUS_DET_F",
556 .start = AB8500_INT_VBUS_DET_F,
557 .end = AB8500_INT_VBUS_DET_F,
558 .flags = IORESOURCE_IRQ,
559 },
560 {
561 .name = "VBUS_DET_R",
562 .start = AB8500_INT_VBUS_DET_R,
563 .end = AB8500_INT_VBUS_DET_R,
564 .flags = IORESOURCE_IRQ,
565 },
92d50a41
MW		 566 {
567 .name = "USB_LINK_STATUS",
568 .start = AB8500_INT_USB_LINK_STATUS,
569 .end = AB8500_INT_USB_LINK_STATUS,
570 .flags = IORESOURCE_IRQ,
571 },
e098aded
MW		 572};
573
574static struct resource ab8500_temp_resources[] = {
575 {
576 .name = "AB8500_TEMP_WARM",
577 .start = AB8500_INT_TEMP_WARM,
578 .end = AB8500_INT_TEMP_WARM,
579 .flags = IORESOURCE_IRQ,
580 },
581};
582
62579266 583static struct mfd_cell ab8500_devs[] = {
5814fc35
MW		 584#ifdef CONFIG_DEBUG_FS
585 {
586 .name = "ab8500-debug",
e098aded
MW		 587 .num_resources = ARRAY_SIZE(ab8500_debug_resources),
588 .resources = ab8500_debug_resources,
5814fc35
MW		 589 },
590#endif
e098aded
MW		 591 {
592 .name = "ab8500-sysctrl",
593 },
594 {
595 .name = "ab8500-regulator",
596 },
62579266
RV		 597 {
598 .name = "ab8500-gpadc",
599 .num_resources = ARRAY_SIZE(ab8500_gpadc_resources),
600 .resources = ab8500_gpadc_resources,
601 },
602 {
603 .name = "ab8500-rtc",
604 .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
605 .resources = ab8500_rtc_resources,
606 },
e098aded
MW		 607 {
608 .name = "ab8500-bm",
609 .num_resources = ARRAY_SIZE(ab8500_bm_resources),
610 .resources = ab8500_bm_resources,
611 },
612 { .name = "ab8500-codec", },
613 {
614 .name = "ab8500-usb",
615 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
616 .resources = ab8500_usb_resources,
617 },
618 {
619 .name = "ab8500-poweron-key",
620 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
621 .resources = ab8500_poweronkey_db_resources,
622 },
f0f05b1c
AM		 623 {
624 .name = "ab8500-pwm",
625 .id = 1,
626 },
627 {
628 .name = "ab8500-pwm",
629 .id = 2,
630 },
631 {
632 .name = "ab8500-pwm",
633 .id = 3,
634 },
e098aded 635 { .name = "ab8500-leds", },
77686517 636 {
e098aded
MW		 637 .name = "ab8500-denc",
638 },
639 {
640 .name = "ab8500-temp",
641 .num_resources = ARRAY_SIZE(ab8500_temp_resources),
642 .resources = ab8500_temp_resources,
77686517 643 },
62579266
RV		 644};
645
cca69b67
MW		 646static ssize_t show_chip_id(struct device *dev,
647 struct device_attribute *attr, char *buf)
648{
649 struct ab8500 *ab8500;
650
651 ab8500 = dev_get_drvdata(dev);
652 return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL);
653}
654
655static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL);
656
657static struct attribute *ab8500_sysfs_entries[] = {
658 &dev_attr_chip_id.attr,
659 NULL,
660};
661
662static struct attribute_group ab8500_attr_group = {
663 .attrs = ab8500_sysfs_entries,
664};
665
62579266
RV		 666int __devinit ab8500_init(struct ab8500 *ab8500)
667{
668 struct ab8500_platform_data *plat = dev_get_platdata(ab8500->dev);
669 int ret;
670 int i;
47c16975 671 u8 value;
62579266
RV		 672
673 if (plat)
674 ab8500->irq_base = plat->irq_base;
675
676 mutex_init(&ab8500->lock);
677 mutex_init(&ab8500->irq_lock);
678
47c16975
MW		 679 ret = get_register_interruptible(ab8500, AB8500_MISC,
680 AB8500_REV_REG, &value);
62579266
RV		 681 if (ret < 0)
682 return ret;
683
684 /*
685 * 0x0 - Early Drop
686 * 0x10 - Cut 1.0
687 * 0x11 - Cut 1.1
92d50a41 688 * 0x20 - Cut 2.0
62579266 689 */
92d50a41 690 if (value == 0x0 || value == 0x10 || value == 0x11 || value == 0x20) {
47c16975
MW		 691 ab8500->revision = value;
692 dev_info(ab8500->dev, "detected chip, revision: %#x\n", value);
62579266 693 } else {
47c16975 694 dev_err(ab8500->dev, "unknown chip, revision: %#x\n", value);
62579266
RV		 695 return -EINVAL;
696 }
47c16975 697 ab8500->chip_id = value;
62579266
RV		 698
699 if (plat && plat->init)
700 plat->init(ab8500);
701
702 /* Clear and mask all interrupts */
92d50a41
MW		 703 for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) {
704 /* Interrupt register 12 does'nt exist prior to version 0x20 */
705 if (ab8500_irq_regoffset[i] == 11 && ab8500->chip_id < 0x20)
706 continue;
62579266 707
47c16975 708 get_register_interruptible(ab8500, AB8500_INTERRUPT,
92d50a41
MW		 709 AB8500_IT_LATCH1_REG + ab8500_irq_regoffset[i],
710 &value);
47c16975 711 set_register_interruptible(ab8500, AB8500_INTERRUPT,
92d50a41 712 AB8500_IT_MASK1_REG + ab8500_irq_regoffset[i], 0xff);
62579266
RV		 713 }
714
47c16975
MW		 715 ret = abx500_register_ops(ab8500->dev, &ab8500_ops);
716 if (ret)
717 return ret;
718
62579266
RV		 719 for (i = 0; i < AB8500_NUM_IRQ_REGS; i++)
720 ab8500->mask[i] = ab8500->oldmask[i] = 0xff;
721
722 if (ab8500->irq_base) {
723 ret = ab8500_irq_init(ab8500);
724 if (ret)
725 return ret;
726
727 ret = request_threaded_irq(ab8500->irq, NULL, ab8500_irq,
4f079985
MW		 728 IRQF_ONESHOT | IRQF_NO_SUSPEND,
729 "ab8500", ab8500);
62579266
RV		 730 if (ret)
731 goto out_removeirq;
732 }
733
549931f9 734 ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs,
62579266
RV		 735 ARRAY_SIZE(ab8500_devs), NULL,
736 ab8500->irq_base);
737 if (ret)
738 goto out_freeirq;
739
cca69b67
MW		 740 ret = sysfs_create_group(&ab8500->dev->kobj, &ab8500_attr_group);
741 if (ret)
742 dev_err(ab8500->dev, "error creating sysfs entries\n");
743
62579266
RV		 744 return ret;
745
746out_freeirq:
747 if (ab8500->irq_base) {
748 free_irq(ab8500->irq, ab8500);
749out_removeirq:
750 ab8500_irq_remove(ab8500);
751 }
752 return ret;
753}
754
755int __devexit ab8500_exit(struct ab8500 *ab8500)
756{
cca69b67 757 sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group);
62579266
RV		 758 mfd_remove_devices(ab8500->dev);
759 if (ab8500->irq_base) {
760 free_irq(ab8500->irq, ab8500);
761 ab8500_irq_remove(ab8500);
762 }
763
764 return 0;
765}
766
767MODULE_AUTHOR("Srinidhi Kasagar, Rabin Vincent");
768MODULE_DESCRIPTION("AB8500 MFD core");
769MODULE_LICENSE("GPL v2");
Linux 6.x block layer and io_uring tree(s)