Merge tag 'io_uring-2023-01-06' of git://git.kernel.dk/linux
[linux-2.6-block.git] / drivers / mfd / ab8500-core.c
CommitLineData
0376148f 1// SPDX-License-Identifier: GPL-2.0-only
62579266
RV
2/*
3 * Copyright (C) ST-Ericsson SA 2010
4 *
62579266
RV
5 * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
6 * Author: Rabin Vincent <rabin.vincent@stericsson.com>
adceed62 7 * Author: Mattias Wallin <mattias.wallin@stericsson.com>
62579266
RV
8 */
9
10#include <linux/kernel.h>
11#include <linux/slab.h>
12#include <linux/init.h>
13#include <linux/irq.h>
06e589ef 14#include <linux/irqdomain.h>
62579266
RV
15#include <linux/delay.h>
16#include <linux/interrupt.h>
31cbae22 17#include <linux/moduleparam.h>
62579266
RV
18#include <linux/platform_device.h>
19#include <linux/mfd/core.h>
47c16975 20#include <linux/mfd/abx500.h>
ee66e653 21#include <linux/mfd/abx500/ab8500.h>
d28f1db8 22#include <linux/mfd/dbx500-prcmu.h>
6bc4a568
LJ
23#include <linux/of.h>
24#include <linux/of_device.h>
62579266
RV
25
26/*
27 * Interrupt register offsets
28 * Bank : 0x0E
29 */
47c16975
MW
30#define AB8500_IT_SOURCE1_REG 0x00
31#define AB8500_IT_SOURCE2_REG 0x01
32#define AB8500_IT_SOURCE3_REG 0x02
33#define AB8500_IT_SOURCE4_REG 0x03
34#define AB8500_IT_SOURCE5_REG 0x04
35#define AB8500_IT_SOURCE6_REG 0x05
36#define AB8500_IT_SOURCE7_REG 0x06
37#define AB8500_IT_SOURCE8_REG 0x07
d6255529 38#define AB9540_IT_SOURCE13_REG 0x0C
47c16975
MW
39#define AB8500_IT_SOURCE19_REG 0x12
40#define AB8500_IT_SOURCE20_REG 0x13
41#define AB8500_IT_SOURCE21_REG 0x14
42#define AB8500_IT_SOURCE22_REG 0x15
43#define AB8500_IT_SOURCE23_REG 0x16
44#define AB8500_IT_SOURCE24_REG 0x17
62579266
RV
45
46/*
47 * latch registers
48 */
47c16975
MW
49#define AB8500_IT_LATCH1_REG 0x20
50#define AB8500_IT_LATCH2_REG 0x21
51#define AB8500_IT_LATCH3_REG 0x22
52#define AB8500_IT_LATCH4_REG 0x23
53#define AB8500_IT_LATCH5_REG 0x24
54#define AB8500_IT_LATCH6_REG 0x25
55#define AB8500_IT_LATCH7_REG 0x26
56#define AB8500_IT_LATCH8_REG 0x27
57#define AB8500_IT_LATCH9_REG 0x28
58#define AB8500_IT_LATCH10_REG 0x29
92d50a41 59#define AB8500_IT_LATCH12_REG 0x2B
d6255529 60#define AB9540_IT_LATCH13_REG 0x2C
47c16975
MW
61#define AB8500_IT_LATCH19_REG 0x32
62#define AB8500_IT_LATCH20_REG 0x33
63#define AB8500_IT_LATCH21_REG 0x34
64#define AB8500_IT_LATCH22_REG 0x35
65#define AB8500_IT_LATCH23_REG 0x36
66#define AB8500_IT_LATCH24_REG 0x37
62579266
RV
67
68/*
69 * mask registers
70 */
71
47c16975
MW
72#define AB8500_IT_MASK1_REG 0x40
73#define AB8500_IT_MASK2_REG 0x41
74#define AB8500_IT_MASK3_REG 0x42
75#define AB8500_IT_MASK4_REG 0x43
76#define AB8500_IT_MASK5_REG 0x44
77#define AB8500_IT_MASK6_REG 0x45
78#define AB8500_IT_MASK7_REG 0x46
79#define AB8500_IT_MASK8_REG 0x47
80#define AB8500_IT_MASK9_REG 0x48
81#define AB8500_IT_MASK10_REG 0x49
82#define AB8500_IT_MASK11_REG 0x4A
83#define AB8500_IT_MASK12_REG 0x4B
84#define AB8500_IT_MASK13_REG 0x4C
85#define AB8500_IT_MASK14_REG 0x4D
86#define AB8500_IT_MASK15_REG 0x4E
87#define AB8500_IT_MASK16_REG 0x4F
88#define AB8500_IT_MASK17_REG 0x50
89#define AB8500_IT_MASK18_REG 0x51
90#define AB8500_IT_MASK19_REG 0x52
91#define AB8500_IT_MASK20_REG 0x53
92#define AB8500_IT_MASK21_REG 0x54
93#define AB8500_IT_MASK22_REG 0x55
94#define AB8500_IT_MASK23_REG 0x56
95#define AB8500_IT_MASK24_REG 0x57
a29264b6 96#define AB8500_IT_MASK25_REG 0x58
47c16975 97
7ccfe9b1
MJ
98/*
99 * latch hierarchy registers
100 */
101#define AB8500_IT_LATCHHIER1_REG 0x60
102#define AB8500_IT_LATCHHIER2_REG 0x61
103#define AB8500_IT_LATCHHIER3_REG 0x62
3e1a498f 104#define AB8540_IT_LATCHHIER4_REG 0x63
7ccfe9b1
MJ
105
106#define AB8500_IT_LATCHHIER_NUM 3
3e1a498f 107#define AB8540_IT_LATCHHIER_NUM 4
7ccfe9b1 108
47c16975 109#define AB8500_REV_REG 0x80
0f620837 110#define AB8500_IC_NAME_REG 0x82
e5c238c3 111#define AB8500_SWITCH_OFF_STATUS 0x00
62579266 112
b4a31037 113#define AB8500_TURN_ON_STATUS 0x00
500e69a1 114#define AB8505_TURN_ON_STATUS_2 0x04
b4a31037 115
f04a9d8a
RK
116#define AB8500_CH_USBCH_STAT1_REG 0x02
117#define VBUS_DET_DBNC100 0x02
118#define VBUS_DET_DBNC1 0x01
119
120static DEFINE_SPINLOCK(on_stat_lock);
121static u8 turn_on_stat_mask = 0xFF;
122static u8 turn_on_stat_set;
6ef9418c 123
d6255529
LW
124#define AB9540_MODEM_CTRL2_REG 0x23
125#define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT BIT(2)
126
62579266
RV
127/*
128 * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt
2ced445e
LW
129 * numbers are indexed into this array with (num / 8). The interupts are
130 * defined in linux/mfd/ab8500.h
62579266
RV
131 *
132 * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at
133 * offset 0.
134 */
2ced445e 135/* AB8500 support */
62579266 136static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = {
92d50a41 137 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21,
62579266
RV
138};
139
a29264b6 140/* AB9540 / AB8505 support */
d6255529 141static const int ab9540_irq_regoffset[AB9540_NUM_IRQ_REGS] = {
a29264b6 142 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22, 23
d6255529
LW
143};
144
3e1a498f
LJ
145/* AB8540 support */
146static const int ab8540_irq_regoffset[AB8540_NUM_IRQ_REGS] = {
7ccf40b1
LJ
147 0, 1, 2, 3, 4, -1, -1, -1, -1, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22,
148 23, 25, 26, 27, 28, 29, 30, 31,
3e1a498f
LJ
149};
150
0f620837
LW
151static const char ab8500_version_str[][7] = {
152 [AB8500_VERSION_AB8500] = "AB8500",
153 [AB8500_VERSION_AB8505] = "AB8505",
154 [AB8500_VERSION_AB9540] = "AB9540",
155 [AB8500_VERSION_AB8540] = "AB8540",
156};
157
822672a7 158static int ab8500_prcmu_write(struct ab8500 *ab8500, u16 addr, u8 data)
d28f1db8
LJ
159{
160 int ret;
161
162 ret = prcmu_abb_write((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1);
163 if (ret < 0)
164 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
165 return ret;
166}
167
822672a7 168static int ab8500_prcmu_write_masked(struct ab8500 *ab8500, u16 addr, u8 mask,
d28f1db8
LJ
169 u8 data)
170{
171 int ret;
172
173 ret = prcmu_abb_write_masked((u8)(addr >> 8), (u8)(addr & 0xFF), &data,
174 &mask, 1);
175 if (ret < 0)
176 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
177 return ret;
178}
179
822672a7 180static int ab8500_prcmu_read(struct ab8500 *ab8500, u16 addr)
d28f1db8
LJ
181{
182 int ret;
183 u8 data;
184
185 ret = prcmu_abb_read((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1);
186 if (ret < 0) {
187 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
188 return ret;
189 }
190 return (int)data;
191}
192
47c16975
MW
193static int ab8500_get_chip_id(struct device *dev)
194{
6bce7bf1
MW
195 struct ab8500 *ab8500;
196
197 if (!dev)
198 return -EINVAL;
199 ab8500 = dev_get_drvdata(dev->parent);
200 return ab8500 ? (int)ab8500->chip_id : -EINVAL;
47c16975
MW
201}
202
203static int set_register_interruptible(struct ab8500 *ab8500, u8 bank,
204 u8 reg, u8 data)
62579266
RV
205{
206 int ret;
47c16975
MW
207 /*
208 * Put the u8 bank and u8 register together into a an u16.
209 * The bank on higher 8 bits and register in lower 8 bits.
500e69a1 210 */
47c16975 211 u16 addr = ((u16)bank) << 8 | reg;
62579266
RV
212
213 dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data);
214
392cbd1e 215 mutex_lock(&ab8500->lock);
47c16975 216
62579266
RV
217 ret = ab8500->write(ab8500, addr, data);
218 if (ret < 0)
219 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
220 addr, ret);
47c16975 221 mutex_unlock(&ab8500->lock);
62579266
RV
222
223 return ret;
224}
225
47c16975
MW
226static int ab8500_set_register(struct device *dev, u8 bank,
227 u8 reg, u8 value)
62579266 228{
112a80d2 229 int ret;
47c16975 230 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
62579266 231
112a80d2
JA
232 atomic_inc(&ab8500->transfer_ongoing);
233 ret = set_register_interruptible(ab8500, bank, reg, value);
234 atomic_dec(&ab8500->transfer_ongoing);
235 return ret;
62579266 236}
62579266 237
47c16975
MW
238static int get_register_interruptible(struct ab8500 *ab8500, u8 bank,
239 u8 reg, u8 *value)
62579266
RV
240{
241 int ret;
47c16975
MW
242 u16 addr = ((u16)bank) << 8 | reg;
243
392cbd1e 244 mutex_lock(&ab8500->lock);
62579266
RV
245
246 ret = ab8500->read(ab8500, addr);
247 if (ret < 0)
248 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
249 addr, ret);
47c16975
MW
250 else
251 *value = ret;
62579266 252
47c16975 253 mutex_unlock(&ab8500->lock);
62579266
RV
254 dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret);
255
10628e3e 256 return (ret < 0) ? ret : 0;
62579266
RV
257}
258
47c16975
MW
259static int ab8500_get_register(struct device *dev, u8 bank,
260 u8 reg, u8 *value)
62579266 261{
112a80d2 262 int ret;
47c16975 263 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
62579266 264
112a80d2
JA
265 atomic_inc(&ab8500->transfer_ongoing);
266 ret = get_register_interruptible(ab8500, bank, reg, value);
267 atomic_dec(&ab8500->transfer_ongoing);
268 return ret;
62579266 269}
47c16975
MW
270
271static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank,
272 u8 reg, u8 bitmask, u8 bitvalues)
62579266
RV
273{
274 int ret;
47c16975 275 u16 addr = ((u16)bank) << 8 | reg;
62579266 276
392cbd1e 277 mutex_lock(&ab8500->lock);
62579266 278
bc628fd1
MN
279 if (ab8500->write_masked == NULL) {
280 u8 data;
62579266 281
bc628fd1
MN
282 ret = ab8500->read(ab8500, addr);
283 if (ret < 0) {
284 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
285 addr, ret);
286 goto out;
287 }
62579266 288
bc628fd1
MN
289 data = (u8)ret;
290 data = (~bitmask & data) | (bitmask & bitvalues);
291
292 ret = ab8500->write(ab8500, addr, data);
293 if (ret < 0)
294 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
295 addr, ret);
62579266 296
bc628fd1
MN
297 dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr,
298 data);
299 goto out;
300 }
301 ret = ab8500->write_masked(ab8500, addr, bitmask, bitvalues);
302 if (ret < 0)
303 dev_err(ab8500->dev, "failed to modify reg %#x: %d\n", addr,
304 ret);
62579266
RV
305out:
306 mutex_unlock(&ab8500->lock);
307 return ret;
308}
47c16975
MW
309
310static int ab8500_mask_and_set_register(struct device *dev,
311 u8 bank, u8 reg, u8 bitmask, u8 bitvalues)
312{
112a80d2 313 int ret;
47c16975
MW
314 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
315
112a80d2 316 atomic_inc(&ab8500->transfer_ongoing);
7ccf40b1 317 ret = mask_and_set_register_interruptible(ab8500, bank, reg,
112a80d2
JA
318 bitmask, bitvalues);
319 atomic_dec(&ab8500->transfer_ongoing);
320 return ret;
47c16975
MW
321}
322
323static struct abx500_ops ab8500_ops = {
324 .get_chip_id = ab8500_get_chip_id,
325 .get_register = ab8500_get_register,
326 .set_register = ab8500_set_register,
327 .get_register_page = NULL,
328 .set_register_page = NULL,
329 .mask_and_set_register = ab8500_mask_and_set_register,
330 .event_registers_startup_state_get = NULL,
331 .startup_irq_enabled = NULL,
1d843a6c 332 .dump_all_banks = ab8500_dump_all_banks,
47c16975 333};
62579266 334
9505a0a0 335static void ab8500_irq_lock(struct irq_data *data)
62579266 336{
9505a0a0 337 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
62579266
RV
338
339 mutex_lock(&ab8500->irq_lock);
112a80d2 340 atomic_inc(&ab8500->transfer_ongoing);
62579266
RV
341}
342
9505a0a0 343static void ab8500_irq_sync_unlock(struct irq_data *data)
62579266 344{
9505a0a0 345 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
62579266
RV
346 int i;
347
2ced445e 348 for (i = 0; i < ab8500->mask_size; i++) {
62579266
RV
349 u8 old = ab8500->oldmask[i];
350 u8 new = ab8500->mask[i];
351 int reg;
352
353 if (new == old)
354 continue;
355
0f620837
LW
356 /*
357 * Interrupt register 12 doesn't exist prior to AB8500 version
358 * 2.0
359 */
360 if (ab8500->irq_reg_offset[i] == 11 &&
361 is_ab8500_1p1_or_earlier(ab8500))
92d50a41
MW
362 continue;
363
3e1a498f
LJ
364 if (ab8500->irq_reg_offset[i] < 0)
365 continue;
366
62579266
RV
367 ab8500->oldmask[i] = new;
368
2ced445e 369 reg = AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i];
47c16975 370 set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new);
62579266 371 }
112a80d2 372 atomic_dec(&ab8500->transfer_ongoing);
62579266
RV
373 mutex_unlock(&ab8500->irq_lock);
374}
375
9505a0a0 376static void ab8500_irq_mask(struct irq_data *data)
62579266 377{
9505a0a0 378 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
06e589ef 379 int offset = data->hwirq;
62579266
RV
380 int index = offset / 8;
381 int mask = 1 << (offset % 8);
382
383 ab8500->mask[index] |= mask;
9c677b9b
LJ
384
385 /* The AB8500 GPIOs have two interrupts each (rising & falling). */
386 if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R)
387 ab8500->mask[index + 2] |= mask;
388 if (offset >= AB9540_INT_GPIO50R && offset <= AB9540_INT_GPIO54R)
389 ab8500->mask[index + 1] |= mask;
390 if (offset == AB8540_INT_GPIO43R || offset == AB8540_INT_GPIO44R)
e2ddf46a
LW
391 /* Here the falling IRQ is one bit lower */
392 ab8500->mask[index] |= (mask << 1);
62579266
RV
393}
394
9505a0a0 395static void ab8500_irq_unmask(struct irq_data *data)
62579266 396{
9505a0a0 397 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
9c677b9b 398 unsigned int type = irqd_get_trigger_type(data);
06e589ef 399 int offset = data->hwirq;
62579266
RV
400 int index = offset / 8;
401 int mask = 1 << (offset % 8);
402
9c677b9b
LJ
403 if (type & IRQ_TYPE_EDGE_RISING)
404 ab8500->mask[index] &= ~mask;
405
406 /* The AB8500 GPIOs have two interrupts each (rising & falling). */
407 if (type & IRQ_TYPE_EDGE_FALLING) {
408 if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R)
409 ab8500->mask[index + 2] &= ~mask;
7ccf40b1
LJ
410 else if (offset >= AB9540_INT_GPIO50R &&
411 offset <= AB9540_INT_GPIO54R)
9c677b9b 412 ab8500->mask[index + 1] &= ~mask;
7ccf40b1
LJ
413 else if (offset == AB8540_INT_GPIO43R ||
414 offset == AB8540_INT_GPIO44R)
e2ddf46a
LW
415 /* Here the falling IRQ is one bit lower */
416 ab8500->mask[index] &= ~(mask << 1);
9c677b9b
LJ
417 else
418 ab8500->mask[index] &= ~mask;
e2ddf46a 419 } else {
9c677b9b
LJ
420 /* Satisfies the case where type is not set. */
421 ab8500->mask[index] &= ~mask;
e2ddf46a 422 }
62579266
RV
423}
424
40f6e5a2
LJ
425static int ab8500_irq_set_type(struct irq_data *data, unsigned int type)
426{
427 return 0;
62579266
RV
428}
429
430static struct irq_chip ab8500_irq_chip = {
431 .name = "ab8500",
9505a0a0
MB
432 .irq_bus_lock = ab8500_irq_lock,
433 .irq_bus_sync_unlock = ab8500_irq_sync_unlock,
434 .irq_mask = ab8500_irq_mask,
e6f9306e 435 .irq_disable = ab8500_irq_mask,
9505a0a0 436 .irq_unmask = ab8500_irq_unmask,
40f6e5a2 437 .irq_set_type = ab8500_irq_set_type,
62579266
RV
438};
439
3e1a498f
LJ
440static void update_latch_offset(u8 *offset, int i)
441{
442 /* Fix inconsistent ITFromLatch25 bit mapping... */
443 if (unlikely(*offset == 17))
500e69a1 444 *offset = 24;
3e1a498f
LJ
445 /* Fix inconsistent ab8540 bit mapping... */
446 if (unlikely(*offset == 16))
500e69a1 447 *offset = 25;
7ccf40b1 448 if ((i == 3) && (*offset >= 24))
500e69a1 449 *offset += 2;
3e1a498f
LJ
450}
451
7ccfe9b1
MJ
452static int ab8500_handle_hierarchical_line(struct ab8500 *ab8500,
453 int latch_offset, u8 latch_val)
454{
7a93fb37 455 int int_bit, line, i;
7ccfe9b1 456
7a93fb37
FB
457 for (i = 0; i < ab8500->mask_size; i++)
458 if (ab8500->irq_reg_offset[i] == latch_offset)
459 break;
7ccfe9b1 460
7a93fb37
FB
461 if (i >= ab8500->mask_size) {
462 dev_err(ab8500->dev, "Register offset 0x%2x not declared\n",
463 latch_offset);
464 return -ENXIO;
465 }
7ccfe9b1 466
7a93fb37
FB
467 /* ignore masked out interrupts */
468 latch_val &= ~ab8500->mask[i];
7ccfe9b1 469
7a93fb37
FB
470 while (latch_val) {
471 int_bit = __ffs(latch_val);
7ccfe9b1
MJ
472 line = (i << 3) + int_bit;
473 latch_val &= ~(1 << int_bit);
474
e2ddf46a
LW
475 /*
476 * This handles the falling edge hwirqs from the GPIO
477 * lines. Route them back to the line registered for the
478 * rising IRQ, as this is merely a flag for the same IRQ
479 * in linux terms.
480 */
481 if (line >= AB8500_INT_GPIO6F && line <= AB8500_INT_GPIO41F)
482 line -= 16;
483 if (line >= AB9540_INT_GPIO50F && line <= AB9540_INT_GPIO54F)
484 line -= 8;
485 if (line == AB8540_INT_GPIO43F || line == AB8540_INT_GPIO44F)
486 line += 1;
487
9ff80e2d 488 handle_nested_irq(irq_find_mapping(ab8500->domain, line));
7a93fb37 489 }
7ccfe9b1
MJ
490
491 return 0;
492}
493
494static int ab8500_handle_hierarchical_latch(struct ab8500 *ab8500,
495 int hier_offset, u8 hier_val)
496{
497 int latch_bit, status;
498 u8 latch_offset, latch_val;
499
500 do {
501 latch_bit = __ffs(hier_val);
502 latch_offset = (hier_offset << 3) + latch_bit;
503
3e1a498f 504 update_latch_offset(&latch_offset, hier_offset);
7ccfe9b1
MJ
505
506 status = get_register_interruptible(ab8500,
507 AB8500_INTERRUPT,
508 AB8500_IT_LATCH1_REG + latch_offset,
509 &latch_val);
510 if (status < 0 || latch_val == 0)
511 goto discard;
512
513 status = ab8500_handle_hierarchical_line(ab8500,
514 latch_offset, latch_val);
515 if (status < 0)
516 return status;
517discard:
518 hier_val &= ~(1 << latch_bit);
519 } while (hier_val);
520
521 return 0;
522}
523
524static irqreturn_t ab8500_hierarchical_irq(int irq, void *dev)
525{
526 struct ab8500 *ab8500 = dev;
527 u8 i;
528
529 dev_vdbg(ab8500->dev, "interrupt\n");
530
531 /* Hierarchical interrupt version */
3e1a498f 532 for (i = 0; i < (ab8500->it_latchhier_num); i++) {
7ccfe9b1
MJ
533 int status;
534 u8 hier_val;
535
536 status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
537 AB8500_IT_LATCHHIER1_REG + i, &hier_val);
538 if (status < 0 || hier_val == 0)
539 continue;
540
541 status = ab8500_handle_hierarchical_latch(ab8500, i, hier_val);
542 if (status < 0)
543 break;
544 }
545 return IRQ_HANDLED;
546}
547
06e589ef
LJ
548static int ab8500_irq_map(struct irq_domain *d, unsigned int virq,
549 irq_hw_number_t hwirq)
550{
551 struct ab8500 *ab8500 = d->host_data;
552
553 if (!ab8500)
554 return -EINVAL;
555
556 irq_set_chip_data(virq, ab8500);
557 irq_set_chip_and_handler(virq, &ab8500_irq_chip,
558 handle_simple_irq);
559 irq_set_nested_thread(virq, 1);
06e589ef 560 irq_set_noprobe(virq);
62579266
RV
561
562 return 0;
563}
564
7ce7b26f 565static const struct irq_domain_ops ab8500_irq_ops = {
7ccf40b1
LJ
566 .map = ab8500_irq_map,
567 .xlate = irq_domain_xlate_twocell,
06e589ef
LJ
568};
569
570static int ab8500_irq_init(struct ab8500 *ab8500, struct device_node *np)
62579266 571{
2ced445e
LW
572 int num_irqs;
573
3e1a498f
LJ
574 if (is_ab8540(ab8500))
575 num_irqs = AB8540_NR_IRQS;
576 else if (is_ab9540(ab8500))
d6255529 577 num_irqs = AB9540_NR_IRQS;
a982362c
BJ
578 else if (is_ab8505(ab8500))
579 num_irqs = AB8505_NR_IRQS;
d6255529
LW
580 else
581 num_irqs = AB8500_NR_IRQS;
62579266 582
f1d11f39 583 /* If ->irq_base is zero this will give a linear mapping */
7602e05d 584 ab8500->domain = irq_domain_add_simple(ab8500->dev->of_node,
500e69a1
LJ
585 num_irqs, 0,
586 &ab8500_irq_ops, ab8500);
06e589ef
LJ
587
588 if (!ab8500->domain) {
589 dev_err(ab8500->dev, "Failed to create irqdomain\n");
500e69a1 590 return -ENODEV;
06e589ef
LJ
591 }
592
593 return 0;
62579266
RV
594}
595
112a80d2
JA
596int ab8500_suspend(struct ab8500 *ab8500)
597{
598 if (atomic_read(&ab8500->transfer_ongoing))
599 return -EINVAL;
f3556302
LJ
600
601 return 0;
112a80d2
JA
602}
603
5ac98553 604static const struct mfd_cell ab8500_bm_devs[] = {
417c0fc2
LW
605 MFD_CELL_OF("ab8500-charger", NULL, NULL, 0, 0,
606 "stericsson,ab8500-charger"),
607 MFD_CELL_OF("ab8500-btemp", NULL, NULL, 0, 0,
608 "stericsson,ab8500-btemp"),
609 MFD_CELL_OF("ab8500-fg", NULL, NULL, 0, 0,
610 "stericsson,ab8500-fg"),
611 MFD_CELL_OF("ab8500-chargalg", NULL, NULL, 0, 0,
612 "stericsson,ab8500-chargalg"),
4b106fb9
LJ
613};
614
5ac98553 615static const struct mfd_cell ab8500_devs[] = {
db783e76 616 MFD_CELL_OF("ab8500-sysctrl",
f4d41ad8 617 NULL, NULL, 0, 0, "stericsson,ab8500-sysctrl"),
db783e76 618 MFD_CELL_OF("ab8500-ext-regulator",
f4d41ad8 619 NULL, NULL, 0, 0, "stericsson,ab8500-ext-regulator"),
db783e76 620 MFD_CELL_OF("ab8500-regulator",
f4d41ad8 621 NULL, NULL, 0, 0, "stericsson,ab8500-regulator"),
db783e76 622 MFD_CELL_OF("ab8500-clk",
702204c2 623 NULL, NULL, 0, 0, "stericsson,ab8500-clk"),
db783e76 624 MFD_CELL_OF("ab8500-gpadc",
f4d41ad8 625 NULL, NULL, 0, 0, "stericsson,ab8500-gpadc"),
db783e76 626 MFD_CELL_OF("ab8500-rtc",
f4d41ad8 627 NULL, NULL, 0, 0, "stericsson,ab8500-rtc"),
db783e76 628 MFD_CELL_OF("ab8500-acc-det",
f4d41ad8 629 NULL, NULL, 0, 0, "stericsson,ab8500-acc-det"),
db783e76 630 MFD_CELL_OF("ab8500-poweron-key",
f4d41ad8 631 NULL, NULL, 0, 0, "stericsson,ab8500-poweron-key"),
db783e76 632 MFD_CELL_OF("ab8500-pwm",
f4d41ad8 633 NULL, NULL, 0, 1, "stericsson,ab8500-pwm"),
db783e76 634 MFD_CELL_OF("ab8500-pwm",
f4d41ad8 635 NULL, NULL, 0, 2, "stericsson,ab8500-pwm"),
db783e76 636 MFD_CELL_OF("ab8500-pwm",
f4d41ad8 637 NULL, NULL, 0, 3, "stericsson,ab8500-pwm"),
db783e76 638 MFD_CELL_OF("ab8500-denc",
f4d41ad8 639 NULL, NULL, 0, 0, "stericsson,ab8500-denc"),
db783e76 640 MFD_CELL_OF("pinctrl-ab8500",
f4d41ad8 641 NULL, NULL, 0, 0, "stericsson,ab8500-gpio"),
db783e76 642 MFD_CELL_OF("abx500-temp",
f4d41ad8 643 NULL, NULL, 0, 0, "stericsson,abx500-temp"),
db783e76 644 MFD_CELL_OF("ab8500-usb",
f4d41ad8 645 NULL, NULL, 0, 0, "stericsson,ab8500-usb"),
db783e76 646 MFD_CELL_OF("ab8500-codec",
f4d41ad8 647 NULL, NULL, 0, 0, "stericsson,ab8500-codec"),
6ef9418c
RA
648};
649
5ac98553 650static const struct mfd_cell ab9540_devs[] = {
d6255529 651 {
4b106fb9 652 .name = "ab8500-sysctrl",
d6255529 653 },
53f325be
LJ
654 {
655 .name = "ab8500-ext-regulator",
656 },
44f72e53 657 {
4b106fb9 658 .name = "ab8500-regulator",
44f72e53 659 },
9ee17676
UH
660 {
661 .name = "abx500-clk",
662 .of_compatible = "stericsson,abx500-clk",
663 },
c0eda9ae
LJ
664 {
665 .name = "ab8500-gpadc",
666 .of_compatible = "stericsson,ab8500-gpadc",
c0eda9ae 667 },
4b106fb9
LJ
668 {
669 .name = "ab8500-rtc",
4b106fb9
LJ
670 },
671 {
672 .name = "ab8500-acc-det",
4b106fb9
LJ
673 },
674 {
675 .name = "ab8500-poweron-key",
4b106fb9
LJ
676 },
677 {
678 .name = "ab8500-pwm",
679 .id = 1,
680 },
4b106fb9
LJ
681 {
682 .name = "abx500-temp",
4b106fb9 683 },
d6255529 684 {
e64d905e
LJ
685 .name = "pinctrl-ab9540",
686 .of_compatible = "stericsson,ab9540-gpio",
d6255529
LW
687 },
688 {
689 .name = "ab9540-usb",
d6255529 690 },
44f72e53
VS
691 {
692 .name = "ab9540-codec",
693 },
c0eda9ae
LJ
694 {
695 .name = "ab-iddet",
c0eda9ae 696 },
44f72e53
VS
697};
698
c0eda9ae 699/* Device list for ab8505 */
5ac98553 700static const struct mfd_cell ab8505_devs[] = {
4b106fb9
LJ
701 {
702 .name = "ab8500-sysctrl",
1c0769d2 703 .of_compatible = "stericsson,ab8500-sysctrl",
4b106fb9
LJ
704 },
705 {
706 .name = "ab8500-regulator",
1c0769d2 707 .of_compatible = "stericsson,ab8505-regulator",
4b106fb9 708 },
9ee17676
UH
709 {
710 .name = "abx500-clk",
1c0769d2 711 .of_compatible = "stericsson,ab8500-clk",
9ee17676 712 },
4b106fb9
LJ
713 {
714 .name = "ab8500-gpadc",
955de2ea 715 .of_compatible = "stericsson,ab8500-gpadc",
4b106fb9
LJ
716 },
717 {
718 .name = "ab8500-rtc",
1c0769d2 719 .of_compatible = "stericsson,ab8500-rtc",
4b106fb9
LJ
720 },
721 {
722 .name = "ab8500-acc-det",
1c0769d2 723 .of_compatible = "stericsson,ab8500-acc-det",
4b106fb9
LJ
724 },
725 {
726 .name = "ab8500-poweron-key",
1c0769d2 727 .of_compatible = "stericsson,ab8500-poweron-key",
4b106fb9
LJ
728 },
729 {
730 .name = "ab8500-pwm",
1c0769d2 731 .of_compatible = "stericsson,ab8500-pwm",
4b106fb9
LJ
732 .id = 1,
733 },
4b106fb9 734 {
eb696c31 735 .name = "pinctrl-ab8505",
1c0769d2 736 .of_compatible = "stericsson,ab8505-gpio",
4b106fb9
LJ
737 },
738 {
739 .name = "ab8500-usb",
1c0769d2 740 .of_compatible = "stericsson,ab8500-usb",
4b106fb9
LJ
741 },
742 {
743 .name = "ab8500-codec",
1c0769d2 744 .of_compatible = "stericsson,ab8500-codec",
4b106fb9 745 },
c0eda9ae
LJ
746 {
747 .name = "ab-iddet",
c0eda9ae
LJ
748 },
749};
750
5ac98553 751static const struct mfd_cell ab8540_devs[] = {
4b106fb9
LJ
752 {
753 .name = "ab8500-sysctrl",
754 },
53f325be
LJ
755 {
756 .name = "ab8500-ext-regulator",
757 },
4b106fb9
LJ
758 {
759 .name = "ab8500-regulator",
760 },
9ee17676
UH
761 {
762 .name = "abx500-clk",
763 .of_compatible = "stericsson,abx500-clk",
764 },
4b106fb9
LJ
765 {
766 .name = "ab8500-gpadc",
955de2ea 767 .of_compatible = "stericsson,ab8500-gpadc",
4b106fb9 768 },
4b106fb9
LJ
769 {
770 .name = "ab8500-acc-det",
4b106fb9
LJ
771 },
772 {
773 .name = "ab8500-poweron-key",
4b106fb9
LJ
774 },
775 {
776 .name = "ab8500-pwm",
777 .id = 1,
778 },
4b106fb9
LJ
779 {
780 .name = "abx500-temp",
4b106fb9 781 },
c0eda9ae 782 {
eb696c31 783 .name = "pinctrl-ab8540",
c0eda9ae
LJ
784 },
785 {
786 .name = "ab8540-usb",
c0eda9ae
LJ
787 },
788 {
789 .name = "ab8540-codec",
790 },
44f72e53
VS
791 {
792 .name = "ab-iddet",
44f72e53 793 },
d6255529
LW
794};
795
5ac98553 796static const struct mfd_cell ab8540_cut1_devs[] = {
9c717cf3
AT
797 {
798 .name = "ab8500-rtc",
799 .of_compatible = "stericsson,ab8500-rtc",
9c717cf3
AT
800 },
801};
802
5ac98553 803static const struct mfd_cell ab8540_cut2_devs[] = {
9c717cf3
AT
804 {
805 .name = "ab8540-rtc",
806 .of_compatible = "stericsson,ab8540-rtc",
9c717cf3
AT
807 },
808};
809
afb349c0
ZL
810static ssize_t chip_id_show(struct device *dev,
811 struct device_attribute *attr, char *buf)
cca69b67
MW
812{
813 struct ab8500 *ab8500;
814
815 ab8500 = dev_get_drvdata(dev);
e436ddff 816
cca69b67
MW
817 return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL);
818}
819
e5c238c3
MW
820/*
821 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
822 * 0x01 Swoff bit programming
823 * 0x02 Thermal protection activation
824 * 0x04 Vbat lower then BattOk falling threshold
825 * 0x08 Watchdog expired
826 * 0x10 Non presence of 32kHz clock
827 * 0x20 Battery level lower than power on reset threshold
828 * 0x40 Power on key 1 pressed longer than 10 seconds
829 * 0x80 DB8500 thermal shutdown
830 */
afb349c0
ZL
831static ssize_t switch_off_status_show(struct device *dev,
832 struct device_attribute *attr, char *buf)
e5c238c3
MW
833{
834 int ret;
835 u8 value;
836 struct ab8500 *ab8500;
837
838 ab8500 = dev_get_drvdata(dev);
839 ret = get_register_interruptible(ab8500, AB8500_RTC,
840 AB8500_SWITCH_OFF_STATUS, &value);
841 if (ret < 0)
842 return ret;
843 return sprintf(buf, "%#x\n", value);
844}
845
f04a9d8a
RK
846/* use mask and set to override the register turn_on_stat value */
847void ab8500_override_turn_on_stat(u8 mask, u8 set)
848{
849 spin_lock(&on_stat_lock);
850 turn_on_stat_mask = mask;
851 turn_on_stat_set = set;
852 spin_unlock(&on_stat_lock);
853}
854
b4a31037
AL
855/*
856 * ab8500 has turned on due to (TURN_ON_STATUS):
857 * 0x01 PORnVbat
858 * 0x02 PonKey1dbF
859 * 0x04 PonKey2dbF
860 * 0x08 RTCAlarm
861 * 0x10 MainChDet
862 * 0x20 VbusDet
863 * 0x40 UsbIDDetect
864 * 0x80 Reserved
865 */
afb349c0
ZL
866static ssize_t turn_on_status_show(struct device *dev,
867 struct device_attribute *attr, char *buf)
b4a31037
AL
868{
869 int ret;
870 u8 value;
871 struct ab8500 *ab8500;
872
873 ab8500 = dev_get_drvdata(dev);
874 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
875 AB8500_TURN_ON_STATUS, &value);
876 if (ret < 0)
877 return ret;
f04a9d8a
RK
878
879 /*
880 * In L9540, turn_on_status register is not updated correctly if
881 * the device is rebooted with AC/USB charger connected. Due to
882 * this, the device boots android instead of entering into charge
883 * only mode. Read the AC/USB status register to detect the charger
884 * presence and update the turn on status manually.
885 */
886 if (is_ab9540(ab8500)) {
887 spin_lock(&on_stat_lock);
888 value = (value & turn_on_stat_mask) | turn_on_stat_set;
889 spin_unlock(&on_stat_lock);
890 }
891
b4a31037
AL
892 return sprintf(buf, "%#x\n", value);
893}
894
afb349c0
ZL
895static ssize_t turn_on_status_2_show(struct device *dev,
896 struct device_attribute *attr, char *buf)
93ff722e
LJ
897{
898 int ret;
899 u8 value;
900 struct ab8500 *ab8500;
901
902 ab8500 = dev_get_drvdata(dev);
903 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
904 AB8505_TURN_ON_STATUS_2, &value);
905 if (ret < 0)
906 return ret;
907 return sprintf(buf, "%#x\n", (value & 0x1));
908}
909
afb349c0
ZL
910static ssize_t dbbrstn_show(struct device *dev,
911 struct device_attribute *attr, char *buf)
d6255529
LW
912{
913 struct ab8500 *ab8500;
914 int ret;
915 u8 value;
916
917 ab8500 = dev_get_drvdata(dev);
918
919 ret = get_register_interruptible(ab8500, AB8500_REGU_CTRL2,
920 AB9540_MODEM_CTRL2_REG, &value);
921 if (ret < 0)
922 return ret;
923
924 return sprintf(buf, "%d\n",
925 (value & AB9540_MODEM_CTRL2_SWDBBRSTN_BIT) ? 1 : 0);
926}
927
afb349c0 928static ssize_t dbbrstn_store(struct device *dev,
d6255529
LW
929 struct device_attribute *attr, const char *buf, size_t count)
930{
931 struct ab8500 *ab8500;
932 int ret = count;
933 int err;
934 u8 bitvalues;
935
936 ab8500 = dev_get_drvdata(dev);
937
938 if (count > 0) {
939 switch (buf[0]) {
940 case '0':
941 bitvalues = 0;
942 break;
943 case '1':
944 bitvalues = AB9540_MODEM_CTRL2_SWDBBRSTN_BIT;
945 break;
946 default:
947 goto exit;
948 }
949
950 err = mask_and_set_register_interruptible(ab8500,
951 AB8500_REGU_CTRL2, AB9540_MODEM_CTRL2_REG,
952 AB9540_MODEM_CTRL2_SWDBBRSTN_BIT, bitvalues);
953 if (err)
954 dev_info(ab8500->dev,
955 "Failed to set DBBRSTN %c, err %#x\n",
956 buf[0], err);
957 }
958
959exit:
960 return ret;
961}
962
afb349c0
ZL
963static DEVICE_ATTR_RO(chip_id);
964static DEVICE_ATTR_RO(switch_off_status);
965static DEVICE_ATTR_RO(turn_on_status);
966static DEVICE_ATTR_RO(turn_on_status_2);
967static DEVICE_ATTR_RW(dbbrstn);
cca69b67
MW
968
969static struct attribute *ab8500_sysfs_entries[] = {
970 &dev_attr_chip_id.attr,
e5c238c3 971 &dev_attr_switch_off_status.attr,
b4a31037 972 &dev_attr_turn_on_status.attr,
cca69b67
MW
973 NULL,
974};
975
93ff722e
LJ
976static struct attribute *ab8505_sysfs_entries[] = {
977 &dev_attr_turn_on_status_2.attr,
978 NULL,
979};
980
d6255529
LW
981static struct attribute *ab9540_sysfs_entries[] = {
982 &dev_attr_chip_id.attr,
983 &dev_attr_switch_off_status.attr,
984 &dev_attr_turn_on_status.attr,
985 &dev_attr_dbbrstn.attr,
986 NULL,
987};
988
52557dc6 989static const struct attribute_group ab8500_attr_group = {
cca69b67
MW
990 .attrs = ab8500_sysfs_entries,
991};
992
52557dc6 993static const struct attribute_group ab8505_attr_group = {
93ff722e
LJ
994 .attrs = ab8505_sysfs_entries,
995};
996
52557dc6 997static const struct attribute_group ab9540_attr_group = {
d6255529
LW
998 .attrs = ab9540_sysfs_entries,
999};
1000
f791be49 1001static int ab8500_probe(struct platform_device *pdev)
62579266 1002{
500e69a1 1003 static const char * const switch_off_status[] = {
b04c530c
JA
1004 "Swoff bit programming",
1005 "Thermal protection activation",
1006 "Vbat lower then BattOk falling threshold",
1007 "Watchdog expired",
1008 "Non presence of 32kHz clock",
1009 "Battery level lower than power on reset threshold",
1010 "Power on key 1 pressed longer than 10 seconds",
1011 "DB8500 thermal shutdown"};
500e69a1 1012 static const char * const turn_on_status[] = {
abee26cd
MW
1013 "Battery rising (Vbat)",
1014 "Power On Key 1 dbF",
1015 "Power On Key 2 dbF",
1016 "RTC Alarm",
1017 "Main Charger Detect",
1018 "Vbus Detect (USB)",
1019 "USB ID Detect",
1020 "UART Factory Mode Detect"};
d28f1db8 1021 const struct platform_device_id *platid = platform_get_device_id(pdev);
6bc4a568
LJ
1022 enum ab8500_version version = AB8500_VERSION_UNDEFINED;
1023 struct device_node *np = pdev->dev.of_node;
d28f1db8 1024 struct ab8500 *ab8500;
62579266
RV
1025 int ret;
1026 int i;
fc832ac9 1027 int irq;
47c16975 1028 u8 value;
62579266 1029
7ccf40b1 1030 ab8500 = devm_kzalloc(&pdev->dev, sizeof(*ab8500), GFP_KERNEL);
d28f1db8
LJ
1031 if (!ab8500)
1032 return -ENOMEM;
1033
d28f1db8
LJ
1034 ab8500->dev = &pdev->dev;
1035
fc832ac9
MCCZ
1036 irq = platform_get_irq(pdev, 0);
1037 if (irq < 0)
1038 return irq;
d28f1db8 1039
fc832ac9 1040 ab8500->irq = irq;
d28f1db8 1041
822672a7
LJ
1042 ab8500->read = ab8500_prcmu_read;
1043 ab8500->write = ab8500_prcmu_write;
1044 ab8500->write_masked = ab8500_prcmu_write_masked;
d28f1db8 1045
62579266
RV
1046 mutex_init(&ab8500->lock);
1047 mutex_init(&ab8500->irq_lock);
112a80d2 1048 atomic_set(&ab8500->transfer_ongoing, 0);
62579266 1049
d28f1db8
LJ
1050 platform_set_drvdata(pdev, ab8500);
1051
6bc4a568
LJ
1052 if (platid)
1053 version = platid->driver_data;
6bc4a568 1054
0f620837
LW
1055 if (version != AB8500_VERSION_UNDEFINED)
1056 ab8500->version = version;
1057 else {
1058 ret = get_register_interruptible(ab8500, AB8500_MISC,
1059 AB8500_IC_NAME_REG, &value);
f864c46a
LW
1060 if (ret < 0) {
1061 dev_err(&pdev->dev, "could not probe HW\n");
8c4203cb 1062 return ret;
f864c46a 1063 }
0f620837
LW
1064
1065 ab8500->version = value;
1066 }
1067
47c16975
MW
1068 ret = get_register_interruptible(ab8500, AB8500_MISC,
1069 AB8500_REV_REG, &value);
62579266 1070 if (ret < 0)
8c4203cb 1071 return ret;
62579266 1072
47c16975 1073 ab8500->chip_id = value;
62579266 1074
0f620837
LW
1075 dev_info(ab8500->dev, "detected chip, %s rev. %1x.%1x\n",
1076 ab8500_version_str[ab8500->version],
1077 ab8500->chip_id >> 4,
1078 ab8500->chip_id & 0x0F);
1079
3e1a498f
LJ
1080 /* Configure AB8540 */
1081 if (is_ab8540(ab8500)) {
1082 ab8500->mask_size = AB8540_NUM_IRQ_REGS;
1083 ab8500->irq_reg_offset = ab8540_irq_regoffset;
1084 ab8500->it_latchhier_num = AB8540_IT_LATCHHIER_NUM;
7ccf40b1 1085 } /* Configure AB8500 or AB9540 IRQ */
3e1a498f 1086 else if (is_ab9540(ab8500) || is_ab8505(ab8500)) {
d6255529
LW
1087 ab8500->mask_size = AB9540_NUM_IRQ_REGS;
1088 ab8500->irq_reg_offset = ab9540_irq_regoffset;
3e1a498f 1089 ab8500->it_latchhier_num = AB8500_IT_LATCHHIER_NUM;
d6255529
LW
1090 } else {
1091 ab8500->mask_size = AB8500_NUM_IRQ_REGS;
1092 ab8500->irq_reg_offset = ab8500_irq_regoffset;
3e1a498f 1093 ab8500->it_latchhier_num = AB8500_IT_LATCHHIER_NUM;
d6255529 1094 }
7ccf40b1
LJ
1095 ab8500->mask = devm_kzalloc(&pdev->dev, ab8500->mask_size,
1096 GFP_KERNEL);
2ced445e
LW
1097 if (!ab8500->mask)
1098 return -ENOMEM;
7ccf40b1
LJ
1099 ab8500->oldmask = devm_kzalloc(&pdev->dev, ab8500->mask_size,
1100 GFP_KERNEL);
8c4203cb
LJ
1101 if (!ab8500->oldmask)
1102 return -ENOMEM;
1103
e5c238c3
MW
1104 /*
1105 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
1106 * 0x01 Swoff bit programming
1107 * 0x02 Thermal protection activation
1108 * 0x04 Vbat lower then BattOk falling threshold
1109 * 0x08 Watchdog expired
1110 * 0x10 Non presence of 32kHz clock
1111 * 0x20 Battery level lower than power on reset threshold
1112 * 0x40 Power on key 1 pressed longer than 10 seconds
1113 * 0x80 DB8500 thermal shutdown
1114 */
1115
1116 ret = get_register_interruptible(ab8500, AB8500_RTC,
1117 AB8500_SWITCH_OFF_STATUS, &value);
1118 if (ret < 0)
1119 return ret;
b04c530c
JA
1120 dev_info(ab8500->dev, "switch off cause(s) (%#x): ", value);
1121
1122 if (value) {
1123 for (i = 0; i < ARRAY_SIZE(switch_off_status); i++) {
1124 if (value & 1)
7ccf40b1 1125 pr_cont(" \"%s\"", switch_off_status[i]);
b04c530c
JA
1126 value = value >> 1;
1127
1128 }
7ccf40b1 1129 pr_cont("\n");
b04c530c 1130 } else {
7ccf40b1 1131 pr_cont(" None\n");
b04c530c 1132 }
abee26cd
MW
1133 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
1134 AB8500_TURN_ON_STATUS, &value);
1135 if (ret < 0)
1136 return ret;
1137 dev_info(ab8500->dev, "turn on reason(s) (%#x): ", value);
1138
1139 if (value) {
1140 for (i = 0; i < ARRAY_SIZE(turn_on_status); i++) {
1141 if (value & 1)
7ccf40b1 1142 pr_cont("\"%s\" ", turn_on_status[i]);
abee26cd
MW
1143 value = value >> 1;
1144 }
7ccf40b1 1145 pr_cont("\n");
abee26cd 1146 } else {
7ccf40b1 1147 pr_cont("None\n");
abee26cd 1148 }
e5c238c3 1149
f04a9d8a
RK
1150 if (is_ab9540(ab8500)) {
1151 ret = get_register_interruptible(ab8500, AB8500_CHARGER,
1152 AB8500_CH_USBCH_STAT1_REG, &value);
1153 if (ret < 0)
1154 return ret;
1155 if ((value & VBUS_DET_DBNC1) && (value & VBUS_DET_DBNC100))
1156 ab8500_override_turn_on_stat(~AB8500_POW_KEY_1_ON,
1157 AB8500_VBUS_DET);
1158 }
62579266
RV
1159
1160 /* Clear and mask all interrupts */
2ced445e 1161 for (i = 0; i < ab8500->mask_size; i++) {
0f620837
LW
1162 /*
1163 * Interrupt register 12 doesn't exist prior to AB8500 version
1164 * 2.0
1165 */
1166 if (ab8500->irq_reg_offset[i] == 11 &&
1167 is_ab8500_1p1_or_earlier(ab8500))
92d50a41 1168 continue;
62579266 1169
3e1a498f
LJ
1170 if (ab8500->irq_reg_offset[i] < 0)
1171 continue;
1172
47c16975 1173 get_register_interruptible(ab8500, AB8500_INTERRUPT,
2ced445e 1174 AB8500_IT_LATCH1_REG + ab8500->irq_reg_offset[i],
92d50a41 1175 &value);
47c16975 1176 set_register_interruptible(ab8500, AB8500_INTERRUPT,
2ced445e 1177 AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i], 0xff);
62579266
RV
1178 }
1179
47c16975
MW
1180 ret = abx500_register_ops(ab8500->dev, &ab8500_ops);
1181 if (ret)
8c4203cb 1182 return ret;
47c16975 1183
2ced445e 1184 for (i = 0; i < ab8500->mask_size; i++)
62579266
RV
1185 ab8500->mask[i] = ab8500->oldmask[i] = 0xff;
1186
06e589ef
LJ
1187 ret = ab8500_irq_init(ab8500, np);
1188 if (ret)
8c4203cb 1189 return ret;
62579266 1190
f348fefd
DS
1191 ret = devm_request_threaded_irq(&pdev->dev, ab8500->irq, NULL,
1192 ab8500_hierarchical_irq,
1193 IRQF_ONESHOT | IRQF_NO_SUSPEND,
1194 "ab8500", ab8500);
1195 if (ret)
1196 return ret;
62579266 1197
bad76991
LJ
1198 if (is_ab9540(ab8500))
1199 ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs,
1200 ARRAY_SIZE(ab9540_devs), NULL,
f864c46a 1201 0, ab8500->domain);
9c717cf3 1202 else if (is_ab8540(ab8500)) {
c0eda9ae
LJ
1203 ret = mfd_add_devices(ab8500->dev, 0, ab8540_devs,
1204 ARRAY_SIZE(ab8540_devs), NULL,
f864c46a 1205 0, ab8500->domain);
9c717cf3
AT
1206 if (ret)
1207 return ret;
1208
1209 if (is_ab8540_1p2_or_earlier(ab8500))
1210 ret = mfd_add_devices(ab8500->dev, 0, ab8540_cut1_devs,
1211 ARRAY_SIZE(ab8540_cut1_devs), NULL,
f864c46a 1212 0, ab8500->domain);
9c717cf3
AT
1213 else /* ab8540 >= cut2 */
1214 ret = mfd_add_devices(ab8500->dev, 0, ab8540_cut2_devs,
1215 ARRAY_SIZE(ab8540_cut2_devs), NULL,
f864c46a 1216 0, ab8500->domain);
9c717cf3 1217 } else if (is_ab8505(ab8500))
c0eda9ae
LJ
1218 ret = mfd_add_devices(ab8500->dev, 0, ab8505_devs,
1219 ARRAY_SIZE(ab8505_devs), NULL,
f864c46a 1220 0, ab8500->domain);
bad76991
LJ
1221 else
1222 ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs,
1223 ARRAY_SIZE(ab8500_devs), NULL,
f864c46a 1224 0, ab8500->domain);
bad76991 1225 if (ret)
8c4203cb 1226 return ret;
44f72e53 1227
a98688d2
LW
1228 /* Add battery management devices */
1229 ret = mfd_add_devices(ab8500->dev, 0, ab8500_bm_devs,
1230 ARRAY_SIZE(ab8500_bm_devs), NULL,
1231 0, ab8500->domain);
1232 if (ret)
1233 dev_err(ab8500->dev, "error adding bm devices\n");
6ef9418c 1234
e436ddff
LJ
1235 if (((is_ab8505(ab8500) || is_ab9540(ab8500)) &&
1236 ab8500->chip_id >= AB8500_CUT2P0) || is_ab8540(ab8500))
d6255529
LW
1237 ret = sysfs_create_group(&ab8500->dev->kobj,
1238 &ab9540_attr_group);
1239 else
1240 ret = sysfs_create_group(&ab8500->dev->kobj,
1241 &ab8500_attr_group);
93ff722e
LJ
1242
1243 if ((is_ab8505(ab8500) || is_ab9540(ab8500)) &&
1244 ab8500->chip_id >= AB8500_CUT2P0)
1245 ret = sysfs_create_group(&ab8500->dev->kobj,
1246 &ab8505_attr_group);
1247
cca69b67
MW
1248 if (ret)
1249 dev_err(ab8500->dev, "error creating sysfs entries\n");
06e589ef
LJ
1250
1251 return ret;
62579266
RV
1252}
1253
d28f1db8
LJ
1254static const struct platform_device_id ab8500_id[] = {
1255 { "ab8500-core", AB8500_VERSION_AB8500 },
1c0769d2 1256 { "ab8505-core", AB8500_VERSION_AB8505 },
d28f1db8
LJ
1257 { "ab9540-i2c", AB8500_VERSION_AB9540 },
1258 { "ab8540-i2c", AB8500_VERSION_AB8540 },
1259 { }
1260};
1261
1262static struct platform_driver ab8500_core_driver = {
1263 .driver = {
1264 .name = "ab8500-core",
31cbae22 1265 .suppress_bind_attrs = true,
d28f1db8
LJ
1266 },
1267 .probe = ab8500_probe,
d28f1db8
LJ
1268 .id_table = ab8500_id,
1269};
1270
1271static int __init ab8500_core_init(void)
1272{
1273 return platform_driver_register(&ab8500_core_driver);
1274}
ba7cbc3e 1275core_initcall(ab8500_core_init);