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Merge tag 'hwspinlock-3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/ohad...
[linux-2.6-block.git] / drivers / mfd / ab8500-core.c
CommitLineData
62579266
RV		 1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License v2
5 * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
6 * Author: Rabin Vincent <rabin.vincent@stericsson.com>
adceed62 7 * Author: Mattias Wallin <mattias.wallin@stericsson.com>
62579266
RV		 8 */
9
10#include <linux/kernel.h>
11#include <linux/slab.h>
12#include <linux/init.h>
13#include <linux/irq.h>
06e589ef 14#include <linux/irqdomain.h>
62579266
RV		 15#include <linux/delay.h>
16#include <linux/interrupt.h>
17#include <linux/module.h>
18#include <linux/platform_device.h>
19#include <linux/mfd/core.h>
47c16975 20#include <linux/mfd/abx500.h>
ee66e653 21#include <linux/mfd/abx500/ab8500.h>
00441b5e 22#include <linux/mfd/abx500/ab8500-bm.h>
d28f1db8 23#include <linux/mfd/dbx500-prcmu.h>
549931f9 24#include <linux/regulator/ab8500.h>
6bc4a568
LJ		 25#include <linux/of.h>
26#include <linux/of_device.h>
62579266
RV		 27
28/*
29 * Interrupt register offsets
30 * Bank : 0x0E
31 */
47c16975
MW		 32#define AB8500_IT_SOURCE1_REG 0x00
33#define AB8500_IT_SOURCE2_REG 0x01
34#define AB8500_IT_SOURCE3_REG 0x02
35#define AB8500_IT_SOURCE4_REG 0x03
36#define AB8500_IT_SOURCE5_REG 0x04
37#define AB8500_IT_SOURCE6_REG 0x05
38#define AB8500_IT_SOURCE7_REG 0x06
39#define AB8500_IT_SOURCE8_REG 0x07
d6255529 40#define AB9540_IT_SOURCE13_REG 0x0C
47c16975
MW		 41#define AB8500_IT_SOURCE19_REG 0x12
42#define AB8500_IT_SOURCE20_REG 0x13
43#define AB8500_IT_SOURCE21_REG 0x14
44#define AB8500_IT_SOURCE22_REG 0x15
45#define AB8500_IT_SOURCE23_REG 0x16
46#define AB8500_IT_SOURCE24_REG 0x17
62579266
RV		 47
48/*
49 * latch registers
50 */
47c16975
MW		 51#define AB8500_IT_LATCH1_REG 0x20
52#define AB8500_IT_LATCH2_REG 0x21
53#define AB8500_IT_LATCH3_REG 0x22
54#define AB8500_IT_LATCH4_REG 0x23
55#define AB8500_IT_LATCH5_REG 0x24
56#define AB8500_IT_LATCH6_REG 0x25
57#define AB8500_IT_LATCH7_REG 0x26
58#define AB8500_IT_LATCH8_REG 0x27
59#define AB8500_IT_LATCH9_REG 0x28
60#define AB8500_IT_LATCH10_REG 0x29
92d50a41 61#define AB8500_IT_LATCH12_REG 0x2B
d6255529 62#define AB9540_IT_LATCH13_REG 0x2C
47c16975
MW		 63#define AB8500_IT_LATCH19_REG 0x32
64#define AB8500_IT_LATCH20_REG 0x33
65#define AB8500_IT_LATCH21_REG 0x34
66#define AB8500_IT_LATCH22_REG 0x35
67#define AB8500_IT_LATCH23_REG 0x36
68#define AB8500_IT_LATCH24_REG 0x37
62579266
RV		 69
70/*
71 * mask registers
72 */
73
47c16975
MW		 74#define AB8500_IT_MASK1_REG 0x40
75#define AB8500_IT_MASK2_REG 0x41
76#define AB8500_IT_MASK3_REG 0x42
77#define AB8500_IT_MASK4_REG 0x43
78#define AB8500_IT_MASK5_REG 0x44
79#define AB8500_IT_MASK6_REG 0x45
80#define AB8500_IT_MASK7_REG 0x46
81#define AB8500_IT_MASK8_REG 0x47
82#define AB8500_IT_MASK9_REG 0x48
83#define AB8500_IT_MASK10_REG 0x49
84#define AB8500_IT_MASK11_REG 0x4A
85#define AB8500_IT_MASK12_REG 0x4B
86#define AB8500_IT_MASK13_REG 0x4C
87#define AB8500_IT_MASK14_REG 0x4D
88#define AB8500_IT_MASK15_REG 0x4E
89#define AB8500_IT_MASK16_REG 0x4F
90#define AB8500_IT_MASK17_REG 0x50
91#define AB8500_IT_MASK18_REG 0x51
92#define AB8500_IT_MASK19_REG 0x52
93#define AB8500_IT_MASK20_REG 0x53
94#define AB8500_IT_MASK21_REG 0x54
95#define AB8500_IT_MASK22_REG 0x55
96#define AB8500_IT_MASK23_REG 0x56
97#define AB8500_IT_MASK24_REG 0x57
a29264b6 98#define AB8500_IT_MASK25_REG 0x58
47c16975 99
7ccfe9b1
MJ		 100/*
101 * latch hierarchy registers
102 */
103#define AB8500_IT_LATCHHIER1_REG 0x60
104#define AB8500_IT_LATCHHIER2_REG 0x61
105#define AB8500_IT_LATCHHIER3_REG 0x62
3e1a498f 106#define AB8540_IT_LATCHHIER4_REG 0x63
7ccfe9b1
MJ		 107
108#define AB8500_IT_LATCHHIER_NUM 3
3e1a498f 109#define AB8540_IT_LATCHHIER_NUM 4
7ccfe9b1 110
47c16975 111#define AB8500_REV_REG 0x80
0f620837 112#define AB8500_IC_NAME_REG 0x82
e5c238c3 113#define AB8500_SWITCH_OFF_STATUS 0x00
62579266 114
b4a31037 115#define AB8500_TURN_ON_STATUS 0x00
93ff722e 116#define AB8505_TURN_ON_STATUS_2 0x04
b4a31037 117
f04a9d8a
RK		 118#define AB8500_CH_USBCH_STAT1_REG 0x02
119#define VBUS_DET_DBNC100 0x02
120#define VBUS_DET_DBNC1 0x01
121
122static DEFINE_SPINLOCK(on_stat_lock);
123static u8 turn_on_stat_mask = 0xFF;
124static u8 turn_on_stat_set;
6ef9418c
RA		 125static bool no_bm; /* No battery management */
126module_param(no_bm, bool, S_IRUGO);
127
d6255529
LW		 128#define AB9540_MODEM_CTRL2_REG 0x23
129#define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT BIT(2)
130
62579266
RV		 131/*
132 * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt
2ced445e
LW		 133 * numbers are indexed into this array with (num / 8). The interupts are
134 * defined in linux/mfd/ab8500.h
62579266
RV		 135 *
136 * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at
137 * offset 0.
138 */
2ced445e 139/* AB8500 support */
62579266 140static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = {
92d50a41 141 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21,
62579266
RV		 142};
143
a29264b6 144/* AB9540 / AB8505 support */
d6255529 145static const int ab9540_irq_regoffset[AB9540_NUM_IRQ_REGS] = {
a29264b6 146 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22, 23
d6255529
LW		 147};
148
3e1a498f
LJ		 149/* AB8540 support */
150static const int ab8540_irq_regoffset[AB8540_NUM_IRQ_REGS] = {
151 0, 1, 2, 3, 4, -1, -1, -1, -1, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22, 23,
152 25, 26, 27, 28, 29, 30, 31,
153};
154
0f620837
LW		 155static const char ab8500_version_str[][7] = {
156 [AB8500_VERSION_AB8500] = "AB8500",
157 [AB8500_VERSION_AB8505] = "AB8505",
158 [AB8500_VERSION_AB9540] = "AB9540",
159 [AB8500_VERSION_AB8540] = "AB8540",
160};
161
822672a7 162static int ab8500_prcmu_write(struct ab8500 *ab8500, u16 addr, u8 data)
d28f1db8
LJ		 163{
164 int ret;
165
166 ret = prcmu_abb_write((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1);
167 if (ret < 0)
168 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
169 return ret;
170}
171
822672a7 172static int ab8500_prcmu_write_masked(struct ab8500 *ab8500, u16 addr, u8 mask,
d28f1db8
LJ		 173 u8 data)
174{
175 int ret;
176
177 ret = prcmu_abb_write_masked((u8)(addr >> 8), (u8)(addr & 0xFF), &data,
178 &mask, 1);
179 if (ret < 0)
180 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
181 return ret;
182}
183
822672a7 184static int ab8500_prcmu_read(struct ab8500 *ab8500, u16 addr)
d28f1db8
LJ		 185{
186 int ret;
187 u8 data;
188
189 ret = prcmu_abb_read((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1);
190 if (ret < 0) {
191 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
192 return ret;
193 }
194 return (int)data;
195}
196
47c16975
MW		 197static int ab8500_get_chip_id(struct device *dev)
198{
6bce7bf1
MW		 199 struct ab8500 *ab8500;
200
201 if (!dev)
202 return -EINVAL;
203 ab8500 = dev_get_drvdata(dev->parent);
204 return ab8500 ? (int)ab8500->chip_id : -EINVAL;
47c16975
MW		 205}
206
207static int set_register_interruptible(struct ab8500 *ab8500, u8 bank,
208 u8 reg, u8 data)
62579266
RV		 209{
210 int ret;
47c16975
MW		 211 /*
212 * Put the u8 bank and u8 register together into a an u16.
213 * The bank on higher 8 bits and register in lower 8 bits.
214 * */
215 u16 addr = ((u16)bank) << 8 | reg;
62579266
RV		 216
217 dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data);
218
392cbd1e 219 mutex_lock(&ab8500->lock);
47c16975 220
62579266
RV		 221 ret = ab8500->write(ab8500, addr, data);
222 if (ret < 0)
223 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
224 addr, ret);
47c16975 225 mutex_unlock(&ab8500->lock);
62579266
RV		 226
227 return ret;
228}
229
47c16975
MW		 230static int ab8500_set_register(struct device *dev, u8 bank,
231 u8 reg, u8 value)
62579266 232{
112a80d2 233 int ret;
47c16975 234 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
62579266 235
112a80d2
JA		 236 atomic_inc(&ab8500->transfer_ongoing);
237 ret = set_register_interruptible(ab8500, bank, reg, value);
238 atomic_dec(&ab8500->transfer_ongoing);
239 return ret;
62579266 240}
62579266 241
47c16975
MW		 242static int get_register_interruptible(struct ab8500 *ab8500, u8 bank,
243 u8 reg, u8 *value)
62579266
RV		 244{
245 int ret;
47c16975
MW		 246 /* put the u8 bank and u8 reg together into a an u16.
247 * bank on higher 8 bits and reg in lower */
248 u16 addr = ((u16)bank) << 8 | reg;
249
392cbd1e 250 mutex_lock(&ab8500->lock);
62579266
RV		 251
252 ret = ab8500->read(ab8500, addr);
253 if (ret < 0)
254 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
255 addr, ret);
47c16975
MW		 256 else
257 *value = ret;
62579266 258
47c16975 259 mutex_unlock(&ab8500->lock);
62579266
RV		 260 dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret);
261
262 return ret;
263}
264
47c16975
MW		 265static int ab8500_get_register(struct device *dev, u8 bank,
266 u8 reg, u8 *value)
62579266 267{
112a80d2 268 int ret;
47c16975 269 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
62579266 270
112a80d2
JA		 271 atomic_inc(&ab8500->transfer_ongoing);
272 ret = get_register_interruptible(ab8500, bank, reg, value);
273 atomic_dec(&ab8500->transfer_ongoing);
274 return ret;
62579266 275}
47c16975
MW		 276
277static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank,
278 u8 reg, u8 bitmask, u8 bitvalues)
62579266
RV		 279{
280 int ret;
47c16975
MW		 281 /* put the u8 bank and u8 reg together into a an u16.
282 * bank on higher 8 bits and reg in lower */
283 u16 addr = ((u16)bank) << 8 | reg;
62579266 284
392cbd1e 285 mutex_lock(&ab8500->lock);
62579266 286
bc628fd1
MN		 287 if (ab8500->write_masked == NULL) {
288 u8 data;
62579266 289
bc628fd1
MN		 290 ret = ab8500->read(ab8500, addr);
291 if (ret < 0) {
292 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
293 addr, ret);
294 goto out;
295 }
62579266 296
bc628fd1
MN		 297 data = (u8)ret;
298 data = (~bitmask & data) | (bitmask & bitvalues);
299
300 ret = ab8500->write(ab8500, addr, data);
301 if (ret < 0)
302 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
303 addr, ret);
62579266 304
bc628fd1
MN		 305 dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr,
306 data);
307 goto out;
308 }
309 ret = ab8500->write_masked(ab8500, addr, bitmask, bitvalues);
310 if (ret < 0)
311 dev_err(ab8500->dev, "failed to modify reg %#x: %d\n", addr,
312 ret);
62579266
RV		 313out:
314 mutex_unlock(&ab8500->lock);
315 return ret;
316}
47c16975
MW		 317
318static int ab8500_mask_and_set_register(struct device *dev,
319 u8 bank, u8 reg, u8 bitmask, u8 bitvalues)
320{
112a80d2 321 int ret;
47c16975
MW		 322 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
323
112a80d2
JA		 324 atomic_inc(&ab8500->transfer_ongoing);
325 ret= mask_and_set_register_interruptible(ab8500, bank, reg,
326 bitmask, bitvalues);
327 atomic_dec(&ab8500->transfer_ongoing);
328 return ret;
47c16975
MW		 329}
330
331static struct abx500_ops ab8500_ops = {
332 .get_chip_id = ab8500_get_chip_id,
333 .get_register = ab8500_get_register,
334 .set_register = ab8500_set_register,
335 .get_register_page = NULL,
336 .set_register_page = NULL,
337 .mask_and_set_register = ab8500_mask_and_set_register,
338 .event_registers_startup_state_get = NULL,
339 .startup_irq_enabled = NULL,
1d843a6c 340 .dump_all_banks = ab8500_dump_all_banks,
47c16975 341};
62579266 342
9505a0a0 343static void ab8500_irq_lock(struct irq_data *data)
62579266 344{
9505a0a0 345 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
62579266
RV		 346
347 mutex_lock(&ab8500->irq_lock);
112a80d2 348 atomic_inc(&ab8500->transfer_ongoing);
62579266
RV		 349}
350
9505a0a0 351static void ab8500_irq_sync_unlock(struct irq_data *data)
62579266 352{
9505a0a0 353 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
62579266
RV		 354 int i;
355
2ced445e 356 for (i = 0; i < ab8500->mask_size; i++) {
62579266
RV		 357 u8 old = ab8500->oldmask[i];
358 u8 new = ab8500->mask[i];
359 int reg;
360
361 if (new == old)
362 continue;
363
0f620837
LW		 364 /*
365 * Interrupt register 12 doesn't exist prior to AB8500 version
366 * 2.0
367 */
368 if (ab8500->irq_reg_offset[i] == 11 &&
369 is_ab8500_1p1_or_earlier(ab8500))
92d50a41
MW		 370 continue;
371
3e1a498f
LJ		 372 if (ab8500->irq_reg_offset[i] < 0)
373 continue;
374
62579266
RV		 375 ab8500->oldmask[i] = new;
376
2ced445e 377 reg = AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i];
47c16975 378 set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new);
62579266 379 }
112a80d2 380 atomic_dec(&ab8500->transfer_ongoing);
62579266
RV		 381 mutex_unlock(&ab8500->irq_lock);
382}
383
9505a0a0 384static void ab8500_irq_mask(struct irq_data *data)
62579266 385{
9505a0a0 386 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
06e589ef 387 int offset = data->hwirq;
62579266
RV		 388 int index = offset / 8;
389 int mask = 1 << (offset % 8);
390
391 ab8500->mask[index] |= mask;
9c677b9b
LJ		 392
393 /* The AB8500 GPIOs have two interrupts each (rising & falling). */
394 if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R)
395 ab8500->mask[index + 2] |= mask;
396 if (offset >= AB9540_INT_GPIO50R && offset <= AB9540_INT_GPIO54R)
397 ab8500->mask[index + 1] |= mask;
398 if (offset == AB8540_INT_GPIO43R || offset == AB8540_INT_GPIO44R)
e2ddf46a
LW		 399 /* Here the falling IRQ is one bit lower */
400 ab8500->mask[index] |= (mask << 1);
62579266
RV		 401}
402
9505a0a0 403static void ab8500_irq_unmask(struct irq_data *data)
62579266 404{
9505a0a0 405 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
9c677b9b 406 unsigned int type = irqd_get_trigger_type(data);
06e589ef 407 int offset = data->hwirq;
62579266
RV		 408 int index = offset / 8;
409 int mask = 1 << (offset % 8);
410
9c677b9b
LJ		 411 if (type & IRQ_TYPE_EDGE_RISING)
412 ab8500->mask[index] &= ~mask;
413
414 /* The AB8500 GPIOs have two interrupts each (rising & falling). */
415 if (type & IRQ_TYPE_EDGE_FALLING) {
416 if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R)
417 ab8500->mask[index + 2] &= ~mask;
418 else if (offset >= AB9540_INT_GPIO50R && offset <= AB9540_INT_GPIO54R)
419 ab8500->mask[index + 1] &= ~mask;
420 else if (offset == AB8540_INT_GPIO43R || offset == AB8540_INT_GPIO44R)
e2ddf46a
LW		 421 /* Here the falling IRQ is one bit lower */
422 ab8500->mask[index] &= ~(mask << 1);
9c677b9b
LJ		 423 else
424 ab8500->mask[index] &= ~mask;
e2ddf46a 425 } else {
9c677b9b
LJ		 426 /* Satisfies the case where type is not set. */
427 ab8500->mask[index] &= ~mask;
e2ddf46a 428 }
62579266
RV		 429}
430
40f6e5a2
LJ		 431static int ab8500_irq_set_type(struct irq_data *data, unsigned int type)
432{
433 return 0;
62579266
RV		 434}
435
436static struct irq_chip ab8500_irq_chip = {
437 .name = "ab8500",
9505a0a0
MB		 438 .irq_bus_lock = ab8500_irq_lock,
439 .irq_bus_sync_unlock = ab8500_irq_sync_unlock,
440 .irq_mask = ab8500_irq_mask,
e6f9306e 441 .irq_disable = ab8500_irq_mask,
9505a0a0 442 .irq_unmask = ab8500_irq_unmask,
40f6e5a2 443 .irq_set_type = ab8500_irq_set_type,
62579266
RV		 444};
445
3e1a498f
LJ		 446static void update_latch_offset(u8 *offset, int i)
447{
448 /* Fix inconsistent ITFromLatch25 bit mapping... */
449 if (unlikely(*offset == 17))
450 *offset = 24;
451 /* Fix inconsistent ab8540 bit mapping... */
452 if (unlikely(*offset == 16))
453 *offset = 25;
454 if ((i==3) && (*offset >= 24))
455 *offset += 2;
456}
457
7ccfe9b1
MJ		 458static int ab8500_handle_hierarchical_line(struct ab8500 *ab8500,
459 int latch_offset, u8 latch_val)
460{
7a93fb37 461 int int_bit, line, i;
7ccfe9b1 462
7a93fb37
FB		 463 for (i = 0; i < ab8500->mask_size; i++)
464 if (ab8500->irq_reg_offset[i] == latch_offset)
465 break;
7ccfe9b1 466
7a93fb37
FB		 467 if (i >= ab8500->mask_size) {
468 dev_err(ab8500->dev, "Register offset 0x%2x not declared\n",
469 latch_offset);
470 return -ENXIO;
471 }
7ccfe9b1 472
7a93fb37
FB		 473 /* ignore masked out interrupts */
474 latch_val &= ~ab8500->mask[i];
7ccfe9b1 475
7a93fb37
FB		 476 while (latch_val) {
477 int_bit = __ffs(latch_val);
7ccfe9b1
MJ		 478 line = (i << 3) + int_bit;
479 latch_val &= ~(1 << int_bit);
480
e2ddf46a
LW		 481 /*
482 * This handles the falling edge hwirqs from the GPIO
483 * lines. Route them back to the line registered for the
484 * rising IRQ, as this is merely a flag for the same IRQ
485 * in linux terms.
486 */
487 if (line >= AB8500_INT_GPIO6F && line <= AB8500_INT_GPIO41F)
488 line -= 16;
489 if (line >= AB9540_INT_GPIO50F && line <= AB9540_INT_GPIO54F)
490 line -= 8;
491 if (line == AB8540_INT_GPIO43F || line == AB8540_INT_GPIO44F)
492 line += 1;
493
7ccfe9b1 494 handle_nested_irq(ab8500->irq_base + line);
7a93fb37 495 }
7ccfe9b1
MJ		 496
497 return 0;
498}
499
500static int ab8500_handle_hierarchical_latch(struct ab8500 *ab8500,
501 int hier_offset, u8 hier_val)
502{
503 int latch_bit, status;
504 u8 latch_offset, latch_val;
505
506 do {
507 latch_bit = __ffs(hier_val);
508 latch_offset = (hier_offset << 3) + latch_bit;
509
3e1a498f 510 update_latch_offset(&latch_offset, hier_offset);
7ccfe9b1
MJ		 511
512 status = get_register_interruptible(ab8500,
513 AB8500_INTERRUPT,
514 AB8500_IT_LATCH1_REG + latch_offset,
515 &latch_val);
516 if (status < 0 || latch_val == 0)
517 goto discard;
518
519 status = ab8500_handle_hierarchical_line(ab8500,
520 latch_offset, latch_val);
521 if (status < 0)
522 return status;
523discard:
524 hier_val &= ~(1 << latch_bit);
525 } while (hier_val);
526
527 return 0;
528}
529
530static irqreturn_t ab8500_hierarchical_irq(int irq, void *dev)
531{
532 struct ab8500 *ab8500 = dev;
533 u8 i;
534
535 dev_vdbg(ab8500->dev, "interrupt\n");
536
537 /* Hierarchical interrupt version */
3e1a498f 538 for (i = 0; i < (ab8500->it_latchhier_num); i++) {
7ccfe9b1
MJ		 539 int status;
540 u8 hier_val;
541
542 status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
543 AB8500_IT_LATCHHIER1_REG + i, &hier_val);
544 if (status < 0 || hier_val == 0)
545 continue;
546
547 status = ab8500_handle_hierarchical_latch(ab8500, i, hier_val);
548 if (status < 0)
549 break;
550 }
551 return IRQ_HANDLED;
552}
553
06e589ef
LJ		 554static int ab8500_irq_map(struct irq_domain *d, unsigned int virq,
555 irq_hw_number_t hwirq)
556{
557 struct ab8500 *ab8500 = d->host_data;
558
559 if (!ab8500)
560 return -EINVAL;
561
562 irq_set_chip_data(virq, ab8500);
563 irq_set_chip_and_handler(virq, &ab8500_irq_chip,
564 handle_simple_irq);
565 irq_set_nested_thread(virq, 1);
62579266 566#ifdef CONFIG_ARM
06e589ef 567 set_irq_flags(virq, IRQF_VALID);
62579266 568#else
06e589ef 569 irq_set_noprobe(virq);
62579266 570#endif
62579266
RV		 571
572 return 0;
573}
574
06e589ef
LJ		 575static struct irq_domain_ops ab8500_irq_ops = {
576 .map = ab8500_irq_map,
577 .xlate = irq_domain_xlate_twocell,
578};
579
580static int ab8500_irq_init(struct ab8500 *ab8500, struct device_node *np)
62579266 581{
2ced445e
LW		 582 int num_irqs;
583
3e1a498f
LJ		 584 if (is_ab8540(ab8500))
585 num_irqs = AB8540_NR_IRQS;
586 else if (is_ab9540(ab8500))
d6255529 587 num_irqs = AB9540_NR_IRQS;
a982362c
BJ		 588 else if (is_ab8505(ab8500))
589 num_irqs = AB8505_NR_IRQS;
d6255529
LW		 590 else
591 num_irqs = AB8500_NR_IRQS;
62579266 592
f1d11f39
LW		 593 /* If ->irq_base is zero this will give a linear mapping */
594 ab8500->domain = irq_domain_add_simple(NULL,
595 num_irqs, ab8500->irq_base,
596 &ab8500_irq_ops, ab8500);
06e589ef
LJ		 597
598 if (!ab8500->domain) {
599 dev_err(ab8500->dev, "Failed to create irqdomain\n");
600 return -ENOSYS;
601 }
602
603 return 0;
62579266
RV		 604}
605
112a80d2
JA		 606int ab8500_suspend(struct ab8500 *ab8500)
607{
608 if (atomic_read(&ab8500->transfer_ongoing))
609 return -EINVAL;
610 else
611 return 0;
612}
613
a9e9ce4c 614static struct resource ab8500_gpadc_resources[] = {
62579266
RV		 615 {
616 .name = "HW_CONV_END",
617 .start = AB8500_INT_GP_HW_ADC_CONV_END,
618 .end = AB8500_INT_GP_HW_ADC_CONV_END,
619 .flags = IORESOURCE_IRQ,
620 },
621 {
622 .name = "SW_CONV_END",
623 .start = AB8500_INT_GP_SW_ADC_CONV_END,
624 .end = AB8500_INT_GP_SW_ADC_CONV_END,
625 .flags = IORESOURCE_IRQ,
626 },
627};
628
4b106fb9 629static struct resource ab8505_gpadc_resources[] = {
c0eda9ae
LJ		 630 {
631 .name = "SW_CONV_END",
632 .start = AB8500_INT_GP_SW_ADC_CONV_END,
633 .end = AB8500_INT_GP_SW_ADC_CONV_END,
634 .flags = IORESOURCE_IRQ,
635 },
636};
637
a9e9ce4c 638static struct resource ab8500_rtc_resources[] = {
62579266
RV		 639 {
640 .name = "60S",
641 .start = AB8500_INT_RTC_60S,
642 .end = AB8500_INT_RTC_60S,
643 .flags = IORESOURCE_IRQ,
644 },
645 {
646 .name = "ALARM",
647 .start = AB8500_INT_RTC_ALARM,
648 .end = AB8500_INT_RTC_ALARM,
649 .flags = IORESOURCE_IRQ,
650 },
651};
652
a9e9ce4c 653static struct resource ab8500_poweronkey_db_resources[] = {
77686517
SI		 654 {
655 .name = "ONKEY_DBF",
656 .start = AB8500_INT_PON_KEY1DB_F,
657 .end = AB8500_INT_PON_KEY1DB_F,
658 .flags = IORESOURCE_IRQ,
659 },
660 {
661 .name = "ONKEY_DBR",
662 .start = AB8500_INT_PON_KEY1DB_R,
663 .end = AB8500_INT_PON_KEY1DB_R,
664 .flags = IORESOURCE_IRQ,
665 },
666};
667
a9e9ce4c 668static struct resource ab8500_av_acc_detect_resources[] = {
e098aded 669 {
6af75ecd
LW		 670 .name = "ACC_DETECT_1DB_F",
671 .start = AB8500_INT_ACC_DETECT_1DB_F,
672 .end = AB8500_INT_ACC_DETECT_1DB_F,
673 .flags = IORESOURCE_IRQ,
e098aded
MW		 674 },
675 {
6af75ecd
LW		 676 .name = "ACC_DETECT_1DB_R",
677 .start = AB8500_INT_ACC_DETECT_1DB_R,
678 .end = AB8500_INT_ACC_DETECT_1DB_R,
679 .flags = IORESOURCE_IRQ,
680 },
681 {
682 .name = "ACC_DETECT_21DB_F",
683 .start = AB8500_INT_ACC_DETECT_21DB_F,
684 .end = AB8500_INT_ACC_DETECT_21DB_F,
685 .flags = IORESOURCE_IRQ,
686 },
687 {
688 .name = "ACC_DETECT_21DB_R",
689 .start = AB8500_INT_ACC_DETECT_21DB_R,
690 .end = AB8500_INT_ACC_DETECT_21DB_R,
691 .flags = IORESOURCE_IRQ,
692 },
693 {
694 .name = "ACC_DETECT_22DB_F",
695 .start = AB8500_INT_ACC_DETECT_22DB_F,
696 .end = AB8500_INT_ACC_DETECT_22DB_F,
697 .flags = IORESOURCE_IRQ,
e098aded 698 },
6af75ecd
LW		 699 {
700 .name = "ACC_DETECT_22DB_R",
701 .start = AB8500_INT_ACC_DETECT_22DB_R,
702 .end = AB8500_INT_ACC_DETECT_22DB_R,
703 .flags = IORESOURCE_IRQ,
704 },
705};
706
a9e9ce4c 707static struct resource ab8500_charger_resources[] = {
e098aded
MW		 708 {
709 .name = "MAIN_CH_UNPLUG_DET",
710 .start = AB8500_INT_MAIN_CH_UNPLUG_DET,
711 .end = AB8500_INT_MAIN_CH_UNPLUG_DET,
712 .flags = IORESOURCE_IRQ,
713 },
714 {
715 .name = "MAIN_CHARGE_PLUG_DET",
716 .start = AB8500_INT_MAIN_CH_PLUG_DET,
717 .end = AB8500_INT_MAIN_CH_PLUG_DET,
718 .flags = IORESOURCE_IRQ,
719 },
e098aded
MW		 720 {
721 .name = "VBUS_DET_R",
722 .start = AB8500_INT_VBUS_DET_R,
723 .end = AB8500_INT_VBUS_DET_R,
724 .flags = IORESOURCE_IRQ,
725 },
726 {
6af75ecd
LW		 727 .name = "VBUS_DET_F",
728 .start = AB8500_INT_VBUS_DET_F,
729 .end = AB8500_INT_VBUS_DET_F,
e098aded
MW		 730 .flags = IORESOURCE_IRQ,
731 },
732 {
6af75ecd
LW		 733 .name = "USB_LINK_STATUS",
734 .start = AB8500_INT_USB_LINK_STATUS,
735 .end = AB8500_INT_USB_LINK_STATUS,
736 .flags = IORESOURCE_IRQ,
737 },
e098aded
MW		 738 {
739 .name = "VBUS_OVV",
740 .start = AB8500_INT_VBUS_OVV,
741 .end = AB8500_INT_VBUS_OVV,
742 .flags = IORESOURCE_IRQ,
743 },
744 {
6af75ecd
LW		 745 .name = "USB_CH_TH_PROT_R",
746 .start = AB8500_INT_USB_CH_TH_PROT_R,
747 .end = AB8500_INT_USB_CH_TH_PROT_R,
e098aded
MW		 748 .flags = IORESOURCE_IRQ,
749 },
750 {
6af75ecd
LW		 751 .name = "USB_CH_TH_PROT_F",
752 .start = AB8500_INT_USB_CH_TH_PROT_F,
753 .end = AB8500_INT_USB_CH_TH_PROT_F,
e098aded
MW		 754 .flags = IORESOURCE_IRQ,
755 },
756 {
6af75ecd
LW		 757 .name = "MAIN_EXT_CH_NOT_OK",
758 .start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
759 .end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
760 .flags = IORESOURCE_IRQ,
761 },
762 {
763 .name = "MAIN_CH_TH_PROT_R",
764 .start = AB8500_INT_MAIN_CH_TH_PROT_R,
765 .end = AB8500_INT_MAIN_CH_TH_PROT_R,
766 .flags = IORESOURCE_IRQ,
767 },
768 {
769 .name = "MAIN_CH_TH_PROT_F",
770 .start = AB8500_INT_MAIN_CH_TH_PROT_F,
771 .end = AB8500_INT_MAIN_CH_TH_PROT_F,
772 .flags = IORESOURCE_IRQ,
773 },
774 {
775 .name = "USB_CHARGER_NOT_OKR",
a982362c
BJ		 776 .start = AB8500_INT_USB_CHARGER_NOT_OKR,
777 .end = AB8500_INT_USB_CHARGER_NOT_OKR,
6af75ecd
LW		 778 .flags = IORESOURCE_IRQ,
779 },
780 {
781 .name = "CH_WD_EXP",
782 .start = AB8500_INT_CH_WD_EXP,
783 .end = AB8500_INT_CH_WD_EXP,
784 .flags = IORESOURCE_IRQ,
785 },
34c11a70
POH		 786 {
787 .name = "VBUS_CH_DROP_END",
788 .start = AB8500_INT_VBUS_CH_DROP_END,
789 .end = AB8500_INT_VBUS_CH_DROP_END,
790 .flags = IORESOURCE_IRQ,
791 },
6af75ecd
LW		 792};
793
a9e9ce4c 794static struct resource ab8500_btemp_resources[] = {
6af75ecd
LW		 795 {
796 .name = "BAT_CTRL_INDB",
797 .start = AB8500_INT_BAT_CTRL_INDB,
798 .end = AB8500_INT_BAT_CTRL_INDB,
e098aded
MW		 799 .flags = IORESOURCE_IRQ,
800 },
801 {
802 .name = "BTEMP_LOW",
803 .start = AB8500_INT_BTEMP_LOW,
804 .end = AB8500_INT_BTEMP_LOW,
805 .flags = IORESOURCE_IRQ,
806 },
807 {
808 .name = "BTEMP_HIGH",
809 .start = AB8500_INT_BTEMP_HIGH,
810 .end = AB8500_INT_BTEMP_HIGH,
811 .flags = IORESOURCE_IRQ,
812 },
813 {
6af75ecd
LW		 814 .name = "BTEMP_LOW_MEDIUM",
815 .start = AB8500_INT_BTEMP_LOW_MEDIUM,
816 .end = AB8500_INT_BTEMP_LOW_MEDIUM,
e098aded
MW		 817 .flags = IORESOURCE_IRQ,
818 },
819 {
6af75ecd
LW		 820 .name = "BTEMP_MEDIUM_HIGH",
821 .start = AB8500_INT_BTEMP_MEDIUM_HIGH,
822 .end = AB8500_INT_BTEMP_MEDIUM_HIGH,
e098aded
MW		 823 .flags = IORESOURCE_IRQ,
824 },
6af75ecd
LW		 825};
826
a9e9ce4c 827static struct resource ab8500_fg_resources[] = {
e098aded 828 {
6af75ecd
LW		 829 .name = "NCONV_ACCU",
830 .start = AB8500_INT_CCN_CONV_ACC,
831 .end = AB8500_INT_CCN_CONV_ACC,
e098aded
MW		 832 .flags = IORESOURCE_IRQ,
833 },
834 {
6af75ecd
LW		 835 .name = "BATT_OVV",
836 .start = AB8500_INT_BATT_OVV,
837 .end = AB8500_INT_BATT_OVV,
e098aded
MW		 838 .flags = IORESOURCE_IRQ,
839 },
840 {
6af75ecd
LW		 841 .name = "LOW_BAT_F",
842 .start = AB8500_INT_LOW_BAT_F,
843 .end = AB8500_INT_LOW_BAT_F,
844 .flags = IORESOURCE_IRQ,
845 },
846 {
847 .name = "LOW_BAT_R",
848 .start = AB8500_INT_LOW_BAT_R,
849 .end = AB8500_INT_LOW_BAT_R,
850 .flags = IORESOURCE_IRQ,
851 },
852 {
853 .name = "CC_INT_CALIB",
854 .start = AB8500_INT_CC_INT_CALIB,
855 .end = AB8500_INT_CC_INT_CALIB,
e098aded
MW		 856 .flags = IORESOURCE_IRQ,
857 },
a982362c
BJ		 858 {
859 .name = "CCEOC",
860 .start = AB8500_INT_CCEOC,
861 .end = AB8500_INT_CCEOC,
862 .flags = IORESOURCE_IRQ,
863 },
e098aded
MW		 864};
865
a9e9ce4c 866static struct resource ab8500_chargalg_resources[] = {};
6af75ecd 867
df720647 868#ifdef CONFIG_DEBUG_FS
a9e9ce4c 869static struct resource ab8500_debug_resources[] = {
e098aded
MW		 870 {
871 .name = "IRQ_FIRST",
872 .start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
873 .end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
874 .flags = IORESOURCE_IRQ,
875 },
876 {
877 .name = "IRQ_LAST",
a982362c
BJ		 878 .start = AB8500_INT_XTAL32K_KO,
879 .end = AB8500_INT_XTAL32K_KO,
e098aded
MW		 880 .flags = IORESOURCE_IRQ,
881 },
882};
df720647 883#endif
e098aded 884
a9e9ce4c 885static struct resource ab8500_usb_resources[] = {
e098aded
MW		 886 {
887 .name = "ID_WAKEUP_R",
888 .start = AB8500_INT_ID_WAKEUP_R,
889 .end = AB8500_INT_ID_WAKEUP_R,
890 .flags = IORESOURCE_IRQ,
891 },
892 {
893 .name = "ID_WAKEUP_F",
894 .start = AB8500_INT_ID_WAKEUP_F,
895 .end = AB8500_INT_ID_WAKEUP_F,
896 .flags = IORESOURCE_IRQ,
897 },
898 {
899 .name = "VBUS_DET_F",
900 .start = AB8500_INT_VBUS_DET_F,
901 .end = AB8500_INT_VBUS_DET_F,
902 .flags = IORESOURCE_IRQ,
903 },
904 {
905 .name = "VBUS_DET_R",
906 .start = AB8500_INT_VBUS_DET_R,
907 .end = AB8500_INT_VBUS_DET_R,
908 .flags = IORESOURCE_IRQ,
909 },
92d50a41
MW		 910 {
911 .name = "USB_LINK_STATUS",
912 .start = AB8500_INT_USB_LINK_STATUS,
913 .end = AB8500_INT_USB_LINK_STATUS,
914 .flags = IORESOURCE_IRQ,
915 },
6af75ecd
LW		 916 {
917 .name = "USB_ADP_PROBE_PLUG",
918 .start = AB8500_INT_ADP_PROBE_PLUG,
919 .end = AB8500_INT_ADP_PROBE_PLUG,
920 .flags = IORESOURCE_IRQ,
921 },
922 {
923 .name = "USB_ADP_PROBE_UNPLUG",
924 .start = AB8500_INT_ADP_PROBE_UNPLUG,
925 .end = AB8500_INT_ADP_PROBE_UNPLUG,
926 .flags = IORESOURCE_IRQ,
927 },
e098aded
MW		 928};
929
a9e9ce4c 930static struct resource ab8505_iddet_resources[] = {
44f72e53
VS		 931 {
932 .name = "KeyDeglitch",
933 .start = AB8505_INT_KEYDEGLITCH,
934 .end = AB8505_INT_KEYDEGLITCH,
935 .flags = IORESOURCE_IRQ,
936 },
937 {
938 .name = "KP",
939 .start = AB8505_INT_KP,
940 .end = AB8505_INT_KP,
941 .flags = IORESOURCE_IRQ,
942 },
943 {
944 .name = "IKP",
945 .start = AB8505_INT_IKP,
946 .end = AB8505_INT_IKP,
947 .flags = IORESOURCE_IRQ,
948 },
949 {
950 .name = "IKR",
951 .start = AB8505_INT_IKR,
952 .end = AB8505_INT_IKR,
953 .flags = IORESOURCE_IRQ,
954 },
955 {
956 .name = "KeyStuck",
957 .start = AB8505_INT_KEYSTUCK,
958 .end = AB8505_INT_KEYSTUCK,
959 .flags = IORESOURCE_IRQ,
960 },
492390c8
LJ		 961 {
962 .name = "VBUS_DET_R",
963 .start = AB8500_INT_VBUS_DET_R,
964 .end = AB8500_INT_VBUS_DET_R,
965 .flags = IORESOURCE_IRQ,
966 },
967 {
968 .name = "VBUS_DET_F",
969 .start = AB8500_INT_VBUS_DET_F,
970 .end = AB8500_INT_VBUS_DET_F,
971 .flags = IORESOURCE_IRQ,
972 },
973 {
974 .name = "ID_DET_PLUGR",
975 .start = AB8500_INT_ID_DET_PLUGR,
976 .end = AB8500_INT_ID_DET_PLUGR,
977 .flags = IORESOURCE_IRQ,
978 },
979 {
980 .name = "ID_DET_PLUGF",
981 .start = AB8500_INT_ID_DET_PLUGF,
982 .end = AB8500_INT_ID_DET_PLUGF,
983 .flags = IORESOURCE_IRQ,
984 },
44f72e53
VS		 985};
986
a9e9ce4c 987static struct resource ab8500_temp_resources[] = {
e098aded 988 {
151621a7 989 .name = "ABX500_TEMP_WARM",
e098aded
MW		 990 .start = AB8500_INT_TEMP_WARM,
991 .end = AB8500_INT_TEMP_WARM,
992 .flags = IORESOURCE_IRQ,
993 },
994};
995
4b106fb9
LJ		 996static struct mfd_cell ab8500_bm_devs[] = {
997 {
998 .name = "ab8500-charger",
999 .of_compatible = "stericsson,ab8500-charger",
1000 .num_resources = ARRAY_SIZE(ab8500_charger_resources),
1001 .resources = ab8500_charger_resources,
1002 .platform_data = &ab8500_bm_data,
1003 .pdata_size = sizeof(ab8500_bm_data),
1004 },
1005 {
1006 .name = "ab8500-btemp",
1007 .of_compatible = "stericsson,ab8500-btemp",
1008 .num_resources = ARRAY_SIZE(ab8500_btemp_resources),
1009 .resources = ab8500_btemp_resources,
1010 .platform_data = &ab8500_bm_data,
1011 .pdata_size = sizeof(ab8500_bm_data),
1012 },
1013 {
1014 .name = "ab8500-fg",
1015 .of_compatible = "stericsson,ab8500-fg",
1016 .num_resources = ARRAY_SIZE(ab8500_fg_resources),
1017 .resources = ab8500_fg_resources,
1018 .platform_data = &ab8500_bm_data,
1019 .pdata_size = sizeof(ab8500_bm_data),
1020 },
1021 {
1022 .name = "ab8500-chargalg",
1023 .of_compatible = "stericsson,ab8500-chargalg",
1024 .num_resources = ARRAY_SIZE(ab8500_chargalg_resources),
1025 .resources = ab8500_chargalg_resources,
1026 .platform_data = &ab8500_bm_data,
1027 .pdata_size = sizeof(ab8500_bm_data),
1028 },
1029};
1030
1031static struct mfd_cell ab8500_devs[] = {
5814fc35
MW		 1032#ifdef CONFIG_DEBUG_FS
1033 {
1034 .name = "ab8500-debug",
bad76991 1035 .of_compatible = "stericsson,ab8500-debug",
e098aded
MW		 1036 .num_resources = ARRAY_SIZE(ab8500_debug_resources),
1037 .resources = ab8500_debug_resources,
5814fc35
MW		 1038 },
1039#endif
e098aded
MW		 1040 {
1041 .name = "ab8500-sysctrl",
bad76991 1042 .of_compatible = "stericsson,ab8500-sysctrl",
e098aded
MW		 1043 },
1044 {
1045 .name = "ab8500-regulator",
bad76991 1046 .of_compatible = "stericsson,ab8500-regulator",
e098aded 1047 },
916a871c
UH		 1048 {
1049 .name = "abx500-clk",
1050 .of_compatible = "stericsson,abx500-clk",
1051 },
4b106fb9
LJ		 1052 {
1053 .name = "ab8500-gpadc",
1054 .num_resources = ARRAY_SIZE(ab8500_gpadc_resources),
1055 .resources = ab8500_gpadc_resources,
1056 },
62579266
RV		 1057 {
1058 .name = "ab8500-rtc",
bad76991 1059 .of_compatible = "stericsson,ab8500-rtc",
62579266
RV		 1060 .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
1061 .resources = ab8500_rtc_resources,
1062 },
6af75ecd
LW		 1063 {
1064 .name = "ab8500-acc-det",
bad76991 1065 .of_compatible = "stericsson,ab8500-acc-det",
6af75ecd
LW		 1066 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
1067 .resources = ab8500_av_acc_detect_resources,
1068 },
e098aded 1069 {
4b106fb9 1070
e098aded 1071 .name = "ab8500-poweron-key",
bad76991 1072 .of_compatible = "stericsson,ab8500-poweron-key",
e098aded
MW		 1073 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
1074 .resources = ab8500_poweronkey_db_resources,
1075 },
f0f05b1c
AM		 1076 {
1077 .name = "ab8500-pwm",
bad76991 1078 .of_compatible = "stericsson,ab8500-pwm",
f0f05b1c
AM		 1079 .id = 1,
1080 },
1081 {
1082 .name = "ab8500-pwm",
bad76991 1083 .of_compatible = "stericsson,ab8500-pwm",
f0f05b1c
AM		 1084 .id = 2,
1085 },
1086 {
1087 .name = "ab8500-pwm",
bad76991 1088 .of_compatible = "stericsson,ab8500-pwm",
f0f05b1c
AM		 1089 .id = 3,
1090 },
bad76991
LJ		 1091 {
1092 .name = "ab8500-leds",
1093 .of_compatible = "stericsson,ab8500-leds",
1094 },
77686517 1095 {
e098aded 1096 .name = "ab8500-denc",
bad76991 1097 .of_compatible = "stericsson,ab8500-denc",
e098aded 1098 },
4b106fb9
LJ		 1099 {
1100 .name = "ab8500-gpio",
1101 .of_compatible = "stericsson,ab8500-gpio",
1102 },
e098aded 1103 {
151621a7
HZ		 1104 .name = "abx500-temp",
1105 .of_compatible = "stericsson,abx500-temp",
e098aded
MW		 1106 .num_resources = ARRAY_SIZE(ab8500_temp_resources),
1107 .resources = ab8500_temp_resources,
77686517 1108 },
6ef9418c 1109 {
4b106fb9 1110 .name = "ab8500-usb",
f201f730 1111 .of_compatible = "stericsson,ab8500-usb",
4b106fb9
LJ		 1112 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
1113 .resources = ab8500_usb_resources,
6ef9418c
RA		 1114 },
1115 {
4b106fb9 1116 .name = "ab8500-codec",
6ef9418c
RA		 1117 },
1118};
1119
4b106fb9
LJ		 1120static struct mfd_cell ab9540_devs[] = {
1121#ifdef CONFIG_DEBUG_FS
d6255529 1122 {
4b106fb9
LJ		 1123 .name = "ab8500-debug",
1124 .num_resources = ARRAY_SIZE(ab8500_debug_resources),
1125 .resources = ab8500_debug_resources,
d6255529 1126 },
4b106fb9 1127#endif
d6255529 1128 {
4b106fb9 1129 .name = "ab8500-sysctrl",
d6255529 1130 },
44f72e53 1131 {
4b106fb9 1132 .name = "ab8500-regulator",
44f72e53 1133 },
9ee17676
UH		 1134 {
1135 .name = "abx500-clk",
1136 .of_compatible = "stericsson,abx500-clk",
1137 },
c0eda9ae
LJ		 1138 {
1139 .name = "ab8500-gpadc",
1140 .of_compatible = "stericsson,ab8500-gpadc",
1141 .num_resources = ARRAY_SIZE(ab8500_gpadc_resources),
1142 .resources = ab8500_gpadc_resources,
1143 },
4b106fb9
LJ		 1144 {
1145 .name = "ab8500-rtc",
1146 .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
1147 .resources = ab8500_rtc_resources,
1148 },
1149 {
1150 .name = "ab8500-acc-det",
1151 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
1152 .resources = ab8500_av_acc_detect_resources,
1153 },
1154 {
1155 .name = "ab8500-poweron-key",
1156 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
1157 .resources = ab8500_poweronkey_db_resources,
1158 },
1159 {
1160 .name = "ab8500-pwm",
1161 .id = 1,
1162 },
1163 {
1164 .name = "ab8500-leds",
1165 },
1166 {
1167 .name = "abx500-temp",
1168 .num_resources = ARRAY_SIZE(ab8500_temp_resources),
1169 .resources = ab8500_temp_resources,
1170 },
d6255529 1171 {
e64d905e
LJ		 1172 .name = "pinctrl-ab9540",
1173 .of_compatible = "stericsson,ab9540-gpio",
d6255529
LW		 1174 },
1175 {
1176 .name = "ab9540-usb",
1177 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
1178 .resources = ab8500_usb_resources,
1179 },
44f72e53
VS		 1180 {
1181 .name = "ab9540-codec",
1182 },
c0eda9ae
LJ		 1183 {
1184 .name = "ab-iddet",
1185 .num_resources = ARRAY_SIZE(ab8505_iddet_resources),
1186 .resources = ab8505_iddet_resources,
1187 },
44f72e53
VS		 1188};
1189
c0eda9ae
LJ		 1190/* Device list for ab8505 */
1191static struct mfd_cell ab8505_devs[] = {
4b106fb9
LJ		 1192#ifdef CONFIG_DEBUG_FS
1193 {
1194 .name = "ab8500-debug",
1195 .num_resources = ARRAY_SIZE(ab8500_debug_resources),
1196 .resources = ab8500_debug_resources,
1197 },
1198#endif
1199 {
1200 .name = "ab8500-sysctrl",
1201 },
1202 {
1203 .name = "ab8500-regulator",
1204 },
9ee17676
UH		 1205 {
1206 .name = "abx500-clk",
1207 .of_compatible = "stericsson,abx500-clk",
1208 },
4b106fb9
LJ		 1209 {
1210 .name = "ab8500-gpadc",
1211 .num_resources = ARRAY_SIZE(ab8505_gpadc_resources),
1212 .resources = ab8505_gpadc_resources,
1213 },
1214 {
1215 .name = "ab8500-rtc",
1216 .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
1217 .resources = ab8500_rtc_resources,
1218 },
1219 {
1220 .name = "ab8500-acc-det",
1221 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
1222 .resources = ab8500_av_acc_detect_resources,
1223 },
1224 {
1225 .name = "ab8500-poweron-key",
1226 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
1227 .resources = ab8500_poweronkey_db_resources,
1228 },
1229 {
1230 .name = "ab8500-pwm",
1231 .id = 1,
1232 },
1233 {
1234 .name = "ab8500-leds",
1235 },
1236 {
1237 .name = "ab8500-gpio",
1238 },
1239 {
1240 .name = "ab8500-usb",
1241 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
1242 .resources = ab8500_usb_resources,
1243 },
1244 {
1245 .name = "ab8500-codec",
1246 },
c0eda9ae
LJ		 1247 {
1248 .name = "ab-iddet",
1249 .num_resources = ARRAY_SIZE(ab8505_iddet_resources),
1250 .resources = ab8505_iddet_resources,
1251 },
1252};
1253
1254static struct mfd_cell ab8540_devs[] = {
4b106fb9
LJ		 1255#ifdef CONFIG_DEBUG_FS
1256 {
1257 .name = "ab8500-debug",
1258 .num_resources = ARRAY_SIZE(ab8500_debug_resources),
1259 .resources = ab8500_debug_resources,
1260 },
1261#endif
1262 {
1263 .name = "ab8500-sysctrl",
1264 },
1265 {
1266 .name = "ab8500-regulator",
1267 },
9ee17676
UH		 1268 {
1269 .name = "abx500-clk",
1270 .of_compatible = "stericsson,abx500-clk",
1271 },
4b106fb9
LJ		 1272 {
1273 .name = "ab8500-gpadc",
1274 .num_resources = ARRAY_SIZE(ab8505_gpadc_resources),
1275 .resources = ab8505_gpadc_resources,
1276 },
1277 {
1278 .name = "ab8500-rtc",
1279 .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
1280 .resources = ab8500_rtc_resources,
1281 },
1282 {
1283 .name = "ab8500-acc-det",
1284 .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
1285 .resources = ab8500_av_acc_detect_resources,
1286 },
1287 {
1288 .name = "ab8500-poweron-key",
1289 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
1290 .resources = ab8500_poweronkey_db_resources,
1291 },
1292 {
1293 .name = "ab8500-pwm",
1294 .id = 1,
1295 },
1296 {
1297 .name = "ab8500-leds",
1298 },
1299 {
1300 .name = "abx500-temp",
1301 .num_resources = ARRAY_SIZE(ab8500_temp_resources),
1302 .resources = ab8500_temp_resources,
1303 },
c0eda9ae
LJ		 1304 {
1305 .name = "ab8500-gpio",
1306 },
1307 {
1308 .name = "ab8540-usb",
1309 .num_resources = ARRAY_SIZE(ab8500_usb_resources),
1310 .resources = ab8500_usb_resources,
1311 },
1312 {
1313 .name = "ab8540-codec",
1314 },
44f72e53
VS		 1315 {
1316 .name = "ab-iddet",
1317 .num_resources = ARRAY_SIZE(ab8505_iddet_resources),
1318 .resources = ab8505_iddet_resources,
1319 },
d6255529
LW		 1320};
1321
cca69b67
MW		 1322static ssize_t show_chip_id(struct device *dev,
1323 struct device_attribute *attr, char *buf)
1324{
1325 struct ab8500 *ab8500;
1326
1327 ab8500 = dev_get_drvdata(dev);
e436ddff 1328
cca69b67
MW		 1329 return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL);
1330}
1331
e5c238c3
MW		 1332/*
1333 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
1334 * 0x01 Swoff bit programming
1335 * 0x02 Thermal protection activation
1336 * 0x04 Vbat lower then BattOk falling threshold
1337 * 0x08 Watchdog expired
1338 * 0x10 Non presence of 32kHz clock
1339 * 0x20 Battery level lower than power on reset threshold
1340 * 0x40 Power on key 1 pressed longer than 10 seconds
1341 * 0x80 DB8500 thermal shutdown
1342 */
1343static ssize_t show_switch_off_status(struct device *dev,
1344 struct device_attribute *attr, char *buf)
1345{
1346 int ret;
1347 u8 value;
1348 struct ab8500 *ab8500;
1349
1350 ab8500 = dev_get_drvdata(dev);
1351 ret = get_register_interruptible(ab8500, AB8500_RTC,
1352 AB8500_SWITCH_OFF_STATUS, &value);
1353 if (ret < 0)
1354 return ret;
1355 return sprintf(buf, "%#x\n", value);
1356}
1357
f04a9d8a
RK		 1358/* use mask and set to override the register turn_on_stat value */
1359void ab8500_override_turn_on_stat(u8 mask, u8 set)
1360{
1361 spin_lock(&on_stat_lock);
1362 turn_on_stat_mask = mask;
1363 turn_on_stat_set = set;
1364 spin_unlock(&on_stat_lock);
1365}
1366
b4a31037
AL		 1367/*
1368 * ab8500 has turned on due to (TURN_ON_STATUS):
1369 * 0x01 PORnVbat
1370 * 0x02 PonKey1dbF
1371 * 0x04 PonKey2dbF
1372 * 0x08 RTCAlarm
1373 * 0x10 MainChDet
1374 * 0x20 VbusDet
1375 * 0x40 UsbIDDetect
1376 * 0x80 Reserved
1377 */
1378static ssize_t show_turn_on_status(struct device *dev,
1379 struct device_attribute *attr, char *buf)
1380{
1381 int ret;
1382 u8 value;
1383 struct ab8500 *ab8500;
1384
1385 ab8500 = dev_get_drvdata(dev);
1386 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
1387 AB8500_TURN_ON_STATUS, &value);
1388 if (ret < 0)
1389 return ret;
f04a9d8a
RK		 1390
1391 /*
1392 * In L9540, turn_on_status register is not updated correctly if
1393 * the device is rebooted with AC/USB charger connected. Due to
1394 * this, the device boots android instead of entering into charge
1395 * only mode. Read the AC/USB status register to detect the charger
1396 * presence and update the turn on status manually.
1397 */
1398 if (is_ab9540(ab8500)) {
1399 spin_lock(&on_stat_lock);
1400 value = (value & turn_on_stat_mask) | turn_on_stat_set;
1401 spin_unlock(&on_stat_lock);
1402 }
1403
b4a31037
AL		 1404 return sprintf(buf, "%#x\n", value);
1405}
1406
93ff722e
LJ		 1407static ssize_t show_turn_on_status_2(struct device *dev,
1408 struct device_attribute *attr, char *buf)
1409{
1410 int ret;
1411 u8 value;
1412 struct ab8500 *ab8500;
1413
1414 ab8500 = dev_get_drvdata(dev);
1415 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
1416 AB8505_TURN_ON_STATUS_2, &value);
1417 if (ret < 0)
1418 return ret;
1419 return sprintf(buf, "%#x\n", (value & 0x1));
1420}
1421
d6255529
LW		 1422static ssize_t show_ab9540_dbbrstn(struct device *dev,
1423 struct device_attribute *attr, char *buf)
1424{
1425 struct ab8500 *ab8500;
1426 int ret;
1427 u8 value;
1428
1429 ab8500 = dev_get_drvdata(dev);
1430
1431 ret = get_register_interruptible(ab8500, AB8500_REGU_CTRL2,
1432 AB9540_MODEM_CTRL2_REG, &value);
1433 if (ret < 0)
1434 return ret;
1435
1436 return sprintf(buf, "%d\n",
1437 (value & AB9540_MODEM_CTRL2_SWDBBRSTN_BIT) ? 1 : 0);
1438}
1439
1440static ssize_t store_ab9540_dbbrstn(struct device *dev,
1441 struct device_attribute *attr, const char *buf, size_t count)
1442{
1443 struct ab8500 *ab8500;
1444 int ret = count;
1445 int err;
1446 u8 bitvalues;
1447
1448 ab8500 = dev_get_drvdata(dev);
1449
1450 if (count > 0) {
1451 switch (buf[0]) {
1452 case '0':
1453 bitvalues = 0;
1454 break;
1455 case '1':
1456 bitvalues = AB9540_MODEM_CTRL2_SWDBBRSTN_BIT;
1457 break;
1458 default:
1459 goto exit;
1460 }
1461
1462 err = mask_and_set_register_interruptible(ab8500,
1463 AB8500_REGU_CTRL2, AB9540_MODEM_CTRL2_REG,
1464 AB9540_MODEM_CTRL2_SWDBBRSTN_BIT, bitvalues);
1465 if (err)
1466 dev_info(ab8500->dev,
1467 "Failed to set DBBRSTN %c, err %#x\n",
1468 buf[0], err);
1469 }
1470
1471exit:
1472 return ret;
1473}
1474
cca69b67 1475static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL);
e5c238c3 1476static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL);
b4a31037 1477static DEVICE_ATTR(turn_on_status, S_IRUGO, show_turn_on_status, NULL);
93ff722e 1478static DEVICE_ATTR(turn_on_status_2, S_IRUGO, show_turn_on_status_2, NULL);
d6255529
LW		 1479static DEVICE_ATTR(dbbrstn, S_IRUGO | S_IWUSR,
1480 show_ab9540_dbbrstn, store_ab9540_dbbrstn);
cca69b67
MW		 1481
1482static struct attribute *ab8500_sysfs_entries[] = {
1483 &dev_attr_chip_id.attr,
e5c238c3 1484 &dev_attr_switch_off_status.attr,
b4a31037 1485 &dev_attr_turn_on_status.attr,
cca69b67
MW		 1486 NULL,
1487};
1488
93ff722e
LJ		 1489static struct attribute *ab8505_sysfs_entries[] = {
1490 &dev_attr_turn_on_status_2.attr,
1491 NULL,
1492};
1493
d6255529
LW		 1494static struct attribute *ab9540_sysfs_entries[] = {
1495 &dev_attr_chip_id.attr,
1496 &dev_attr_switch_off_status.attr,
1497 &dev_attr_turn_on_status.attr,
1498 &dev_attr_dbbrstn.attr,
1499 NULL,
1500};
1501
cca69b67
MW		 1502static struct attribute_group ab8500_attr_group = {
1503 .attrs = ab8500_sysfs_entries,
1504};
1505
93ff722e
LJ		 1506static struct attribute_group ab8505_attr_group = {
1507 .attrs = ab8505_sysfs_entries,
1508};
1509
d6255529
LW		 1510static struct attribute_group ab9540_attr_group = {
1511 .attrs = ab9540_sysfs_entries,
1512};
1513
f791be49 1514static int ab8500_probe(struct platform_device *pdev)
62579266 1515{
b04c530c
JA		 1516 static char *switch_off_status[] = {
1517 "Swoff bit programming",
1518 "Thermal protection activation",
1519 "Vbat lower then BattOk falling threshold",
1520 "Watchdog expired",
1521 "Non presence of 32kHz clock",
1522 "Battery level lower than power on reset threshold",
1523 "Power on key 1 pressed longer than 10 seconds",
1524 "DB8500 thermal shutdown"};
abee26cd
MW		 1525 static char *turn_on_status[] = {
1526 "Battery rising (Vbat)",
1527 "Power On Key 1 dbF",
1528 "Power On Key 2 dbF",
1529 "RTC Alarm",
1530 "Main Charger Detect",
1531 "Vbus Detect (USB)",
1532 "USB ID Detect",
1533 "UART Factory Mode Detect"};
d28f1db8
LJ		 1534 struct ab8500_platform_data *plat = dev_get_platdata(&pdev->dev);
1535 const struct platform_device_id *platid = platform_get_device_id(pdev);
6bc4a568
LJ		 1536 enum ab8500_version version = AB8500_VERSION_UNDEFINED;
1537 struct device_node *np = pdev->dev.of_node;
d28f1db8
LJ		 1538 struct ab8500 *ab8500;
1539 struct resource *resource;
62579266
RV		 1540 int ret;
1541 int i;
47c16975 1542 u8 value;
62579266 1543
8c4203cb 1544 ab8500 = devm_kzalloc(&pdev->dev, sizeof *ab8500, GFP_KERNEL);
d28f1db8
LJ		 1545 if (!ab8500)
1546 return -ENOMEM;
1547
62579266
RV		 1548 if (plat)
1549 ab8500->irq_base = plat->irq_base;
1550
d28f1db8
LJ		 1551 ab8500->dev = &pdev->dev;
1552
1553 resource = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
8c4203cb
LJ		 1554 if (!resource)
1555 return -ENODEV;
d28f1db8
LJ		 1556
1557 ab8500->irq = resource->start;
1558
822672a7
LJ		 1559 ab8500->read = ab8500_prcmu_read;
1560 ab8500->write = ab8500_prcmu_write;
1561 ab8500->write_masked = ab8500_prcmu_write_masked;
d28f1db8 1562
62579266
RV		 1563 mutex_init(&ab8500->lock);
1564 mutex_init(&ab8500->irq_lock);
112a80d2 1565 atomic_set(&ab8500->transfer_ongoing, 0);
62579266 1566
d28f1db8
LJ		 1567 platform_set_drvdata(pdev, ab8500);
1568
6bc4a568
LJ		 1569 if (platid)
1570 version = platid->driver_data;
6bc4a568 1571
0f620837
LW		 1572 if (version != AB8500_VERSION_UNDEFINED)
1573 ab8500->version = version;
1574 else {
1575 ret = get_register_interruptible(ab8500, AB8500_MISC,
1576 AB8500_IC_NAME_REG, &value);
1577 if (ret < 0)
8c4203cb 1578 return ret;
0f620837
LW		 1579
1580 ab8500->version = value;
1581 }
1582
47c16975
MW		 1583 ret = get_register_interruptible(ab8500, AB8500_MISC,
1584 AB8500_REV_REG, &value);
62579266 1585 if (ret < 0)
8c4203cb 1586 return ret;
62579266 1587
47c16975 1588 ab8500->chip_id = value;
62579266 1589
0f620837
LW		 1590 dev_info(ab8500->dev, "detected chip, %s rev. %1x.%1x\n",
1591 ab8500_version_str[ab8500->version],
1592 ab8500->chip_id >> 4,
1593 ab8500->chip_id & 0x0F);
1594
3e1a498f
LJ		 1595 /* Configure AB8540 */
1596 if (is_ab8540(ab8500)) {
1597 ab8500->mask_size = AB8540_NUM_IRQ_REGS;
1598 ab8500->irq_reg_offset = ab8540_irq_regoffset;
1599 ab8500->it_latchhier_num = AB8540_IT_LATCHHIER_NUM;
1600 }/* Configure AB8500 or AB9540 IRQ */
1601 else if (is_ab9540(ab8500) || is_ab8505(ab8500)) {
d6255529
LW		 1602 ab8500->mask_size = AB9540_NUM_IRQ_REGS;
1603 ab8500->irq_reg_offset = ab9540_irq_regoffset;
3e1a498f 1604 ab8500->it_latchhier_num = AB8500_IT_LATCHHIER_NUM;
d6255529
LW		 1605 } else {
1606 ab8500->mask_size = AB8500_NUM_IRQ_REGS;
1607 ab8500->irq_reg_offset = ab8500_irq_regoffset;
3e1a498f 1608 ab8500->it_latchhier_num = AB8500_IT_LATCHHIER_NUM;
d6255529 1609 }
8c4203cb 1610 ab8500->mask = devm_kzalloc(&pdev->dev, ab8500->mask_size, GFP_KERNEL);
2ced445e
LW		 1611 if (!ab8500->mask)
1612 return -ENOMEM;
8c4203cb
LJ		 1613 ab8500->oldmask = devm_kzalloc(&pdev->dev, ab8500->mask_size, GFP_KERNEL);
1614 if (!ab8500->oldmask)
1615 return -ENOMEM;
1616
e5c238c3
MW		 1617 /*
1618 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
1619 * 0x01 Swoff bit programming
1620 * 0x02 Thermal protection activation
1621 * 0x04 Vbat lower then BattOk falling threshold
1622 * 0x08 Watchdog expired
1623 * 0x10 Non presence of 32kHz clock
1624 * 0x20 Battery level lower than power on reset threshold
1625 * 0x40 Power on key 1 pressed longer than 10 seconds
1626 * 0x80 DB8500 thermal shutdown
1627 */
1628
1629 ret = get_register_interruptible(ab8500, AB8500_RTC,
1630 AB8500_SWITCH_OFF_STATUS, &value);
1631 if (ret < 0)
1632 return ret;
b04c530c
JA		 1633 dev_info(ab8500->dev, "switch off cause(s) (%#x): ", value);
1634
1635 if (value) {
1636 for (i = 0; i < ARRAY_SIZE(switch_off_status); i++) {
1637 if (value & 1)
1638 printk(KERN_CONT " \"%s\"",
1639 switch_off_status[i]);
1640 value = value >> 1;
1641
1642 }
1643 printk(KERN_CONT "\n");
1644 } else {
1645 printk(KERN_CONT " None\n");
1646 }
abee26cd
MW		 1647 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
1648 AB8500_TURN_ON_STATUS, &value);
1649 if (ret < 0)
1650 return ret;
1651 dev_info(ab8500->dev, "turn on reason(s) (%#x): ", value);
1652
1653 if (value) {
1654 for (i = 0; i < ARRAY_SIZE(turn_on_status); i++) {
1655 if (value & 1)
1656 printk("\"%s\" ", turn_on_status[i]);
1657 value = value >> 1;
1658 }
1659 printk("\n");
1660 } else {
1661 printk("None\n");
1662 }
e5c238c3 1663
62579266
RV		 1664 if (plat && plat->init)
1665 plat->init(ab8500);
abee26cd 1666
f04a9d8a
RK		 1667 if (is_ab9540(ab8500)) {
1668 ret = get_register_interruptible(ab8500, AB8500_CHARGER,
1669 AB8500_CH_USBCH_STAT1_REG, &value);
1670 if (ret < 0)
1671 return ret;
1672 if ((value & VBUS_DET_DBNC1) && (value & VBUS_DET_DBNC100))
1673 ab8500_override_turn_on_stat(~AB8500_POW_KEY_1_ON,
1674 AB8500_VBUS_DET);
1675 }
62579266
RV		 1676
1677 /* Clear and mask all interrupts */
2ced445e 1678 for (i = 0; i < ab8500->mask_size; i++) {
0f620837
LW		 1679 /*
1680 * Interrupt register 12 doesn't exist prior to AB8500 version
1681 * 2.0
1682 */
1683 if (ab8500->irq_reg_offset[i] == 11 &&
1684 is_ab8500_1p1_or_earlier(ab8500))
92d50a41 1685 continue;
62579266 1686
3e1a498f
LJ		 1687 if (ab8500->irq_reg_offset[i] < 0)
1688 continue;
1689
47c16975 1690 get_register_interruptible(ab8500, AB8500_INTERRUPT,
2ced445e 1691 AB8500_IT_LATCH1_REG + ab8500->irq_reg_offset[i],
92d50a41 1692 &value);
47c16975 1693 set_register_interruptible(ab8500, AB8500_INTERRUPT,
2ced445e 1694 AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i], 0xff);
62579266
RV		 1695 }
1696
47c16975
MW		 1697 ret = abx500_register_ops(ab8500->dev, &ab8500_ops);
1698 if (ret)
8c4203cb 1699 return ret;
47c16975 1700
2ced445e 1701 for (i = 0; i < ab8500->mask_size; i++)
62579266
RV		 1702 ab8500->mask[i] = ab8500->oldmask[i] = 0xff;
1703
06e589ef
LJ		 1704 ret = ab8500_irq_init(ab8500, np);
1705 if (ret)
8c4203cb 1706 return ret;
62579266 1707
f348fefd
DS		 1708 ret = devm_request_threaded_irq(&pdev->dev, ab8500->irq, NULL,
1709 ab8500_hierarchical_irq,
1710 IRQF_ONESHOT | IRQF_NO_SUSPEND,
1711 "ab8500", ab8500);
1712 if (ret)
1713 return ret;
62579266 1714
bad76991
LJ		 1715 if (is_ab9540(ab8500))
1716 ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs,
1717 ARRAY_SIZE(ab9540_devs), NULL,
55692af5 1718 ab8500->irq_base, ab8500->domain);
c0eda9ae
LJ		 1719 else if (is_ab8540(ab8500))
1720 ret = mfd_add_devices(ab8500->dev, 0, ab8540_devs,
1721 ARRAY_SIZE(ab8540_devs), NULL,
1722 ab8500->irq_base, ab8500->domain);
1723 else if (is_ab8505(ab8500))
1724 ret = mfd_add_devices(ab8500->dev, 0, ab8505_devs,
1725 ARRAY_SIZE(ab8505_devs), NULL,
1726 ab8500->irq_base, ab8500->domain);
bad76991
LJ		 1727 else
1728 ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs,
1729 ARRAY_SIZE(ab8500_devs), NULL,
55692af5 1730 ab8500->irq_base, ab8500->domain);
bad76991 1731 if (ret)
8c4203cb 1732 return ret;
44f72e53 1733
6ef9418c
RA		 1734 if (!no_bm) {
1735 /* Add battery management devices */
1736 ret = mfd_add_devices(ab8500->dev, 0, ab8500_bm_devs,
1737 ARRAY_SIZE(ab8500_bm_devs), NULL,
55692af5 1738 ab8500->irq_base, ab8500->domain);
6ef9418c
RA		 1739 if (ret)
1740 dev_err(ab8500->dev, "error adding bm devices\n");
1741 }
1742
e436ddff
LJ		 1743 if (((is_ab8505(ab8500) || is_ab9540(ab8500)) &&
1744 ab8500->chip_id >= AB8500_CUT2P0) || is_ab8540(ab8500))
d6255529
LW		 1745 ret = sysfs_create_group(&ab8500->dev->kobj,
1746 &ab9540_attr_group);
1747 else
1748 ret = sysfs_create_group(&ab8500->dev->kobj,
1749 &ab8500_attr_group);
93ff722e
LJ		 1750
1751 if ((is_ab8505(ab8500) || is_ab9540(ab8500)) &&
1752 ab8500->chip_id >= AB8500_CUT2P0)
1753 ret = sysfs_create_group(&ab8500->dev->kobj,
1754 &ab8505_attr_group);
1755
cca69b67
MW		 1756 if (ret)
1757 dev_err(ab8500->dev, "error creating sysfs entries\n");
06e589ef
LJ		 1758
1759 return ret;
62579266
RV		 1760}
1761
4740f73f 1762static int ab8500_remove(struct platform_device *pdev)
62579266 1763{
d28f1db8
LJ		 1764 struct ab8500 *ab8500 = platform_get_drvdata(pdev);
1765
e436ddff
LJ		 1766 if (((is_ab8505(ab8500) || is_ab9540(ab8500)) &&
1767 ab8500->chip_id >= AB8500_CUT2P0) || is_ab8540(ab8500))
d6255529
LW		 1768 sysfs_remove_group(&ab8500->dev->kobj, &ab9540_attr_group);
1769 else
1770 sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group);
06e589ef 1771
93ff722e
LJ		 1772 if ((is_ab8505(ab8500) || is_ab9540(ab8500)) &&
1773 ab8500->chip_id >= AB8500_CUT2P0)
1774 sysfs_remove_group(&ab8500->dev->kobj, &ab8505_attr_group);
1775
62579266 1776 mfd_remove_devices(ab8500->dev);
62579266
RV		 1777
1778 return 0;
1779}
1780
d28f1db8
LJ		 1781static const struct platform_device_id ab8500_id[] = {
1782 { "ab8500-core", AB8500_VERSION_AB8500 },
1783 { "ab8505-i2c", AB8500_VERSION_AB8505 },
1784 { "ab9540-i2c", AB8500_VERSION_AB9540 },
1785 { "ab8540-i2c", AB8500_VERSION_AB8540 },
1786 { }
1787};
1788
1789static struct platform_driver ab8500_core_driver = {
1790 .driver = {
1791 .name = "ab8500-core",
1792 .owner = THIS_MODULE,
1793 },
1794 .probe = ab8500_probe,
84449216 1795 .remove = ab8500_remove,
d28f1db8
LJ		 1796 .id_table = ab8500_id,
1797};
1798
1799static int __init ab8500_core_init(void)
1800{
1801 return platform_driver_register(&ab8500_core_driver);
1802}
1803
1804static void __exit ab8500_core_exit(void)
1805{
1806 platform_driver_unregister(&ab8500_core_driver);
1807}
ba7cbc3e 1808core_initcall(ab8500_core_init);
d28f1db8
LJ		 1809module_exit(ab8500_core_exit);
1810
adceed62 1811MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent");
62579266
RV		 1812MODULE_DESCRIPTION("AB8500 MFD core");
1813MODULE_LICENSE("GPL v2");
Linux 6.x block layer and io_uring tree(s)