Commit | Line | Data |
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62579266 RV |
1 | /* |
2 | * Copyright (C) ST-Ericsson SA 2010 | |
3 | * | |
4 | * License Terms: GNU General Public License v2 | |
5 | * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> | |
6 | * Author: Rabin Vincent <rabin.vincent@stericsson.com> | |
adceed62 | 7 | * Author: Mattias Wallin <mattias.wallin@stericsson.com> |
62579266 RV |
8 | */ |
9 | ||
10 | #include <linux/kernel.h> | |
11 | #include <linux/slab.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/irq.h> | |
06e589ef | 14 | #include <linux/irqdomain.h> |
62579266 RV |
15 | #include <linux/delay.h> |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/module.h> | |
18 | #include <linux/platform_device.h> | |
19 | #include <linux/mfd/core.h> | |
47c16975 | 20 | #include <linux/mfd/abx500.h> |
ee66e653 | 21 | #include <linux/mfd/abx500/ab8500.h> |
d28f1db8 | 22 | #include <linux/mfd/dbx500-prcmu.h> |
549931f9 | 23 | #include <linux/regulator/ab8500.h> |
6bc4a568 LJ |
24 | #include <linux/of.h> |
25 | #include <linux/of_device.h> | |
62579266 RV |
26 | |
27 | /* | |
28 | * Interrupt register offsets | |
29 | * Bank : 0x0E | |
30 | */ | |
47c16975 MW |
31 | #define AB8500_IT_SOURCE1_REG 0x00 |
32 | #define AB8500_IT_SOURCE2_REG 0x01 | |
33 | #define AB8500_IT_SOURCE3_REG 0x02 | |
34 | #define AB8500_IT_SOURCE4_REG 0x03 | |
35 | #define AB8500_IT_SOURCE5_REG 0x04 | |
36 | #define AB8500_IT_SOURCE6_REG 0x05 | |
37 | #define AB8500_IT_SOURCE7_REG 0x06 | |
38 | #define AB8500_IT_SOURCE8_REG 0x07 | |
d6255529 | 39 | #define AB9540_IT_SOURCE13_REG 0x0C |
47c16975 MW |
40 | #define AB8500_IT_SOURCE19_REG 0x12 |
41 | #define AB8500_IT_SOURCE20_REG 0x13 | |
42 | #define AB8500_IT_SOURCE21_REG 0x14 | |
43 | #define AB8500_IT_SOURCE22_REG 0x15 | |
44 | #define AB8500_IT_SOURCE23_REG 0x16 | |
45 | #define AB8500_IT_SOURCE24_REG 0x17 | |
62579266 RV |
46 | |
47 | /* | |
48 | * latch registers | |
49 | */ | |
47c16975 MW |
50 | #define AB8500_IT_LATCH1_REG 0x20 |
51 | #define AB8500_IT_LATCH2_REG 0x21 | |
52 | #define AB8500_IT_LATCH3_REG 0x22 | |
53 | #define AB8500_IT_LATCH4_REG 0x23 | |
54 | #define AB8500_IT_LATCH5_REG 0x24 | |
55 | #define AB8500_IT_LATCH6_REG 0x25 | |
56 | #define AB8500_IT_LATCH7_REG 0x26 | |
57 | #define AB8500_IT_LATCH8_REG 0x27 | |
58 | #define AB8500_IT_LATCH9_REG 0x28 | |
59 | #define AB8500_IT_LATCH10_REG 0x29 | |
92d50a41 | 60 | #define AB8500_IT_LATCH12_REG 0x2B |
d6255529 | 61 | #define AB9540_IT_LATCH13_REG 0x2C |
47c16975 MW |
62 | #define AB8500_IT_LATCH19_REG 0x32 |
63 | #define AB8500_IT_LATCH20_REG 0x33 | |
64 | #define AB8500_IT_LATCH21_REG 0x34 | |
65 | #define AB8500_IT_LATCH22_REG 0x35 | |
66 | #define AB8500_IT_LATCH23_REG 0x36 | |
67 | #define AB8500_IT_LATCH24_REG 0x37 | |
62579266 RV |
68 | |
69 | /* | |
70 | * mask registers | |
71 | */ | |
72 | ||
47c16975 MW |
73 | #define AB8500_IT_MASK1_REG 0x40 |
74 | #define AB8500_IT_MASK2_REG 0x41 | |
75 | #define AB8500_IT_MASK3_REG 0x42 | |
76 | #define AB8500_IT_MASK4_REG 0x43 | |
77 | #define AB8500_IT_MASK5_REG 0x44 | |
78 | #define AB8500_IT_MASK6_REG 0x45 | |
79 | #define AB8500_IT_MASK7_REG 0x46 | |
80 | #define AB8500_IT_MASK8_REG 0x47 | |
81 | #define AB8500_IT_MASK9_REG 0x48 | |
82 | #define AB8500_IT_MASK10_REG 0x49 | |
83 | #define AB8500_IT_MASK11_REG 0x4A | |
84 | #define AB8500_IT_MASK12_REG 0x4B | |
85 | #define AB8500_IT_MASK13_REG 0x4C | |
86 | #define AB8500_IT_MASK14_REG 0x4D | |
87 | #define AB8500_IT_MASK15_REG 0x4E | |
88 | #define AB8500_IT_MASK16_REG 0x4F | |
89 | #define AB8500_IT_MASK17_REG 0x50 | |
90 | #define AB8500_IT_MASK18_REG 0x51 | |
91 | #define AB8500_IT_MASK19_REG 0x52 | |
92 | #define AB8500_IT_MASK20_REG 0x53 | |
93 | #define AB8500_IT_MASK21_REG 0x54 | |
94 | #define AB8500_IT_MASK22_REG 0x55 | |
95 | #define AB8500_IT_MASK23_REG 0x56 | |
96 | #define AB8500_IT_MASK24_REG 0x57 | |
97 | ||
7ccfe9b1 MJ |
98 | /* |
99 | * latch hierarchy registers | |
100 | */ | |
101 | #define AB8500_IT_LATCHHIER1_REG 0x60 | |
102 | #define AB8500_IT_LATCHHIER2_REG 0x61 | |
103 | #define AB8500_IT_LATCHHIER3_REG 0x62 | |
104 | ||
105 | #define AB8500_IT_LATCHHIER_NUM 3 | |
106 | ||
47c16975 | 107 | #define AB8500_REV_REG 0x80 |
0f620837 | 108 | #define AB8500_IC_NAME_REG 0x82 |
e5c238c3 | 109 | #define AB8500_SWITCH_OFF_STATUS 0x00 |
62579266 | 110 | |
b4a31037 AL |
111 | #define AB8500_TURN_ON_STATUS 0x00 |
112 | ||
6ef9418c RA |
113 | static bool no_bm; /* No battery management */ |
114 | module_param(no_bm, bool, S_IRUGO); | |
115 | ||
d6255529 LW |
116 | #define AB9540_MODEM_CTRL2_REG 0x23 |
117 | #define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT BIT(2) | |
118 | ||
62579266 RV |
119 | /* |
120 | * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt | |
2ced445e LW |
121 | * numbers are indexed into this array with (num / 8). The interupts are |
122 | * defined in linux/mfd/ab8500.h | |
62579266 RV |
123 | * |
124 | * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at | |
125 | * offset 0. | |
126 | */ | |
2ced445e | 127 | /* AB8500 support */ |
62579266 | 128 | static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = { |
92d50a41 | 129 | 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, |
62579266 RV |
130 | }; |
131 | ||
d6255529 LW |
132 | /* AB9540 support */ |
133 | static const int ab9540_irq_regoffset[AB9540_NUM_IRQ_REGS] = { | |
134 | 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 12, 13, 24, | |
135 | }; | |
136 | ||
0f620837 LW |
137 | static const char ab8500_version_str[][7] = { |
138 | [AB8500_VERSION_AB8500] = "AB8500", | |
139 | [AB8500_VERSION_AB8505] = "AB8505", | |
140 | [AB8500_VERSION_AB9540] = "AB9540", | |
141 | [AB8500_VERSION_AB8540] = "AB8540", | |
142 | }; | |
143 | ||
822672a7 | 144 | static int ab8500_prcmu_write(struct ab8500 *ab8500, u16 addr, u8 data) |
d28f1db8 LJ |
145 | { |
146 | int ret; | |
147 | ||
148 | ret = prcmu_abb_write((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1); | |
149 | if (ret < 0) | |
150 | dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); | |
151 | return ret; | |
152 | } | |
153 | ||
822672a7 | 154 | static int ab8500_prcmu_write_masked(struct ab8500 *ab8500, u16 addr, u8 mask, |
d28f1db8 LJ |
155 | u8 data) |
156 | { | |
157 | int ret; | |
158 | ||
159 | ret = prcmu_abb_write_masked((u8)(addr >> 8), (u8)(addr & 0xFF), &data, | |
160 | &mask, 1); | |
161 | if (ret < 0) | |
162 | dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); | |
163 | return ret; | |
164 | } | |
165 | ||
822672a7 | 166 | static int ab8500_prcmu_read(struct ab8500 *ab8500, u16 addr) |
d28f1db8 LJ |
167 | { |
168 | int ret; | |
169 | u8 data; | |
170 | ||
171 | ret = prcmu_abb_read((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1); | |
172 | if (ret < 0) { | |
173 | dev_err(ab8500->dev, "prcmu i2c error %d\n", ret); | |
174 | return ret; | |
175 | } | |
176 | return (int)data; | |
177 | } | |
178 | ||
47c16975 MW |
179 | static int ab8500_get_chip_id(struct device *dev) |
180 | { | |
6bce7bf1 MW |
181 | struct ab8500 *ab8500; |
182 | ||
183 | if (!dev) | |
184 | return -EINVAL; | |
185 | ab8500 = dev_get_drvdata(dev->parent); | |
186 | return ab8500 ? (int)ab8500->chip_id : -EINVAL; | |
47c16975 MW |
187 | } |
188 | ||
189 | static int set_register_interruptible(struct ab8500 *ab8500, u8 bank, | |
190 | u8 reg, u8 data) | |
62579266 RV |
191 | { |
192 | int ret; | |
47c16975 MW |
193 | /* |
194 | * Put the u8 bank and u8 register together into a an u16. | |
195 | * The bank on higher 8 bits and register in lower 8 bits. | |
196 | * */ | |
197 | u16 addr = ((u16)bank) << 8 | reg; | |
62579266 RV |
198 | |
199 | dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data); | |
200 | ||
392cbd1e | 201 | mutex_lock(&ab8500->lock); |
47c16975 | 202 | |
62579266 RV |
203 | ret = ab8500->write(ab8500, addr, data); |
204 | if (ret < 0) | |
205 | dev_err(ab8500->dev, "failed to write reg %#x: %d\n", | |
206 | addr, ret); | |
47c16975 | 207 | mutex_unlock(&ab8500->lock); |
62579266 RV |
208 | |
209 | return ret; | |
210 | } | |
211 | ||
47c16975 MW |
212 | static int ab8500_set_register(struct device *dev, u8 bank, |
213 | u8 reg, u8 value) | |
62579266 | 214 | { |
112a80d2 | 215 | int ret; |
47c16975 | 216 | struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); |
62579266 | 217 | |
112a80d2 JA |
218 | atomic_inc(&ab8500->transfer_ongoing); |
219 | ret = set_register_interruptible(ab8500, bank, reg, value); | |
220 | atomic_dec(&ab8500->transfer_ongoing); | |
221 | return ret; | |
62579266 | 222 | } |
62579266 | 223 | |
47c16975 MW |
224 | static int get_register_interruptible(struct ab8500 *ab8500, u8 bank, |
225 | u8 reg, u8 *value) | |
62579266 RV |
226 | { |
227 | int ret; | |
47c16975 MW |
228 | /* put the u8 bank and u8 reg together into a an u16. |
229 | * bank on higher 8 bits and reg in lower */ | |
230 | u16 addr = ((u16)bank) << 8 | reg; | |
231 | ||
392cbd1e | 232 | mutex_lock(&ab8500->lock); |
62579266 RV |
233 | |
234 | ret = ab8500->read(ab8500, addr); | |
235 | if (ret < 0) | |
236 | dev_err(ab8500->dev, "failed to read reg %#x: %d\n", | |
237 | addr, ret); | |
47c16975 MW |
238 | else |
239 | *value = ret; | |
62579266 | 240 | |
47c16975 | 241 | mutex_unlock(&ab8500->lock); |
62579266 RV |
242 | dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret); |
243 | ||
244 | return ret; | |
245 | } | |
246 | ||
47c16975 MW |
247 | static int ab8500_get_register(struct device *dev, u8 bank, |
248 | u8 reg, u8 *value) | |
62579266 | 249 | { |
112a80d2 | 250 | int ret; |
47c16975 | 251 | struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); |
62579266 | 252 | |
112a80d2 JA |
253 | atomic_inc(&ab8500->transfer_ongoing); |
254 | ret = get_register_interruptible(ab8500, bank, reg, value); | |
255 | atomic_dec(&ab8500->transfer_ongoing); | |
256 | return ret; | |
62579266 | 257 | } |
47c16975 MW |
258 | |
259 | static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank, | |
260 | u8 reg, u8 bitmask, u8 bitvalues) | |
62579266 RV |
261 | { |
262 | int ret; | |
47c16975 MW |
263 | /* put the u8 bank and u8 reg together into a an u16. |
264 | * bank on higher 8 bits and reg in lower */ | |
265 | u16 addr = ((u16)bank) << 8 | reg; | |
62579266 | 266 | |
392cbd1e | 267 | mutex_lock(&ab8500->lock); |
62579266 | 268 | |
bc628fd1 MN |
269 | if (ab8500->write_masked == NULL) { |
270 | u8 data; | |
62579266 | 271 | |
bc628fd1 MN |
272 | ret = ab8500->read(ab8500, addr); |
273 | if (ret < 0) { | |
274 | dev_err(ab8500->dev, "failed to read reg %#x: %d\n", | |
275 | addr, ret); | |
276 | goto out; | |
277 | } | |
62579266 | 278 | |
bc628fd1 MN |
279 | data = (u8)ret; |
280 | data = (~bitmask & data) | (bitmask & bitvalues); | |
281 | ||
282 | ret = ab8500->write(ab8500, addr, data); | |
283 | if (ret < 0) | |
284 | dev_err(ab8500->dev, "failed to write reg %#x: %d\n", | |
285 | addr, ret); | |
62579266 | 286 | |
bc628fd1 MN |
287 | dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr, |
288 | data); | |
289 | goto out; | |
290 | } | |
291 | ret = ab8500->write_masked(ab8500, addr, bitmask, bitvalues); | |
292 | if (ret < 0) | |
293 | dev_err(ab8500->dev, "failed to modify reg %#x: %d\n", addr, | |
294 | ret); | |
62579266 RV |
295 | out: |
296 | mutex_unlock(&ab8500->lock); | |
297 | return ret; | |
298 | } | |
47c16975 MW |
299 | |
300 | static int ab8500_mask_and_set_register(struct device *dev, | |
301 | u8 bank, u8 reg, u8 bitmask, u8 bitvalues) | |
302 | { | |
112a80d2 | 303 | int ret; |
47c16975 MW |
304 | struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); |
305 | ||
112a80d2 JA |
306 | atomic_inc(&ab8500->transfer_ongoing); |
307 | ret= mask_and_set_register_interruptible(ab8500, bank, reg, | |
308 | bitmask, bitvalues); | |
309 | atomic_dec(&ab8500->transfer_ongoing); | |
310 | return ret; | |
47c16975 MW |
311 | } |
312 | ||
313 | static struct abx500_ops ab8500_ops = { | |
314 | .get_chip_id = ab8500_get_chip_id, | |
315 | .get_register = ab8500_get_register, | |
316 | .set_register = ab8500_set_register, | |
317 | .get_register_page = NULL, | |
318 | .set_register_page = NULL, | |
319 | .mask_and_set_register = ab8500_mask_and_set_register, | |
320 | .event_registers_startup_state_get = NULL, | |
321 | .startup_irq_enabled = NULL, | |
322 | }; | |
62579266 | 323 | |
9505a0a0 | 324 | static void ab8500_irq_lock(struct irq_data *data) |
62579266 | 325 | { |
9505a0a0 | 326 | struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); |
62579266 RV |
327 | |
328 | mutex_lock(&ab8500->irq_lock); | |
112a80d2 | 329 | atomic_inc(&ab8500->transfer_ongoing); |
62579266 RV |
330 | } |
331 | ||
9505a0a0 | 332 | static void ab8500_irq_sync_unlock(struct irq_data *data) |
62579266 | 333 | { |
9505a0a0 | 334 | struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); |
62579266 RV |
335 | int i; |
336 | ||
2ced445e | 337 | for (i = 0; i < ab8500->mask_size; i++) { |
62579266 RV |
338 | u8 old = ab8500->oldmask[i]; |
339 | u8 new = ab8500->mask[i]; | |
340 | int reg; | |
341 | ||
342 | if (new == old) | |
343 | continue; | |
344 | ||
0f620837 LW |
345 | /* |
346 | * Interrupt register 12 doesn't exist prior to AB8500 version | |
347 | * 2.0 | |
348 | */ | |
349 | if (ab8500->irq_reg_offset[i] == 11 && | |
350 | is_ab8500_1p1_or_earlier(ab8500)) | |
92d50a41 MW |
351 | continue; |
352 | ||
62579266 RV |
353 | ab8500->oldmask[i] = new; |
354 | ||
2ced445e | 355 | reg = AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i]; |
47c16975 | 356 | set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new); |
62579266 | 357 | } |
112a80d2 | 358 | atomic_dec(&ab8500->transfer_ongoing); |
62579266 RV |
359 | mutex_unlock(&ab8500->irq_lock); |
360 | } | |
361 | ||
9505a0a0 | 362 | static void ab8500_irq_mask(struct irq_data *data) |
62579266 | 363 | { |
9505a0a0 | 364 | struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); |
06e589ef | 365 | int offset = data->hwirq; |
62579266 RV |
366 | int index = offset / 8; |
367 | int mask = 1 << (offset % 8); | |
368 | ||
369 | ab8500->mask[index] |= mask; | |
370 | } | |
371 | ||
9505a0a0 | 372 | static void ab8500_irq_unmask(struct irq_data *data) |
62579266 | 373 | { |
9505a0a0 | 374 | struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); |
06e589ef | 375 | int offset = data->hwirq; |
62579266 RV |
376 | int index = offset / 8; |
377 | int mask = 1 << (offset % 8); | |
378 | ||
379 | ab8500->mask[index] &= ~mask; | |
380 | } | |
381 | ||
382 | static struct irq_chip ab8500_irq_chip = { | |
383 | .name = "ab8500", | |
9505a0a0 MB |
384 | .irq_bus_lock = ab8500_irq_lock, |
385 | .irq_bus_sync_unlock = ab8500_irq_sync_unlock, | |
386 | .irq_mask = ab8500_irq_mask, | |
e6f9306e | 387 | .irq_disable = ab8500_irq_mask, |
9505a0a0 | 388 | .irq_unmask = ab8500_irq_unmask, |
62579266 RV |
389 | }; |
390 | ||
7ccfe9b1 MJ |
391 | static int ab8500_handle_hierarchical_line(struct ab8500 *ab8500, |
392 | int latch_offset, u8 latch_val) | |
393 | { | |
394 | int int_bit = __ffs(latch_val); | |
395 | int line, i; | |
396 | ||
397 | do { | |
398 | int_bit = __ffs(latch_val); | |
399 | ||
400 | for (i = 0; i < ab8500->mask_size; i++) | |
401 | if (ab8500->irq_reg_offset[i] == latch_offset) | |
402 | break; | |
403 | ||
404 | if (i >= ab8500->mask_size) { | |
405 | dev_err(ab8500->dev, "Register offset 0x%2x not declared\n", | |
406 | latch_offset); | |
407 | return -ENXIO; | |
408 | } | |
409 | ||
410 | line = (i << 3) + int_bit; | |
411 | latch_val &= ~(1 << int_bit); | |
412 | ||
413 | handle_nested_irq(ab8500->irq_base + line); | |
414 | } while (latch_val); | |
415 | ||
416 | return 0; | |
417 | } | |
418 | ||
419 | static int ab8500_handle_hierarchical_latch(struct ab8500 *ab8500, | |
420 | int hier_offset, u8 hier_val) | |
421 | { | |
422 | int latch_bit, status; | |
423 | u8 latch_offset, latch_val; | |
424 | ||
425 | do { | |
426 | latch_bit = __ffs(hier_val); | |
427 | latch_offset = (hier_offset << 3) + latch_bit; | |
428 | ||
429 | /* Fix inconsistent ITFromLatch25 bit mapping... */ | |
430 | if (unlikely(latch_offset == 17)) | |
431 | latch_offset = 24; | |
432 | ||
433 | status = get_register_interruptible(ab8500, | |
434 | AB8500_INTERRUPT, | |
435 | AB8500_IT_LATCH1_REG + latch_offset, | |
436 | &latch_val); | |
437 | if (status < 0 || latch_val == 0) | |
438 | goto discard; | |
439 | ||
440 | status = ab8500_handle_hierarchical_line(ab8500, | |
441 | latch_offset, latch_val); | |
442 | if (status < 0) | |
443 | return status; | |
444 | discard: | |
445 | hier_val &= ~(1 << latch_bit); | |
446 | } while (hier_val); | |
447 | ||
448 | return 0; | |
449 | } | |
450 | ||
451 | static irqreturn_t ab8500_hierarchical_irq(int irq, void *dev) | |
452 | { | |
453 | struct ab8500 *ab8500 = dev; | |
454 | u8 i; | |
455 | ||
456 | dev_vdbg(ab8500->dev, "interrupt\n"); | |
457 | ||
458 | /* Hierarchical interrupt version */ | |
459 | for (i = 0; i < AB8500_IT_LATCHHIER_NUM; i++) { | |
460 | int status; | |
461 | u8 hier_val; | |
462 | ||
463 | status = get_register_interruptible(ab8500, AB8500_INTERRUPT, | |
464 | AB8500_IT_LATCHHIER1_REG + i, &hier_val); | |
465 | if (status < 0 || hier_val == 0) | |
466 | continue; | |
467 | ||
468 | status = ab8500_handle_hierarchical_latch(ab8500, i, hier_val); | |
469 | if (status < 0) | |
470 | break; | |
471 | } | |
472 | return IRQ_HANDLED; | |
473 | } | |
474 | ||
80633f05 LJ |
475 | /** |
476 | * ab8500_irq_get_virq(): Map an interrupt on a chip to a virtual IRQ | |
477 | * | |
478 | * @ab8500: ab8500_irq controller to operate on. | |
479 | * @irq: index of the interrupt requested in the chip IRQs | |
480 | * | |
481 | * Useful for drivers to request their own IRQs. | |
482 | */ | |
483 | static int ab8500_irq_get_virq(struct ab8500 *ab8500, int irq) | |
484 | { | |
485 | if (!ab8500) | |
486 | return -EINVAL; | |
487 | ||
488 | return irq_create_mapping(ab8500->domain, irq); | |
489 | } | |
490 | ||
62579266 RV |
491 | static irqreturn_t ab8500_irq(int irq, void *dev) |
492 | { | |
493 | struct ab8500 *ab8500 = dev; | |
494 | int i; | |
495 | ||
496 | dev_vdbg(ab8500->dev, "interrupt\n"); | |
497 | ||
112a80d2 JA |
498 | atomic_inc(&ab8500->transfer_ongoing); |
499 | ||
2ced445e LW |
500 | for (i = 0; i < ab8500->mask_size; i++) { |
501 | int regoffset = ab8500->irq_reg_offset[i]; | |
62579266 | 502 | int status; |
47c16975 | 503 | u8 value; |
62579266 | 504 | |
0f620837 LW |
505 | /* |
506 | * Interrupt register 12 doesn't exist prior to AB8500 version | |
507 | * 2.0 | |
508 | */ | |
509 | if (regoffset == 11 && is_ab8500_1p1_or_earlier(ab8500)) | |
92d50a41 MW |
510 | continue; |
511 | ||
47c16975 MW |
512 | status = get_register_interruptible(ab8500, AB8500_INTERRUPT, |
513 | AB8500_IT_LATCH1_REG + regoffset, &value); | |
514 | if (status < 0 || value == 0) | |
62579266 RV |
515 | continue; |
516 | ||
517 | do { | |
88aec4f7 | 518 | int bit = __ffs(value); |
62579266 | 519 | int line = i * 8 + bit; |
0a37fc56 | 520 | int virq = ab8500_irq_get_virq(ab8500, line); |
62579266 | 521 | |
0a37fc56 | 522 | handle_nested_irq(virq); |
47c16975 | 523 | value &= ~(1 << bit); |
112a80d2 | 524 | |
47c16975 | 525 | } while (value); |
62579266 | 526 | } |
112a80d2 | 527 | atomic_dec(&ab8500->transfer_ongoing); |
62579266 RV |
528 | return IRQ_HANDLED; |
529 | } | |
530 | ||
06e589ef LJ |
531 | static int ab8500_irq_map(struct irq_domain *d, unsigned int virq, |
532 | irq_hw_number_t hwirq) | |
533 | { | |
534 | struct ab8500 *ab8500 = d->host_data; | |
535 | ||
536 | if (!ab8500) | |
537 | return -EINVAL; | |
538 | ||
539 | irq_set_chip_data(virq, ab8500); | |
540 | irq_set_chip_and_handler(virq, &ab8500_irq_chip, | |
541 | handle_simple_irq); | |
542 | irq_set_nested_thread(virq, 1); | |
62579266 | 543 | #ifdef CONFIG_ARM |
06e589ef | 544 | set_irq_flags(virq, IRQF_VALID); |
62579266 | 545 | #else |
06e589ef | 546 | irq_set_noprobe(virq); |
62579266 | 547 | #endif |
62579266 RV |
548 | |
549 | return 0; | |
550 | } | |
551 | ||
06e589ef LJ |
552 | static struct irq_domain_ops ab8500_irq_ops = { |
553 | .map = ab8500_irq_map, | |
554 | .xlate = irq_domain_xlate_twocell, | |
555 | }; | |
556 | ||
557 | static int ab8500_irq_init(struct ab8500 *ab8500, struct device_node *np) | |
62579266 | 558 | { |
2ced445e LW |
559 | int num_irqs; |
560 | ||
d6255529 LW |
561 | if (is_ab9540(ab8500)) |
562 | num_irqs = AB9540_NR_IRQS; | |
a982362c BJ |
563 | else if (is_ab8505(ab8500)) |
564 | num_irqs = AB8505_NR_IRQS; | |
d6255529 LW |
565 | else |
566 | num_irqs = AB8500_NR_IRQS; | |
62579266 | 567 | |
f1d11f39 LW |
568 | /* If ->irq_base is zero this will give a linear mapping */ |
569 | ab8500->domain = irq_domain_add_simple(NULL, | |
570 | num_irqs, ab8500->irq_base, | |
571 | &ab8500_irq_ops, ab8500); | |
06e589ef LJ |
572 | |
573 | if (!ab8500->domain) { | |
574 | dev_err(ab8500->dev, "Failed to create irqdomain\n"); | |
575 | return -ENOSYS; | |
576 | } | |
577 | ||
578 | return 0; | |
62579266 RV |
579 | } |
580 | ||
112a80d2 JA |
581 | int ab8500_suspend(struct ab8500 *ab8500) |
582 | { | |
583 | if (atomic_read(&ab8500->transfer_ongoing)) | |
584 | return -EINVAL; | |
585 | else | |
586 | return 0; | |
587 | } | |
588 | ||
d6255529 | 589 | /* AB8500 GPIO Resources */ |
5cef8df5 | 590 | static struct resource __devinitdata ab8500_gpio_resources[] = { |
0cb3fcd7 BB |
591 | { |
592 | .name = "GPIO_INT6", | |
593 | .start = AB8500_INT_GPIO6R, | |
594 | .end = AB8500_INT_GPIO41F, | |
595 | .flags = IORESOURCE_IRQ, | |
596 | } | |
597 | }; | |
598 | ||
d6255529 LW |
599 | /* AB9540 GPIO Resources */ |
600 | static struct resource __devinitdata ab9540_gpio_resources[] = { | |
601 | { | |
602 | .name = "GPIO_INT6", | |
603 | .start = AB8500_INT_GPIO6R, | |
604 | .end = AB8500_INT_GPIO41F, | |
605 | .flags = IORESOURCE_IRQ, | |
606 | }, | |
607 | { | |
608 | .name = "GPIO_INT14", | |
609 | .start = AB9540_INT_GPIO50R, | |
610 | .end = AB9540_INT_GPIO54R, | |
611 | .flags = IORESOURCE_IRQ, | |
612 | }, | |
613 | { | |
614 | .name = "GPIO_INT15", | |
615 | .start = AB9540_INT_GPIO50F, | |
616 | .end = AB9540_INT_GPIO54F, | |
617 | .flags = IORESOURCE_IRQ, | |
618 | } | |
619 | }; | |
620 | ||
a9e9ce4c | 621 | static struct resource ab8500_gpadc_resources[] = { |
62579266 RV |
622 | { |
623 | .name = "HW_CONV_END", | |
624 | .start = AB8500_INT_GP_HW_ADC_CONV_END, | |
625 | .end = AB8500_INT_GP_HW_ADC_CONV_END, | |
626 | .flags = IORESOURCE_IRQ, | |
627 | }, | |
628 | { | |
629 | .name = "SW_CONV_END", | |
630 | .start = AB8500_INT_GP_SW_ADC_CONV_END, | |
631 | .end = AB8500_INT_GP_SW_ADC_CONV_END, | |
632 | .flags = IORESOURCE_IRQ, | |
633 | }, | |
634 | }; | |
635 | ||
a9e9ce4c | 636 | static struct resource ab8500_rtc_resources[] = { |
62579266 RV |
637 | { |
638 | .name = "60S", | |
639 | .start = AB8500_INT_RTC_60S, | |
640 | .end = AB8500_INT_RTC_60S, | |
641 | .flags = IORESOURCE_IRQ, | |
642 | }, | |
643 | { | |
644 | .name = "ALARM", | |
645 | .start = AB8500_INT_RTC_ALARM, | |
646 | .end = AB8500_INT_RTC_ALARM, | |
647 | .flags = IORESOURCE_IRQ, | |
648 | }, | |
649 | }; | |
650 | ||
a9e9ce4c | 651 | static struct resource ab8500_poweronkey_db_resources[] = { |
77686517 SI |
652 | { |
653 | .name = "ONKEY_DBF", | |
654 | .start = AB8500_INT_PON_KEY1DB_F, | |
655 | .end = AB8500_INT_PON_KEY1DB_F, | |
656 | .flags = IORESOURCE_IRQ, | |
657 | }, | |
658 | { | |
659 | .name = "ONKEY_DBR", | |
660 | .start = AB8500_INT_PON_KEY1DB_R, | |
661 | .end = AB8500_INT_PON_KEY1DB_R, | |
662 | .flags = IORESOURCE_IRQ, | |
663 | }, | |
664 | }; | |
665 | ||
a9e9ce4c | 666 | static struct resource ab8500_av_acc_detect_resources[] = { |
e098aded | 667 | { |
6af75ecd LW |
668 | .name = "ACC_DETECT_1DB_F", |
669 | .start = AB8500_INT_ACC_DETECT_1DB_F, | |
670 | .end = AB8500_INT_ACC_DETECT_1DB_F, | |
671 | .flags = IORESOURCE_IRQ, | |
e098aded MW |
672 | }, |
673 | { | |
6af75ecd LW |
674 | .name = "ACC_DETECT_1DB_R", |
675 | .start = AB8500_INT_ACC_DETECT_1DB_R, | |
676 | .end = AB8500_INT_ACC_DETECT_1DB_R, | |
677 | .flags = IORESOURCE_IRQ, | |
678 | }, | |
679 | { | |
680 | .name = "ACC_DETECT_21DB_F", | |
681 | .start = AB8500_INT_ACC_DETECT_21DB_F, | |
682 | .end = AB8500_INT_ACC_DETECT_21DB_F, | |
683 | .flags = IORESOURCE_IRQ, | |
684 | }, | |
685 | { | |
686 | .name = "ACC_DETECT_21DB_R", | |
687 | .start = AB8500_INT_ACC_DETECT_21DB_R, | |
688 | .end = AB8500_INT_ACC_DETECT_21DB_R, | |
689 | .flags = IORESOURCE_IRQ, | |
690 | }, | |
691 | { | |
692 | .name = "ACC_DETECT_22DB_F", | |
693 | .start = AB8500_INT_ACC_DETECT_22DB_F, | |
694 | .end = AB8500_INT_ACC_DETECT_22DB_F, | |
695 | .flags = IORESOURCE_IRQ, | |
e098aded | 696 | }, |
6af75ecd LW |
697 | { |
698 | .name = "ACC_DETECT_22DB_R", | |
699 | .start = AB8500_INT_ACC_DETECT_22DB_R, | |
700 | .end = AB8500_INT_ACC_DETECT_22DB_R, | |
701 | .flags = IORESOURCE_IRQ, | |
702 | }, | |
703 | }; | |
704 | ||
a9e9ce4c | 705 | static struct resource ab8500_charger_resources[] = { |
e098aded MW |
706 | { |
707 | .name = "MAIN_CH_UNPLUG_DET", | |
708 | .start = AB8500_INT_MAIN_CH_UNPLUG_DET, | |
709 | .end = AB8500_INT_MAIN_CH_UNPLUG_DET, | |
710 | .flags = IORESOURCE_IRQ, | |
711 | }, | |
712 | { | |
713 | .name = "MAIN_CHARGE_PLUG_DET", | |
714 | .start = AB8500_INT_MAIN_CH_PLUG_DET, | |
715 | .end = AB8500_INT_MAIN_CH_PLUG_DET, | |
716 | .flags = IORESOURCE_IRQ, | |
717 | }, | |
e098aded MW |
718 | { |
719 | .name = "VBUS_DET_R", | |
720 | .start = AB8500_INT_VBUS_DET_R, | |
721 | .end = AB8500_INT_VBUS_DET_R, | |
722 | .flags = IORESOURCE_IRQ, | |
723 | }, | |
724 | { | |
6af75ecd LW |
725 | .name = "VBUS_DET_F", |
726 | .start = AB8500_INT_VBUS_DET_F, | |
727 | .end = AB8500_INT_VBUS_DET_F, | |
e098aded MW |
728 | .flags = IORESOURCE_IRQ, |
729 | }, | |
730 | { | |
6af75ecd LW |
731 | .name = "USB_LINK_STATUS", |
732 | .start = AB8500_INT_USB_LINK_STATUS, | |
733 | .end = AB8500_INT_USB_LINK_STATUS, | |
734 | .flags = IORESOURCE_IRQ, | |
735 | }, | |
e098aded MW |
736 | { |
737 | .name = "VBUS_OVV", | |
738 | .start = AB8500_INT_VBUS_OVV, | |
739 | .end = AB8500_INT_VBUS_OVV, | |
740 | .flags = IORESOURCE_IRQ, | |
741 | }, | |
742 | { | |
6af75ecd LW |
743 | .name = "USB_CH_TH_PROT_R", |
744 | .start = AB8500_INT_USB_CH_TH_PROT_R, | |
745 | .end = AB8500_INT_USB_CH_TH_PROT_R, | |
e098aded MW |
746 | .flags = IORESOURCE_IRQ, |
747 | }, | |
748 | { | |
6af75ecd LW |
749 | .name = "USB_CH_TH_PROT_F", |
750 | .start = AB8500_INT_USB_CH_TH_PROT_F, | |
751 | .end = AB8500_INT_USB_CH_TH_PROT_F, | |
e098aded MW |
752 | .flags = IORESOURCE_IRQ, |
753 | }, | |
754 | { | |
6af75ecd LW |
755 | .name = "MAIN_EXT_CH_NOT_OK", |
756 | .start = AB8500_INT_MAIN_EXT_CH_NOT_OK, | |
757 | .end = AB8500_INT_MAIN_EXT_CH_NOT_OK, | |
758 | .flags = IORESOURCE_IRQ, | |
759 | }, | |
760 | { | |
761 | .name = "MAIN_CH_TH_PROT_R", | |
762 | .start = AB8500_INT_MAIN_CH_TH_PROT_R, | |
763 | .end = AB8500_INT_MAIN_CH_TH_PROT_R, | |
764 | .flags = IORESOURCE_IRQ, | |
765 | }, | |
766 | { | |
767 | .name = "MAIN_CH_TH_PROT_F", | |
768 | .start = AB8500_INT_MAIN_CH_TH_PROT_F, | |
769 | .end = AB8500_INT_MAIN_CH_TH_PROT_F, | |
770 | .flags = IORESOURCE_IRQ, | |
771 | }, | |
772 | { | |
773 | .name = "USB_CHARGER_NOT_OKR", | |
a982362c BJ |
774 | .start = AB8500_INT_USB_CHARGER_NOT_OKR, |
775 | .end = AB8500_INT_USB_CHARGER_NOT_OKR, | |
6af75ecd LW |
776 | .flags = IORESOURCE_IRQ, |
777 | }, | |
778 | { | |
779 | .name = "CH_WD_EXP", | |
780 | .start = AB8500_INT_CH_WD_EXP, | |
781 | .end = AB8500_INT_CH_WD_EXP, | |
782 | .flags = IORESOURCE_IRQ, | |
783 | }, | |
784 | }; | |
785 | ||
a9e9ce4c | 786 | static struct resource ab8500_btemp_resources[] = { |
6af75ecd LW |
787 | { |
788 | .name = "BAT_CTRL_INDB", | |
789 | .start = AB8500_INT_BAT_CTRL_INDB, | |
790 | .end = AB8500_INT_BAT_CTRL_INDB, | |
e098aded MW |
791 | .flags = IORESOURCE_IRQ, |
792 | }, | |
793 | { | |
794 | .name = "BTEMP_LOW", | |
795 | .start = AB8500_INT_BTEMP_LOW, | |
796 | .end = AB8500_INT_BTEMP_LOW, | |
797 | .flags = IORESOURCE_IRQ, | |
798 | }, | |
799 | { | |
800 | .name = "BTEMP_HIGH", | |
801 | .start = AB8500_INT_BTEMP_HIGH, | |
802 | .end = AB8500_INT_BTEMP_HIGH, | |
803 | .flags = IORESOURCE_IRQ, | |
804 | }, | |
805 | { | |
6af75ecd LW |
806 | .name = "BTEMP_LOW_MEDIUM", |
807 | .start = AB8500_INT_BTEMP_LOW_MEDIUM, | |
808 | .end = AB8500_INT_BTEMP_LOW_MEDIUM, | |
e098aded MW |
809 | .flags = IORESOURCE_IRQ, |
810 | }, | |
811 | { | |
6af75ecd LW |
812 | .name = "BTEMP_MEDIUM_HIGH", |
813 | .start = AB8500_INT_BTEMP_MEDIUM_HIGH, | |
814 | .end = AB8500_INT_BTEMP_MEDIUM_HIGH, | |
e098aded MW |
815 | .flags = IORESOURCE_IRQ, |
816 | }, | |
6af75ecd LW |
817 | }; |
818 | ||
a9e9ce4c | 819 | static struct resource ab8500_fg_resources[] = { |
e098aded | 820 | { |
6af75ecd LW |
821 | .name = "NCONV_ACCU", |
822 | .start = AB8500_INT_CCN_CONV_ACC, | |
823 | .end = AB8500_INT_CCN_CONV_ACC, | |
e098aded MW |
824 | .flags = IORESOURCE_IRQ, |
825 | }, | |
826 | { | |
6af75ecd LW |
827 | .name = "BATT_OVV", |
828 | .start = AB8500_INT_BATT_OVV, | |
829 | .end = AB8500_INT_BATT_OVV, | |
e098aded MW |
830 | .flags = IORESOURCE_IRQ, |
831 | }, | |
832 | { | |
6af75ecd LW |
833 | .name = "LOW_BAT_F", |
834 | .start = AB8500_INT_LOW_BAT_F, | |
835 | .end = AB8500_INT_LOW_BAT_F, | |
836 | .flags = IORESOURCE_IRQ, | |
837 | }, | |
838 | { | |
839 | .name = "LOW_BAT_R", | |
840 | .start = AB8500_INT_LOW_BAT_R, | |
841 | .end = AB8500_INT_LOW_BAT_R, | |
842 | .flags = IORESOURCE_IRQ, | |
843 | }, | |
844 | { | |
845 | .name = "CC_INT_CALIB", | |
846 | .start = AB8500_INT_CC_INT_CALIB, | |
847 | .end = AB8500_INT_CC_INT_CALIB, | |
e098aded MW |
848 | .flags = IORESOURCE_IRQ, |
849 | }, | |
a982362c BJ |
850 | { |
851 | .name = "CCEOC", | |
852 | .start = AB8500_INT_CCEOC, | |
853 | .end = AB8500_INT_CCEOC, | |
854 | .flags = IORESOURCE_IRQ, | |
855 | }, | |
e098aded MW |
856 | }; |
857 | ||
a9e9ce4c | 858 | static struct resource ab8500_chargalg_resources[] = {}; |
6af75ecd | 859 | |
df720647 | 860 | #ifdef CONFIG_DEBUG_FS |
a9e9ce4c | 861 | static struct resource ab8500_debug_resources[] = { |
e098aded MW |
862 | { |
863 | .name = "IRQ_FIRST", | |
864 | .start = AB8500_INT_MAIN_EXT_CH_NOT_OK, | |
865 | .end = AB8500_INT_MAIN_EXT_CH_NOT_OK, | |
866 | .flags = IORESOURCE_IRQ, | |
867 | }, | |
868 | { | |
869 | .name = "IRQ_LAST", | |
a982362c BJ |
870 | .start = AB8500_INT_XTAL32K_KO, |
871 | .end = AB8500_INT_XTAL32K_KO, | |
e098aded MW |
872 | .flags = IORESOURCE_IRQ, |
873 | }, | |
874 | }; | |
df720647 | 875 | #endif |
e098aded | 876 | |
a9e9ce4c | 877 | static struct resource ab8500_usb_resources[] = { |
e098aded MW |
878 | { |
879 | .name = "ID_WAKEUP_R", | |
880 | .start = AB8500_INT_ID_WAKEUP_R, | |
881 | .end = AB8500_INT_ID_WAKEUP_R, | |
882 | .flags = IORESOURCE_IRQ, | |
883 | }, | |
884 | { | |
885 | .name = "ID_WAKEUP_F", | |
886 | .start = AB8500_INT_ID_WAKEUP_F, | |
887 | .end = AB8500_INT_ID_WAKEUP_F, | |
888 | .flags = IORESOURCE_IRQ, | |
889 | }, | |
890 | { | |
891 | .name = "VBUS_DET_F", | |
892 | .start = AB8500_INT_VBUS_DET_F, | |
893 | .end = AB8500_INT_VBUS_DET_F, | |
894 | .flags = IORESOURCE_IRQ, | |
895 | }, | |
896 | { | |
897 | .name = "VBUS_DET_R", | |
898 | .start = AB8500_INT_VBUS_DET_R, | |
899 | .end = AB8500_INT_VBUS_DET_R, | |
900 | .flags = IORESOURCE_IRQ, | |
901 | }, | |
92d50a41 MW |
902 | { |
903 | .name = "USB_LINK_STATUS", | |
904 | .start = AB8500_INT_USB_LINK_STATUS, | |
905 | .end = AB8500_INT_USB_LINK_STATUS, | |
906 | .flags = IORESOURCE_IRQ, | |
907 | }, | |
6af75ecd LW |
908 | { |
909 | .name = "USB_ADP_PROBE_PLUG", | |
910 | .start = AB8500_INT_ADP_PROBE_PLUG, | |
911 | .end = AB8500_INT_ADP_PROBE_PLUG, | |
912 | .flags = IORESOURCE_IRQ, | |
913 | }, | |
914 | { | |
915 | .name = "USB_ADP_PROBE_UNPLUG", | |
916 | .start = AB8500_INT_ADP_PROBE_UNPLUG, | |
917 | .end = AB8500_INT_ADP_PROBE_UNPLUG, | |
918 | .flags = IORESOURCE_IRQ, | |
919 | }, | |
e098aded MW |
920 | }; |
921 | ||
a9e9ce4c | 922 | static struct resource ab8505_iddet_resources[] = { |
44f72e53 VS |
923 | { |
924 | .name = "KeyDeglitch", | |
925 | .start = AB8505_INT_KEYDEGLITCH, | |
926 | .end = AB8505_INT_KEYDEGLITCH, | |
927 | .flags = IORESOURCE_IRQ, | |
928 | }, | |
929 | { | |
930 | .name = "KP", | |
931 | .start = AB8505_INT_KP, | |
932 | .end = AB8505_INT_KP, | |
933 | .flags = IORESOURCE_IRQ, | |
934 | }, | |
935 | { | |
936 | .name = "IKP", | |
937 | .start = AB8505_INT_IKP, | |
938 | .end = AB8505_INT_IKP, | |
939 | .flags = IORESOURCE_IRQ, | |
940 | }, | |
941 | { | |
942 | .name = "IKR", | |
943 | .start = AB8505_INT_IKR, | |
944 | .end = AB8505_INT_IKR, | |
945 | .flags = IORESOURCE_IRQ, | |
946 | }, | |
947 | { | |
948 | .name = "KeyStuck", | |
949 | .start = AB8505_INT_KEYSTUCK, | |
950 | .end = AB8505_INT_KEYSTUCK, | |
951 | .flags = IORESOURCE_IRQ, | |
952 | }, | |
953 | }; | |
954 | ||
a9e9ce4c | 955 | static struct resource ab8500_temp_resources[] = { |
e098aded MW |
956 | { |
957 | .name = "AB8500_TEMP_WARM", | |
958 | .start = AB8500_INT_TEMP_WARM, | |
959 | .end = AB8500_INT_TEMP_WARM, | |
960 | .flags = IORESOURCE_IRQ, | |
961 | }, | |
962 | }; | |
963 | ||
a9e9ce4c | 964 | static struct mfd_cell abx500_common_devs[] = { |
5814fc35 MW |
965 | #ifdef CONFIG_DEBUG_FS |
966 | { | |
967 | .name = "ab8500-debug", | |
bad76991 | 968 | .of_compatible = "stericsson,ab8500-debug", |
e098aded MW |
969 | .num_resources = ARRAY_SIZE(ab8500_debug_resources), |
970 | .resources = ab8500_debug_resources, | |
5814fc35 MW |
971 | }, |
972 | #endif | |
e098aded MW |
973 | { |
974 | .name = "ab8500-sysctrl", | |
bad76991 | 975 | .of_compatible = "stericsson,ab8500-sysctrl", |
e098aded MW |
976 | }, |
977 | { | |
978 | .name = "ab8500-regulator", | |
bad76991 | 979 | .of_compatible = "stericsson,ab8500-regulator", |
e098aded | 980 | }, |
62579266 RV |
981 | { |
982 | .name = "ab8500-gpadc", | |
bad76991 | 983 | .of_compatible = "stericsson,ab8500-gpadc", |
62579266 RV |
984 | .num_resources = ARRAY_SIZE(ab8500_gpadc_resources), |
985 | .resources = ab8500_gpadc_resources, | |
986 | }, | |
987 | { | |
988 | .name = "ab8500-rtc", | |
bad76991 | 989 | .of_compatible = "stericsson,ab8500-rtc", |
62579266 RV |
990 | .num_resources = ARRAY_SIZE(ab8500_rtc_resources), |
991 | .resources = ab8500_rtc_resources, | |
992 | }, | |
6af75ecd LW |
993 | { |
994 | .name = "ab8500-acc-det", | |
bad76991 | 995 | .of_compatible = "stericsson,ab8500-acc-det", |
6af75ecd LW |
996 | .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources), |
997 | .resources = ab8500_av_acc_detect_resources, | |
998 | }, | |
e098aded MW |
999 | { |
1000 | .name = "ab8500-poweron-key", | |
bad76991 | 1001 | .of_compatible = "stericsson,ab8500-poweron-key", |
e098aded MW |
1002 | .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources), |
1003 | .resources = ab8500_poweronkey_db_resources, | |
1004 | }, | |
f0f05b1c AM |
1005 | { |
1006 | .name = "ab8500-pwm", | |
bad76991 | 1007 | .of_compatible = "stericsson,ab8500-pwm", |
f0f05b1c AM |
1008 | .id = 1, |
1009 | }, | |
1010 | { | |
1011 | .name = "ab8500-pwm", | |
bad76991 | 1012 | .of_compatible = "stericsson,ab8500-pwm", |
f0f05b1c AM |
1013 | .id = 2, |
1014 | }, | |
1015 | { | |
1016 | .name = "ab8500-pwm", | |
bad76991 | 1017 | .of_compatible = "stericsson,ab8500-pwm", |
f0f05b1c AM |
1018 | .id = 3, |
1019 | }, | |
bad76991 LJ |
1020 | { |
1021 | .name = "ab8500-leds", | |
1022 | .of_compatible = "stericsson,ab8500-leds", | |
1023 | }, | |
77686517 | 1024 | { |
e098aded | 1025 | .name = "ab8500-denc", |
bad76991 | 1026 | .of_compatible = "stericsson,ab8500-denc", |
e098aded MW |
1027 | }, |
1028 | { | |
1029 | .name = "ab8500-temp", | |
bad76991 | 1030 | .of_compatible = "stericsson,ab8500-temp", |
e098aded MW |
1031 | .num_resources = ARRAY_SIZE(ab8500_temp_resources), |
1032 | .resources = ab8500_temp_resources, | |
77686517 | 1033 | }, |
62579266 RV |
1034 | }; |
1035 | ||
a9e9ce4c | 1036 | static struct mfd_cell ab8500_bm_devs[] = { |
6ef9418c RA |
1037 | { |
1038 | .name = "ab8500-charger", | |
4aef72db | 1039 | .of_compatible = "stericsson,ab8500-charger", |
6ef9418c RA |
1040 | .num_resources = ARRAY_SIZE(ab8500_charger_resources), |
1041 | .resources = ab8500_charger_resources, | |
4aef72db R |
1042 | #ifndef CONFIG_OF |
1043 | .platform_data = &ab8500_bm_data, | |
1044 | .pdata_size = sizeof(ab8500_bm_data), | |
1045 | #endif | |
6ef9418c RA |
1046 | }, |
1047 | { | |
1048 | .name = "ab8500-btemp", | |
bd9e8ab2 | 1049 | .of_compatible = "stericsson,ab8500-btemp", |
6ef9418c RA |
1050 | .num_resources = ARRAY_SIZE(ab8500_btemp_resources), |
1051 | .resources = ab8500_btemp_resources, | |
bd9e8ab2 R |
1052 | #ifndef CONFIG_OF |
1053 | .platform_data = &ab8500_bm_data, | |
1054 | .pdata_size = sizeof(ab8500_bm_data), | |
1055 | #endif | |
6ef9418c RA |
1056 | }, |
1057 | { | |
1058 | .name = "ab8500-fg", | |
e0f1abeb | 1059 | .of_compatible = "stericsson,ab8500-fg", |
6ef9418c RA |
1060 | .num_resources = ARRAY_SIZE(ab8500_fg_resources), |
1061 | .resources = ab8500_fg_resources, | |
e0f1abeb R |
1062 | #ifndef CONFIG_OF |
1063 | .platform_data = &ab8500_bm_data, | |
1064 | .pdata_size = sizeof(ab8500_bm_data), | |
1065 | #endif | |
6ef9418c RA |
1066 | }, |
1067 | { | |
1068 | .name = "ab8500-chargalg", | |
a12810ab | 1069 | .of_compatible = "stericsson,ab8500-chargalg", |
6ef9418c RA |
1070 | .num_resources = ARRAY_SIZE(ab8500_chargalg_resources), |
1071 | .resources = ab8500_chargalg_resources, | |
a12810ab R |
1072 | #ifndef CONFIG_OF |
1073 | .platform_data = &ab8500_bm_data, | |
1074 | .pdata_size = sizeof(ab8500_bm_data), | |
1075 | #endif | |
6ef9418c RA |
1076 | }, |
1077 | }; | |
1078 | ||
a9e9ce4c | 1079 | static struct mfd_cell ab8500_devs[] = { |
d6255529 LW |
1080 | { |
1081 | .name = "ab8500-gpio", | |
bad76991 | 1082 | .of_compatible = "stericsson,ab8500-gpio", |
d6255529 LW |
1083 | .num_resources = ARRAY_SIZE(ab8500_gpio_resources), |
1084 | .resources = ab8500_gpio_resources, | |
1085 | }, | |
1086 | { | |
1087 | .name = "ab8500-usb", | |
bad76991 | 1088 | .of_compatible = "stericsson,ab8500-usb", |
d6255529 LW |
1089 | .num_resources = ARRAY_SIZE(ab8500_usb_resources), |
1090 | .resources = ab8500_usb_resources, | |
1091 | }, | |
44f72e53 VS |
1092 | { |
1093 | .name = "ab8500-codec", | |
81a21cdd | 1094 | .of_compatible = "stericsson,ab8500-codec", |
44f72e53 | 1095 | }, |
d6255529 LW |
1096 | }; |
1097 | ||
a9e9ce4c | 1098 | static struct mfd_cell ab9540_devs[] = { |
d6255529 LW |
1099 | { |
1100 | .name = "ab8500-gpio", | |
1101 | .num_resources = ARRAY_SIZE(ab9540_gpio_resources), | |
1102 | .resources = ab9540_gpio_resources, | |
1103 | }, | |
1104 | { | |
1105 | .name = "ab9540-usb", | |
1106 | .num_resources = ARRAY_SIZE(ab8500_usb_resources), | |
1107 | .resources = ab8500_usb_resources, | |
1108 | }, | |
44f72e53 VS |
1109 | { |
1110 | .name = "ab9540-codec", | |
1111 | }, | |
1112 | }; | |
1113 | ||
1114 | /* Device list common to ab9540 and ab8505 */ | |
a9e9ce4c | 1115 | static struct mfd_cell ab9540_ab8505_devs[] = { |
44f72e53 VS |
1116 | { |
1117 | .name = "ab-iddet", | |
1118 | .num_resources = ARRAY_SIZE(ab8505_iddet_resources), | |
1119 | .resources = ab8505_iddet_resources, | |
1120 | }, | |
d6255529 LW |
1121 | }; |
1122 | ||
cca69b67 MW |
1123 | static ssize_t show_chip_id(struct device *dev, |
1124 | struct device_attribute *attr, char *buf) | |
1125 | { | |
1126 | struct ab8500 *ab8500; | |
1127 | ||
1128 | ab8500 = dev_get_drvdata(dev); | |
1129 | return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL); | |
1130 | } | |
1131 | ||
e5c238c3 MW |
1132 | /* |
1133 | * ab8500 has switched off due to (SWITCH_OFF_STATUS): | |
1134 | * 0x01 Swoff bit programming | |
1135 | * 0x02 Thermal protection activation | |
1136 | * 0x04 Vbat lower then BattOk falling threshold | |
1137 | * 0x08 Watchdog expired | |
1138 | * 0x10 Non presence of 32kHz clock | |
1139 | * 0x20 Battery level lower than power on reset threshold | |
1140 | * 0x40 Power on key 1 pressed longer than 10 seconds | |
1141 | * 0x80 DB8500 thermal shutdown | |
1142 | */ | |
1143 | static ssize_t show_switch_off_status(struct device *dev, | |
1144 | struct device_attribute *attr, char *buf) | |
1145 | { | |
1146 | int ret; | |
1147 | u8 value; | |
1148 | struct ab8500 *ab8500; | |
1149 | ||
1150 | ab8500 = dev_get_drvdata(dev); | |
1151 | ret = get_register_interruptible(ab8500, AB8500_RTC, | |
1152 | AB8500_SWITCH_OFF_STATUS, &value); | |
1153 | if (ret < 0) | |
1154 | return ret; | |
1155 | return sprintf(buf, "%#x\n", value); | |
1156 | } | |
1157 | ||
b4a31037 AL |
1158 | /* |
1159 | * ab8500 has turned on due to (TURN_ON_STATUS): | |
1160 | * 0x01 PORnVbat | |
1161 | * 0x02 PonKey1dbF | |
1162 | * 0x04 PonKey2dbF | |
1163 | * 0x08 RTCAlarm | |
1164 | * 0x10 MainChDet | |
1165 | * 0x20 VbusDet | |
1166 | * 0x40 UsbIDDetect | |
1167 | * 0x80 Reserved | |
1168 | */ | |
1169 | static ssize_t show_turn_on_status(struct device *dev, | |
1170 | struct device_attribute *attr, char *buf) | |
1171 | { | |
1172 | int ret; | |
1173 | u8 value; | |
1174 | struct ab8500 *ab8500; | |
1175 | ||
1176 | ab8500 = dev_get_drvdata(dev); | |
1177 | ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK, | |
1178 | AB8500_TURN_ON_STATUS, &value); | |
1179 | if (ret < 0) | |
1180 | return ret; | |
1181 | return sprintf(buf, "%#x\n", value); | |
1182 | } | |
1183 | ||
d6255529 LW |
1184 | static ssize_t show_ab9540_dbbrstn(struct device *dev, |
1185 | struct device_attribute *attr, char *buf) | |
1186 | { | |
1187 | struct ab8500 *ab8500; | |
1188 | int ret; | |
1189 | u8 value; | |
1190 | ||
1191 | ab8500 = dev_get_drvdata(dev); | |
1192 | ||
1193 | ret = get_register_interruptible(ab8500, AB8500_REGU_CTRL2, | |
1194 | AB9540_MODEM_CTRL2_REG, &value); | |
1195 | if (ret < 0) | |
1196 | return ret; | |
1197 | ||
1198 | return sprintf(buf, "%d\n", | |
1199 | (value & AB9540_MODEM_CTRL2_SWDBBRSTN_BIT) ? 1 : 0); | |
1200 | } | |
1201 | ||
1202 | static ssize_t store_ab9540_dbbrstn(struct device *dev, | |
1203 | struct device_attribute *attr, const char *buf, size_t count) | |
1204 | { | |
1205 | struct ab8500 *ab8500; | |
1206 | int ret = count; | |
1207 | int err; | |
1208 | u8 bitvalues; | |
1209 | ||
1210 | ab8500 = dev_get_drvdata(dev); | |
1211 | ||
1212 | if (count > 0) { | |
1213 | switch (buf[0]) { | |
1214 | case '0': | |
1215 | bitvalues = 0; | |
1216 | break; | |
1217 | case '1': | |
1218 | bitvalues = AB9540_MODEM_CTRL2_SWDBBRSTN_BIT; | |
1219 | break; | |
1220 | default: | |
1221 | goto exit; | |
1222 | } | |
1223 | ||
1224 | err = mask_and_set_register_interruptible(ab8500, | |
1225 | AB8500_REGU_CTRL2, AB9540_MODEM_CTRL2_REG, | |
1226 | AB9540_MODEM_CTRL2_SWDBBRSTN_BIT, bitvalues); | |
1227 | if (err) | |
1228 | dev_info(ab8500->dev, | |
1229 | "Failed to set DBBRSTN %c, err %#x\n", | |
1230 | buf[0], err); | |
1231 | } | |
1232 | ||
1233 | exit: | |
1234 | return ret; | |
1235 | } | |
1236 | ||
cca69b67 | 1237 | static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL); |
e5c238c3 | 1238 | static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL); |
b4a31037 | 1239 | static DEVICE_ATTR(turn_on_status, S_IRUGO, show_turn_on_status, NULL); |
d6255529 LW |
1240 | static DEVICE_ATTR(dbbrstn, S_IRUGO | S_IWUSR, |
1241 | show_ab9540_dbbrstn, store_ab9540_dbbrstn); | |
cca69b67 MW |
1242 | |
1243 | static struct attribute *ab8500_sysfs_entries[] = { | |
1244 | &dev_attr_chip_id.attr, | |
e5c238c3 | 1245 | &dev_attr_switch_off_status.attr, |
b4a31037 | 1246 | &dev_attr_turn_on_status.attr, |
cca69b67 MW |
1247 | NULL, |
1248 | }; | |
1249 | ||
d6255529 LW |
1250 | static struct attribute *ab9540_sysfs_entries[] = { |
1251 | &dev_attr_chip_id.attr, | |
1252 | &dev_attr_switch_off_status.attr, | |
1253 | &dev_attr_turn_on_status.attr, | |
1254 | &dev_attr_dbbrstn.attr, | |
1255 | NULL, | |
1256 | }; | |
1257 | ||
cca69b67 MW |
1258 | static struct attribute_group ab8500_attr_group = { |
1259 | .attrs = ab8500_sysfs_entries, | |
1260 | }; | |
1261 | ||
d6255529 LW |
1262 | static struct attribute_group ab9540_attr_group = { |
1263 | .attrs = ab9540_sysfs_entries, | |
1264 | }; | |
1265 | ||
f791be49 | 1266 | static int ab8500_probe(struct platform_device *pdev) |
62579266 | 1267 | { |
b04c530c JA |
1268 | static char *switch_off_status[] = { |
1269 | "Swoff bit programming", | |
1270 | "Thermal protection activation", | |
1271 | "Vbat lower then BattOk falling threshold", | |
1272 | "Watchdog expired", | |
1273 | "Non presence of 32kHz clock", | |
1274 | "Battery level lower than power on reset threshold", | |
1275 | "Power on key 1 pressed longer than 10 seconds", | |
1276 | "DB8500 thermal shutdown"}; | |
d28f1db8 LJ |
1277 | struct ab8500_platform_data *plat = dev_get_platdata(&pdev->dev); |
1278 | const struct platform_device_id *platid = platform_get_device_id(pdev); | |
6bc4a568 LJ |
1279 | enum ab8500_version version = AB8500_VERSION_UNDEFINED; |
1280 | struct device_node *np = pdev->dev.of_node; | |
d28f1db8 LJ |
1281 | struct ab8500 *ab8500; |
1282 | struct resource *resource; | |
62579266 RV |
1283 | int ret; |
1284 | int i; | |
47c16975 | 1285 | u8 value; |
62579266 | 1286 | |
d28f1db8 LJ |
1287 | ab8500 = kzalloc(sizeof *ab8500, GFP_KERNEL); |
1288 | if (!ab8500) | |
1289 | return -ENOMEM; | |
1290 | ||
62579266 RV |
1291 | if (plat) |
1292 | ab8500->irq_base = plat->irq_base; | |
1293 | ||
d28f1db8 LJ |
1294 | ab8500->dev = &pdev->dev; |
1295 | ||
1296 | resource = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | |
1297 | if (!resource) { | |
1298 | ret = -ENODEV; | |
1299 | goto out_free_ab8500; | |
1300 | } | |
1301 | ||
1302 | ab8500->irq = resource->start; | |
1303 | ||
822672a7 LJ |
1304 | ab8500->read = ab8500_prcmu_read; |
1305 | ab8500->write = ab8500_prcmu_write; | |
1306 | ab8500->write_masked = ab8500_prcmu_write_masked; | |
d28f1db8 | 1307 | |
62579266 RV |
1308 | mutex_init(&ab8500->lock); |
1309 | mutex_init(&ab8500->irq_lock); | |
112a80d2 | 1310 | atomic_set(&ab8500->transfer_ongoing, 0); |
62579266 | 1311 | |
d28f1db8 LJ |
1312 | platform_set_drvdata(pdev, ab8500); |
1313 | ||
6bc4a568 LJ |
1314 | if (platid) |
1315 | version = platid->driver_data; | |
6bc4a568 | 1316 | |
0f620837 LW |
1317 | if (version != AB8500_VERSION_UNDEFINED) |
1318 | ab8500->version = version; | |
1319 | else { | |
1320 | ret = get_register_interruptible(ab8500, AB8500_MISC, | |
1321 | AB8500_IC_NAME_REG, &value); | |
1322 | if (ret < 0) | |
d28f1db8 | 1323 | goto out_free_ab8500; |
0f620837 LW |
1324 | |
1325 | ab8500->version = value; | |
1326 | } | |
1327 | ||
47c16975 MW |
1328 | ret = get_register_interruptible(ab8500, AB8500_MISC, |
1329 | AB8500_REV_REG, &value); | |
62579266 | 1330 | if (ret < 0) |
d28f1db8 | 1331 | goto out_free_ab8500; |
62579266 | 1332 | |
47c16975 | 1333 | ab8500->chip_id = value; |
62579266 | 1334 | |
0f620837 LW |
1335 | dev_info(ab8500->dev, "detected chip, %s rev. %1x.%1x\n", |
1336 | ab8500_version_str[ab8500->version], | |
1337 | ab8500->chip_id >> 4, | |
1338 | ab8500->chip_id & 0x0F); | |
1339 | ||
d6255529 | 1340 | /* Configure AB8500 or AB9540 IRQ */ |
a982362c | 1341 | if (is_ab9540(ab8500) || is_ab8505(ab8500)) { |
d6255529 LW |
1342 | ab8500->mask_size = AB9540_NUM_IRQ_REGS; |
1343 | ab8500->irq_reg_offset = ab9540_irq_regoffset; | |
1344 | } else { | |
1345 | ab8500->mask_size = AB8500_NUM_IRQ_REGS; | |
1346 | ab8500->irq_reg_offset = ab8500_irq_regoffset; | |
1347 | } | |
2ced445e LW |
1348 | ab8500->mask = kzalloc(ab8500->mask_size, GFP_KERNEL); |
1349 | if (!ab8500->mask) | |
1350 | return -ENOMEM; | |
1351 | ab8500->oldmask = kzalloc(ab8500->mask_size, GFP_KERNEL); | |
1352 | if (!ab8500->oldmask) { | |
1353 | ret = -ENOMEM; | |
1354 | goto out_freemask; | |
1355 | } | |
e5c238c3 MW |
1356 | /* |
1357 | * ab8500 has switched off due to (SWITCH_OFF_STATUS): | |
1358 | * 0x01 Swoff bit programming | |
1359 | * 0x02 Thermal protection activation | |
1360 | * 0x04 Vbat lower then BattOk falling threshold | |
1361 | * 0x08 Watchdog expired | |
1362 | * 0x10 Non presence of 32kHz clock | |
1363 | * 0x20 Battery level lower than power on reset threshold | |
1364 | * 0x40 Power on key 1 pressed longer than 10 seconds | |
1365 | * 0x80 DB8500 thermal shutdown | |
1366 | */ | |
1367 | ||
1368 | ret = get_register_interruptible(ab8500, AB8500_RTC, | |
1369 | AB8500_SWITCH_OFF_STATUS, &value); | |
1370 | if (ret < 0) | |
1371 | return ret; | |
b04c530c JA |
1372 | dev_info(ab8500->dev, "switch off cause(s) (%#x): ", value); |
1373 | ||
1374 | if (value) { | |
1375 | for (i = 0; i < ARRAY_SIZE(switch_off_status); i++) { | |
1376 | if (value & 1) | |
1377 | printk(KERN_CONT " \"%s\"", | |
1378 | switch_off_status[i]); | |
1379 | value = value >> 1; | |
1380 | ||
1381 | } | |
1382 | printk(KERN_CONT "\n"); | |
1383 | } else { | |
1384 | printk(KERN_CONT " None\n"); | |
1385 | } | |
e5c238c3 | 1386 | |
62579266 RV |
1387 | if (plat && plat->init) |
1388 | plat->init(ab8500); | |
1389 | ||
1390 | /* Clear and mask all interrupts */ | |
2ced445e | 1391 | for (i = 0; i < ab8500->mask_size; i++) { |
0f620837 LW |
1392 | /* |
1393 | * Interrupt register 12 doesn't exist prior to AB8500 version | |
1394 | * 2.0 | |
1395 | */ | |
1396 | if (ab8500->irq_reg_offset[i] == 11 && | |
1397 | is_ab8500_1p1_or_earlier(ab8500)) | |
92d50a41 | 1398 | continue; |
62579266 | 1399 | |
47c16975 | 1400 | get_register_interruptible(ab8500, AB8500_INTERRUPT, |
2ced445e | 1401 | AB8500_IT_LATCH1_REG + ab8500->irq_reg_offset[i], |
92d50a41 | 1402 | &value); |
47c16975 | 1403 | set_register_interruptible(ab8500, AB8500_INTERRUPT, |
2ced445e | 1404 | AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i], 0xff); |
62579266 RV |
1405 | } |
1406 | ||
47c16975 MW |
1407 | ret = abx500_register_ops(ab8500->dev, &ab8500_ops); |
1408 | if (ret) | |
2ced445e | 1409 | goto out_freeoldmask; |
47c16975 | 1410 | |
2ced445e | 1411 | for (i = 0; i < ab8500->mask_size; i++) |
62579266 RV |
1412 | ab8500->mask[i] = ab8500->oldmask[i] = 0xff; |
1413 | ||
06e589ef LJ |
1414 | ret = ab8500_irq_init(ab8500, np); |
1415 | if (ret) | |
1416 | goto out_freeoldmask; | |
62579266 | 1417 | |
06e589ef LJ |
1418 | /* Activate this feature only in ab9540 */ |
1419 | /* till tests are done on ab8500 1p2 or later*/ | |
1420 | if (is_ab9540(ab8500)) { | |
1421 | ret = request_threaded_irq(ab8500->irq, NULL, | |
7ccfe9b1 MJ |
1422 | ab8500_hierarchical_irq, |
1423 | IRQF_ONESHOT | IRQF_NO_SUSPEND, | |
1424 | "ab8500", ab8500); | |
06e589ef LJ |
1425 | } |
1426 | else { | |
1427 | ret = request_threaded_irq(ab8500->irq, NULL, | |
7ccfe9b1 MJ |
1428 | ab8500_irq, |
1429 | IRQF_ONESHOT | IRQF_NO_SUSPEND, | |
1430 | "ab8500", ab8500); | |
62579266 | 1431 | if (ret) |
06e589ef | 1432 | goto out_freeoldmask; |
62579266 RV |
1433 | } |
1434 | ||
bad76991 LJ |
1435 | ret = mfd_add_devices(ab8500->dev, 0, abx500_common_devs, |
1436 | ARRAY_SIZE(abx500_common_devs), NULL, | |
55692af5 | 1437 | ab8500->irq_base, ab8500->domain); |
bad76991 LJ |
1438 | if (ret) |
1439 | goto out_freeirq; | |
d6255529 | 1440 | |
bad76991 LJ |
1441 | if (is_ab9540(ab8500)) |
1442 | ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs, | |
1443 | ARRAY_SIZE(ab9540_devs), NULL, | |
55692af5 | 1444 | ab8500->irq_base, ab8500->domain); |
bad76991 LJ |
1445 | else |
1446 | ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs, | |
1447 | ARRAY_SIZE(ab8500_devs), NULL, | |
55692af5 | 1448 | ab8500->irq_base, ab8500->domain); |
bad76991 LJ |
1449 | if (ret) |
1450 | goto out_freeirq; | |
44f72e53 | 1451 | |
bad76991 LJ |
1452 | if (is_ab9540(ab8500) || is_ab8505(ab8500)) |
1453 | ret = mfd_add_devices(ab8500->dev, 0, ab9540_ab8505_devs, | |
1454 | ARRAY_SIZE(ab9540_ab8505_devs), NULL, | |
55692af5 | 1455 | ab8500->irq_base, ab8500->domain); |
bad76991 LJ |
1456 | if (ret) |
1457 | goto out_freeirq; | |
62579266 | 1458 | |
6ef9418c RA |
1459 | if (!no_bm) { |
1460 | /* Add battery management devices */ | |
1461 | ret = mfd_add_devices(ab8500->dev, 0, ab8500_bm_devs, | |
1462 | ARRAY_SIZE(ab8500_bm_devs), NULL, | |
55692af5 | 1463 | ab8500->irq_base, ab8500->domain); |
6ef9418c RA |
1464 | if (ret) |
1465 | dev_err(ab8500->dev, "error adding bm devices\n"); | |
1466 | } | |
1467 | ||
d6255529 LW |
1468 | if (is_ab9540(ab8500)) |
1469 | ret = sysfs_create_group(&ab8500->dev->kobj, | |
1470 | &ab9540_attr_group); | |
1471 | else | |
1472 | ret = sysfs_create_group(&ab8500->dev->kobj, | |
1473 | &ab8500_attr_group); | |
cca69b67 MW |
1474 | if (ret) |
1475 | dev_err(ab8500->dev, "error creating sysfs entries\n"); | |
06e589ef LJ |
1476 | |
1477 | return ret; | |
62579266 RV |
1478 | |
1479 | out_freeirq: | |
06e589ef | 1480 | free_irq(ab8500->irq, ab8500); |
2ced445e LW |
1481 | out_freeoldmask: |
1482 | kfree(ab8500->oldmask); | |
1483 | out_freemask: | |
1484 | kfree(ab8500->mask); | |
d28f1db8 LJ |
1485 | out_free_ab8500: |
1486 | kfree(ab8500); | |
6d95b7fd | 1487 | |
62579266 RV |
1488 | return ret; |
1489 | } | |
1490 | ||
4740f73f | 1491 | static int ab8500_remove(struct platform_device *pdev) |
62579266 | 1492 | { |
d28f1db8 LJ |
1493 | struct ab8500 *ab8500 = platform_get_drvdata(pdev); |
1494 | ||
d6255529 LW |
1495 | if (is_ab9540(ab8500)) |
1496 | sysfs_remove_group(&ab8500->dev->kobj, &ab9540_attr_group); | |
1497 | else | |
1498 | sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group); | |
06e589ef | 1499 | |
62579266 | 1500 | mfd_remove_devices(ab8500->dev); |
06e589ef LJ |
1501 | free_irq(ab8500->irq, ab8500); |
1502 | ||
2ced445e LW |
1503 | kfree(ab8500->oldmask); |
1504 | kfree(ab8500->mask); | |
d28f1db8 | 1505 | kfree(ab8500); |
62579266 RV |
1506 | |
1507 | return 0; | |
1508 | } | |
1509 | ||
d28f1db8 LJ |
1510 | static const struct platform_device_id ab8500_id[] = { |
1511 | { "ab8500-core", AB8500_VERSION_AB8500 }, | |
1512 | { "ab8505-i2c", AB8500_VERSION_AB8505 }, | |
1513 | { "ab9540-i2c", AB8500_VERSION_AB9540 }, | |
1514 | { "ab8540-i2c", AB8500_VERSION_AB8540 }, | |
1515 | { } | |
1516 | }; | |
1517 | ||
1518 | static struct platform_driver ab8500_core_driver = { | |
1519 | .driver = { | |
1520 | .name = "ab8500-core", | |
1521 | .owner = THIS_MODULE, | |
1522 | }, | |
1523 | .probe = ab8500_probe, | |
84449216 | 1524 | .remove = ab8500_remove, |
d28f1db8 LJ |
1525 | .id_table = ab8500_id, |
1526 | }; | |
1527 | ||
1528 | static int __init ab8500_core_init(void) | |
1529 | { | |
1530 | return platform_driver_register(&ab8500_core_driver); | |
1531 | } | |
1532 | ||
1533 | static void __exit ab8500_core_exit(void) | |
1534 | { | |
1535 | platform_driver_unregister(&ab8500_core_driver); | |
1536 | } | |
ba7cbc3e | 1537 | core_initcall(ab8500_core_init); |
d28f1db8 LJ |
1538 | module_exit(ab8500_core_exit); |
1539 | ||
adceed62 | 1540 | MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent"); |
62579266 RV |
1541 | MODULE_DESCRIPTION("AB8500 MFD core"); |
1542 | MODULE_LICENSE("GPL v2"); |