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mfd: Add module.h to the implicit drivers/mfd users
[linux-2.6-block.git] / drivers / mfd / ab3550-core.c
CommitLineData
09bcb3f3
MW		 1/*
2 * Copyright (C) 2007-2010 ST-Ericsson
3 * License terms: GNU General Public License (GPL) version 2
4 * Low-level core for exclusive access to the AB3550 IC on the I2C bus
5 * and some basic chip-configuration.
6 * Author: Bengt Jonsson <bengt.g.jonsson@stericsson.com>
7 * Author: Mattias Nilsson <mattias.i.nilsson@stericsson.com>
8 * Author: Mattias Wallin <mattias.wallin@stericsson.com>
9 * Author: Rickard Andersson <rickard.andersson@stericsson.com>
10 */
11
12#include <linux/i2c.h>
13#include <linux/mutex.h>
4e36dd33 14#include <linux/module.h>
09bcb3f3
MW		 15#include <linux/err.h>
16#include <linux/platform_device.h>
17#include <linux/slab.h>
18#include <linux/device.h>
19#include <linux/irq.h>
20#include <linux/interrupt.h>
21#include <linux/random.h>
22#include <linux/workqueue.h>
23#include <linux/debugfs.h>
24#include <linux/seq_file.h>
25#include <linux/uaccess.h>
26#include <linux/mfd/abx500.h>
27#include <linux/list.h>
28#include <linux/bitops.h>
29#include <linux/spinlock.h>
30#include <linux/mfd/core.h>
31
32#define AB3550_NAME_STRING "ab3550"
33#define AB3550_ID_FORMAT_STRING "AB3550 %s"
34#define AB3550_NUM_BANKS 2
35#define AB3550_NUM_EVENT_REG 5
36
37/* These are the only registers inside AB3550 used in this main file */
38
39/* Chip ID register */
40#define AB3550_CID_REG 0x20
41
42/* Interrupt event registers */
43#define AB3550_EVENT_BANK 0
44#define AB3550_EVENT_REG 0x22
45
46/* Read/write operation values. */
47#define AB3550_PERM_RD (0x01)
48#define AB3550_PERM_WR (0x02)
49
50/* Read/write permissions. */
51#define AB3550_PERM_RO (AB3550_PERM_RD)
52#define AB3550_PERM_RW (AB3550_PERM_RD | AB3550_PERM_WR)
53
54/**
55 * struct ab3550
56 * @access_mutex: lock out concurrent accesses to the AB registers
57 * @i2c_client: I2C client for this chip
58 * @chip_name: name of this chip variant
59 * @chip_id: 8 bit chip ID for this chip variant
60 * @mask_work: a worker for writing to mask registers
61 * @event_lock: a lock to protect the event_mask
62 * @event_mask: a local copy of the mask event registers
63 * @startup_events: a copy of the first reading of the event registers
64 * @startup_events_read: whether the first events have been read
65 */
66struct ab3550 {
67 struct mutex access_mutex;
68 struct i2c_client *i2c_client[AB3550_NUM_BANKS];
69 char chip_name[32];
70 u8 chip_id;
71 struct work_struct mask_work;
72 spinlock_t event_lock;
73 u8 event_mask[AB3550_NUM_EVENT_REG];
74 u8 startup_events[AB3550_NUM_EVENT_REG];
75 bool startup_events_read;
76#ifdef CONFIG_DEBUG_FS
77 unsigned int debug_bank;
78 unsigned int debug_address;
79#endif
80};
81
82/**
83 * struct ab3550_reg_range
84 * @first: the first address of the range
85 * @last: the last address of the range
86 * @perm: access permissions for the range
87 */
88struct ab3550_reg_range {
89 u8 first;
90 u8 last;
91 u8 perm;
92};
93
94/**
95 * struct ab3550_reg_ranges
96 * @count: the number of ranges in the list
97 * @range: the list of register ranges
98 */
99struct ab3550_reg_ranges {
100 u8 count;
101 const struct ab3550_reg_range *range;
102};
103
104/*
105 * Permissible register ranges for reading and writing per device and bank.
106 *
107 * The ranges must be listed in increasing address order, and no overlaps are
108 * allowed. It is assumed that write permission implies read permission
109 * (i.e. only RO and RW permissions should be used). Ranges with write
110 * permission must not be split up.
111 */
112
113#define NO_RANGE {.count = 0, .range = NULL,}
114
115static struct
116ab3550_reg_ranges ab3550_reg_ranges[AB3550_NUM_DEVICES][AB3550_NUM_BANKS] = {
117 [AB3550_DEVID_DAC] = {
118 NO_RANGE,
119 {
120 .count = 2,
121 .range = (struct ab3550_reg_range[]) {
122 {
123 .first = 0xb0,
124 .last = 0xba,
125 .perm = AB3550_PERM_RW,
126 },
127 {
128 .first = 0xbc,
129 .last = 0xc3,
130 .perm = AB3550_PERM_RW,
131 },
132 },
133 },
134 },
135 [AB3550_DEVID_LEDS] = {
136 NO_RANGE,
137 {
138 .count = 2,
139 .range = (struct ab3550_reg_range[]) {
140 {
141 .first = 0x5a,
142 .last = 0x88,
143 .perm = AB3550_PERM_RW,
144 },
145 {
146 .first = 0x8a,
147 .last = 0xad,
148 .perm = AB3550_PERM_RW,
149 },
150 }
151 },
152 },
153 [AB3550_DEVID_POWER] = {
154 {
155 .count = 1,
156 .range = (struct ab3550_reg_range[]) {
157 {
158 .first = 0x21,
159 .last = 0x21,
160 .perm = AB3550_PERM_RO,
161 },
162 }
163 },
164 NO_RANGE,
165 },
166 [AB3550_DEVID_REGULATORS] = {
167 {
168 .count = 1,
169 .range = (struct ab3550_reg_range[]) {
170 {
171 .first = 0x69,
172 .last = 0xa3,
173 .perm = AB3550_PERM_RW,
174 },
175 }
176 },
177 {
178 .count = 1,
179 .range = (struct ab3550_reg_range[]) {
180 {
181 .first = 0x14,
182 .last = 0x16,
183 .perm = AB3550_PERM_RW,
184 },
185 }
186 },
187 },
188 [AB3550_DEVID_SIM] = {
189 {
190 .count = 1,
191 .range = (struct ab3550_reg_range[]) {
192 {
193 .first = 0x21,
194 .last = 0x21,
195 .perm = AB3550_PERM_RO,
196 },
197 }
198 },
199 {
200 .count = 1,
201 .range = (struct ab3550_reg_range[]) {
202 {
203 .first = 0x14,
204 .last = 0x17,
205 .perm = AB3550_PERM_RW,
206 },
207 }
208
209 },
210 },
211 [AB3550_DEVID_UART] = {
212 NO_RANGE,
213 NO_RANGE,
214 },
215 [AB3550_DEVID_RTC] = {
216 {
217 .count = 1,
218 .range = (struct ab3550_reg_range[]) {
219 {
220 .first = 0x00,
221 .last = 0x0c,
222 .perm = AB3550_PERM_RW,
223 },
224 }
225 },
226 NO_RANGE,
227 },
228 [AB3550_DEVID_CHARGER] = {
229 {
230 .count = 2,
231 .range = (struct ab3550_reg_range[]) {
232 {
233 .first = 0x10,
234 .last = 0x1a,
235 .perm = AB3550_PERM_RW,
236 },
237 {
238 .first = 0x21,
239 .last = 0x21,
240 .perm = AB3550_PERM_RO,
241 },
242 }
243 },
244 NO_RANGE,
245 },
246 [AB3550_DEVID_ADC] = {
247 NO_RANGE,
248 {
249 .count = 1,
250 .range = (struct ab3550_reg_range[]) {
251 {
252 .first = 0x20,
253 .last = 0x56,
254 .perm = AB3550_PERM_RW,
255 },
256
257 }
258 },
259 },
260 [AB3550_DEVID_FUELGAUGE] = {
261 {
262 .count = 1,
263 .range = (struct ab3550_reg_range[]) {
264 {
265 .first = 0x21,
266 .last = 0x21,
267 .perm = AB3550_PERM_RO,
268 },
269 }
270 },
271 {
272 .count = 1,
273 .range = (struct ab3550_reg_range[]) {
274 {
275 .first = 0x00,
276 .last = 0x0e,
277 .perm = AB3550_PERM_RW,
278 },
279 }
280 },
281 },
282 [AB3550_DEVID_VIBRATOR] = {
283 NO_RANGE,
284 {
285 .count = 1,
286 .range = (struct ab3550_reg_range[]) {
287 {
288 .first = 0x10,
289 .last = 0x13,
290 .perm = AB3550_PERM_RW,
291 },
292
293 }
294 },
295 },
296 [AB3550_DEVID_CODEC] = {
297 {
298 .count = 2,
299 .range = (struct ab3550_reg_range[]) {
300 {
301 .first = 0x31,
302 .last = 0x63,
303 .perm = AB3550_PERM_RW,
304 },
305 {
306 .first = 0x65,
307 .last = 0x68,
308 .perm = AB3550_PERM_RW,
309 },
310 }
311 },
312 NO_RANGE,
313 },
314};
315
316static struct mfd_cell ab3550_devs[AB3550_NUM_DEVICES] = {
317 [AB3550_DEVID_DAC] = {
318 .name = "ab3550-dac",
319 .id = AB3550_DEVID_DAC,
320 .num_resources = 0,
321 },
322 [AB3550_DEVID_LEDS] = {
323 .name = "ab3550-leds",
324 .id = AB3550_DEVID_LEDS,
325 },
326 [AB3550_DEVID_POWER] = {
327 .name = "ab3550-power",
328 .id = AB3550_DEVID_POWER,
329 },
330 [AB3550_DEVID_REGULATORS] = {
331 .name = "ab3550-regulators",
332 .id = AB3550_DEVID_REGULATORS,
333 },
334 [AB3550_DEVID_SIM] = {
335 .name = "ab3550-sim",
336 .id = AB3550_DEVID_SIM,
337 },
338 [AB3550_DEVID_UART] = {
339 .name = "ab3550-uart",
340 .id = AB3550_DEVID_UART,
341 },
342 [AB3550_DEVID_RTC] = {
343 .name = "ab3550-rtc",
344 .id = AB3550_DEVID_RTC,
345 },
346 [AB3550_DEVID_CHARGER] = {
347 .name = "ab3550-charger",
348 .id = AB3550_DEVID_CHARGER,
349 },
350 [AB3550_DEVID_ADC] = {
351 .name = "ab3550-adc",
352 .id = AB3550_DEVID_ADC,
353 .num_resources = 10,
354 .resources = (struct resource[]) {
355 {
356 .name = "TRIGGER-0",
357 .flags = IORESOURCE_IRQ,
358 .start = 16,
359 .end = 16,
360 },
361 {
362 .name = "TRIGGER-1",
363 .flags = IORESOURCE_IRQ,
364 .start = 17,
365 .end = 17,
366 },
367 {
368 .name = "TRIGGER-2",
369 .flags = IORESOURCE_IRQ,
370 .start = 18,
371 .end = 18,
372 },
373 {
374 .name = "TRIGGER-3",
375 .flags = IORESOURCE_IRQ,
376 .start = 19,
377 .end = 19,
378 },
379 {
380 .name = "TRIGGER-4",
381 .flags = IORESOURCE_IRQ,
382 .start = 20,
383 .end = 20,
384 },
385 {
386 .name = "TRIGGER-5",
387 .flags = IORESOURCE_IRQ,
388 .start = 21,
389 .end = 21,
390 },
391 {
392 .name = "TRIGGER-6",
393 .flags = IORESOURCE_IRQ,
394 .start = 22,
395 .end = 22,
396 },
397 {
398 .name = "TRIGGER-7",
399 .flags = IORESOURCE_IRQ,
400 .start = 23,
401 .end = 23,
402 },
403 {
404 .name = "TRIGGER-VBAT-TXON",
405 .flags = IORESOURCE_IRQ,
406 .start = 13,
407 .end = 13,
408 },
409 {
410 .name = "TRIGGER-VBAT",
411 .flags = IORESOURCE_IRQ,
412 .start = 12,
413 .end = 12,
414 },
415 },
416 },
417 [AB3550_DEVID_FUELGAUGE] = {
418 .name = "ab3550-fuelgauge",
419 .id = AB3550_DEVID_FUELGAUGE,
420 },
421 [AB3550_DEVID_VIBRATOR] = {
422 .name = "ab3550-vibrator",
423 .id = AB3550_DEVID_VIBRATOR,
424 },
425 [AB3550_DEVID_CODEC] = {
426 .name = "ab3550-codec",
427 .id = AB3550_DEVID_CODEC,
428 },
429};
430
431/*
432 * I2C transactions with error messages.
433 */
434static int ab3550_i2c_master_send(struct ab3550 *ab, u8 bank, u8 *data,
435 u8 count)
436{
437 int err;
438
439 err = i2c_master_send(ab->i2c_client[bank], data, count);
440 if (err < 0) {
441 dev_err(&ab->i2c_client[0]->dev, "send error: %d\n", err);
442 return err;
443 }
444 return 0;
445}
446
447static int ab3550_i2c_master_recv(struct ab3550 *ab, u8 bank, u8 *data,
448 u8 count)
449{
450 int err;
451
452 err = i2c_master_recv(ab->i2c_client[bank], data, count);
453 if (err < 0) {
454 dev_err(&ab->i2c_client[0]->dev, "receive error: %d\n", err);
455 return err;
456 }
457 return 0;
458}
459
460/*
461 * Functionality for getting/setting register values.
462 */
463static int get_register_interruptible(struct ab3550 *ab, u8 bank, u8 reg,
464 u8 *value)
465{
466 int err;
467
468 err = mutex_lock_interruptible(&ab->access_mutex);
469 if (err)
470 return err;
471
472 err = ab3550_i2c_master_send(ab, bank, &reg, 1);
473 if (!err)
474 err = ab3550_i2c_master_recv(ab, bank, value, 1);
475
476 mutex_unlock(&ab->access_mutex);
477 return err;
478}
479
480static int get_register_page_interruptible(struct ab3550 *ab, u8 bank,
481 u8 first_reg, u8 *regvals, u8 numregs)
482{
483 int err;
484
485 err = mutex_lock_interruptible(&ab->access_mutex);
486 if (err)
487 return err;
488
489 err = ab3550_i2c_master_send(ab, bank, &first_reg, 1);
490 if (!err)
491 err = ab3550_i2c_master_recv(ab, bank, regvals, numregs);
492
493 mutex_unlock(&ab->access_mutex);
494 return err;
495}
496
497static int mask_and_set_register_interruptible(struct ab3550 *ab, u8 bank,
498 u8 reg, u8 bitmask, u8 bitvalues)
499{
500 int err = 0;
501
502 if (likely(bitmask)) {
503 u8 reg_bits[2] = {reg, 0};
504
505 err = mutex_lock_interruptible(&ab->access_mutex);
506 if (err)
507 return err;
508
509 if (bitmask == 0xFF) /* No need to read in this case. */
510 reg_bits[1] = bitvalues;
511 else { /* Read and modify the register value. */
512 u8 bits;
513
514 err = ab3550_i2c_master_send(ab, bank, &reg, 1);
515 if (err)
516 goto unlock_and_return;
517 err = ab3550_i2c_master_recv(ab, bank, &bits, 1);
518 if (err)
519 goto unlock_and_return;
520 reg_bits[1] = ((~bitmask & bits) |
521 (bitmask & bitvalues));
522 }
523 /* Write the new value. */
524 err = ab3550_i2c_master_send(ab, bank, reg_bits, 2);
525unlock_and_return:
526 mutex_unlock(&ab->access_mutex);
527 }
528 return err;
529}
530
531/*
532 * Read/write permission checking functions.
533 */
534static bool page_write_allowed(const struct ab3550_reg_ranges *ranges,
535 u8 first_reg, u8 last_reg)
536{
537 u8 i;
538
539 if (last_reg < first_reg)
540 return false;
541
542 for (i = 0; i < ranges->count; i++) {
543 if (first_reg < ranges->range[i].first)
544 break;
545 if ((last_reg <= ranges->range[i].last) &&
546 (ranges->range[i].perm & AB3550_PERM_WR))
547 return true;
548 }
549 return false;
550}
551
552static bool reg_write_allowed(const struct ab3550_reg_ranges *ranges, u8 reg)
553{
554 return page_write_allowed(ranges, reg, reg);
555}
556
557static bool page_read_allowed(const struct ab3550_reg_ranges *ranges,
558 u8 first_reg, u8 last_reg)
559{
560 u8 i;
561
562 if (last_reg < first_reg)
563 return false;
564 /* Find the range (if it exists in the list) that includes first_reg. */
565 for (i = 0; i < ranges->count; i++) {
566 if (first_reg < ranges->range[i].first)
567 return false;
568 if (first_reg <= ranges->range[i].last)
569 break;
570 }
571 /* Make sure that the entire range up to and including last_reg is
572 * readable. This may span several of the ranges in the list.
573 */
574 while ((i < ranges->count) &&
575 (ranges->range[i].perm & AB3550_PERM_RD)) {
576 if (last_reg <= ranges->range[i].last)
577 return true;
578 if ((++i >= ranges->count) ||
579 (ranges->range[i].first !=
580 (ranges->range[i - 1].last + 1))) {
581 break;
582 }
583 }
584 return false;
585}
586
587static bool reg_read_allowed(const struct ab3550_reg_ranges *ranges, u8 reg)
588{
589 return page_read_allowed(ranges, reg, reg);
590}
591
592/*
3cb46ac0 593 * The register access functionality.
09bcb3f3 594 */
3cb46ac0 595static int ab3550_get_chip_id(struct device *dev)
09bcb3f3
MW		 596{
597 struct ab3550 *ab = dev_get_drvdata(dev->parent);
598 return (int)ab->chip_id;
599}
600
3cb46ac0
MB		 601static int ab3550_mask_and_set_register_interruptible(struct device *dev,
602 u8 bank, u8 reg, u8 bitmask, u8 bitvalues)
09bcb3f3
MW		 603{
604 struct ab3550 *ab;
605 struct platform_device *pdev = to_platform_device(dev);
606
607 if ((AB3550_NUM_BANKS <= bank) ||
608 !reg_write_allowed(&ab3550_reg_ranges[pdev->id][bank], reg))
609 return -EINVAL;
610
611 ab = dev_get_drvdata(dev->parent);
612 return mask_and_set_register_interruptible(ab, bank, reg,
613 bitmask, bitvalues);
614}
615
3cb46ac0
MB		 616static int ab3550_set_register_interruptible(struct device *dev, u8 bank,
617 u8 reg, u8 value)
09bcb3f3
MW		 618{
619 return ab3550_mask_and_set_register_interruptible(dev, bank, reg, 0xFF,
620 value);
621}
622
3cb46ac0
MB		 623static int ab3550_get_register_interruptible(struct device *dev, u8 bank,
624 u8 reg, u8 *value)
09bcb3f3
MW		 625{
626 struct ab3550 *ab;
627 struct platform_device *pdev = to_platform_device(dev);
628
629 if ((AB3550_NUM_BANKS <= bank) ||
630 !reg_read_allowed(&ab3550_reg_ranges[pdev->id][bank], reg))
631 return -EINVAL;
632
633 ab = dev_get_drvdata(dev->parent);
634 return get_register_interruptible(ab, bank, reg, value);
635}
636
3cb46ac0 637static int ab3550_get_register_page_interruptible(struct device *dev, u8 bank,
09bcb3f3
MW		 638 u8 first_reg, u8 *regvals, u8 numregs)
639{
640 struct ab3550 *ab;
641 struct platform_device *pdev = to_platform_device(dev);
642
643 if ((AB3550_NUM_BANKS <= bank) ||
644 !page_read_allowed(&ab3550_reg_ranges[pdev->id][bank],
645 first_reg, (first_reg + numregs - 1)))
646 return -EINVAL;
647
648 ab = dev_get_drvdata(dev->parent);
649 return get_register_page_interruptible(ab, bank, first_reg, regvals,
650 numregs);
651}
652
3cb46ac0
MB		 653static int ab3550_event_registers_startup_state_get(struct device *dev,
654 u8 *event)
09bcb3f3
MW		 655{
656 struct ab3550 *ab;
657
658 ab = dev_get_drvdata(dev->parent);
659 if (!ab->startup_events_read)
660 return -EAGAIN; /* Try again later */
661
662 memcpy(event, ab->startup_events, AB3550_NUM_EVENT_REG);
663 return 0;
664}
665
3cb46ac0 666static int ab3550_startup_irq_enabled(struct device *dev, unsigned int irq)
09bcb3f3
MW		 667{
668 struct ab3550 *ab;
669 struct ab3550_platform_data *plf_data;
670 bool val;
671
d5bb1221 672 ab = irq_get_chip_data(irq);
09bcb3f3
MW		 673 plf_data = ab->i2c_client[0]->dev.platform_data;
674 irq -= plf_data->irq.base;
675 val = ((ab->startup_events[irq / 8] & BIT(irq % 8)) != 0);
676
677 return val;
678}
679
680static struct abx500_ops ab3550_ops = {
681 .get_chip_id = ab3550_get_chip_id,
682 .get_register = ab3550_get_register_interruptible,
683 .set_register = ab3550_set_register_interruptible,
684 .get_register_page = ab3550_get_register_page_interruptible,
685 .set_register_page = NULL,
686 .mask_and_set_register = ab3550_mask_and_set_register_interruptible,
687 .event_registers_startup_state_get =
688 ab3550_event_registers_startup_state_get,
689 .startup_irq_enabled = ab3550_startup_irq_enabled,
690};
691
692static irqreturn_t ab3550_irq_handler(int irq, void *data)
693{
694 struct ab3550 *ab = data;
695 int err;
696 unsigned int i;
697 u8 e[AB3550_NUM_EVENT_REG];
698 u8 *events;
699 unsigned long flags;
700
701 events = (ab->startup_events_read ? e : ab->startup_events);
702
703 err = get_register_page_interruptible(ab, AB3550_EVENT_BANK,
704 AB3550_EVENT_REG, events, AB3550_NUM_EVENT_REG);
705 if (err)
706 goto err_event_rd;
707
708 if (!ab->startup_events_read) {
709 dev_info(&ab->i2c_client[0]->dev,
710 "startup events 0x%x,0x%x,0x%x,0x%x,0x%x\n",
711 ab->startup_events[0], ab->startup_events[1],
712 ab->startup_events[2], ab->startup_events[3],
713 ab->startup_events[4]);
714 ab->startup_events_read = true;
715 goto out;
716 }
717
718 /* The two highest bits in event[4] are not used. */
719 events[4] &= 0x3f;
720
721 spin_lock_irqsave(&ab->event_lock, flags);
722 for (i = 0; i < AB3550_NUM_EVENT_REG; i++)
723 events[i] &= ~ab->event_mask[i];
724 spin_unlock_irqrestore(&ab->event_lock, flags);
725
726 for (i = 0; i < AB3550_NUM_EVENT_REG; i++) {
727 u8 bit;
728 u8 event_reg;
729
730 dev_dbg(&ab->i2c_client[0]->dev, "IRQ Event[%d]: 0x%2x\n",
731 i, events[i]);
732
733 event_reg = events[i];
734 for (bit = 0; event_reg; bit++, event_reg /= 2) {
735 if (event_reg % 2) {
736 unsigned int irq;
737 struct ab3550_platform_data *plf_data;
738
739 plf_data = ab->i2c_client[0]->dev.platform_data;
740 irq = plf_data->irq.base + (i * 8) + bit;
741 handle_nested_irq(irq);
742 }
743 }
744 }
745out:
746 return IRQ_HANDLED;
747
748err_event_rd:
749 dev_dbg(&ab->i2c_client[0]->dev, "error reading event registers\n");
750 return IRQ_HANDLED;
751}
752
753#ifdef CONFIG_DEBUG_FS
754static struct ab3550_reg_ranges debug_ranges[AB3550_NUM_BANKS] = {
755 {
756 .count = 6,
757 .range = (struct ab3550_reg_range[]) {
758 {
759 .first = 0x00,
760 .last = 0x0e,
761 },
762 {
763 .first = 0x10,
764 .last = 0x1a,
765 },
766 {
767 .first = 0x1e,
768 .last = 0x4f,
769 },
770 {
771 .first = 0x51,
772 .last = 0x63,
773 },
774 {
775 .first = 0x65,
776 .last = 0xa3,
777 },
778 {
779 .first = 0xa5,
780 .last = 0xa8,
781 },
782 }
783 },
784 {
785 .count = 8,
786 .range = (struct ab3550_reg_range[]) {
787 {
788 .first = 0x00,
789 .last = 0x0e,
790 },
791 {
792 .first = 0x10,
793 .last = 0x17,
794 },
795 {
796 .first = 0x1a,
797 .last = 0x1c,
798 },
799 {
800 .first = 0x20,
801 .last = 0x56,
802 },
803 {
804 .first = 0x5a,
805 .last = 0x88,
806 },
807 {
808 .first = 0x8a,
809 .last = 0xad,
810 },
811 {
812 .first = 0xb0,
813 .last = 0xba,
814 },
815 {
816 .first = 0xbc,
817 .last = 0xc3,
818 },
819 }
820 },
821};
822
823static int ab3550_registers_print(struct seq_file *s, void *p)
824{
825 struct ab3550 *ab = s->private;
826 int bank;
827
828 seq_printf(s, AB3550_NAME_STRING " register values:\n");
829
830 for (bank = 0; bank < AB3550_NUM_BANKS; bank++) {
831 unsigned int i;
832
833 seq_printf(s, " bank %d:\n", bank);
834 for (i = 0; i < debug_ranges[bank].count; i++) {
835 u8 reg;
836
837 for (reg = debug_ranges[bank].range[i].first;
838 reg <= debug_ranges[bank].range[i].last;
839 reg++) {
840 u8 value;
841
842 get_register_interruptible(ab, bank, reg,
843 &value);
844 seq_printf(s, " [%d/0x%02X]: 0x%02X\n", bank,
845 reg, value);
846 }
847 }
848 }
849 return 0;
850}
851
852static int ab3550_registers_open(struct inode *inode, struct file *file)
853{
854 return single_open(file, ab3550_registers_print, inode->i_private);
855}
856
857static const struct file_operations ab3550_registers_fops = {
858 .open = ab3550_registers_open,
859 .read = seq_read,
860 .llseek = seq_lseek,
861 .release = single_release,
862 .owner = THIS_MODULE,
863};
864
865static int ab3550_bank_print(struct seq_file *s, void *p)
866{
867 struct ab3550 *ab = s->private;
868
869 seq_printf(s, "%d\n", ab->debug_bank);
870 return 0;
871}
872
873static int ab3550_bank_open(struct inode *inode, struct file *file)
874{
875 return single_open(file, ab3550_bank_print, inode->i_private);
876}
877
878static ssize_t ab3550_bank_write(struct file *file,
879 const char __user *user_buf,
880 size_t count, loff_t *ppos)
881{
882 struct ab3550 *ab = ((struct seq_file *)(file->private_data))->private;
09bcb3f3
MW		 883 unsigned long user_bank;
884 int err;
885
886 /* Get userspace string and assure termination */
402fb487 887 err = kstrtoul_from_user(user_buf, count, 0, &user_bank);
09bcb3f3 888 if (err)
402fb487 889 return err;
09bcb3f3
MW		 890
891 if (user_bank >= AB3550_NUM_BANKS) {
892 dev_err(&ab->i2c_client[0]->dev,
893 "debugfs error input > number of banks\n");
894 return -EINVAL;
895 }
896
897 ab->debug_bank = user_bank;
898
402fb487 899 return count;
09bcb3f3
MW		 900}
901
902static int ab3550_address_print(struct seq_file *s, void *p)
903{
904 struct ab3550 *ab = s->private;
905
906 seq_printf(s, "0x%02X\n", ab->debug_address);
907 return 0;
908}
909
910static int ab3550_address_open(struct inode *inode, struct file *file)
911{
912 return single_open(file, ab3550_address_print, inode->i_private);
913}
914
915static ssize_t ab3550_address_write(struct file *file,
916 const char __user *user_buf,
917 size_t count, loff_t *ppos)
918{
919 struct ab3550 *ab = ((struct seq_file *)(file->private_data))->private;
09bcb3f3
MW		 920 unsigned long user_address;
921 int err;
922
923 /* Get userspace string and assure termination */
402fb487 924 err = kstrtoul_from_user(user_buf, count, 0, &user_address);
09bcb3f3 925 if (err)
402fb487
PH		 926 return err;
927
09bcb3f3
MW		 928 if (user_address > 0xff) {
929 dev_err(&ab->i2c_client[0]->dev,
930 "debugfs error input > 0xff\n");
931 return -EINVAL;
932 }
933 ab->debug_address = user_address;
402fb487 934 return count;
09bcb3f3
MW		 935}
936
937static int ab3550_val_print(struct seq_file *s, void *p)
938{
939 struct ab3550 *ab = s->private;
940 int err;
941 u8 regvalue;
942
943 err = get_register_interruptible(ab, (u8)ab->debug_bank,
944 (u8)ab->debug_address, &regvalue);
945 if (err)
946 return -EINVAL;
947 seq_printf(s, "0x%02X\n", regvalue);
948
949 return 0;
950}
951
952static int ab3550_val_open(struct inode *inode, struct file *file)
953{
954 return single_open(file, ab3550_val_print, inode->i_private);
955}
956
957static ssize_t ab3550_val_write(struct file *file,
958 const char __user *user_buf,
959 size_t count, loff_t *ppos)
960{
961 struct ab3550 *ab = ((struct seq_file *)(file->private_data))->private;
09bcb3f3
MW		 962 unsigned long user_val;
963 int err;
964 u8 regvalue;
965
966 /* Get userspace string and assure termination */
402fb487 967 err = kstrtoul_from_user(user_buf, count, 0, &user_val);
09bcb3f3 968 if (err)
402fb487
PH		 969 return err;
970
09bcb3f3
MW		 971 if (user_val > 0xff) {
972 dev_err(&ab->i2c_client[0]->dev,
973 "debugfs error input > 0xff\n");
974 return -EINVAL;
975 }
976 err = mask_and_set_register_interruptible(
977 ab, (u8)ab->debug_bank,
978 (u8)ab->debug_address, 0xFF, (u8)user_val);
979 if (err)
980 return -EINVAL;
981
982 get_register_interruptible(ab, (u8)ab->debug_bank,
983 (u8)ab->debug_address, &regvalue);
984 if (err)
985 return -EINVAL;
986
402fb487 987 return count;
09bcb3f3
MW		 988}
989
990static const struct file_operations ab3550_bank_fops = {
991 .open = ab3550_bank_open,
992 .write = ab3550_bank_write,
993 .read = seq_read,
994 .llseek = seq_lseek,
995 .release = single_release,
996 .owner = THIS_MODULE,
997};
998
999static const struct file_operations ab3550_address_fops = {
1000 .open = ab3550_address_open,
1001 .write = ab3550_address_write,
1002 .read = seq_read,
1003 .llseek = seq_lseek,
1004 .release = single_release,
1005 .owner = THIS_MODULE,
1006};
1007
1008static const struct file_operations ab3550_val_fops = {
1009 .open = ab3550_val_open,
1010 .write = ab3550_val_write,
1011 .read = seq_read,
1012 .llseek = seq_lseek,
1013 .release = single_release,
1014 .owner = THIS_MODULE,
1015};
1016
1017static struct dentry *ab3550_dir;
1018static struct dentry *ab3550_reg_file;
1019static struct dentry *ab3550_bank_file;
1020static struct dentry *ab3550_address_file;
1021static struct dentry *ab3550_val_file;
1022
1023static inline void ab3550_setup_debugfs(struct ab3550 *ab)
1024{
1025 ab->debug_bank = 0;
1026 ab->debug_address = 0x00;
1027
1028 ab3550_dir = debugfs_create_dir(AB3550_NAME_STRING, NULL);
1029 if (!ab3550_dir)
1030 goto exit_no_debugfs;
1031
1032 ab3550_reg_file = debugfs_create_file("all-registers",
1033 S_IRUGO, ab3550_dir, ab, &ab3550_registers_fops);
1034 if (!ab3550_reg_file)
1035 goto exit_destroy_dir;
1036
1037 ab3550_bank_file = debugfs_create_file("register-bank",
90c861c2 1038 (S_IRUGO | S_IWUSR), ab3550_dir, ab, &ab3550_bank_fops);
09bcb3f3
MW		 1039 if (!ab3550_bank_file)
1040 goto exit_destroy_reg;
1041
1042 ab3550_address_file = debugfs_create_file("register-address",
90c861c2 1043 (S_IRUGO | S_IWUSR), ab3550_dir, ab, &ab3550_address_fops);
09bcb3f3
MW		 1044 if (!ab3550_address_file)
1045 goto exit_destroy_bank;
1046
1047 ab3550_val_file = debugfs_create_file("register-value",
90c861c2 1048 (S_IRUGO | S_IWUSR), ab3550_dir, ab, &ab3550_val_fops);
09bcb3f3
MW		 1049 if (!ab3550_val_file)
1050 goto exit_destroy_address;
1051
1052 return;
1053
1054exit_destroy_address:
1055 debugfs_remove(ab3550_address_file);
1056exit_destroy_bank:
1057 debugfs_remove(ab3550_bank_file);
1058exit_destroy_reg:
1059 debugfs_remove(ab3550_reg_file);
1060exit_destroy_dir:
1061 debugfs_remove(ab3550_dir);
1062exit_no_debugfs:
1063 dev_err(&ab->i2c_client[0]->dev, "failed to create debugfs entries.\n");
1064 return;
1065}
1066
1067static inline void ab3550_remove_debugfs(void)
1068{
1069 debugfs_remove(ab3550_val_file);
1070 debugfs_remove(ab3550_address_file);
1071 debugfs_remove(ab3550_bank_file);
1072 debugfs_remove(ab3550_reg_file);
1073 debugfs_remove(ab3550_dir);
1074}
1075
1076#else /* !CONFIG_DEBUG_FS */
1077static inline void ab3550_setup_debugfs(struct ab3550 *ab)
1078{
1079}
1080static inline void ab3550_remove_debugfs(void)
1081{
1082}
1083#endif
1084
1085/*
1086 * Basic set-up, datastructure creation/destruction and I2C interface.
1087 * This sets up a default config in the AB3550 chip so that it
1088 * will work as expected.
1089 */
1090static int __init ab3550_setup(struct ab3550 *ab)
1091{
1092 int err = 0;
1093 int i;
1094 struct ab3550_platform_data *plf_data;
1095 struct abx500_init_settings *settings;
1096
1097 plf_data = ab->i2c_client[0]->dev.platform_data;
1098 settings = plf_data->init_settings;
1099
1100 for (i = 0; i < plf_data->init_settings_sz; i++) {
1101 err = mask_and_set_register_interruptible(ab,
1102 settings[i].bank,
1103 settings[i].reg,
1104 0xFF, settings[i].setting);
1105 if (err)
1106 goto exit_no_setup;
1107
1108 /* If event mask register update the event mask in ab3550 */
1109 if ((settings[i].bank == 0) &&
1110 (AB3550_IMR1 <= settings[i].reg) &&
1111 (settings[i].reg <= AB3550_IMR5)) {
1112 ab->event_mask[settings[i].reg - AB3550_IMR1] =
1113 settings[i].setting;
1114 }
1115 }
1116exit_no_setup:
1117 return err;
1118}
1119
1120static void ab3550_mask_work(struct work_struct *work)
1121{
1122 struct ab3550 *ab = container_of(work, struct ab3550, mask_work);
1123 int i;
1124 unsigned long flags;
1125 u8 mask[AB3550_NUM_EVENT_REG];
1126
1127 spin_lock_irqsave(&ab->event_lock, flags);
1128 for (i = 0; i < AB3550_NUM_EVENT_REG; i++)
1129 mask[i] = ab->event_mask[i];
1130 spin_unlock_irqrestore(&ab->event_lock, flags);
1131
1132 for (i = 0; i < AB3550_NUM_EVENT_REG; i++) {
1133 int err;
1134
1135 err = mask_and_set_register_interruptible(ab, 0,
1136 (AB3550_IMR1 + i), ~0, mask[i]);
1137 if (err)
1138 dev_err(&ab->i2c_client[0]->dev,
1139 "ab3550_mask_work failed 0x%x,0x%x\n",
1140 (AB3550_IMR1 + i), mask[i]);
1141 }
1142}
1143
c91ad349 1144static void ab3550_mask(struct irq_data *data)
09bcb3f3
MW		 1145{
1146 unsigned long flags;
1147 struct ab3550 *ab;
1148 struct ab3550_platform_data *plf_data;
c91ad349 1149 int irq;
09bcb3f3 1150
c91ad349 1151 ab = irq_data_get_irq_chip_data(data);
09bcb3f3 1152 plf_data = ab->i2c_client[0]->dev.platform_data;
c91ad349 1153 irq = data->irq - plf_data->irq.base;
09bcb3f3
MW		 1154
1155 spin_lock_irqsave(&ab->event_lock, flags);
1156 ab->event_mask[irq / 8] |= BIT(irq % 8);
1157 spin_unlock_irqrestore(&ab->event_lock, flags);
1158
1159 schedule_work(&ab->mask_work);
1160}
1161
c91ad349 1162static void ab3550_unmask(struct irq_data *data)
09bcb3f3
MW		 1163{
1164 unsigned long flags;
1165 struct ab3550 *ab;
1166 struct ab3550_platform_data *plf_data;
c91ad349 1167 int irq;
09bcb3f3 1168
c91ad349 1169 ab = irq_data_get_irq_chip_data(data);
09bcb3f3 1170 plf_data = ab->i2c_client[0]->dev.platform_data;
c91ad349 1171 irq = data->irq - plf_data->irq.base;
09bcb3f3
MW		 1172
1173 spin_lock_irqsave(&ab->event_lock, flags);
1174 ab->event_mask[irq / 8] &= ~BIT(irq % 8);
1175 spin_unlock_irqrestore(&ab->event_lock, flags);
1176
1177 schedule_work(&ab->mask_work);
1178}
1179
c91ad349 1180static void noop(struct irq_data *data)
09bcb3f3
MW		 1181{
1182}
1183
1184static struct irq_chip ab3550_irq_chip = {
1185 .name = "ab3550-core", /* Keep the same name as the request */
c91ad349
MB		 1186 .irq_disable = ab3550_mask, /* No default to mask in chip.c */
1187 .irq_ack = noop,
1188 .irq_mask = ab3550_mask,
1189 .irq_unmask = ab3550_unmask,
09bcb3f3
MW		 1190};
1191
1192struct ab_family_id {
1193 u8 id;
1194 char *name;
1195};
1196
1197static const struct ab_family_id ids[] __initdata = {
1198 /* AB3550 */
1199 {
1200 .id = AB3550_P1A,
1201 .name = "P1A"
1202 },
1203 /* Terminator */
1204 {
1205 .id = 0x00,
1206 }
1207};
1208
1209static int __init ab3550_probe(struct i2c_client *client,
1210 const struct i2c_device_id *id)
1211{
1212 struct ab3550 *ab;
1213 struct ab3550_platform_data *ab3550_plf_data =
1214 client->dev.platform_data;
1215 int err;
1216 int i;
1217 int num_i2c_clients = 0;
1218
1219 ab = kzalloc(sizeof(struct ab3550), GFP_KERNEL);
1220 if (!ab) {
1221 dev_err(&client->dev,
1222 "could not allocate " AB3550_NAME_STRING " device\n");
1223 return -ENOMEM;
1224 }
1225
1226 /* Initialize data structure */
1227 mutex_init(&ab->access_mutex);
1228 spin_lock_init(&ab->event_lock);
1229 ab->i2c_client[0] = client;
1230
1231 i2c_set_clientdata(client, ab);
1232
1233 /* Read chip ID register */
1234 err = get_register_interruptible(ab, 0, AB3550_CID_REG, &ab->chip_id);
1235 if (err) {
1236 dev_err(&client->dev, "could not communicate with the analog "
1237 "baseband chip\n");
1238 goto exit_no_detect;
1239 }
1240
1241 for (i = 0; ids[i].id != 0x0; i++) {
1242 if (ids[i].id == ab->chip_id) {
1243 snprintf(&ab->chip_name[0], sizeof(ab->chip_name) - 1,
1244 AB3550_ID_FORMAT_STRING, ids[i].name);
1245 break;
1246 }
1247 }
1248
1249 if (ids[i].id == 0x0) {
1250 dev_err(&client->dev, "unknown analog baseband chip id: 0x%x\n",
1251 ab->chip_id);
1252 dev_err(&client->dev, "driver not started!\n");
1253 goto exit_no_detect;
1254 }
1255
1256 dev_info(&client->dev, "detected AB chip: %s\n", &ab->chip_name[0]);
1257
1258 /* Attach other dummy I2C clients. */
1259 while (++num_i2c_clients < AB3550_NUM_BANKS) {
1260 ab->i2c_client[num_i2c_clients] =
1261 i2c_new_dummy(client->adapter,
1262 (client->addr + num_i2c_clients));
1263 if (!ab->i2c_client[num_i2c_clients]) {
1264 err = -ENOMEM;
1265 goto exit_no_dummy_client;
1266 }
1267 strlcpy(ab->i2c_client[num_i2c_clients]->name, id->name,
1268 sizeof(ab->i2c_client[num_i2c_clients]->name));
1269 }
1270
1271 err = ab3550_setup(ab);
1272 if (err)
1273 goto exit_no_setup;
1274
1275 INIT_WORK(&ab->mask_work, ab3550_mask_work);
1276
1277 for (i = 0; i < ab3550_plf_data->irq.count; i++) {
1278 unsigned int irq;
1279
1280 irq = ab3550_plf_data->irq.base + i;
d5bb1221
TG		 1281 irq_set_chip_data(irq, ab);
1282 irq_set_chip_and_handler(irq, &ab3550_irq_chip,
1283 handle_simple_irq);
1284 irq_set_nested_thread(irq, 1);
09bcb3f3
MW		 1285#ifdef CONFIG_ARM
1286 set_irq_flags(irq, IRQF_VALID);
1287#else
d5bb1221 1288 irq_set_noprobe(irq);
09bcb3f3
MW		 1289#endif
1290 }
1291
1292 err = request_threaded_irq(client->irq, NULL, ab3550_irq_handler,
1293 IRQF_ONESHOT, "ab3550-core", ab);
1294 /* This real unpredictable IRQ is of course sampled for entropy */
1295 rand_initialize_irq(client->irq);
1296
1297 if (err)
1298 goto exit_no_irq;
1299
1300 err = abx500_register_ops(&client->dev, &ab3550_ops);
1301 if (err)
1302 goto exit_no_ops;
1303
1304 /* Set up and register the platform devices. */
1f235a37
SO		 1305 for (i = 0; i < AB3550_NUM_DEVICES; i++) {
1306 ab3550_devs[i].platform_data = ab3550_plf_data->dev_data[i];
1307 ab3550_devs[i].pdata_size = ab3550_plf_data->dev_data_sz[i];
1308 }
09bcb3f3
MW		 1309
1310 err = mfd_add_devices(&client->dev, 0, ab3550_devs,
1311 ARRAY_SIZE(ab3550_devs), NULL,
1312 ab3550_plf_data->irq.base);
1313
1314 ab3550_setup_debugfs(ab);
1315
1316 return 0;
1317
1318exit_no_ops:
1319exit_no_irq:
1320exit_no_setup:
1321exit_no_dummy_client:
1322 /* Unregister the dummy i2c clients. */
1323 while (--num_i2c_clients)
1324 i2c_unregister_device(ab->i2c_client[num_i2c_clients]);
1325exit_no_detect:
1326 kfree(ab);
1327 return err;
1328}
1329
1330static int __exit ab3550_remove(struct i2c_client *client)
1331{
1332 struct ab3550 *ab = i2c_get_clientdata(client);
1333 int num_i2c_clients = AB3550_NUM_BANKS;
1334
1335 mfd_remove_devices(&client->dev);
1336 ab3550_remove_debugfs();
1337
1338 while (--num_i2c_clients)
1339 i2c_unregister_device(ab->i2c_client[num_i2c_clients]);
1340
1341 /*
1342 * At this point, all subscribers should have unregistered
1343 * their notifiers so deactivate IRQ
1344 */
1345 free_irq(client->irq, ab);
09bcb3f3
MW		 1346 kfree(ab);
1347 return 0;
1348}
1349
1350static const struct i2c_device_id ab3550_id[] = {
1351 {AB3550_NAME_STRING, 0},
1352 {}
1353};
1354MODULE_DEVICE_TABLE(i2c, ab3550_id);
1355
1356static struct i2c_driver ab3550_driver = {
1357 .driver = {
1358 .name = AB3550_NAME_STRING,
1359 .owner = THIS_MODULE,
1360 },
1361 .id_table = ab3550_id,
1362 .probe = ab3550_probe,
1363 .remove = __exit_p(ab3550_remove),
1364};
1365
1366static int __init ab3550_i2c_init(void)
1367{
1368 return i2c_add_driver(&ab3550_driver);
1369}
1370
1371static void __exit ab3550_i2c_exit(void)
1372{
1373 i2c_del_driver(&ab3550_driver);
1374}
1375
1376subsys_initcall(ab3550_i2c_init);
1377module_exit(ab3550_i2c_exit);
1378
1379MODULE_AUTHOR("Mattias Wallin <mattias.wallin@stericsson.com>");
1380MODULE_DESCRIPTION("AB3550 core driver");
1381MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)