[linux-block.git] / drivers / mfd / 88pm800.c

/*
 * Base driver for Marvell 88PM800
 *
 * Copyright (C) 2012 Marvell International Ltd.
 * Haojian Zhuang <haojian.zhuang@marvell.com>
 * Joseph(Yossi) Hanin <yhanin@marvell.com>
 * Qiao Zhou <zhouqiao@marvell.com>
 *
 * This file is subject to the terms and conditions of the GNU General
 * Public License. See the file "COPYING" in the main directory of this
 * archive for more details.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/mfd/core.h>
#include <linux/mfd/88pm80x.h>
#include <linux/slab.h>

#define PM800_CHIP_ID			(0x00)

/* Interrupt Registers */
#define PM800_INT_STATUS1		(0x05)
#define PM800_ONKEY_INT_STS1		(1 << 0)
#define PM800_EXTON_INT_STS1		(1 << 1)
#define PM800_CHG_INT_STS1			(1 << 2)
#define PM800_BAT_INT_STS1			(1 << 3)
#define PM800_RTC_INT_STS1			(1 << 4)
#define PM800_CLASSD_OC_INT_STS1	(1 << 5)

#define PM800_INT_STATUS2		(0x06)
#define PM800_VBAT_INT_STS2		(1 << 0)
#define PM800_VSYS_INT_STS2		(1 << 1)
#define PM800_VCHG_INT_STS2		(1 << 2)
#define PM800_TINT_INT_STS2		(1 << 3)
#define PM800_GPADC0_INT_STS2	(1 << 4)
#define PM800_TBAT_INT_STS2		(1 << 5)
#define PM800_GPADC2_INT_STS2	(1 << 6)
#define PM800_GPADC3_INT_STS2	(1 << 7)

#define PM800_INT_STATUS3		(0x07)

#define PM800_INT_STATUS4		(0x08)
#define PM800_GPIO0_INT_STS4		(1 << 0)
#define PM800_GPIO1_INT_STS4		(1 << 1)
#define PM800_GPIO2_INT_STS4		(1 << 2)
#define PM800_GPIO3_INT_STS4		(1 << 3)
#define PM800_GPIO4_INT_STS4		(1 << 4)

#define PM800_INT_ENA_1		(0x09)
#define PM800_ONKEY_INT_ENA1		(1 << 0)
#define PM800_EXTON_INT_ENA1		(1 << 1)
#define PM800_CHG_INT_ENA1			(1 << 2)
#define PM800_BAT_INT_ENA1			(1 << 3)
#define PM800_RTC_INT_ENA1			(1 << 4)
#define PM800_CLASSD_OC_INT_ENA1	(1 << 5)

#define PM800_INT_ENA_2		(0x0A)
#define PM800_VBAT_INT_ENA2		(1 << 0)
#define PM800_VSYS_INT_ENA2		(1 << 1)
#define PM800_VCHG_INT_ENA2		(1 << 2)
#define PM800_TINT_INT_ENA2		(1 << 3)

#define PM800_INT_ENA_3		(0x0B)
#define PM800_GPADC0_INT_ENA3		(1 << 0)
#define PM800_GPADC1_INT_ENA3		(1 << 1)
#define PM800_GPADC2_INT_ENA3		(1 << 2)
#define PM800_GPADC3_INT_ENA3		(1 << 3)
#define PM800_GPADC4_INT_ENA3		(1 << 4)

#define PM800_INT_ENA_4		(0x0C)
#define PM800_GPIO0_INT_ENA4		(1 << 0)
#define PM800_GPIO1_INT_ENA4		(1 << 1)
#define PM800_GPIO2_INT_ENA4		(1 << 2)
#define PM800_GPIO3_INT_ENA4		(1 << 3)
#define PM800_GPIO4_INT_ENA4		(1 << 4)

/* number of INT_ENA & INT_STATUS regs */
#define PM800_INT_REG_NUM			(4)

/* Interrupt Number in 88PM800 */
enum {
	PM800_IRQ_ONKEY,	/*EN1b0 *//*0 */
	PM800_IRQ_EXTON,	/*EN1b1 */
	PM800_IRQ_CHG,		/*EN1b2 */
	PM800_IRQ_BAT,		/*EN1b3 */
	PM800_IRQ_RTC,		/*EN1b4 */
	PM800_IRQ_CLASSD,	/*EN1b5 *//*5 */
	PM800_IRQ_VBAT,		/*EN2b0 */
	PM800_IRQ_VSYS,		/*EN2b1 */
	PM800_IRQ_VCHG,		/*EN2b2 */
	PM800_IRQ_TINT,		/*EN2b3 */
	PM800_IRQ_GPADC0,	/*EN3b0 *//*10 */
	PM800_IRQ_GPADC1,	/*EN3b1 */
	PM800_IRQ_GPADC2,	/*EN3b2 */
	PM800_IRQ_GPADC3,	/*EN3b3 */
	PM800_IRQ_GPADC4,	/*EN3b4 */
	PM800_IRQ_GPIO0,	/*EN4b0 *//*15 */
	PM800_IRQ_GPIO1,	/*EN4b1 */
	PM800_IRQ_GPIO2,	/*EN4b2 */
	PM800_IRQ_GPIO3,	/*EN4b3 */
	PM800_IRQ_GPIO4,	/*EN4b4 *//*19 */
	PM800_MAX_IRQ,
};

enum {
	/* Procida */
	PM800_CHIP_A0  = 0x60,
	PM800_CHIP_A1  = 0x61,
	PM800_CHIP_B0  = 0x62,
	PM800_CHIP_C0  = 0x63,
	PM800_CHIP_END = PM800_CHIP_C0,

	/* Make sure to update this to the last stepping */
	PM8XXX_CHIP_END = PM800_CHIP_END
};

static const struct i2c_device_id pm80x_id_table[] = {
	{"88PM800", CHIP_PM800},
	{} /* NULL terminated */
};
MODULE_DEVICE_TABLE(i2c, pm80x_id_table);

static struct resource rtc_resources[] = {
	{
	 .name = "88pm80x-rtc",
	 .start = PM800_IRQ_RTC,
	 .end = PM800_IRQ_RTC,
	 .flags = IORESOURCE_IRQ,
	 },
};

static struct mfd_cell rtc_devs[] = {
	{
	 .name = "88pm80x-rtc",
	 .num_resources = ARRAY_SIZE(rtc_resources),
	 .resources = &rtc_resources[0],
	 .id = -1,
	 },
};

static struct resource onkey_resources[] = {
	{
	 .name = "88pm80x-onkey",
	 .start = PM800_IRQ_ONKEY,
	 .end = PM800_IRQ_ONKEY,
	 .flags = IORESOURCE_IRQ,
	 },
};

static struct mfd_cell onkey_devs[] = {
	{
	 .name = "88pm80x-onkey",
	 .num_resources = 1,
	 .resources = &onkey_resources[0],
	 .id = -1,
	 },
};

static const struct regmap_irq pm800_irqs[] = {
	/* INT0 */
	[PM800_IRQ_ONKEY] = {
		.mask = PM800_ONKEY_INT_ENA1,
	},
	[PM800_IRQ_EXTON] = {
		.mask = PM800_EXTON_INT_ENA1,
	},
	[PM800_IRQ_CHG] = {
		.mask = PM800_CHG_INT_ENA1,
	},
	[PM800_IRQ_BAT] = {
		.mask = PM800_BAT_INT_ENA1,
	},
	[PM800_IRQ_RTC] = {
		.mask = PM800_RTC_INT_ENA1,
	},
	[PM800_IRQ_CLASSD] = {
		.mask = PM800_CLASSD_OC_INT_ENA1,
	},
	/* INT1 */
	[PM800_IRQ_VBAT] = {
		.reg_offset = 1,
		.mask = PM800_VBAT_INT_ENA2,
	},
	[PM800_IRQ_VSYS] = {
		.reg_offset = 1,
		.mask = PM800_VSYS_INT_ENA2,
	},
	[PM800_IRQ_VCHG] = {
		.reg_offset = 1,
		.mask = PM800_VCHG_INT_ENA2,
	},
	[PM800_IRQ_TINT] = {
		.reg_offset = 1,
		.mask = PM800_TINT_INT_ENA2,
	},
	/* INT2 */
	[PM800_IRQ_GPADC0] = {
		.reg_offset = 2,
		.mask = PM800_GPADC0_INT_ENA3,
	},
	[PM800_IRQ_GPADC1] = {
		.reg_offset = 2,
		.mask = PM800_GPADC1_INT_ENA3,
	},
	[PM800_IRQ_GPADC2] = {
		.reg_offset = 2,
		.mask = PM800_GPADC2_INT_ENA3,
	},
	[PM800_IRQ_GPADC3] = {
		.reg_offset = 2,
		.mask = PM800_GPADC3_INT_ENA3,
	},
	[PM800_IRQ_GPADC4] = {
		.reg_offset = 2,
		.mask = PM800_GPADC4_INT_ENA3,
	},
	/* INT3 */
	[PM800_IRQ_GPIO0] = {
		.reg_offset = 3,
		.mask = PM800_GPIO0_INT_ENA4,
	},
	[PM800_IRQ_GPIO1] = {
		.reg_offset = 3,
		.mask = PM800_GPIO1_INT_ENA4,
	},
	[PM800_IRQ_GPIO2] = {
		.reg_offset = 3,
		.mask = PM800_GPIO2_INT_ENA4,
	},
	[PM800_IRQ_GPIO3] = {
		.reg_offset = 3,
		.mask = PM800_GPIO3_INT_ENA4,
	},
	[PM800_IRQ_GPIO4] = {
		.reg_offset = 3,
		.mask = PM800_GPIO4_INT_ENA4,
	},
};

static int device_gpadc_init(struct pm80x_chip *chip,
				       struct pm80x_platform_data *pdata)
{
	struct pm80x_subchip *subchip = chip->subchip;
	struct regmap *map = subchip->regmap_gpadc;
	int data = 0, mask = 0, ret = 0;

	if (!map) {
		dev_warn(chip->dev,
			 "Warning: gpadc regmap is not available!\n");
		return -EINVAL;
	}
	/*
	 * initialize GPADC without activating it turn on GPADC
	 * measurments
	 */
	ret = regmap_update_bits(map,
				 PM800_GPADC_MISC_CONFIG2,
				 PM800_GPADC_MISC_GPFSM_EN,
				 PM800_GPADC_MISC_GPFSM_EN);
	if (ret < 0)
		goto out;
	/*
	 * This function configures the ADC as requires for
	 * CP implementation.CP does not "own" the ADC configuration
	 * registers and relies on AP.
	 * Reason: enable automatic ADC measurements needed
	 * for CP to get VBAT and RF temperature readings.
	 */
	ret = regmap_update_bits(map, PM800_GPADC_MEAS_EN1,
				 PM800_MEAS_EN1_VBAT, PM800_MEAS_EN1_VBAT);
	if (ret < 0)
		goto out;
	ret = regmap_update_bits(map, PM800_GPADC_MEAS_EN2,
				 (PM800_MEAS_EN2_RFTMP | PM800_MEAS_GP0_EN),
				 (PM800_MEAS_EN2_RFTMP | PM800_MEAS_GP0_EN));
	if (ret < 0)
		goto out;

	/*
	 * the defult of PM800 is GPADC operates at 100Ks/s rate
	 * and Number of GPADC slots with active current bias prior
	 * to GPADC sampling = 1 slot for all GPADCs set for
	 * Temprature mesurmants
	 */
	mask = (PM800_GPADC_GP_BIAS_EN0 | PM800_GPADC_GP_BIAS_EN1 |
		PM800_GPADC_GP_BIAS_EN2 | PM800_GPADC_GP_BIAS_EN3);

	if (pdata && (pdata->batt_det == 0))
		data = (PM800_GPADC_GP_BIAS_EN0 | PM800_GPADC_GP_BIAS_EN1 |
			PM800_GPADC_GP_BIAS_EN2 | PM800_GPADC_GP_BIAS_EN3);
	else
		data = (PM800_GPADC_GP_BIAS_EN0 | PM800_GPADC_GP_BIAS_EN2 |
			PM800_GPADC_GP_BIAS_EN3);

	ret = regmap_update_bits(map, PM800_GP_BIAS_ENA1, mask, data);
	if (ret < 0)
		goto out;

	dev_info(chip->dev, "pm800 device_gpadc_init: Done\n");
	return 0;

out:
	dev_info(chip->dev, "pm800 device_gpadc_init: Failed!\n");
	return ret;
}

static int device_irq_init_800(struct pm80x_chip *chip)
{
	struct regmap *map = chip->regmap;
	unsigned long flags = IRQF_ONESHOT;
	int data, mask, ret = -EINVAL;

	if (!map || !chip->irq) {
		dev_err(chip->dev, "incorrect parameters\n");
		return -EINVAL;
	}

	/*
	 * irq_mode defines the way of clearing interrupt. it's read-clear by
	 * default.
	 */
	mask =
	    PM800_WAKEUP2_INV_INT | PM800_WAKEUP2_INT_CLEAR |
	    PM800_WAKEUP2_INT_MASK;

	data = PM800_WAKEUP2_INT_CLEAR;
	ret = regmap_update_bits(map, PM800_WAKEUP2, mask, data);

	if (ret < 0)
		goto out;

	ret =
	    regmap_add_irq_chip(chip->regmap, chip->irq, flags, -1,
				chip->regmap_irq_chip, &chip->irq_data);

out:
	return ret;
}

static void device_irq_exit_800(struct pm80x_chip *chip)
{
	regmap_del_irq_chip(chip->irq, chip->irq_data);
}

static struct regmap_irq_chip pm800_irq_chip = {
	.name = "88pm800",
	.irqs = pm800_irqs,
	.num_irqs = ARRAY_SIZE(pm800_irqs),

	.num_regs = 4,
	.status_base = PM800_INT_STATUS1,
	.mask_base = PM800_INT_ENA_1,
	.ack_base = PM800_INT_STATUS1,
	.mask_invert = 1,
};

static int pm800_pages_init(struct pm80x_chip *chip)
{
	struct pm80x_subchip *subchip;
	struct i2c_client *client = chip->client;

	subchip = chip->subchip;
	/* PM800 block power: i2c addr 0x31 */
	if (subchip->power_page_addr) {
		subchip->power_page =
		    i2c_new_dummy(client->adapter, subchip->power_page_addr);
		subchip->regmap_power =
		    devm_regmap_init_i2c(subchip->power_page,
					 &pm80x_regmap_config);
		i2c_set_clientdata(subchip->power_page, chip);
	} else
		dev_info(chip->dev,
			 "PM800 block power 0x31: No power_page_addr\n");

	/* PM800 block GPADC: i2c addr 0x32 */
	if (subchip->gpadc_page_addr) {
		subchip->gpadc_page = i2c_new_dummy(client->adapter,
						    subchip->gpadc_page_addr);
		subchip->regmap_gpadc =
		    devm_regmap_init_i2c(subchip->gpadc_page,
					 &pm80x_regmap_config);
		i2c_set_clientdata(subchip->gpadc_page, chip);
	} else
		dev_info(chip->dev,
			 "PM800 block GPADC 0x32: No gpadc_page_addr\n");

	return 0;
}

static void pm800_pages_exit(struct pm80x_chip *chip)
{
	struct pm80x_subchip *subchip;

	regmap_exit(chip->regmap);
	i2c_unregister_device(chip->client);

	subchip = chip->subchip;
	if (subchip->power_page) {
		regmap_exit(subchip->regmap_power);
		i2c_unregister_device(subchip->power_page);
	}
	if (subchip->gpadc_page) {
		regmap_exit(subchip->regmap_gpadc);
		i2c_unregister_device(subchip->gpadc_page);
	}
}

static int device_800_init(struct pm80x_chip *chip,
				     struct pm80x_platform_data *pdata)
{
	int ret, pmic_id;
	unsigned int val;

	ret = regmap_read(chip->regmap, PM800_CHIP_ID, &val);
	if (ret < 0) {
		dev_err(chip->dev, "Failed to read CHIP ID: %d\n", ret);
		goto out;
	}

	pmic_id = val & PM80X_VERSION_MASK;

	if ((pmic_id >= PM800_CHIP_A0) && (pmic_id <= PM800_CHIP_END)) {
		chip->version = val;
		dev_info(chip->dev,
			 "88PM80x:Marvell 88PM800 (ID:0x%x) detected\n", val);
	} else {
		dev_err(chip->dev,
			"Failed to detect Marvell 88PM800:ChipID[0x%x]\n", val);
		ret = -EINVAL;
		goto out;
	}

	/*
	 * alarm wake up bit will be clear in device_irq_init(),
	 * read before that
	 */
	ret = regmap_read(chip->regmap, PM800_RTC_CONTROL, &val);
	if (ret < 0) {
		dev_err(chip->dev, "Failed to read RTC register: %d\n", ret);
		goto out;
	}
	if (val & PM800_ALARM_WAKEUP) {
		if (pdata && pdata->rtc)
			pdata->rtc->rtc_wakeup = 1;
	}

	ret = device_gpadc_init(chip, pdata);
	if (ret < 0) {
		dev_err(chip->dev, "[%s]Failed to init gpadc\n", __func__);
		goto out;
	}

	chip->regmap_irq_chip = &pm800_irq_chip;

	ret = device_irq_init_800(chip);
	if (ret < 0) {
		dev_err(chip->dev, "[%s]Failed to init pm800 irq\n", __func__);
		goto out;
	}

	ret =
	    mfd_add_devices(chip->dev, 0, &onkey_devs[0],
			    ARRAY_SIZE(onkey_devs), &onkey_resources[0], 0,
			    NULL);
	if (ret < 0) {
		dev_err(chip->dev, "Failed to add onkey subdev\n");
		goto out_dev;
	} else
		dev_info(chip->dev, "[%s]:Added mfd onkey_devs\n", __func__);

	if (pdata && pdata->rtc) {
		rtc_devs[0].platform_data = pdata->rtc;
		rtc_devs[0].pdata_size = sizeof(struct pm80x_rtc_pdata);
		ret = mfd_add_devices(chip->dev, 0, &rtc_devs[0],
				      ARRAY_SIZE(rtc_devs), NULL, 0, NULL);
		if (ret < 0) {
			dev_err(chip->dev, "Failed to add rtc subdev\n");
			goto out_dev;
		} else
			dev_info(chip->dev,
				 "[%s]:Added mfd rtc_devs\n", __func__);
	}

	return 0;
out_dev:
	mfd_remove_devices(chip->dev);
	device_irq_exit_800(chip);
out:
	return ret;
}

static int pm800_probe(struct i2c_client *client,
				 const struct i2c_device_id *id)
{
	int ret = 0;
	struct pm80x_chip *chip;
	struct pm80x_platform_data *pdata = client->dev.platform_data;
	struct pm80x_subchip *subchip;

	ret = pm80x_init(client, id);
	if (ret) {
		dev_err(&client->dev, "pm800_init fail\n");
		goto out_init;
	}

	chip = i2c_get_clientdata(client);

	/* init subchip for PM800 */
	subchip =
	    devm_kzalloc(&client->dev, sizeof(struct pm80x_subchip),
			 GFP_KERNEL);
	if (!subchip) {
		ret = -ENOMEM;
		goto err_subchip_alloc;
	}

	/* pm800 has 2 addtional pages to support power and gpadc. */
	subchip->power_page_addr = client->addr + 1;
	subchip->gpadc_page_addr = client->addr + 2;
	chip->subchip = subchip;

	ret = pm800_pages_init(chip);
	if (ret) {
		dev_err(&client->dev, "pm800_pages_init failed!\n");
		goto err_page_init;
	}

	ret = device_800_init(chip, pdata);
	if (ret) {
		dev_err(chip->dev, "%s id 0x%x failed!\n", __func__, chip->id);
		goto err_device_init;
	}

	if (pdata->plat_config)
		pdata->plat_config(chip, pdata);

	return 0;

err_device_init:
	pm800_pages_exit(chip);
err_page_init:
err_subchip_alloc:
	pm80x_deinit();
out_init:
	return ret;
}

static int pm800_remove(struct i2c_client *client)
{
	struct pm80x_chip *chip = i2c_get_clientdata(client);

	mfd_remove_devices(chip->dev);
	device_irq_exit_800(chip);

	pm800_pages_exit(chip);
	pm80x_deinit();

	return 0;
}

static struct i2c_driver pm800_driver = {
	.driver = {
		.name = "88PM800",
		.owner = THIS_MODULE,
		.pm = &pm80x_pm_ops,
		},
	.probe = pm800_probe,
	.remove = pm800_remove,
	.id_table = pm80x_id_table,
};

static int __init pm800_i2c_init(void)
{
	return i2c_add_driver(&pm800_driver);
}
subsys_initcall(pm800_i2c_init);

static void __exit pm800_i2c_exit(void)
{
	i2c_del_driver(&pm800_driver);
}
module_exit(pm800_i2c_exit);

MODULE_DESCRIPTION("PMIC Driver for Marvell 88PM800");
MODULE_AUTHOR("Qiao Zhou <zhouqiao@marvell.com>");
MODULE_LICENSE("GPL");
Commit	Line	Data
70c6cce0 QZ	1	/*
	2	* Base driver for Marvell 88PM800
	3	*
	4	* Copyright (C) 2012 Marvell International Ltd.
	5	* Haojian Zhuang <haojian.zhuang@marvell.com>
	6	* Joseph(Yossi) Hanin <yhanin@marvell.com>
	7	* Qiao Zhou <zhouqiao@marvell.com>
	8	*
	9	* This file is subject to the terms and conditions of the GNU General
	10	* Public License. See the file "COPYING" in the main directory of this
	11	* archive for more details.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	21	*/
	22
	23	#include <linux/kernel.h>
	24	#include <linux/module.h>
	25	#include <linux/i2c.h>
	26	#include <linux/mfd/core.h>
	27	#include <linux/mfd/88pm80x.h>
	28	#include <linux/slab.h>
	29
	30	#define PM800_CHIP_ID (0x00)
	31
	32	/* Interrupt Registers */
	33	#define PM800_INT_STATUS1 (0x05)
	34	#define PM800_ONKEY_INT_STS1 (1 << 0)
	35	#define PM800_EXTON_INT_STS1 (1 << 1)
	36	#define PM800_CHG_INT_STS1 (1 << 2)
	37	#define PM800_BAT_INT_STS1 (1 << 3)
	38	#define PM800_RTC_INT_STS1 (1 << 4)
	39	#define PM800_CLASSD_OC_INT_STS1 (1 << 5)
	40
	41	#define PM800_INT_STATUS2 (0x06)
	42	#define PM800_VBAT_INT_STS2 (1 << 0)
	43	#define PM800_VSYS_INT_STS2 (1 << 1)
	44	#define PM800_VCHG_INT_STS2 (1 << 2)
	45	#define PM800_TINT_INT_STS2 (1 << 3)
	46	#define PM800_GPADC0_INT_STS2 (1 << 4)
	47	#define PM800_TBAT_INT_STS2 (1 << 5)
	48	#define PM800_GPADC2_INT_STS2 (1 << 6)
	49	#define PM800_GPADC3_INT_STS2 (1 << 7)
	50
	51	#define PM800_INT_STATUS3 (0x07)
	52
	53	#define PM800_INT_STATUS4 (0x08)
	54	#define PM800_GPIO0_INT_STS4 (1 << 0)
	55	#define PM800_GPIO1_INT_STS4 (1 << 1)
	56	#define PM800_GPIO2_INT_STS4 (1 << 2)
	57	#define PM800_GPIO3_INT_STS4 (1 << 3)
	58	#define PM800_GPIO4_INT_STS4 (1 << 4)
	59
	60	#define PM800_INT_ENA_1 (0x09)
	61	#define PM800_ONKEY_INT_ENA1 (1 << 0)
	62	#define PM800_EXTON_INT_ENA1 (1 << 1)
	63	#define PM800_CHG_INT_ENA1 (1 << 2)
	64	#define PM800_BAT_INT_ENA1 (1 << 3)
65	#define PM800_RTC_INT_ENA1 (1 << 4)
66	#define PM800_CLASSD_OC_INT_ENA1 (1 << 5)
67
68	#define PM800_INT_ENA_2 (0x0A)
69	#define PM800_VBAT_INT_ENA2 (1 << 0)
70	#define PM800_VSYS_INT_ENA2 (1 << 1)
71	#define PM800_VCHG_INT_ENA2 (1 << 2)
72	#define PM800_TINT_INT_ENA2 (1 << 3)
73
74	#define PM800_INT_ENA_3 (0x0B)
75	#define PM800_GPADC0_INT_ENA3 (1 << 0)
76	#define PM800_GPADC1_INT_ENA3 (1 << 1)
77	#define PM800_GPADC2_INT_ENA3 (1 << 2)
78	#define PM800_GPADC3_INT_ENA3 (1 << 3)
79	#define PM800_GPADC4_INT_ENA3 (1 << 4)
80
81	#define PM800_INT_ENA_4 (0x0C)
82	#define PM800_GPIO0_INT_ENA4 (1 << 0)
83	#define PM800_GPIO1_INT_ENA4 (1 << 1)
84	#define PM800_GPIO2_INT_ENA4 (1 << 2)
85	#define PM800_GPIO3_INT_ENA4 (1 << 3)
86	#define PM800_GPIO4_INT_ENA4 (1 << 4)
87
88	/* number of INT_ENA & INT_STATUS regs */
89	#define PM800_INT_REG_NUM (4)
90
91	/* Interrupt Number in 88PM800 */
92	enum {
93	PM800_IRQ_ONKEY, /EN1b0 //0 /
94	PM800_IRQ_EXTON, /EN1b1 /
95	PM800_IRQ_CHG, /EN1b2 /
96	PM800_IRQ_BAT, /EN1b3 /
97	PM800_IRQ_RTC, /EN1b4 /
98	PM800_IRQ_CLASSD, /EN1b5 //5 /
99	PM800_IRQ_VBAT, /EN2b0 /
100	PM800_IRQ_VSYS, /EN2b1 /
101	PM800_IRQ_VCHG, /EN2b2 /
102	PM800_IRQ_TINT, /EN2b3 /
103	PM800_IRQ_GPADC0, /EN3b0 //10 /
104	PM800_IRQ_GPADC1, /EN3b1 /
105	PM800_IRQ_GPADC2, /EN3b2 /
106	PM800_IRQ_GPADC3, /EN3b3 /
107	PM800_IRQ_GPADC4, /EN3b4 /
108	PM800_IRQ_GPIO0, /EN4b0 //15 /
109	PM800_IRQ_GPIO1, /EN4b1 /
110	PM800_IRQ_GPIO2, /EN4b2 /
111	PM800_IRQ_GPIO3, /EN4b3 /
112	PM800_IRQ_GPIO4, /EN4b4 //19 /
113	PM800_MAX_IRQ,
114	};
115
116	enum {
117	/* Procida */
118	PM800_CHIP_A0 = 0x60,
119	PM800_CHIP_A1 = 0x61,
120	PM800_CHIP_B0 = 0x62,
121	PM800_CHIP_C0 = 0x63,
122	PM800_CHIP_END = PM800_CHIP_C0,
123
124	/* Make sure to update this to the last stepping */
125	PM8XXX_CHIP_END = PM800_CHIP_END
126	};
127
128	static const struct i2c_device_id pm80x_id_table[] = {
129	{"88PM800", CHIP_PM800},
31b3ffbd	130	{} /* NULL terminated */
70c6cce0 QZ	131	};
	132	MODULE_DEVICE_TABLE(i2c, pm80x_id_table);
	133
	134	static struct resource rtc_resources[] = {
	135	{
	136	.name = "88pm80x-rtc",
	137	.start = PM800_IRQ_RTC,
	138	.end = PM800_IRQ_RTC,
	139	.flags = IORESOURCE_IRQ,
	140	},
	141	};
	142
	143	static struct mfd_cell rtc_devs[] = {
	144	{
	145	.name = "88pm80x-rtc",
	146	.num_resources = ARRAY_SIZE(rtc_resources),
	147	.resources = &rtc_resources[0],
	148	.id = -1,
	149	},
	150	};
	151
	152	static struct resource onkey_resources[] = {
	153	{
	154	.name = "88pm80x-onkey",
	155	.start = PM800_IRQ_ONKEY,
	156	.end = PM800_IRQ_ONKEY,
	157	.flags = IORESOURCE_IRQ,
	158	},
	159	};
	160
	161	static struct mfd_cell onkey_devs[] = {
	162	{
	163	.name = "88pm80x-onkey",
	164	.num_resources = 1,
	165	.resources = &onkey_resources[0],
	166	.id = -1,
	167	},
	168	};
	169
	170	static const struct regmap_irq pm800_irqs[] = {
	171	/* INT0 */
	172	[PM800_IRQ_ONKEY] = {
	173	.mask = PM800_ONKEY_INT_ENA1,
	174	},
	175	[PM800_IRQ_EXTON] = {
	176	.mask = PM800_EXTON_INT_ENA1,
	177	},
	178	[PM800_IRQ_CHG] = {
	179	.mask = PM800_CHG_INT_ENA1,
	180	},
	181	[PM800_IRQ_BAT] = {
	182	.mask = PM800_BAT_INT_ENA1,
	183	},
	184	[PM800_IRQ_RTC] = {
	185	.mask = PM800_RTC_INT_ENA1,
	186	},
	187	[PM800_IRQ_CLASSD] = {
	188	.mask = PM800_CLASSD_OC_INT_ENA1,
	189	},
	190	/* INT1 */
	191	[PM800_IRQ_VBAT] = {
	192	.reg_offset = 1,
	193	.mask = PM800_VBAT_INT_ENA2,
	194	},
195	[PM800_IRQ_VSYS] = {
196	.reg_offset = 1,
197	.mask = PM800_VSYS_INT_ENA2,
198	},
199	[PM800_IRQ_VCHG] = {
200	.reg_offset = 1,
201	.mask = PM800_VCHG_INT_ENA2,
202	},
203	[PM800_IRQ_TINT] = {
204	.reg_offset = 1,
205	.mask = PM800_TINT_INT_ENA2,
206	},
207	/* INT2 */
208	[PM800_IRQ_GPADC0] = {
209	.reg_offset = 2,
210	.mask = PM800_GPADC0_INT_ENA3,
211	},
212	[PM800_IRQ_GPADC1] = {
213	.reg_offset = 2,
214	.mask = PM800_GPADC1_INT_ENA3,
215	},
216	[PM800_IRQ_GPADC2] = {
217	.reg_offset = 2,
218	.mask = PM800_GPADC2_INT_ENA3,
219	},
220	[PM800_IRQ_GPADC3] = {
221	.reg_offset = 2,
222	.mask = PM800_GPADC3_INT_ENA3,
223	},
224	[PM800_IRQ_GPADC4] = {
225	.reg_offset = 2,
226	.mask = PM800_GPADC4_INT_ENA3,
227	},
228	/* INT3 */
229	[PM800_IRQ_GPIO0] = {
230	.reg_offset = 3,
231	.mask = PM800_GPIO0_INT_ENA4,
232	},
233	[PM800_IRQ_GPIO1] = {
234	.reg_offset = 3,
235	.mask = PM800_GPIO1_INT_ENA4,
236	},
237	[PM800_IRQ_GPIO2] = {
238	.reg_offset = 3,
239	.mask = PM800_GPIO2_INT_ENA4,
240	},
241	[PM800_IRQ_GPIO3] = {
242	.reg_offset = 3,
243	.mask = PM800_GPIO3_INT_ENA4,
244	},
245	[PM800_IRQ_GPIO4] = {
246	.reg_offset = 3,
247	.mask = PM800_GPIO4_INT_ENA4,
248	},
249	};
250
f791be49	251	static int device_gpadc_init(struct pm80x_chip *chip,
70c6cce0 QZ	252	struct pm80x_platform_data *pdata)
	253	{
	254	struct pm80x_subchip *subchip = chip->subchip;
	255	struct regmap *map = subchip->regmap_gpadc;
	256	int data = 0, mask = 0, ret = 0;
	257
	258	if (!map) {
	259	dev_warn(chip->dev,
	260	"Warning: gpadc regmap is not available!\n");
	261	return -EINVAL;
	262	}
	263	/*
	264	* initialize GPADC without activating it turn on GPADC
	265	* measurments
	266	*/
	267	ret = regmap_update_bits(map,
	268	PM800_GPADC_MISC_CONFIG2,
	269	PM800_GPADC_MISC_GPFSM_EN,
	270	PM800_GPADC_MISC_GPFSM_EN);
	271	if (ret < 0)
	272	goto out;
	273	/*
	274	* This function configures the ADC as requires for
	275	* CP implementation.CP does not "own" the ADC configuration
	276	* registers and relies on AP.
	277	* Reason: enable automatic ADC measurements needed
	278	* for CP to get VBAT and RF temperature readings.
	279	*/
	280	ret = regmap_update_bits(map, PM800_GPADC_MEAS_EN1,
	281	PM800_MEAS_EN1_VBAT, PM800_MEAS_EN1_VBAT);
	282	if (ret < 0)
	283	goto out;
	284	ret = regmap_update_bits(map, PM800_GPADC_MEAS_EN2,
	285	(PM800_MEAS_EN2_RFTMP \| PM800_MEAS_GP0_EN),
	286	(PM800_MEAS_EN2_RFTMP \| PM800_MEAS_GP0_EN));
	287	if (ret < 0)
	288	goto out;
	289
	290	/*
	291	* the defult of PM800 is GPADC operates at 100Ks/s rate
	292	* and Number of GPADC slots with active current bias prior
	293	* to GPADC sampling = 1 slot for all GPADCs set for
	294	* Temprature mesurmants
	295	*/
	296	mask = (PM800_GPADC_GP_BIAS_EN0 \| PM800_GPADC_GP_BIAS_EN1 \|
	297	PM800_GPADC_GP_BIAS_EN2 \| PM800_GPADC_GP_BIAS_EN3);
	298
	299	if (pdata && (pdata->batt_det == 0))
	300	data = (PM800_GPADC_GP_BIAS_EN0 \| PM800_GPADC_GP_BIAS_EN1 \|
	301	PM800_GPADC_GP_BIAS_EN2 \| PM800_GPADC_GP_BIAS_EN3);
	302	else
	303	data = (PM800_GPADC_GP_BIAS_EN0 \| PM800_GPADC_GP_BIAS_EN2 \|
	304	PM800_GPADC_GP_BIAS_EN3);
	305
	306	ret = regmap_update_bits(map, PM800_GP_BIAS_ENA1, mask, data);
	307	if (ret < 0)
	308	goto out;
	309
	310	dev_info(chip->dev, "pm800 device_gpadc_init: Done\n");
	311	return 0;
	312
	313	out:
	314	dev_info(chip->dev, "pm800 device_gpadc_init: Failed!\n");
	315	return ret;
316	}
317
f791be49	318	static int device_irq_init_800(struct pm80x_chip *chip)
70c6cce0 QZ	319	{
70c6cce0 QZ	320	struct regmap *map = chip->regmap;
1ef5677e	321	unsigned long flags = IRQF_ONESHOT;
70c6cce0 QZ	322	int data, mask, ret = -EINVAL;
	323
	324	if (!map \|\| !chip->irq) {
	325	dev_err(chip->dev, "incorrect parameters\n");
	326	return -EINVAL;
	327	}
	328
	329	/*
	330	* irq_mode defines the way of clearing interrupt. it's read-clear by
	331	* default.
	332	*/
	333	mask =
	334	PM800_WAKEUP2_INV_INT \| PM800_WAKEUP2_INT_CLEAR \|
	335	PM800_WAKEUP2_INT_MASK;
	336
	337	data = PM800_WAKEUP2_INT_CLEAR;
	338	ret = regmap_update_bits(map, PM800_WAKEUP2, mask, data);
	339
	340	if (ret < 0)
	341	goto out;
	342
	343	ret =
	344	regmap_add_irq_chip(chip->regmap, chip->irq, flags, -1,
	345	chip->regmap_irq_chip, &chip->irq_data);
	346
	347	out:
	348	return ret;
	349	}
	350
	351	static void device_irq_exit_800(struct pm80x_chip *chip)
	352	{
	353	regmap_del_irq_chip(chip->irq, chip->irq_data);
	354	}
	355
	356	static struct regmap_irq_chip pm800_irq_chip = {
	357	.name = "88pm800",
	358	.irqs = pm800_irqs,
	359	.num_irqs = ARRAY_SIZE(pm800_irqs),
	360
	361	.num_regs = 4,
	362	.status_base = PM800_INT_STATUS1,
	363	.mask_base = PM800_INT_ENA_1,
	364	.ack_base = PM800_INT_STATUS1,
cb5c5800	365	.mask_invert = 1,
70c6cce0 QZ	366	};
	367
	368	static int pm800_pages_init(struct pm80x_chip *chip)
	369	{
	370	struct pm80x_subchip *subchip;
	371	struct i2c_client *client = chip->client;
	372
	373	subchip = chip->subchip;
	374	/* PM800 block power: i2c addr 0x31 */
	375	if (subchip->power_page_addr) {
	376	subchip->power_page =
	377	i2c_new_dummy(client->adapter, subchip->power_page_addr);
	378	subchip->regmap_power =
	379	devm_regmap_init_i2c(subchip->power_page,
	380	&pm80x_regmap_config);
	381	i2c_set_clientdata(subchip->power_page, chip);
	382	} else
	383	dev_info(chip->dev,
	384	"PM800 block power 0x31: No power_page_addr\n");
	385
	386	/* PM800 block GPADC: i2c addr 0x32 */
	387	if (subchip->gpadc_page_addr) {
	388	subchip->gpadc_page = i2c_new_dummy(client->adapter,
	389	subchip->gpadc_page_addr);
	390	subchip->regmap_gpadc =
	391	devm_regmap_init_i2c(subchip->gpadc_page,
	392	&pm80x_regmap_config);
	393	i2c_set_clientdata(subchip->gpadc_page, chip);
	394	} else
	395	dev_info(chip->dev,
	396	"PM800 block GPADC 0x32: No gpadc_page_addr\n");
	397
	398	return 0;
	399	}
	400
	401	static void pm800_pages_exit(struct pm80x_chip *chip)
	402	{
	403	struct pm80x_subchip *subchip;
	404
	405	regmap_exit(chip->regmap);
	406	i2c_unregister_device(chip->client);
	407
	408	subchip = chip->subchip;
	409	if (subchip->power_page) {
	410	regmap_exit(subchip->regmap_power);
	411	i2c_unregister_device(subchip->power_page);
	412	}
	413	if (subchip->gpadc_page) {
	414	regmap_exit(subchip->regmap_gpadc);
	415	i2c_unregister_device(subchip->gpadc_page);
	416	}
	417	}
	418
f791be49	419	static int device_800_init(struct pm80x_chip *chip,
70c6cce0 QZ	420	struct pm80x_platform_data *pdata)
	421	{
	422	int ret, pmic_id;
46b65a8f	423	unsigned int val;
70c6cce0	424
46b65a8f	425	ret = regmap_read(chip->regmap, PM800_CHIP_ID, &val);
70c6cce0 QZ	426	if (ret < 0) {
	427	dev_err(chip->dev, "Failed to read CHIP ID: %d\n", ret);
	428	goto out;
	429	}
	430
46b65a8f	431	pmic_id = val & PM80X_VERSION_MASK;
70c6cce0 QZ	432
70c6cce0 QZ	433	if ((pmic_id >= PM800_CHIP_A0) && (pmic_id <= PM800_CHIP_END)) {
46b65a8f	434	chip->version = val;
70c6cce0	435	dev_info(chip->dev,
46b65a8f	436	"88PM80x:Marvell 88PM800 (ID:0x%x) detected\n", val);
70c6cce0 QZ	437	} else {
70c6cce0 QZ	438	dev_err(chip->dev,
46b65a8f AL	439	"Failed to detect Marvell 88PM800:ChipID[0x%x]\n", val);
46b65a8f AL	440	ret = -EINVAL;
70c6cce0 QZ	441	goto out;
	442	}
	443
	444	/*
	445	* alarm wake up bit will be clear in device_irq_init(),
	446	* read before that
	447	*/
46b65a8f	448	ret = regmap_read(chip->regmap, PM800_RTC_CONTROL, &val);
70c6cce0 QZ	449	if (ret < 0) {
	450	dev_err(chip->dev, "Failed to read RTC register: %d\n", ret);
	451	goto out;
	452	}
46b65a8f	453	if (val & PM800_ALARM_WAKEUP) {
70c6cce0 QZ	454	if (pdata && pdata->rtc)
	455	pdata->rtc->rtc_wakeup = 1;
	456	}
	457
	458	ret = device_gpadc_init(chip, pdata);
	459	if (ret < 0) {
	460	dev_err(chip->dev, "[%s]Failed to init gpadc\n", __func__);
	461	goto out;
	462	}
	463
	464	chip->regmap_irq_chip = &pm800_irq_chip;
	465
	466	ret = device_irq_init_800(chip);
	467	if (ret < 0) {
	468	dev_err(chip->dev, "[%s]Failed to init pm800 irq\n", __func__);
	469	goto out;
	470	}
	471
	472	ret =
	473	mfd_add_devices(chip->dev, 0, &onkey_devs[0],
0848c94f MB	474	ARRAY_SIZE(onkey_devs), &onkey_resources[0], 0,
0848c94f MB	475	NULL);
70c6cce0 QZ	476	if (ret < 0) {
	477	dev_err(chip->dev, "Failed to add onkey subdev\n");
	478	goto out_dev;
	479	} else
	480	dev_info(chip->dev, "[%s]:Added mfd onkey_devs\n", __func__);
	481
	482	if (pdata && pdata->rtc) {
	483	rtc_devs[0].platform_data = pdata->rtc;
	484	rtc_devs[0].pdata_size = sizeof(struct pm80x_rtc_pdata);
	485	ret = mfd_add_devices(chip->dev, 0, &rtc_devs[0],
0848c94f	486	ARRAY_SIZE(rtc_devs), NULL, 0, NULL);
70c6cce0 QZ	487	if (ret < 0) {
	488	dev_err(chip->dev, "Failed to add rtc subdev\n");
	489	goto out_dev;
	490	} else
	491	dev_info(chip->dev,
	492	"[%s]:Added mfd rtc_devs\n", __func__);
	493	}
	494
	495	return 0;
	496	out_dev:
	497	mfd_remove_devices(chip->dev);
	498	device_irq_exit_800(chip);
	499	out:
	500	return ret;
	501	}
	502
f791be49	503	static int pm800_probe(struct i2c_client *client,
70c6cce0 QZ	504	const struct i2c_device_id *id)
	505	{
	506	int ret = 0;
	507	struct pm80x_chip *chip;
	508	struct pm80x_platform_data *pdata = client->dev.platform_data;
	509	struct pm80x_subchip *subchip;
	510
	511	ret = pm80x_init(client, id);
	512	if (ret) {
	513	dev_err(&client->dev, "pm800_init fail\n");
	514	goto out_init;
	515	}
	516
	517	chip = i2c_get_clientdata(client);
	518
	519	/* init subchip for PM800 */
	520	subchip =
	521	devm_kzalloc(&client->dev, sizeof(struct pm80x_subchip),
	522	GFP_KERNEL);
	523	if (!subchip) {
	524	ret = -ENOMEM;
	525	goto err_subchip_alloc;
	526	}
	527
c750d8e0 CX	528	/* pm800 has 2 addtional pages to support power and gpadc. */
	529	subchip->power_page_addr = client->addr + 1;
	530	subchip->gpadc_page_addr = client->addr + 2;
70c6cce0 QZ	531	chip->subchip = subchip;
70c6cce0 QZ	532
70c6cce0 QZ	533	ret = pm800_pages_init(chip);
	534	if (ret) {
	535	dev_err(&client->dev, "pm800_pages_init failed!\n");
	536	goto err_page_init;
	537	}
	538
618fa575 YZ	539	ret = device_800_init(chip, pdata);
	540	if (ret) {
	541	dev_err(chip->dev, "%s id 0x%x failed!\n", __func__, chip->id);
	542	goto err_device_init;
	543	}
	544
70c6cce0 QZ	545	if (pdata->plat_config)
	546	pdata->plat_config(chip, pdata);
	547
618fa575 YZ	548	return 0;
	549
	550	err_device_init:
	551	pm800_pages_exit(chip);
70c6cce0	552	err_page_init:
70c6cce0	553	err_subchip_alloc:
306df798	554	pm80x_deinit();
70c6cce0 QZ	555	out_init:
	556	return ret;
	557	}
	558
4740f73f	559	static int pm800_remove(struct i2c_client *client)
70c6cce0 QZ	560	{
	561	struct pm80x_chip *chip = i2c_get_clientdata(client);
	562
	563	mfd_remove_devices(chip->dev);
	564	device_irq_exit_800(chip);
	565
	566	pm800_pages_exit(chip);
306df798	567	pm80x_deinit();
70c6cce0 QZ	568
	569	return 0;
	570	}
	571
	572	static struct i2c_driver pm800_driver = {
	573	.driver = {
46223a19	574	.name = "88PM800",
70c6cce0 QZ	575	.owner = THIS_MODULE,
	576	.pm = &pm80x_pm_ops,
	577	},
	578	.probe = pm800_probe,
84449216	579	.remove = pm800_remove,
70c6cce0 QZ	580	.id_table = pm80x_id_table,
	581	};
	582
	583	static int __init pm800_i2c_init(void)
	584	{
	585	return i2c_add_driver(&pm800_driver);
	586	}
	587	subsys_initcall(pm800_i2c_init);
	588
	589	static void __exit pm800_i2c_exit(void)
	590	{
	591	i2c_del_driver(&pm800_driver);
	592	}
	593	module_exit(pm800_i2c_exit);
	594
	595	MODULE_DESCRIPTION("PMIC Driver for Marvell 88PM800");
	596	MODULE_AUTHOR("Qiao Zhou <zhouqiao@marvell.com>");
	597	MODULE_LICENSE("GPL");