[linux-block.git] / drivers / message / i2o / pci.c

/*
 *	PCI handling of I2O controller
 *
 * 	Copyright (C) 1999-2002	Red Hat Software
 *
 *	Written by Alan Cox, Building Number Three Ltd
 *
 *	This program is free software; you can redistribute it and/or modify it
 *	under the terms of the GNU General Public License as published by the
 *	Free Software Foundation; either version 2 of the License, or (at your
 *	option) any later version.
 *
 *	A lot of the I2O message side code from this is taken from the Red
 *	Creek RCPCI45 adapter driver by Red Creek Communications
 *
 *	Fixes/additions:
 *		Philipp Rumpf
 *		Juha Sievänen <Juha.Sievanen@cs.Helsinki.FI>
 *		Auvo Häkkinen <Auvo.Hakkinen@cs.Helsinki.FI>
 *		Deepak Saxena <deepak@plexity.net>
 *		Boji T Kannanthanam <boji.t.kannanthanam@intel.com>
 *		Alan Cox <alan@lxorguk.ukuu.org.uk>:
 *			Ported to Linux 2.5.
 *		Markus Lidel <Markus.Lidel@shadowconnect.com>:
 *			Minor fixes for 2.6.
 *		Markus Lidel <Markus.Lidel@shadowconnect.com>:
 *			Support for sysfs included.
 */

#include <linux/pci.h>
#include <linux/interrupt.h>
#include <linux/slab.h>
#include <linux/i2o.h>
#include "core.h"

#define OSM_DESCRIPTION	"I2O-subsystem"

/* PCI device id table for all I2O controllers */
static struct pci_device_id __devinitdata i2o_pci_ids[] = {
	{PCI_DEVICE_CLASS(PCI_CLASS_INTELLIGENT_I2O << 8, 0xffff00)},
	{PCI_DEVICE(PCI_VENDOR_ID_DPT, 0xa511)},
	{.vendor = PCI_VENDOR_ID_INTEL,.device = 0x1962,
	 .subvendor = PCI_VENDOR_ID_PROMISE,.subdevice = PCI_ANY_ID},
	{0}
};

/**
 *	i2o_pci_free - Frees the DMA memory for the I2O controller
 *	@c: I2O controller to free
 *
 *	Remove all allocated DMA memory and unmap memory IO regions. If MTRR
 *	is enabled, also remove it again.
 */
static void i2o_pci_free(struct i2o_controller *c)
{
	struct device *dev;

	dev = &c->pdev->dev;

	i2o_dma_free(dev, &c->out_queue);
	i2o_dma_free(dev, &c->status_block);
	kfree(c->lct);
	i2o_dma_free(dev, &c->dlct);
	i2o_dma_free(dev, &c->hrt);
	i2o_dma_free(dev, &c->status);

	if (c->raptor && c->in_queue.virt)
		iounmap(c->in_queue.virt);

	if (c->base.virt)
		iounmap(c->base.virt);

	pci_release_regions(c->pdev);
}

/**
 *	i2o_pci_alloc - Allocate DMA memory, map IO memory for I2O controller
 *	@c: I2O controller
 *
 *	Allocate DMA memory for a PCI (or in theory AGP) I2O controller. All
 *	IO mappings are also done here. If MTRR is enabled, also do add memory
 *	regions here.
 *
 *	Returns 0 on success or negative error code on failure.
 */
static int __devinit i2o_pci_alloc(struct i2o_controller *c)
{
	struct pci_dev *pdev = c->pdev;
	struct device *dev = &pdev->dev;
	int i;

	if (pci_request_regions(pdev, OSM_DESCRIPTION)) {
		printk(KERN_ERR "%s: device already claimed\n", c->name);
		return -ENODEV;
	}

	for (i = 0; i < 6; i++) {
		/* Skip I/O spaces */
		if (!(pci_resource_flags(pdev, i) & IORESOURCE_IO)) {
			if (!c->base.phys) {
				c->base.phys = pci_resource_start(pdev, i);
				c->base.len = pci_resource_len(pdev, i);

				/*
				 * If we know what card it is, set the size
				 * correctly. Code is taken from dpt_i2o.c
				 */
				if (pdev->device == 0xa501) {
					if (pdev->subsystem_device >= 0xc032 &&
					    pdev->subsystem_device <= 0xc03b) {
						if (c->base.len > 0x400000)
							c->base.len = 0x400000;
					} else {
						if (c->base.len > 0x100000)
							c->base.len = 0x100000;
					}
				}
				if (!c->raptor)
					break;
			} else {
				c->in_queue.phys = pci_resource_start(pdev, i);
				c->in_queue.len = pci_resource_len(pdev, i);
				break;
			}
		}
	}

	if (i == 6) {
		printk(KERN_ERR "%s: I2O controller has no memory regions"
		       " defined.\n", c->name);
		i2o_pci_free(c);
		return -EINVAL;
	}

	/* Map the I2O controller */
	if (c->raptor) {
		printk(KERN_INFO "%s: PCI I2O controller\n", c->name);
		printk(KERN_INFO "     BAR0 at 0x%08lX size=%ld\n",
		       (unsigned long)c->base.phys, (unsigned long)c->base.len);
		printk(KERN_INFO "     BAR1 at 0x%08lX size=%ld\n",
		       (unsigned long)c->in_queue.phys,
		       (unsigned long)c->in_queue.len);
	} else
		printk(KERN_INFO "%s: PCI I2O controller at %08lX size=%ld\n",
		       c->name, (unsigned long)c->base.phys,
		       (unsigned long)c->base.len);

	c->base.virt = ioremap_nocache(c->base.phys, c->base.len);
	if (!c->base.virt) {
		printk(KERN_ERR "%s: Unable to map controller.\n", c->name);
		i2o_pci_free(c);
		return -ENOMEM;
	}

	if (c->raptor) {
		c->in_queue.virt =
		    ioremap_nocache(c->in_queue.phys, c->in_queue.len);
		if (!c->in_queue.virt) {
			printk(KERN_ERR "%s: Unable to map controller.\n",
			       c->name);
			i2o_pci_free(c);
			return -ENOMEM;
		}
	} else
		c->in_queue = c->base;

	c->irq_status = c->base.virt + I2O_IRQ_STATUS;
	c->irq_mask = c->base.virt + I2O_IRQ_MASK;
	c->in_port = c->base.virt + I2O_IN_PORT;
	c->out_port = c->base.virt + I2O_OUT_PORT;

	/* Motorola/Freescale chip does not follow spec */
	if (pdev->vendor == PCI_VENDOR_ID_MOTOROLA && pdev->device == 0x18c0) {
		/* Check if CPU is enabled */
		if (be32_to_cpu(readl(c->base.virt + 0x10000)) & 0x10000000) {
			printk(KERN_INFO "%s: MPC82XX needs CPU running to "
			       "service I2O.\n", c->name);
			i2o_pci_free(c);
			return -ENODEV;
		} else {
			c->irq_status += I2O_MOTOROLA_PORT_OFFSET;
			c->irq_mask += I2O_MOTOROLA_PORT_OFFSET;
			c->in_port += I2O_MOTOROLA_PORT_OFFSET;
			c->out_port += I2O_MOTOROLA_PORT_OFFSET;
			printk(KERN_INFO "%s: MPC82XX workarounds activated.\n",
			       c->name);
		}
	}

	if (i2o_dma_alloc(dev, &c->status, 8)) {
		i2o_pci_free(c);
		return -ENOMEM;
	}

	if (i2o_dma_alloc(dev, &c->hrt, sizeof(i2o_hrt))) {
		i2o_pci_free(c);
		return -ENOMEM;
	}

	if (i2o_dma_alloc(dev, &c->dlct, 8192)) {
		i2o_pci_free(c);
		return -ENOMEM;
	}

	if (i2o_dma_alloc(dev, &c->status_block, sizeof(i2o_status_block))) {
		i2o_pci_free(c);
		return -ENOMEM;
	}

	if (i2o_dma_alloc(dev, &c->out_queue,
		I2O_MAX_OUTBOUND_MSG_FRAMES * I2O_OUTBOUND_MSG_FRAME_SIZE *
				sizeof(u32))) {
		i2o_pci_free(c);
		return -ENOMEM;
	}

	pci_set_drvdata(pdev, c);

	return 0;
}

/**
 *	i2o_pci_interrupt - Interrupt handler for I2O controller
 *	@irq: interrupt line
 *	@dev_id: pointer to the I2O controller
 *
 *	Handle an interrupt from a PCI based I2O controller. This turns out
 *	to be rather simple. We keep the controller pointer in the cookie.
 */
static irqreturn_t i2o_pci_interrupt(int irq, void *dev_id)
{
	struct i2o_controller *c = dev_id;
	u32 m;
	irqreturn_t rc = IRQ_NONE;

	while (readl(c->irq_status) & I2O_IRQ_OUTBOUND_POST) {
		m = readl(c->out_port);
		if (m == I2O_QUEUE_EMPTY) {
			/*
			 * Old 960 steppings had a bug in the I2O unit that
			 * caused the queue to appear empty when it wasn't.
			 */
			m = readl(c->out_port);
			if (unlikely(m == I2O_QUEUE_EMPTY))
				break;
		}

		/* dispatch it */
		if (i2o_driver_dispatch(c, m))
			/* flush it if result != 0 */
			i2o_flush_reply(c, m);

		rc = IRQ_HANDLED;
	}

	return rc;
}

/**
 *	i2o_pci_irq_enable - Allocate interrupt for I2O controller
 *	@c: i2o_controller that the request is for
 *
 *	Allocate an interrupt for the I2O controller, and activate interrupts
 *	on the I2O controller.
 *
 *	Returns 0 on success or negative error code on failure.
 */
static int i2o_pci_irq_enable(struct i2o_controller *c)
{
	struct pci_dev *pdev = c->pdev;
	int rc;

	writel(0xffffffff, c->irq_mask);

	if (pdev->irq) {
		rc = request_irq(pdev->irq, i2o_pci_interrupt, IRQF_SHARED,
				 c->name, c);
		if (rc < 0) {
			printk(KERN_ERR "%s: unable to allocate interrupt %d."
			       "\n", c->name, pdev->irq);
			return rc;
		}
	}

	writel(0x00000000, c->irq_mask);

	printk(KERN_INFO "%s: Installed at IRQ %d\n", c->name, pdev->irq);

	return 0;
}

/**
 *	i2o_pci_irq_disable - Free interrupt for I2O controller
 *	@c: I2O controller
 *
 *	Disable interrupts in I2O controller and then free interrupt.
 */
static void i2o_pci_irq_disable(struct i2o_controller *c)
{
	writel(0xffffffff, c->irq_mask);

	if (c->pdev->irq > 0)
		free_irq(c->pdev->irq, c);
}

/**
 *	i2o_pci_probe - Probe the PCI device for an I2O controller
 *	@pdev: PCI device to test
 *	@id: id which matched with the PCI device id table
 *
 *	Probe the PCI device for any device which is a memory of the
 *	Intelligent, I2O class or an Adaptec Zero Channel Controller. We
 *	attempt to set up each such device and register it with the core.
 *
 *	Returns 0 on success or negative error code on failure.
 */
static int __devinit i2o_pci_probe(struct pci_dev *pdev,
				   const struct pci_device_id *id)
{
	struct i2o_controller *c;
	int rc;
	struct pci_dev *i960 = NULL;

	printk(KERN_INFO "i2o: Checking for PCI I2O controllers...\n");

	if ((pdev->class & 0xff) > 1) {
		printk(KERN_WARNING "i2o: %s does not support I2O 1.5 "
		       "(skipping).\n", pci_name(pdev));
		return -ENODEV;
	}

	if ((rc = pci_enable_device(pdev))) {
		printk(KERN_WARNING "i2o: couldn't enable device %s\n",
		       pci_name(pdev));
		return rc;
	}

	if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
		printk(KERN_WARNING "i2o: no suitable DMA found for %s\n",
		       pci_name(pdev));
		rc = -ENODEV;
		goto disable;
	}

	pci_set_master(pdev);

	c = i2o_iop_alloc();
	if (IS_ERR(c)) {
		printk(KERN_ERR "i2o: couldn't allocate memory for %s\n",
		       pci_name(pdev));
		rc = PTR_ERR(c);
		goto disable;
	} else
		printk(KERN_INFO "%s: controller found (%s)\n", c->name,
		       pci_name(pdev));

	c->pdev = pdev;
	c->device.parent = &pdev->dev;

	/* Cards that fall apart if you hit them with large I/O loads... */
	if (pdev->vendor == PCI_VENDOR_ID_NCR && pdev->device == 0x0630) {
		c->short_req = 1;
		printk(KERN_INFO "%s: Symbios FC920 workarounds activated.\n",
		       c->name);
	}

	if (pdev->subsystem_vendor == PCI_VENDOR_ID_PROMISE) {
		/*
		 * Expose the ship behind i960 for initialization, or it will
		 * failed
		 */
		i960 = pci_get_slot(c->pdev->bus,
				  PCI_DEVFN(PCI_SLOT(c->pdev->devfn), 0));

		if (i960) {
			pci_write_config_word(i960, 0x42, 0);
			pci_dev_put(i960);
		}

		c->promise = 1;
		c->limit_sectors = 1;
	}

	if (pdev->subsystem_vendor == PCI_VENDOR_ID_DPT)
		c->adaptec = 1;

	/* Cards that go bananas if you quiesce them before you reset them. */
	if (pdev->vendor == PCI_VENDOR_ID_DPT) {
		c->no_quiesce = 1;
		if (pdev->device == 0xa511)
			c->raptor = 1;

		if (pdev->subsystem_device == 0xc05a) {
			c->limit_sectors = 1;
			printk(KERN_INFO
			       "%s: limit sectors per request to %d\n", c->name,
			       I2O_MAX_SECTORS_LIMITED);
		}
#ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64
		if (sizeof(dma_addr_t) > 4) {
			if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
				printk(KERN_INFO "%s: 64-bit DMA unavailable\n",
				       c->name);
			else {
				c->pae_support = 1;
				printk(KERN_INFO "%s: using 64-bit DMA\n",
				       c->name);
			}
		}
#endif
	}

	if ((rc = i2o_pci_alloc(c))) {
		printk(KERN_ERR "%s: DMA / IO allocation for I2O controller "
		       "failed\n", c->name);
		goto free_controller;
	}

	if (i2o_pci_irq_enable(c)) {
		printk(KERN_ERR "%s: unable to enable interrupts for I2O "
		       "controller\n", c->name);
		goto free_pci;
	}

	if ((rc = i2o_iop_add(c)))
		goto uninstall;

	if (i960)
		pci_write_config_word(i960, 0x42, 0x03ff);

	return 0;

      uninstall:
	i2o_pci_irq_disable(c);

      free_pci:
	i2o_pci_free(c);

      free_controller:
	i2o_iop_free(c);

      disable:
	pci_disable_device(pdev);

	return rc;
}

/**
 *	i2o_pci_remove - Removes a I2O controller from the system
 *	@pdev: I2O controller which should be removed
 *
 *	Reset the I2O controller, disable interrupts and remove all allocated
 *	resources.
 */
static void __devexit i2o_pci_remove(struct pci_dev *pdev)
{
	struct i2o_controller *c;
	c = pci_get_drvdata(pdev);

	i2o_iop_remove(c);
	i2o_pci_irq_disable(c);
	i2o_pci_free(c);

	pci_disable_device(pdev);

	printk(KERN_INFO "%s: Controller removed.\n", c->name);

	put_device(&c->device);
};

/* PCI driver for I2O controller */
static struct pci_driver i2o_pci_driver = {
	.name = "PCI_I2O",
	.id_table = i2o_pci_ids,
	.probe = i2o_pci_probe,
	.remove = __devexit_p(i2o_pci_remove),
};

/**
 *	i2o_pci_init - registers I2O PCI driver in PCI subsystem
 *
 *	Returns > 0 on success or negative error code on failure.
 */
int __init i2o_pci_init(void)
{
	return pci_register_driver(&i2o_pci_driver);
};

/**
 *	i2o_pci_exit - unregisters I2O PCI driver from PCI subsystem
 */
void __exit i2o_pci_exit(void)
{
	pci_unregister_driver(&i2o_pci_driver);
};

MODULE_DEVICE_TABLE(pci, i2o_pci_ids);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* PCI handling of I2O controller
	3	*
	4	* Copyright (C) 1999-2002 Red Hat Software
	5	*
	6	* Written by Alan Cox, Building Number Three Ltd
	7	*
	8	* This program is free software; you can redistribute it and/or modify it
	9	* under the terms of the GNU General Public License as published by the
	10	* Free Software Foundation; either version 2 of the License, or (at your
	11	* option) any later version.
	12	*
	13	* A lot of the I2O message side code from this is taken from the Red
	14	* Creek RCPCI45 adapter driver by Red Creek Communications
	15	*
	16	* Fixes/additions:
	17	* Philipp Rumpf
96de0e25 JE	18	* Juha Sievänen <Juha.Sievanen@cs.Helsinki.FI>
96de0e25 JE	19	* Auvo Häkkinen <Auvo.Hakkinen@cs.Helsinki.FI>
1da177e4 LT	20	* Deepak Saxena <deepak@plexity.net>
1da177e4 LT	21	* Boji T Kannanthanam <boji.t.kannanthanam@intel.com>
f1b11e50	22	* Alan Cox <alan@lxorguk.ukuu.org.uk>:
1da177e4 LT	23	* Ported to Linux 2.5.
	24	* Markus Lidel <Markus.Lidel@shadowconnect.com>:
	25	* Minor fixes for 2.6.
	26	* Markus Lidel <Markus.Lidel@shadowconnect.com>:
	27	* Support for sysfs included.
	28	*/
	29
	30	#include <linux/pci.h>
	31	#include <linux/interrupt.h>
5a0e3ad6	32	#include <linux/slab.h>
1da177e4	33	#include <linux/i2o.h>
9e87545f	34	#include "core.h"
1da177e4	35
dc9352a4 ML	36	#define OSM_DESCRIPTION "I2O-subsystem"
dc9352a4 ML	37
1da177e4 LT	38	/* PCI device id table for all I2O controllers */
	39	static struct pci_device_id __devinitdata i2o_pci_ids[] = {
	40	{PCI_DEVICE_CLASS(PCI_CLASS_INTELLIGENT_I2O << 8, 0xffff00)},
	41	{PCI_DEVICE(PCI_VENDOR_ID_DPT, 0xa511)},
61fbfa81 ML	42	{.vendor = PCI_VENDOR_ID_INTEL,.device = 0x1962,
61fbfa81 ML	43	.subvendor = PCI_VENDOR_ID_PROMISE,.subdevice = PCI_ANY_ID},
1da177e4 LT	44	{0}
	45	};
	46
1da177e4 LT	47	/**
	48	* i2o_pci_free - Frees the DMA memory for the I2O controller
	49	* @c: I2O controller to free
	50	*
	51	* Remove all allocated DMA memory and unmap memory IO regions. If MTRR
	52	* is enabled, also remove it again.
	53	*/
	54	static void i2o_pci_free(struct i2o_controller *c)
	55	{
	56	struct device *dev;
	57
	58	dev = &c->pdev->dev;
	59
	60	i2o_dma_free(dev, &c->out_queue);
	61	i2o_dma_free(dev, &c->status_block);
f88e119c	62	kfree(c->lct);
1da177e4 LT	63	i2o_dma_free(dev, &c->dlct);
	64	i2o_dma_free(dev, &c->hrt);
	65	i2o_dma_free(dev, &c->status);
	66
1da177e4 LT	67	if (c->raptor && c->in_queue.virt)
	68	iounmap(c->in_queue.virt);
	69
	70	if (c->base.virt)
	71	iounmap(c->base.virt);
dc9352a4 ML	72
dc9352a4 ML	73	pci_release_regions(c->pdev);
1da177e4 LT	74	}
	75
	76	/**
	77	* i2o_pci_alloc - Allocate DMA memory, map IO memory for I2O controller
	78	* @c: I2O controller
	79	*
	80	* Allocate DMA memory for a PCI (or in theory AGP) I2O controller. All
	81	* IO mappings are also done here. If MTRR is enabled, also do add memory
	82	* regions here.
	83	*
	84	* Returns 0 on success or negative error code on failure.
	85	*/
	86	static int __devinit i2o_pci_alloc(struct i2o_controller *c)
	87	{
	88	struct pci_dev *pdev = c->pdev;
	89	struct device *dev = &pdev->dev;
	90	int i;
	91
15d8ec7d ML	92	if (pci_request_regions(pdev, OSM_DESCRIPTION)) {
	93	printk(KERN_ERR "%s: device already claimed\n", c->name);
	94	return -ENODEV;
	95	}
	96
1da177e4 LT	97	for (i = 0; i < 6; i++) {
	98	/* Skip I/O spaces */
	99	if (!(pci_resource_flags(pdev, i) & IORESOURCE_IO)) {
	100	if (!c->base.phys) {
	101	c->base.phys = pci_resource_start(pdev, i);
	102	c->base.len = pci_resource_len(pdev, i);
	103
	104	/*
	105	* If we know what card it is, set the size
	106	* correctly. Code is taken from dpt_i2o.c
	107	*/
	108	if (pdev->device == 0xa501) {
	109	if (pdev->subsystem_device >= 0xc032 &&
	110	pdev->subsystem_device <= 0xc03b) {
	111	if (c->base.len > 0x400000)
	112	c->base.len = 0x400000;
	113	} else {
	114	if (c->base.len > 0x100000)
	115	c->base.len = 0x100000;
	116	}
	117	}
	118	if (!c->raptor)
	119	break;
	120	} else {
	121	c->in_queue.phys = pci_resource_start(pdev, i);
	122	c->in_queue.len = pci_resource_len(pdev, i);
	123	break;
	124	}
	125	}
	126	}
	127
	128	if (i == 6) {
	129	printk(KERN_ERR "%s: I2O controller has no memory regions"
	130	" defined.\n", c->name);
	131	i2o_pci_free(c);
	132	return -EINVAL;
	133	}
	134
	135	/* Map the I2O controller */
	136	if (c->raptor) {
	137	printk(KERN_INFO "%s: PCI I2O controller\n", c->name);
	138	printk(KERN_INFO " BAR0 at 0x%08lX size=%ld\n",
	139	(unsigned long)c->base.phys, (unsigned long)c->base.len);
	140	printk(KERN_INFO " BAR1 at 0x%08lX size=%ld\n",
	141	(unsigned long)c->in_queue.phys,
	142	(unsigned long)c->in_queue.len);
	143	} else
	144	printk(KERN_INFO "%s: PCI I2O controller at %08lX size=%ld\n",
	145	c->name, (unsigned long)c->base.phys,
	146	(unsigned long)c->base.len);
	147
61fbfa81	148	c->base.virt = ioremap_nocache(c->base.phys, c->base.len);
1da177e4 LT	149	if (!c->base.virt) {
1da177e4 LT	150	printk(KERN_ERR "%s: Unable to map controller.\n", c->name);
dc9352a4	151	i2o_pci_free(c);
1da177e4 LT	152	return -ENOMEM;
	153	}
	154
	155	if (c->raptor) {
61fbfa81 ML	156	c->in_queue.virt =
61fbfa81 ML	157	ioremap_nocache(c->in_queue.phys, c->in_queue.len);
1da177e4 LT	158	if (!c->in_queue.virt) {
	159	printk(KERN_ERR "%s: Unable to map controller.\n",
	160	c->name);
	161	i2o_pci_free(c);
	162	return -ENOMEM;
	163	}
	164	} else
	165	c->in_queue = c->base;
	166
f10378ff	167	c->irq_status = c->base.virt + I2O_IRQ_STATUS;
f88e119c ML	168	c->irq_mask = c->base.virt + I2O_IRQ_MASK;
	169	c->in_port = c->base.virt + I2O_IN_PORT;
	170	c->out_port = c->base.virt + I2O_OUT_PORT;
1da177e4	171
8b3e09e1 ML	172	/* Motorola/Freescale chip does not follow spec */
	173	if (pdev->vendor == PCI_VENDOR_ID_MOTOROLA && pdev->device == 0x18c0) {
	174	/* Check if CPU is enabled */
	175	if (be32_to_cpu(readl(c->base.virt + 0x10000)) & 0x10000000) {
	176	printk(KERN_INFO "%s: MPC82XX needs CPU running to "
	177	"service I2O.\n", c->name);
	178	i2o_pci_free(c);
	179	return -ENODEV;
	180	} else {
	181	c->irq_status += I2O_MOTOROLA_PORT_OFFSET;
	182	c->irq_mask += I2O_MOTOROLA_PORT_OFFSET;
	183	c->in_port += I2O_MOTOROLA_PORT_OFFSET;
	184	c->out_port += I2O_MOTOROLA_PORT_OFFSET;
	185	printk(KERN_INFO "%s: MPC82XX workarounds activated.\n",
	186	c->name);
	187	}
	188	}
	189
9d793b0b	190	if (i2o_dma_alloc(dev, &c->status, 8)) {
1da177e4 LT	191	i2o_pci_free(c);
	192	return -ENOMEM;
	193	}
	194
9d793b0b	195	if (i2o_dma_alloc(dev, &c->hrt, sizeof(i2o_hrt))) {
1da177e4 LT	196	i2o_pci_free(c);
	197	return -ENOMEM;
	198	}
	199
9d793b0b	200	if (i2o_dma_alloc(dev, &c->dlct, 8192)) {
1da177e4 LT	201	i2o_pci_free(c);
	202	return -ENOMEM;
	203	}
	204
9d793b0b	205	if (i2o_dma_alloc(dev, &c->status_block, sizeof(i2o_status_block))) {
1da177e4 LT	206	i2o_pci_free(c);
	207	return -ENOMEM;
	208	}
	209
9d793b0b AC	210	if (i2o_dma_alloc(dev, &c->out_queue,
	211	I2O_MAX_OUTBOUND_MSG_FRAMES * I2O_OUTBOUND_MSG_FRAME_SIZE *
	212	sizeof(u32))) {
1da177e4 LT	213	i2o_pci_free(c);
	214	return -ENOMEM;
	215	}
	216
	217	pci_set_drvdata(pdev, c);
	218
	219	return 0;
	220	}
	221
	222	/**
	223	* i2o_pci_interrupt - Interrupt handler for I2O controller
	224	* @irq: interrupt line
	225	* @dev_id: pointer to the I2O controller
1da177e4 LT	226	*
	227	* Handle an interrupt from a PCI based I2O controller. This turns out
	228	* to be rather simple. We keep the controller pointer in the cookie.
	229	*/
7d12e780	230	static irqreturn_t i2o_pci_interrupt(int irq, void *dev_id)
1da177e4 LT	231	{
1da177e4 LT	232	struct i2o_controller *c = dev_id;
f10378ff ML	233	u32 m;
	234	irqreturn_t rc = IRQ_NONE;
	235
	236	while (readl(c->irq_status) & I2O_IRQ_OUTBOUND_POST) {
	237	m = readl(c->out_port);
	238	if (m == I2O_QUEUE_EMPTY) {
	239	/*
	240	* Old 960 steppings had a bug in the I2O unit that
	241	* caused the queue to appear empty when it wasn't.
	242	*/
	243	m = readl(c->out_port);
	244	if (unlikely(m == I2O_QUEUE_EMPTY))
	245	break;
	246	}
1da177e4	247
1da177e4	248	/* dispatch it */
f10378ff	249	if (i2o_driver_dispatch(c, m))
1da177e4	250	/* flush it if result != 0 */
f10378ff ML	251	i2o_flush_reply(c, m);
	252
	253	rc = IRQ_HANDLED;
1da177e4	254	}
f88e119c	255
f10378ff	256	return rc;
1da177e4 LT	257	}
	258
	259	/**
	260	* i2o_pci_irq_enable - Allocate interrupt for I2O controller
d9489fb6	261	* @c: i2o_controller that the request is for
1da177e4 LT	262	*
	263	* Allocate an interrupt for the I2O controller, and activate interrupts
	264	* on the I2O controller.
	265	*
	266	* Returns 0 on success or negative error code on failure.
	267	*/
	268	static int i2o_pci_irq_enable(struct i2o_controller *c)
	269	{
	270	struct pci_dev *pdev = c->pdev;
	271	int rc;
	272
f88e119c	273	writel(0xffffffff, c->irq_mask);
1da177e4 LT	274
1da177e4 LT	275	if (pdev->irq) {
dace1453	276	rc = request_irq(pdev->irq, i2o_pci_interrupt, IRQF_SHARED,
1da177e4 LT	277	c->name, c);
	278	if (rc < 0) {
	279	printk(KERN_ERR "%s: unable to allocate interrupt %d."
	280	"\n", c->name, pdev->irq);
	281	return rc;
	282	}
	283	}
	284
f88e119c	285	writel(0x00000000, c->irq_mask);
1da177e4 LT	286
	287	printk(KERN_INFO "%s: Installed at IRQ %d\n", c->name, pdev->irq);
	288
	289	return 0;
	290	}
	291
	292	/**
	293	* i2o_pci_irq_disable - Free interrupt for I2O controller
	294	* @c: I2O controller
	295	*
	296	* Disable interrupts in I2O controller and then free interrupt.
	297	*/
	298	static void i2o_pci_irq_disable(struct i2o_controller *c)
	299	{
f88e119c	300	writel(0xffffffff, c->irq_mask);
1da177e4 LT	301
	302	if (c->pdev->irq > 0)
	303	free_irq(c->pdev->irq, c);
	304	}
	305
	306	/**
	307	* i2o_pci_probe - Probe the PCI device for an I2O controller
d9489fb6	308	* @pdev: PCI device to test
1da177e4 LT	309	* @id: id which matched with the PCI device id table
	310	*
	311	* Probe the PCI device for any device which is a memory of the
	312	* Intelligent, I2O class or an Adaptec Zero Channel Controller. We
	313	* attempt to set up each such device and register it with the core.
	314	*
	315	* Returns 0 on success or negative error code on failure.
	316	*/
	317	static int __devinit i2o_pci_probe(struct pci_dev *pdev,
	318	const struct pci_device_id *id)
	319	{
	320	struct i2o_controller *c;
	321	int rc;
61fbfa81	322	struct pci_dev *i960 = NULL;
1da177e4 LT	323
	324	printk(KERN_INFO "i2o: Checking for PCI I2O controllers...\n");
	325
	326	if ((pdev->class & 0xff) > 1) {
61fbfa81 ML	327	printk(KERN_WARNING "i2o: %s does not support I2O 1.5 "
61fbfa81 ML	328	"(skipping).\n", pci_name(pdev));
1da177e4 LT	329	return -ENODEV;
	330	}
	331
95ddc5f2 IPG	332	if ((rc = pci_enable_device(pdev))) {
	333	printk(KERN_WARNING "i2o: couldn't enable device %s\n",
	334	pci_name(pdev));
	335	return rc;
	336	}
9638d89a	337
284901a9	338	if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
61fbfa81 ML	339	printk(KERN_WARNING "i2o: no suitable DMA found for %s\n",
61fbfa81 ML	340	pci_name(pdev));
1da177e4 LT	341	rc = -ENODEV;
	342	goto disable;
	343	}
	344
	345	pci_set_master(pdev);
	346
	347	c = i2o_iop_alloc();
	348	if (IS_ERR(c)) {
61fbfa81 ML	349	printk(KERN_ERR "i2o: couldn't allocate memory for %s\n",
61fbfa81 ML	350	pci_name(pdev));
1da177e4 LT	351	rc = PTR_ERR(c);
1da177e4 LT	352	goto disable;
61fbfa81 ML	353	} else
	354	printk(KERN_INFO "%s: controller found (%s)\n", c->name,
	355	pci_name(pdev));
1da177e4 LT	356
1da177e4 LT	357	c->pdev = pdev;
dcceafe2	358	c->device.parent = &pdev->dev;
1da177e4 LT	359
	360	/* Cards that fall apart if you hit them with large I/O loads... */
	361	if (pdev->vendor == PCI_VENDOR_ID_NCR && pdev->device == 0x0630) {
	362	c->short_req = 1;
	363	printk(KERN_INFO "%s: Symbios FC920 workarounds activated.\n",
	364	c->name);
	365	}
	366
	367	if (pdev->subsystem_vendor == PCI_VENDOR_ID_PROMISE) {
61fbfa81 ML	368	/*
	369	* Expose the ship behind i960 for initialization, or it will
	370	* failed
	371	*/
df10f4ed	372	i960 = pci_get_slot(c->pdev->bus,
61fbfa81 ML	373	PCI_DEVFN(PCI_SLOT(c->pdev->devfn), 0));
61fbfa81 ML	374
df10f4ed	375	if (i960) {
61fbfa81	376	pci_write_config_word(i960, 0x42, 0);
df10f4ed AC	377	pci_dev_put(i960);
df10f4ed AC	378	}
61fbfa81	379
1da177e4	380	c->promise = 1;
718c3183	381	c->limit_sectors = 1;
1da177e4 LT	382	}
1da177e4 LT	383
b2aaee33 ML	384	if (pdev->subsystem_vendor == PCI_VENDOR_ID_DPT)
	385	c->adaptec = 1;
	386
1da177e4 LT	387	/* Cards that go bananas if you quiesce them before you reset them. */
	388	if (pdev->vendor == PCI_VENDOR_ID_DPT) {
	389	c->no_quiesce = 1;
	390	if (pdev->device == 0xa511)
	391	c->raptor = 1;
b2aaee33 ML	392
	393	if (pdev->subsystem_device == 0xc05a) {
	394	c->limit_sectors = 1;
	395	printk(KERN_INFO
	396	"%s: limit sectors per request to %d\n", c->name,
	397	I2O_MAX_SECTORS_LIMITED);
	398	}
	399	#ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64
	400	if (sizeof(dma_addr_t) > 4) {
6a35528a	401	if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
b2aaee33 ML	402	printk(KERN_INFO "%s: 64-bit DMA unavailable\n",
	403	c->name);
	404	else {
	405	c->pae_support = 1;
	406	printk(KERN_INFO "%s: using 64-bit DMA\n",
	407	c->name);
	408	}
	409	}
	410	#endif
1da177e4 LT	411	}
	412
	413	if ((rc = i2o_pci_alloc(c))) {
	414	printk(KERN_ERR "%s: DMA / IO allocation for I2O controller "
15d8ec7d	415	"failed\n", c->name);
1da177e4 LT	416	goto free_controller;
	417	}
	418
	419	if (i2o_pci_irq_enable(c)) {
	420	printk(KERN_ERR "%s: unable to enable interrupts for I2O "
	421	"controller\n", c->name);
	422	goto free_pci;
	423	}
	424
	425	if ((rc = i2o_iop_add(c)))
	426	goto uninstall;
	427
61fbfa81 ML	428	if (i960)
	429	pci_write_config_word(i960, 0x42, 0x03ff);
	430
1da177e4 LT	431	return 0;
	432
	433	uninstall:
	434	i2o_pci_irq_disable(c);
	435
	436	free_pci:
	437	i2o_pci_free(c);
	438
	439	free_controller:
16a63173	440	i2o_iop_free(c);
1da177e4 LT	441
1da177e4 LT	442	disable:
95ddc5f2	443	pci_disable_device(pdev);
1da177e4 LT	444
	445	return rc;
	446	}
	447
	448	/**
	449	* i2o_pci_remove - Removes a I2O controller from the system
d9489fb6	450	* @pdev: I2O controller which should be removed
1da177e4 LT	451	*
	452	* Reset the I2O controller, disable interrupts and remove all allocated
	453	* resources.
	454	*/
	455	static void __devexit i2o_pci_remove(struct pci_dev *pdev)
	456	{
	457	struct i2o_controller *c;
	458	c = pci_get_drvdata(pdev);
	459
	460	i2o_iop_remove(c);
	461	i2o_pci_irq_disable(c);
	462	i2o_pci_free(c);
	463
f88e119c ML	464	pci_disable_device(pdev);
f88e119c ML	465
1da177e4 LT	466	printk(KERN_INFO "%s: Controller removed.\n", c->name);
1da177e4 LT	467
f88e119c	468	put_device(&c->device);
1da177e4 LT	469	};
	470
	471	/* PCI driver for I2O controller */
	472	static struct pci_driver i2o_pci_driver = {
f88e119c	473	.name = "PCI_I2O",
1da177e4 LT	474	.id_table = i2o_pci_ids,
	475	.probe = i2o_pci_probe,
	476	.remove = __devexit_p(i2o_pci_remove),
	477	};
	478
	479	/**
	480	* i2o_pci_init - registers I2O PCI driver in PCI subsystem
	481	*
	482	* Returns > 0 on success or negative error code on failure.
	483	*/
	484	int __init i2o_pci_init(void)
	485	{
	486	return pci_register_driver(&i2o_pci_driver);
	487	};
	488
	489	/**
	490	* i2o_pci_exit - unregisters I2O PCI driver from PCI subsystem
	491	*/
	492	void __exit i2o_pci_exit(void)
	493	{
	494	pci_unregister_driver(&i2o_pci_driver);
	495	};
a1a5ea70	496
1da177e4	497	MODULE_DEVICE_TABLE(pci, i2o_pci_ids);