Commit | Line | Data |
---|---|---|
baf8532a AD |
1 | /* |
2 | * TI FlashMedia driver | |
3 | * | |
4 | * Copyright (C) 2007 Alex Dubov <oakad@yahoo.com> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | * | |
10 | * Special thanks to Carlos Corbacho for providing various MemoryStick cards | |
11 | * that made this driver possible. | |
12 | * | |
13 | */ | |
14 | ||
15 | #include <linux/tifm.h> | |
16 | #include <linux/memstick.h> | |
17 | #include <linux/highmem.h> | |
18 | #include <linux/scatterlist.h> | |
19 | #include <linux/log2.h> | |
20 | #include <asm/io.h> | |
21 | ||
22 | #define DRIVER_NAME "tifm_ms" | |
baf8532a AD |
23 | |
24 | static int no_dma; | |
25 | module_param(no_dma, bool, 0644); | |
26 | ||
92b22d93 AD |
27 | /* |
28 | * Some control bits of TIFM appear to conform to Sony's reference design, | |
29 | * so I'm just assuming they all are. | |
30 | */ | |
baf8532a | 31 | |
92b22d93 AD |
32 | #define TIFM_MS_STAT_DRQ 0x04000 |
33 | #define TIFM_MS_STAT_MSINT 0x02000 | |
34 | #define TIFM_MS_STAT_RDY 0x01000 | |
35 | #define TIFM_MS_STAT_CRC 0x00200 | |
36 | #define TIFM_MS_STAT_TOE 0x00100 | |
37 | #define TIFM_MS_STAT_EMP 0x00020 | |
38 | #define TIFM_MS_STAT_FUL 0x00010 | |
39 | #define TIFM_MS_STAT_CED 0x00008 | |
40 | #define TIFM_MS_STAT_ERR 0x00004 | |
41 | #define TIFM_MS_STAT_BRQ 0x00002 | |
42 | #define TIFM_MS_STAT_CNK 0x00001 | |
43 | ||
44 | #define TIFM_MS_SYS_DMA 0x10000 | |
45 | #define TIFM_MS_SYS_RESET 0x08000 | |
46 | #define TIFM_MS_SYS_SRAC 0x04000 | |
47 | #define TIFM_MS_SYS_INTEN 0x02000 | |
48 | #define TIFM_MS_SYS_NOCRC 0x01000 | |
49 | #define TIFM_MS_SYS_INTCLR 0x00800 | |
50 | #define TIFM_MS_SYS_MSIEN 0x00400 | |
51 | #define TIFM_MS_SYS_FCLR 0x00200 | |
52 | #define TIFM_MS_SYS_FDIR 0x00100 | |
53 | #define TIFM_MS_SYS_DAM 0x00080 | |
54 | #define TIFM_MS_SYS_DRM 0x00040 | |
55 | #define TIFM_MS_SYS_DRQSL 0x00020 | |
56 | #define TIFM_MS_SYS_REI 0x00010 | |
57 | #define TIFM_MS_SYS_REO 0x00008 | |
58 | #define TIFM_MS_SYS_BSY_MASK 0x00007 | |
59 | ||
60 | #define TIFM_MS_SYS_FIFO (TIFM_MS_SYS_INTEN | TIFM_MS_SYS_MSIEN \ | |
61 | | TIFM_MS_SYS_FCLR | TIFM_MS_SYS_BSY_MASK) | |
baf8532a AD |
62 | |
63 | /* Hardware flags */ | |
64 | enum { | |
92b22d93 AD |
65 | CMD_READY = 0x01, |
66 | FIFO_READY = 0x02, | |
67 | CARD_INT = 0x04 | |
baf8532a AD |
68 | }; |
69 | ||
70 | struct tifm_ms { | |
71 | struct tifm_dev *dev; | |
92b22d93 AD |
72 | struct timer_list timer; |
73 | struct memstick_request *req; | |
f1d82698 | 74 | struct tasklet_struct notify; |
baf8532a AD |
75 | unsigned int mode_mask; |
76 | unsigned int block_pos; | |
77 | unsigned long timeout_jiffies; | |
92b22d93 AD |
78 | unsigned char eject:1, |
79 | use_dma:1; | |
80 | unsigned char cmd_flags; | |
81 | unsigned char io_pos; | |
baf8532a AD |
82 | unsigned int io_word; |
83 | }; | |
84 | ||
92b22d93 AD |
85 | static unsigned int tifm_ms_read_data(struct tifm_ms *host, |
86 | unsigned char *buf, unsigned int length) | |
baf8532a AD |
87 | { |
88 | struct tifm_dev *sock = host->dev; | |
92b22d93 AD |
89 | unsigned int off = 0; |
90 | ||
91 | while (host->io_pos && length) { | |
92 | buf[off++] = host->io_word & 0xff; | |
93 | host->io_word >>= 8; | |
94 | length--; | |
95 | host->io_pos--; | |
96 | } | |
97 | ||
98 | if (!length) | |
99 | return off; | |
100 | ||
101 | while (!(TIFM_MS_STAT_EMP & readl(sock->addr + SOCK_MS_STATUS))) { | |
102 | if (length < 4) | |
103 | break; | |
104 | *(unsigned int *)(buf + off) = __raw_readl(sock->addr | |
105 | + SOCK_MS_DATA); | |
106 | length -= 4; | |
107 | off += 4; | |
108 | } | |
baf8532a | 109 | |
92b22d93 AD |
110 | if (length |
111 | && !(TIFM_MS_STAT_EMP & readl(sock->addr + SOCK_MS_STATUS))) { | |
112 | host->io_word = readl(sock->addr + SOCK_MS_DATA); | |
113 | for (host->io_pos = 4; host->io_pos; --host->io_pos) { | |
baf8532a AD |
114 | buf[off++] = host->io_word & 0xff; |
115 | host->io_word >>= 8; | |
116 | length--; | |
92b22d93 AD |
117 | if (!length) |
118 | break; | |
baf8532a | 119 | } |
baf8532a AD |
120 | } |
121 | ||
92b22d93 | 122 | return off; |
baf8532a AD |
123 | } |
124 | ||
92b22d93 AD |
125 | static unsigned int tifm_ms_write_data(struct tifm_ms *host, |
126 | unsigned char *buf, unsigned int length) | |
baf8532a AD |
127 | { |
128 | struct tifm_dev *sock = host->dev; | |
92b22d93 | 129 | unsigned int off = 0; |
baf8532a | 130 | |
92b22d93 AD |
131 | if (host->io_pos) { |
132 | while (host->io_pos < 4 && length) { | |
133 | host->io_word |= buf[off++] << (host->io_pos * 8); | |
134 | host->io_pos++; | |
baf8532a | 135 | length--; |
baf8532a | 136 | } |
baf8532a AD |
137 | } |
138 | ||
92b22d93 AD |
139 | if (host->io_pos == 4 |
140 | && !(TIFM_MS_STAT_FUL & readl(sock->addr + SOCK_MS_STATUS))) { | |
141 | writel(TIFM_MS_SYS_FDIR | readl(sock->addr + SOCK_MS_SYSTEM), | |
142 | sock->addr + SOCK_MS_SYSTEM); | |
143 | writel(host->io_word, sock->addr + SOCK_MS_DATA); | |
144 | host->io_pos = 0; | |
baf8532a | 145 | host->io_word = 0; |
92b22d93 AD |
146 | } else if (host->io_pos) { |
147 | return off; | |
148 | } | |
baf8532a | 149 | |
92b22d93 AD |
150 | if (!length) |
151 | return off; | |
baf8532a | 152 | |
92b22d93 AD |
153 | while (!(TIFM_MS_STAT_FUL & readl(sock->addr + SOCK_MS_STATUS))) { |
154 | if (length < 4) | |
155 | break; | |
156 | writel(TIFM_MS_SYS_FDIR | readl(sock->addr + SOCK_MS_SYSTEM), | |
157 | sock->addr + SOCK_MS_SYSTEM); | |
158 | __raw_writel(*(unsigned int *)(buf + off), | |
159 | sock->addr + SOCK_MS_DATA); | |
160 | length -= 4; | |
161 | off += 4; | |
162 | } | |
baf8532a | 163 | |
92b22d93 AD |
164 | switch (length) { |
165 | case 3: | |
166 | host->io_word |= buf[off + 2] << 16; | |
167 | host->io_pos++; | |
168 | case 2: | |
169 | host->io_word |= buf[off + 1] << 8; | |
170 | host->io_pos++; | |
171 | case 1: | |
172 | host->io_word |= buf[off]; | |
173 | host->io_pos++; | |
174 | } | |
baf8532a | 175 | |
92b22d93 | 176 | off += host->io_pos; |
baf8532a | 177 | |
92b22d93 | 178 | return off; |
baf8532a AD |
179 | } |
180 | ||
92b22d93 | 181 | static unsigned int tifm_ms_transfer_data(struct tifm_ms *host) |
baf8532a AD |
182 | { |
183 | struct tifm_dev *sock = host->dev; | |
92b22d93 AD |
184 | unsigned int length; |
185 | unsigned int off; | |
d250dad6 | 186 | unsigned int t_size, p_cnt; |
92b22d93 AD |
187 | unsigned char *buf; |
188 | struct page *pg; | |
189 | unsigned long flags = 0; | |
baf8532a | 190 | |
92b22d93 AD |
191 | if (host->req->long_data) { |
192 | length = host->req->sg.length - host->block_pos; | |
193 | off = host->req->sg.offset + host->block_pos; | |
194 | } else { | |
195 | length = host->req->data_len - host->block_pos; | |
196 | off = 0; | |
197 | } | |
198 | dev_dbg(&sock->dev, "fifo data transfer, %d, %d\n", length, | |
199 | host->block_pos); | |
200 | ||
201 | while (length) { | |
d250dad6 AM |
202 | unsigned int uninitialized_var(p_off); |
203 | ||
92b22d93 AD |
204 | if (host->req->long_data) { |
205 | pg = nth_page(sg_page(&host->req->sg), | |
206 | off >> PAGE_SHIFT); | |
207 | p_off = offset_in_page(off); | |
208 | p_cnt = PAGE_SIZE - p_off; | |
209 | p_cnt = min(p_cnt, length); | |
210 | ||
211 | local_irq_save(flags); | |
212 | buf = kmap_atomic(pg, KM_BIO_SRC_IRQ) + p_off; | |
213 | } else { | |
214 | buf = host->req->data + host->block_pos; | |
215 | p_cnt = host->req->data_len - host->block_pos; | |
216 | } | |
baf8532a | 217 | |
92b22d93 AD |
218 | t_size = host->req->data_dir == WRITE |
219 | ? tifm_ms_write_data(host, buf, p_cnt) | |
220 | : tifm_ms_read_data(host, buf, p_cnt); | |
baf8532a | 221 | |
92b22d93 AD |
222 | if (host->req->long_data) { |
223 | kunmap_atomic(buf - p_off, KM_BIO_SRC_IRQ); | |
224 | local_irq_restore(flags); | |
225 | } | |
baf8532a | 226 | |
92b22d93 AD |
227 | if (!t_size) |
228 | break; | |
229 | host->block_pos += t_size; | |
230 | length -= t_size; | |
231 | off += t_size; | |
232 | } | |
baf8532a | 233 | |
92b22d93 AD |
234 | dev_dbg(&sock->dev, "fifo data transfer, %d remaining\n", length); |
235 | if (!length && (host->req->data_dir == WRITE)) { | |
236 | if (host->io_pos) { | |
237 | writel(TIFM_MS_SYS_FDIR | |
238 | | readl(sock->addr + SOCK_MS_SYSTEM), | |
239 | sock->addr + SOCK_MS_SYSTEM); | |
240 | writel(host->io_word, sock->addr + SOCK_MS_DATA); | |
241 | } | |
242 | writel(TIFM_MS_SYS_FDIR | |
243 | | readl(sock->addr + SOCK_MS_SYSTEM), | |
244 | sock->addr + SOCK_MS_SYSTEM); | |
245 | writel(0, sock->addr + SOCK_MS_DATA); | |
246 | } else { | |
247 | readl(sock->addr + SOCK_MS_DATA); | |
248 | } | |
baf8532a | 249 | |
92b22d93 | 250 | return length; |
baf8532a AD |
251 | } |
252 | ||
253 | static int tifm_ms_issue_cmd(struct tifm_ms *host) | |
254 | { | |
255 | struct tifm_dev *sock = host->dev; | |
256 | unsigned char *data; | |
92b22d93 | 257 | unsigned int data_len, cmd, sys_param; |
baf8532a | 258 | |
92b22d93 AD |
259 | host->cmd_flags = 0; |
260 | host->block_pos = 0; | |
261 | host->io_pos = 0; | |
262 | host->io_word = 0; | |
baf8532a AD |
263 | host->cmd_flags = 0; |
264 | ||
92b22d93 | 265 | data = host->req->data; |
baf8532a | 266 | |
92b22d93 | 267 | host->use_dma = !no_dma; |
baf8532a | 268 | |
92b22d93 AD |
269 | if (host->req->long_data) { |
270 | data_len = host->req->sg.length; | |
271 | if (!is_power_of_2(data_len)) | |
272 | host->use_dma = 0; | |
e1f19995 | 273 | } else { |
baf8532a | 274 | data_len = host->req->data_len; |
92b22d93 AD |
275 | host->use_dma = 0; |
276 | } | |
baf8532a | 277 | |
92b22d93 AD |
278 | writel(TIFM_FIFO_INT_SETALL, |
279 | sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR); | |
280 | writel(TIFM_FIFO_ENABLE, | |
281 | sock->addr + SOCK_FIFO_CONTROL); | |
282 | ||
283 | if (host->use_dma) { | |
284 | if (1 != tifm_map_sg(sock, &host->req->sg, 1, | |
285 | host->req->data_dir == READ | |
286 | ? PCI_DMA_FROMDEVICE | |
287 | : PCI_DMA_TODEVICE)) { | |
288 | host->req->error = -ENOMEM; | |
289 | return host->req->error; | |
290 | } | |
291 | data_len = sg_dma_len(&host->req->sg); | |
baf8532a | 292 | |
92b22d93 AD |
293 | writel(ilog2(data_len) - 2, |
294 | sock->addr + SOCK_FIFO_PAGE_SIZE); | |
295 | writel(TIFM_FIFO_INTMASK, | |
296 | sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET); | |
297 | sys_param = TIFM_DMA_EN | (1 << 8); | |
298 | if (host->req->data_dir == WRITE) | |
299 | sys_param |= TIFM_DMA_TX; | |
baf8532a | 300 | |
92b22d93 AD |
301 | writel(TIFM_FIFO_INTMASK, |
302 | sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET); | |
baf8532a | 303 | |
92b22d93 AD |
304 | writel(sg_dma_address(&host->req->sg), |
305 | sock->addr + SOCK_DMA_ADDRESS); | |
306 | writel(sys_param, sock->addr + SOCK_DMA_CONTROL); | |
307 | } else { | |
308 | writel(host->mode_mask | TIFM_MS_SYS_FIFO, | |
309 | sock->addr + SOCK_MS_SYSTEM); | |
310 | ||
311 | writel(TIFM_FIFO_MORE, | |
312 | sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET); | |
e1f19995 | 313 | } |
baf8532a AD |
314 | |
315 | mod_timer(&host->timer, jiffies + host->timeout_jiffies); | |
316 | writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL), | |
317 | sock->addr + SOCK_CONTROL); | |
318 | host->req->error = 0; | |
319 | ||
92b22d93 AD |
320 | sys_param = readl(sock->addr + SOCK_MS_SYSTEM); |
321 | sys_param |= TIFM_MS_SYS_INTCLR; | |
322 | ||
323 | if (host->use_dma) | |
324 | sys_param |= TIFM_MS_SYS_DMA; | |
325 | else | |
326 | sys_param &= ~TIFM_MS_SYS_DMA; | |
327 | ||
328 | writel(sys_param, sock->addr + SOCK_MS_SYSTEM); | |
329 | ||
baf8532a AD |
330 | cmd = (host->req->tpc & 0xf) << 12; |
331 | cmd |= data_len; | |
332 | writel(cmd, sock->addr + SOCK_MS_COMMAND); | |
333 | ||
92b22d93 | 334 | dev_dbg(&sock->dev, "executing TPC %x, %x\n", cmd, sys_param); |
baf8532a AD |
335 | return 0; |
336 | } | |
337 | ||
338 | static void tifm_ms_complete_cmd(struct tifm_ms *host) | |
339 | { | |
340 | struct tifm_dev *sock = host->dev; | |
341 | struct memstick_host *msh = tifm_get_drvdata(sock); | |
baf8532a AD |
342 | int rc; |
343 | ||
344 | del_timer(&host->timer); | |
baf8532a | 345 | |
ead70773 AD |
346 | host->req->int_reg = readl(sock->addr + SOCK_MS_STATUS) & 0xff; |
347 | host->req->int_reg = (host->req->int_reg & 1) | |
348 | | ((host->req->int_reg << 4) & 0xe0); | |
349 | ||
350 | writel(TIFM_FIFO_INT_SETALL, | |
351 | sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR); | |
352 | writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL); | |
353 | ||
354 | if (host->use_dma) { | |
92b22d93 AD |
355 | tifm_unmap_sg(sock, &host->req->sg, 1, |
356 | host->req->data_dir == READ | |
357 | ? PCI_DMA_FROMDEVICE | |
358 | : PCI_DMA_TODEVICE); | |
ead70773 | 359 | } |
baf8532a AD |
360 | |
361 | writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL), | |
362 | sock->addr + SOCK_CONTROL); | |
363 | ||
92b22d93 | 364 | dev_dbg(&sock->dev, "TPC complete\n"); |
baf8532a AD |
365 | do { |
366 | rc = memstick_next_req(msh, &host->req); | |
367 | } while (!rc && tifm_ms_issue_cmd(host)); | |
368 | } | |
369 | ||
370 | static int tifm_ms_check_status(struct tifm_ms *host) | |
371 | { | |
372 | if (!host->req->error) { | |
373 | if (!(host->cmd_flags & CMD_READY)) | |
374 | return 1; | |
92b22d93 | 375 | if (!(host->cmd_flags & FIFO_READY)) |
baf8532a AD |
376 | return 1; |
377 | if (host->req->need_card_int | |
92b22d93 | 378 | && !(host->cmd_flags & CARD_INT)) |
baf8532a AD |
379 | return 1; |
380 | } | |
381 | return 0; | |
382 | } | |
383 | ||
384 | /* Called from interrupt handler */ | |
385 | static void tifm_ms_data_event(struct tifm_dev *sock) | |
386 | { | |
387 | struct tifm_ms *host; | |
92b22d93 | 388 | unsigned int fifo_status = 0, host_status = 0; |
baf8532a AD |
389 | int rc = 1; |
390 | ||
391 | spin_lock(&sock->lock); | |
392 | host = memstick_priv((struct memstick_host *)tifm_get_drvdata(sock)); | |
393 | fifo_status = readl(sock->addr + SOCK_DMA_FIFO_STATUS); | |
92b22d93 AD |
394 | host_status = readl(sock->addr + SOCK_MS_STATUS); |
395 | dev_dbg(&sock->dev, | |
396 | "data event: fifo_status %x, host_status %x, flags %x\n", | |
397 | fifo_status, host_status, host->cmd_flags); | |
baf8532a AD |
398 | |
399 | if (host->req) { | |
92b22d93 AD |
400 | if (host->use_dma && (fifo_status & 1)) { |
401 | host->cmd_flags |= FIFO_READY; | |
402 | rc = tifm_ms_check_status(host); | |
403 | } | |
404 | if (!host->use_dma && (fifo_status & TIFM_FIFO_MORE)) { | |
405 | if (!tifm_ms_transfer_data(host)) { | |
baf8532a AD |
406 | host->cmd_flags |= FIFO_READY; |
407 | rc = tifm_ms_check_status(host); | |
408 | } | |
409 | } | |
410 | } | |
411 | ||
412 | writel(fifo_status, sock->addr + SOCK_DMA_FIFO_STATUS); | |
413 | if (!rc) | |
414 | tifm_ms_complete_cmd(host); | |
415 | ||
416 | spin_unlock(&sock->lock); | |
417 | } | |
418 | ||
419 | ||
420 | /* Called from interrupt handler */ | |
421 | static void tifm_ms_card_event(struct tifm_dev *sock) | |
422 | { | |
423 | struct tifm_ms *host; | |
424 | unsigned int host_status = 0; | |
425 | int rc = 1; | |
426 | ||
427 | spin_lock(&sock->lock); | |
428 | host = memstick_priv((struct memstick_host *)tifm_get_drvdata(sock)); | |
429 | host_status = readl(sock->addr + SOCK_MS_STATUS); | |
430 | dev_dbg(&sock->dev, "host event: host_status %x, flags %x\n", | |
431 | host_status, host->cmd_flags); | |
432 | ||
433 | if (host->req) { | |
92b22d93 | 434 | if (host_status & TIFM_MS_STAT_TOE) |
baf8532a | 435 | host->req->error = -ETIME; |
92b22d93 | 436 | else if (host_status & TIFM_MS_STAT_CRC) |
baf8532a AD |
437 | host->req->error = -EILSEQ; |
438 | ||
92b22d93 | 439 | if (host_status & TIFM_MS_STAT_RDY) |
baf8532a | 440 | host->cmd_flags |= CMD_READY; |
92b22d93 AD |
441 | |
442 | if (host_status & TIFM_MS_STAT_MSINT) | |
443 | host->cmd_flags |= CARD_INT; | |
baf8532a AD |
444 | |
445 | rc = tifm_ms_check_status(host); | |
446 | ||
447 | } | |
448 | ||
92b22d93 | 449 | writel(TIFM_MS_SYS_INTCLR | readl(sock->addr + SOCK_MS_SYSTEM), |
baf8532a AD |
450 | sock->addr + SOCK_MS_SYSTEM); |
451 | ||
452 | if (!rc) | |
453 | tifm_ms_complete_cmd(host); | |
454 | ||
455 | spin_unlock(&sock->lock); | |
456 | return; | |
457 | } | |
458 | ||
f1d82698 | 459 | static void tifm_ms_req_tasklet(unsigned long data) |
baf8532a | 460 | { |
f1d82698 | 461 | struct memstick_host *msh = (struct memstick_host *)data; |
baf8532a AD |
462 | struct tifm_ms *host = memstick_priv(msh); |
463 | struct tifm_dev *sock = host->dev; | |
464 | unsigned long flags; | |
465 | int rc; | |
466 | ||
467 | spin_lock_irqsave(&sock->lock, flags); | |
f1d82698 AD |
468 | if (!host->req) { |
469 | if (host->eject) { | |
470 | do { | |
471 | rc = memstick_next_req(msh, &host->req); | |
472 | if (!rc) | |
473 | host->req->error = -ETIME; | |
474 | } while (!rc); | |
475 | spin_unlock_irqrestore(&sock->lock, flags); | |
476 | return; | |
477 | } | |
baf8532a | 478 | |
baf8532a AD |
479 | do { |
480 | rc = memstick_next_req(msh, &host->req); | |
f1d82698 | 481 | } while (!rc && tifm_ms_issue_cmd(host)); |
baf8532a | 482 | } |
baf8532a | 483 | spin_unlock_irqrestore(&sock->lock, flags); |
f1d82698 AD |
484 | } |
485 | ||
486 | static void tifm_ms_dummy_submit(struct memstick_host *msh) | |
487 | { | |
baf8532a AD |
488 | return; |
489 | } | |
490 | ||
f1d82698 AD |
491 | static void tifm_ms_submit_req(struct memstick_host *msh) |
492 | { | |
493 | struct tifm_ms *host = memstick_priv(msh); | |
494 | ||
495 | tasklet_schedule(&host->notify); | |
496 | } | |
497 | ||
b7789998 AD |
498 | static int tifm_ms_set_param(struct memstick_host *msh, |
499 | enum memstick_param param, | |
500 | int value) | |
baf8532a AD |
501 | { |
502 | struct tifm_ms *host = memstick_priv(msh); | |
503 | struct tifm_dev *sock = host->dev; | |
baf8532a AD |
504 | |
505 | switch (param) { | |
506 | case MEMSTICK_POWER: | |
eebbe9ca AD |
507 | /* also affected by media detection mechanism */ |
508 | if (value == MEMSTICK_POWER_ON) { | |
509 | host->mode_mask = TIFM_MS_SYS_SRAC | TIFM_MS_SYS_REI; | |
510 | writel(TIFM_MS_SYS_RESET, sock->addr + SOCK_MS_SYSTEM); | |
511 | writel(TIFM_MS_SYS_FCLR | TIFM_MS_SYS_INTCLR, | |
512 | sock->addr + SOCK_MS_SYSTEM); | |
513 | writel(0xffffffff, sock->addr + SOCK_MS_STATUS); | |
514 | } else if (value == MEMSTICK_POWER_OFF) { | |
515 | writel(TIFM_MS_SYS_FCLR | TIFM_MS_SYS_INTCLR, | |
516 | sock->addr + SOCK_MS_SYSTEM); | |
517 | writel(0xffffffff, sock->addr + SOCK_MS_STATUS); | |
b7789998 AD |
518 | } else |
519 | return -EINVAL; | |
baf8532a AD |
520 | break; |
521 | case MEMSTICK_INTERFACE: | |
522 | if (value == MEMSTICK_SERIAL) { | |
92b22d93 | 523 | host->mode_mask = TIFM_MS_SYS_SRAC | TIFM_MS_SYS_REI; |
baf8532a AD |
524 | writel((~TIFM_CTRL_FAST_CLK) |
525 | & readl(sock->addr + SOCK_CONTROL), | |
526 | sock->addr + SOCK_CONTROL); | |
e1f19995 | 527 | } else if (value == MEMSTICK_PAR4) { |
baf8532a AD |
528 | host->mode_mask = 0; |
529 | writel(TIFM_CTRL_FAST_CLK | |
530 | | readl(sock->addr + SOCK_CONTROL), | |
531 | sock->addr + SOCK_CONTROL); | |
b7789998 AD |
532 | } else |
533 | return -EINVAL; | |
baf8532a AD |
534 | break; |
535 | }; | |
536 | ||
b7789998 | 537 | return 0; |
baf8532a AD |
538 | } |
539 | ||
540 | static void tifm_ms_abort(unsigned long data) | |
541 | { | |
542 | struct tifm_ms *host = (struct tifm_ms *)data; | |
543 | ||
544 | dev_dbg(&host->dev->dev, "status %x\n", | |
545 | readl(host->dev->addr + SOCK_MS_STATUS)); | |
546 | printk(KERN_ERR | |
547 | "%s : card failed to respond for a long period of time " | |
548 | "(%x, %x)\n", | |
0252c3b4 | 549 | dev_name(&host->dev->dev), host->req ? host->req->tpc : 0, |
baf8532a AD |
550 | host->cmd_flags); |
551 | ||
552 | tifm_eject(host->dev); | |
553 | } | |
554 | ||
baf8532a AD |
555 | static int tifm_ms_probe(struct tifm_dev *sock) |
556 | { | |
557 | struct memstick_host *msh; | |
558 | struct tifm_ms *host; | |
559 | int rc = -EIO; | |
560 | ||
561 | if (!(TIFM_SOCK_STATE_OCCUPIED | |
562 | & readl(sock->addr + SOCK_PRESENT_STATE))) { | |
563 | printk(KERN_WARNING "%s : card gone, unexpectedly\n", | |
0252c3b4 | 564 | dev_name(&sock->dev)); |
baf8532a AD |
565 | return rc; |
566 | } | |
567 | ||
568 | msh = memstick_alloc_host(sizeof(struct tifm_ms), &sock->dev); | |
569 | if (!msh) | |
570 | return -ENOMEM; | |
571 | ||
572 | host = memstick_priv(msh); | |
573 | tifm_set_drvdata(sock, msh); | |
574 | host->dev = sock; | |
575 | host->timeout_jiffies = msecs_to_jiffies(1000); | |
baf8532a AD |
576 | |
577 | setup_timer(&host->timer, tifm_ms_abort, (unsigned long)host); | |
f1d82698 | 578 | tasklet_init(&host->notify, tifm_ms_req_tasklet, (unsigned long)msh); |
baf8532a | 579 | |
f1d82698 | 580 | msh->request = tifm_ms_submit_req; |
baf8532a AD |
581 | msh->set_param = tifm_ms_set_param; |
582 | sock->card_event = tifm_ms_card_event; | |
583 | sock->data_event = tifm_ms_data_event; | |
eebbe9ca AD |
584 | if (tifm_has_ms_pif(sock)) |
585 | msh->caps |= MEMSTICK_CAP_PAR4; | |
baf8532a | 586 | |
eebbe9ca | 587 | rc = memstick_add_host(msh); |
baf8532a AD |
588 | if (!rc) |
589 | return 0; | |
590 | ||
591 | memstick_free_host(msh); | |
592 | return rc; | |
593 | } | |
594 | ||
595 | static void tifm_ms_remove(struct tifm_dev *sock) | |
596 | { | |
597 | struct memstick_host *msh = tifm_get_drvdata(sock); | |
598 | struct tifm_ms *host = memstick_priv(msh); | |
599 | int rc = 0; | |
600 | unsigned long flags; | |
601 | ||
f1d82698 AD |
602 | msh->request = tifm_ms_dummy_submit; |
603 | tasklet_kill(&host->notify); | |
baf8532a AD |
604 | spin_lock_irqsave(&sock->lock, flags); |
605 | host->eject = 1; | |
606 | if (host->req) { | |
607 | del_timer(&host->timer); | |
608 | writel(TIFM_FIFO_INT_SETALL, | |
609 | sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR); | |
610 | writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL); | |
92b22d93 | 611 | if (host->use_dma) |
baf8532a AD |
612 | tifm_unmap_sg(sock, &host->req->sg, 1, |
613 | host->req->data_dir == READ | |
614 | ? PCI_DMA_TODEVICE | |
615 | : PCI_DMA_FROMDEVICE); | |
616 | host->req->error = -ETIME; | |
617 | ||
618 | do { | |
619 | rc = memstick_next_req(msh, &host->req); | |
620 | if (!rc) | |
621 | host->req->error = -ETIME; | |
622 | } while (!rc); | |
623 | } | |
624 | spin_unlock_irqrestore(&sock->lock, flags); | |
625 | ||
626 | memstick_remove_host(msh); | |
baf8532a AD |
627 | memstick_free_host(msh); |
628 | } | |
629 | ||
630 | #ifdef CONFIG_PM | |
631 | ||
632 | static int tifm_ms_suspend(struct tifm_dev *sock, pm_message_t state) | |
633 | { | |
d114ad54 AD |
634 | struct memstick_host *msh = tifm_get_drvdata(sock); |
635 | ||
636 | memstick_suspend_host(msh); | |
baf8532a AD |
637 | return 0; |
638 | } | |
639 | ||
640 | static int tifm_ms_resume(struct tifm_dev *sock) | |
641 | { | |
642 | struct memstick_host *msh = tifm_get_drvdata(sock); | |
baf8532a | 643 | |
d114ad54 | 644 | memstick_resume_host(msh); |
baf8532a AD |
645 | return 0; |
646 | } | |
647 | ||
648 | #else | |
649 | ||
650 | #define tifm_ms_suspend NULL | |
651 | #define tifm_ms_resume NULL | |
652 | ||
653 | #endif /* CONFIG_PM */ | |
654 | ||
655 | static struct tifm_device_id tifm_ms_id_tbl[] = { | |
656 | { TIFM_TYPE_MS }, { 0 } | |
657 | }; | |
658 | ||
659 | static struct tifm_driver tifm_ms_driver = { | |
660 | .driver = { | |
661 | .name = DRIVER_NAME, | |
662 | .owner = THIS_MODULE | |
663 | }, | |
664 | .id_table = tifm_ms_id_tbl, | |
665 | .probe = tifm_ms_probe, | |
666 | .remove = tifm_ms_remove, | |
667 | .suspend = tifm_ms_suspend, | |
668 | .resume = tifm_ms_resume | |
669 | }; | |
670 | ||
671 | static int __init tifm_ms_init(void) | |
672 | { | |
673 | return tifm_register_driver(&tifm_ms_driver); | |
674 | } | |
675 | ||
676 | static void __exit tifm_ms_exit(void) | |
677 | { | |
678 | tifm_unregister_driver(&tifm_ms_driver); | |
679 | } | |
680 | ||
681 | MODULE_AUTHOR("Alex Dubov"); | |
682 | MODULE_DESCRIPTION("TI FlashMedia MemoryStick driver"); | |
683 | MODULE_LICENSE("GPL"); | |
684 | MODULE_DEVICE_TABLE(tifm, tifm_ms_id_tbl); | |
baf8532a AD |
685 | |
686 | module_init(tifm_ms_init); | |
687 | module_exit(tifm_ms_exit); |