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8428e5ad DG |
1 | /* |
2 | * TI AM33XX SRAM EMIF Driver | |
3 | * | |
4 | * Copyright (C) 2016-2017 Texas Instruments Inc. | |
5 | * Dave Gerlach | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License | |
9 | * version 2 as published by the Free Software Foundation. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | */ | |
16 | ||
17 | #include <linux/err.h> | |
18 | #include <linux/genalloc.h> | |
19 | #include <linux/io.h> | |
20 | #include <linux/kernel.h> | |
21 | #include <linux/module.h> | |
22 | #include <linux/of.h> | |
23 | #include <linux/of_platform.h> | |
24 | #include <linux/platform_device.h> | |
25 | #include <linux/sram.h> | |
26 | #include <linux/ti-emif-sram.h> | |
27 | ||
28 | #include "emif.h" | |
29 | ||
30 | #define TI_EMIF_SRAM_SYMBOL_OFFSET(sym) ((unsigned long)(sym) - \ | |
31 | (unsigned long)&ti_emif_sram) | |
32 | ||
33 | #define EMIF_POWER_MGMT_WAIT_SELF_REFRESH_8192_CYCLES 0x00a0 | |
34 | ||
35 | struct ti_emif_data { | |
36 | phys_addr_t ti_emif_sram_phys; | |
37 | phys_addr_t ti_emif_sram_data_phys; | |
38 | unsigned long ti_emif_sram_virt; | |
39 | unsigned long ti_emif_sram_data_virt; | |
40 | struct gen_pool *sram_pool_code; | |
41 | struct gen_pool *sram_pool_data; | |
42 | struct ti_emif_pm_data pm_data; | |
43 | struct ti_emif_pm_functions pm_functions; | |
44 | }; | |
45 | ||
46 | static struct ti_emif_data *emif_instance; | |
47 | ||
48 | static u32 sram_suspend_address(struct ti_emif_data *emif_data, | |
49 | unsigned long addr) | |
50 | { | |
51 | return (emif_data->ti_emif_sram_virt + | |
52 | TI_EMIF_SRAM_SYMBOL_OFFSET(addr)); | |
53 | } | |
54 | ||
55 | static phys_addr_t sram_resume_address(struct ti_emif_data *emif_data, | |
56 | unsigned long addr) | |
57 | { | |
58 | return ((unsigned long)emif_data->ti_emif_sram_phys + | |
59 | TI_EMIF_SRAM_SYMBOL_OFFSET(addr)); | |
60 | } | |
61 | ||
62 | static void ti_emif_free_sram(struct ti_emif_data *emif_data) | |
63 | { | |
64 | gen_pool_free(emif_data->sram_pool_code, emif_data->ti_emif_sram_virt, | |
65 | ti_emif_sram_sz); | |
66 | gen_pool_free(emif_data->sram_pool_data, | |
67 | emif_data->ti_emif_sram_data_virt, | |
68 | sizeof(struct emif_regs_amx3)); | |
69 | } | |
70 | ||
71 | static int ti_emif_alloc_sram(struct device *dev, | |
72 | struct ti_emif_data *emif_data) | |
73 | { | |
74 | struct device_node *np = dev->of_node; | |
75 | int ret; | |
76 | ||
77 | emif_data->sram_pool_code = of_gen_pool_get(np, "sram", 0); | |
78 | if (!emif_data->sram_pool_code) { | |
79 | dev_err(dev, "Unable to get sram pool for ocmcram code\n"); | |
80 | return -ENODEV; | |
81 | } | |
82 | ||
83 | emif_data->ti_emif_sram_virt = | |
84 | gen_pool_alloc(emif_data->sram_pool_code, | |
85 | ti_emif_sram_sz); | |
86 | if (!emif_data->ti_emif_sram_virt) { | |
87 | dev_err(dev, "Unable to allocate code memory from ocmcram\n"); | |
88 | return -ENOMEM; | |
89 | } | |
90 | ||
91 | /* Save physical address to calculate resume offset during pm init */ | |
92 | emif_data->ti_emif_sram_phys = | |
93 | gen_pool_virt_to_phys(emif_data->sram_pool_code, | |
94 | emif_data->ti_emif_sram_virt); | |
95 | ||
96 | /* Get sram pool for data section and allocate space */ | |
97 | emif_data->sram_pool_data = of_gen_pool_get(np, "sram", 1); | |
98 | if (!emif_data->sram_pool_data) { | |
99 | dev_err(dev, "Unable to get sram pool for ocmcram data\n"); | |
100 | ret = -ENODEV; | |
101 | goto err_free_sram_code; | |
102 | } | |
103 | ||
104 | emif_data->ti_emif_sram_data_virt = | |
105 | gen_pool_alloc(emif_data->sram_pool_data, | |
106 | sizeof(struct emif_regs_amx3)); | |
107 | if (!emif_data->ti_emif_sram_data_virt) { | |
108 | dev_err(dev, "Unable to allocate data memory from ocmcram\n"); | |
109 | ret = -ENOMEM; | |
110 | goto err_free_sram_code; | |
111 | } | |
112 | ||
113 | /* Save physical address to calculate resume offset during pm init */ | |
114 | emif_data->ti_emif_sram_data_phys = | |
115 | gen_pool_virt_to_phys(emif_data->sram_pool_data, | |
116 | emif_data->ti_emif_sram_data_virt); | |
117 | /* | |
118 | * These functions are called during suspend path while MMU is | |
119 | * still on so add virtual base to offset for absolute address | |
120 | */ | |
121 | emif_data->pm_functions.save_context = | |
122 | sram_suspend_address(emif_data, | |
123 | (unsigned long)ti_emif_save_context); | |
124 | emif_data->pm_functions.enter_sr = | |
125 | sram_suspend_address(emif_data, | |
126 | (unsigned long)ti_emif_enter_sr); | |
127 | emif_data->pm_functions.abort_sr = | |
128 | sram_suspend_address(emif_data, | |
129 | (unsigned long)ti_emif_abort_sr); | |
130 | ||
131 | /* | |
132 | * These are called during resume path when MMU is not enabled | |
133 | * so physical address is used instead | |
134 | */ | |
135 | emif_data->pm_functions.restore_context = | |
136 | sram_resume_address(emif_data, | |
137 | (unsigned long)ti_emif_restore_context); | |
138 | emif_data->pm_functions.exit_sr = | |
139 | sram_resume_address(emif_data, | |
140 | (unsigned long)ti_emif_exit_sr); | |
6c110561 DG |
141 | emif_data->pm_functions.run_hw_leveling = |
142 | sram_resume_address(emif_data, | |
143 | (unsigned long)ti_emif_run_hw_leveling); | |
8428e5ad DG |
144 | |
145 | emif_data->pm_data.regs_virt = | |
146 | (struct emif_regs_amx3 *)emif_data->ti_emif_sram_data_virt; | |
147 | emif_data->pm_data.regs_phys = emif_data->ti_emif_sram_data_phys; | |
148 | ||
149 | return 0; | |
150 | ||
151 | err_free_sram_code: | |
152 | gen_pool_free(emif_data->sram_pool_code, emif_data->ti_emif_sram_virt, | |
153 | ti_emif_sram_sz); | |
154 | return ret; | |
155 | } | |
156 | ||
157 | static int ti_emif_push_sram(struct device *dev, struct ti_emif_data *emif_data) | |
158 | { | |
159 | void *copy_addr; | |
160 | u32 data_addr; | |
161 | ||
162 | copy_addr = sram_exec_copy(emif_data->sram_pool_code, | |
163 | (void *)emif_data->ti_emif_sram_virt, | |
164 | &ti_emif_sram, ti_emif_sram_sz); | |
165 | if (!copy_addr) { | |
166 | dev_err(dev, "Cannot copy emif code to sram\n"); | |
167 | return -ENODEV; | |
168 | } | |
169 | ||
170 | data_addr = sram_suspend_address(emif_data, | |
171 | (unsigned long)&ti_emif_pm_sram_data); | |
172 | copy_addr = sram_exec_copy(emif_data->sram_pool_code, | |
173 | (void *)data_addr, | |
174 | &emif_data->pm_data, | |
175 | sizeof(emif_data->pm_data)); | |
176 | if (!copy_addr) { | |
177 | dev_err(dev, "Cannot copy emif data to code sram\n"); | |
178 | return -ENODEV; | |
179 | } | |
180 | ||
181 | return 0; | |
182 | } | |
183 | ||
184 | /* | |
185 | * Due to Usage Note 3.1.2 "DDR3: JEDEC Compliance for Maximum | |
186 | * Self-Refresh Command Limit" found in AM335x Silicon Errata | |
187 | * (Document SPRZ360F Revised November 2013) we must configure | |
188 | * the self refresh delay timer to 0xA (8192 cycles) to avoid | |
189 | * generating too many refresh command from the EMIF. | |
190 | */ | |
191 | static void ti_emif_configure_sr_delay(struct ti_emif_data *emif_data) | |
192 | { | |
193 | writel(EMIF_POWER_MGMT_WAIT_SELF_REFRESH_8192_CYCLES, | |
194 | (emif_data->pm_data.ti_emif_base_addr_virt + | |
195 | EMIF_POWER_MANAGEMENT_CONTROL)); | |
196 | ||
197 | writel(EMIF_POWER_MGMT_WAIT_SELF_REFRESH_8192_CYCLES, | |
198 | (emif_data->pm_data.ti_emif_base_addr_virt + | |
199 | EMIF_POWER_MANAGEMENT_CTRL_SHDW)); | |
200 | } | |
201 | ||
202 | /** | |
203 | * ti_emif_copy_pm_function_table - copy mapping of pm funcs in sram | |
204 | * @sram_pool: pointer to struct gen_pool where dst resides | |
205 | * @dst: void * to address that table should be copied | |
206 | * | |
207 | * Returns 0 if success other error code if table is not available | |
208 | */ | |
209 | int ti_emif_copy_pm_function_table(struct gen_pool *sram_pool, void *dst) | |
210 | { | |
211 | void *copy_addr; | |
212 | ||
213 | if (!emif_instance) | |
214 | return -ENODEV; | |
215 | ||
216 | copy_addr = sram_exec_copy(sram_pool, dst, | |
217 | &emif_instance->pm_functions, | |
218 | sizeof(emif_instance->pm_functions)); | |
219 | if (!copy_addr) | |
220 | return -ENODEV; | |
221 | ||
222 | return 0; | |
223 | } | |
224 | EXPORT_SYMBOL_GPL(ti_emif_copy_pm_function_table); | |
225 | ||
226 | /** | |
227 | * ti_emif_get_mem_type - return type for memory type in use | |
228 | * | |
229 | * Returns memory type value read from EMIF or error code if fails | |
230 | */ | |
231 | int ti_emif_get_mem_type(void) | |
232 | { | |
233 | unsigned long temp; | |
234 | ||
235 | if (!emif_instance) | |
236 | return -ENODEV; | |
237 | ||
238 | temp = readl(emif_instance->pm_data.ti_emif_base_addr_virt + | |
239 | EMIF_SDRAM_CONFIG); | |
240 | ||
241 | temp = (temp & SDRAM_TYPE_MASK) >> SDRAM_TYPE_SHIFT; | |
242 | return temp; | |
243 | } | |
244 | EXPORT_SYMBOL_GPL(ti_emif_get_mem_type); | |
245 | ||
246 | static const struct of_device_id ti_emif_of_match[] = { | |
247 | { .compatible = "ti,emif-am3352", .data = | |
248 | (void *)EMIF_SRAM_AM33_REG_LAYOUT, }, | |
249 | { .compatible = "ti,emif-am4372", .data = | |
250 | (void *)EMIF_SRAM_AM43_REG_LAYOUT, }, | |
251 | {}, | |
252 | }; | |
253 | MODULE_DEVICE_TABLE(of, ti_emif_of_match); | |
254 | ||
38853979 DG |
255 | #ifdef CONFIG_PM_SLEEP |
256 | static int ti_emif_resume(struct device *dev) | |
257 | { | |
258 | unsigned long tmp = | |
259 | __raw_readl((void *)emif_instance->ti_emif_sram_virt); | |
260 | ||
261 | /* | |
262 | * Check to see if what we are copying is already present in the | |
263 | * first byte at the destination, only copy if it is not which | |
264 | * indicates we have lost context and sram no longer contains | |
265 | * the PM code | |
266 | */ | |
267 | if (tmp != ti_emif_sram) | |
268 | ti_emif_push_sram(dev, emif_instance); | |
269 | ||
270 | return 0; | |
271 | } | |
272 | ||
273 | static int ti_emif_suspend(struct device *dev) | |
274 | { | |
275 | /* | |
276 | * The contents will be present in DDR hence no need to | |
277 | * explicitly save | |
278 | */ | |
279 | return 0; | |
280 | } | |
281 | #endif /* CONFIG_PM_SLEEP */ | |
282 | ||
8428e5ad DG |
283 | static int ti_emif_probe(struct platform_device *pdev) |
284 | { | |
285 | int ret; | |
286 | struct resource *res; | |
287 | struct device *dev = &pdev->dev; | |
288 | const struct of_device_id *match; | |
289 | struct ti_emif_data *emif_data; | |
290 | ||
291 | emif_data = devm_kzalloc(dev, sizeof(*emif_data), GFP_KERNEL); | |
292 | if (!emif_data) | |
293 | return -ENOMEM; | |
294 | ||
295 | match = of_match_device(ti_emif_of_match, &pdev->dev); | |
296 | if (!match) | |
297 | return -ENODEV; | |
298 | ||
299 | emif_data->pm_data.ti_emif_sram_config = (unsigned long)match->data; | |
300 | ||
301 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
302 | emif_data->pm_data.ti_emif_base_addr_virt = devm_ioremap_resource(dev, | |
303 | res); | |
304 | if (IS_ERR(emif_data->pm_data.ti_emif_base_addr_virt)) { | |
8428e5ad DG |
305 | ret = PTR_ERR(emif_data->pm_data.ti_emif_base_addr_virt); |
306 | return ret; | |
307 | } | |
308 | ||
309 | emif_data->pm_data.ti_emif_base_addr_phys = res->start; | |
310 | ||
311 | ti_emif_configure_sr_delay(emif_data); | |
312 | ||
313 | ret = ti_emif_alloc_sram(dev, emif_data); | |
314 | if (ret) | |
315 | return ret; | |
316 | ||
317 | ret = ti_emif_push_sram(dev, emif_data); | |
318 | if (ret) | |
319 | goto fail_free_sram; | |
320 | ||
321 | emif_instance = emif_data; | |
322 | ||
323 | return 0; | |
324 | ||
325 | fail_free_sram: | |
326 | ti_emif_free_sram(emif_data); | |
327 | ||
328 | return ret; | |
329 | } | |
330 | ||
331 | static int ti_emif_remove(struct platform_device *pdev) | |
332 | { | |
8428e5ad DG |
333 | struct ti_emif_data *emif_data = emif_instance; |
334 | ||
335 | emif_instance = NULL; | |
336 | ||
337 | ti_emif_free_sram(emif_data); | |
338 | ||
339 | return 0; | |
340 | } | |
341 | ||
38853979 DG |
342 | static const struct dev_pm_ops ti_emif_pm_ops = { |
343 | SET_SYSTEM_SLEEP_PM_OPS(ti_emif_suspend, ti_emif_resume) | |
344 | }; | |
345 | ||
8428e5ad DG |
346 | static struct platform_driver ti_emif_driver = { |
347 | .probe = ti_emif_probe, | |
348 | .remove = ti_emif_remove, | |
349 | .driver = { | |
350 | .name = KBUILD_MODNAME, | |
351 | .of_match_table = of_match_ptr(ti_emif_of_match), | |
38853979 | 352 | .pm = &ti_emif_pm_ops, |
8428e5ad DG |
353 | }, |
354 | }; | |
355 | module_platform_driver(ti_emif_driver); | |
356 | ||
357 | MODULE_AUTHOR("Dave Gerlach <d-gerlach@ti.com>"); | |
358 | MODULE_DESCRIPTION("Texas Instruments SRAM EMIF driver"); | |
359 | MODULE_LICENSE("GPL v2"); |