Commit | Line | Data |
---|---|---|
ec8f24b7 | 1 | # SPDX-License-Identifier: GPL-2.0-only |
89184651 TR |
2 | config TEGRA_MC |
3 | bool "NVIDIA Tegra Memory Controller support" | |
4 | default y | |
56ebc9b0 | 5 | depends on ARCH_TEGRA || (COMPILE_TEST && COMMON_CLK) |
06f07981 | 6 | select INTERCONNECT |
89184651 TR |
7 | help |
8 | This driver supports the Memory Controller (MC) hardware found on | |
9 | NVIDIA Tegra SoCs. | |
73a7f0a9 | 10 | |
56ebc9b0 DO |
11 | if TEGRA_MC |
12 | ||
96e5da7c | 13 | config TEGRA20_EMC |
0260979b | 14 | tristate "NVIDIA Tegra20 External Memory Controller driver" |
96e5da7c | 15 | default y |
56ebc9b0 | 16 | depends on ARCH_TEGRA_2x_SOC || COMPILE_TEST |
dedf62d6 DO |
17 | select DEVFREQ_GOV_SIMPLE_ONDEMAND |
18 | select PM_DEVFREQ | |
131dd9a4 | 19 | select DDR |
96e5da7c DO |
20 | help |
21 | This driver is for the External Memory Controller (EMC) found on | |
22 | Tegra20 chips. The EMC controls the external DRAM on the board. | |
23 | This driver is required to change memory timings / clock rate for | |
24 | external memory. | |
25 | ||
e34212c7 | 26 | config TEGRA30_EMC |
0c56eda8 | 27 | tristate "NVIDIA Tegra30 External Memory Controller driver" |
e34212c7 | 28 | default y |
56ebc9b0 | 29 | depends on ARCH_TEGRA_3x_SOC || COMPILE_TEST |
d76fa3f2 | 30 | select PM_OPP |
e3aabb3c | 31 | select DDR |
e34212c7 DO |
32 | help |
33 | This driver is for the External Memory Controller (EMC) found on | |
34 | Tegra30 chips. The EMC controls the external DRAM on the board. | |
35 | This driver is required to change memory timings / clock rate for | |
36 | external memory. | |
37 | ||
73a7f0a9 | 38 | config TEGRA124_EMC |
281462e5 | 39 | tristate "NVIDIA Tegra124 External Memory Controller driver" |
73a7f0a9 | 40 | default y |
56ebc9b0 DO |
41 | depends on ARCH_TEGRA_124_SOC || COMPILE_TEST |
42 | select TEGRA124_CLK_EMC if ARCH_TEGRA | |
380def2d | 43 | select PM_OPP |
73a7f0a9 MP |
44 | help |
45 | This driver is for the External Memory Controller (EMC) found on | |
46 | Tegra124 chips. The EMC controls the external DRAM on the board. | |
47 | This driver is required to change memory timings / clock rate for | |
48 | external memory. | |
10de2114 JL |
49 | |
50 | config TEGRA210_EMC_TABLE | |
51 | bool | |
56ebc9b0 | 52 | depends on ARCH_TEGRA_210_SOC || COMPILE_TEST |
10de2114 JL |
53 | |
54 | config TEGRA210_EMC | |
55 | tristate "NVIDIA Tegra210 External Memory Controller driver" | |
56ebc9b0 | 56 | depends on ARCH_TEGRA_210_SOC || COMPILE_TEST |
10de2114 JL |
57 | select TEGRA210_EMC_TABLE |
58 | help | |
59 | This driver is for the External Memory Controller (EMC) found on | |
60 | Tegra210 chips. The EMC controls the external DRAM on the board. | |
61 | This driver is required to change memory timings / clock rate for | |
62 | external memory. | |
56ebc9b0 DO |
63 | |
64 | endif |