[linux-2.6-block.git] / drivers / memory / Kconfig

#
# Memory devices
#

menuconfig MEMORY
	bool "Memory Controller drivers"

if MEMORY

config TI_AEMIF
	tristate "Texas Instruments AEMIF driver"
	depends on (ARCH_DAVINCI || ARCH_KEYSTONE) && OF
	help
	  This driver is for the AEMIF module available in Texas Instruments
	  SoCs. AEMIF stands for Asynchronous External Memory Interface and
	  is intended to provide a glue-less interface to a variety of
	  asynchronuous memory devices like ASRAM, NOR and NAND memory. A total
	  of 256M bytes of any of these memories can be accessed at a given
	  time via four chip selects with 64M byte access per chip select.

config TI_EMIF
	tristate "Texas Instruments EMIF driver"
	depends on ARCH_OMAP2PLUS
	select DDR
	help
	  This driver is for the EMIF module available in Texas Instruments
	  SoCs. EMIF is an SDRAM controller that, based on its revision,
	  supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
	  This driver takes care of only LPDDR2 memories presently. The
	  functions of the driver includes re-configuring AC timing
	  parameters and other settings during frequency, voltage and
	  temperature changes

config MVEBU_DEVBUS
	bool "Marvell EBU Device Bus Controller"
	default y
	depends on PLAT_ORION && OF
	help
	  This driver is for the Device Bus controller available in some
	  Marvell EBU SoCs such as Discovery (mv78xx0), Orion (88f5xxx) and
	  Armada 370 and Armada XP. This controller allows to handle flash
	  devices such as NOR, NAND, SRAM, and FPGA.

config TEGRA20_MC
	bool "Tegra20 Memory Controller(MC) driver"
	default y
	depends on ARCH_TEGRA_2x_SOC
	help
	  This driver is for the Memory Controller(MC) module available
	  in Tegra20 SoCs, mainly for a address translation fault
	  analysis, especially for IOMMU/GART(Graphics Address
	  Relocation Table) module.

config TEGRA30_MC
	bool "Tegra30 Memory Controller(MC) driver"
	default y
	depends on ARCH_TEGRA_3x_SOC
	help
	  This driver is for the Memory Controller(MC) module available
	  in Tegra30 SoCs, mainly for a address translation fault
	  analysis, especially for IOMMU/SMMU(System Memory Management
	  Unit) module.

config FSL_IFC
	bool
	depends on FSL_SOC

endif
Commit	Line	Data
7ec94453 A	1	#
	2	# Memory devices
	3	#
	4
	5	menuconfig MEMORY
	6	bool "Memory Controller drivers"
	7
	8	if MEMORY
	9
5a7c8154 IK	10	config TI_AEMIF
	11	tristate "Texas Instruments AEMIF driver"
	12	depends on (ARCH_DAVINCI \|\| ARCH_KEYSTONE) && OF
	13	help
	14	This driver is for the AEMIF module available in Texas Instruments
	15	SoCs. AEMIF stands for Asynchronous External Memory Interface and
	16	is intended to provide a glue-less interface to a variety of
	17	asynchronuous memory devices like ASRAM, NOR and NAND memory. A total
	18	of 256M bytes of any of these memories can be accessed at a given
	19	time via four chip selects with 64M byte access per chip select.
	20
7ec94453 A	21	config TI_EMIF
7ec94453 A	22	tristate "Texas Instruments EMIF driver"
18e9a971	23	depends on ARCH_OMAP2PLUS
7ec94453 A	24	select DDR
	25	help
	26	This driver is for the EMIF module available in Texas Instruments
	27	SoCs. EMIF is an SDRAM controller that, based on its revision,
	28	supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
	29	This driver takes care of only LPDDR2 memories presently. The
	30	functions of the driver includes re-configuring AC timing
	31	parameters and other settings during frequency, voltage and
	32	temperature changes
	33
3edad321 EG	34	config MVEBU_DEVBUS
	35	bool "Marvell EBU Device Bus Controller"
	36	default y
	37	depends on PLAT_ORION && OF
	38	help
	39	This driver is for the Device Bus controller available in some
	40	Marvell EBU SoCs such as Discovery (mv78xx0), Orion (88f5xxx) and
	41	Armada 370 and Armada XP. This controller allows to handle flash
	42	devices such as NOR, NAND, SRAM, and FPGA.
	43
c542fb79	44	config TEGRA20_MC
f0e33f98 HD	45	bool "Tegra20 Memory Controller(MC) driver"
f0e33f98 HD	46	default y
c542fb79	47	depends on ARCH_TEGRA_2x_SOC
f0e33f98 HD	48	help
	49	This driver is for the Memory Controller(MC) module available
	50	in Tegra20 SoCs, mainly for a address translation fault
	51	analysis, especially for IOMMU/GART(Graphics Address
	52	Relocation Table) module.
c542fb79	53
af468109	54	config TEGRA30_MC
42d1149f HD	55	bool "Tegra30 Memory Controller(MC) driver"
42d1149f HD	56	default y
af468109	57	depends on ARCH_TEGRA_3x_SOC
42d1149f HD	58	help
	59	This driver is for the Memory Controller(MC) module available
	60	in Tegra30 SoCs, mainly for a address translation fault
	61	analysis, especially for IOMMU/SMMU(System Memory Management
	62	Unit) module.
af468109	63
42d87b18 PG	64	config FSL_IFC
	65	bool
	66	depends on FSL_SOC
	67
7ec94453	68	endif