projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
V4L/DVB (12523): tw9910: return updated geometry on successful S_FMT and S_CROP
[linux-2.6-block.git] / drivers / media / video / tw9910.c
CommitLineData
ed922a89
KM		 1/*
2 * tw9910 Video Driver
3 *
4 * Copyright (C) 2008 Renesas Solutions Corp.
5 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
6 *
7 * Based on ov772x driver,
8 *
9 * Copyright (C) 2008 Kuninori Morimoto <morimoto.kuninori@renesas.com>
10 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
11 * Copyright (C) 2008 Magnus Damm
12 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 */
18
19#include <linux/init.h>
20#include <linux/module.h>
21#include <linux/i2c.h>
22#include <linux/slab.h>
23#include <linux/kernel.h>
24#include <linux/delay.h>
25#include <linux/videodev2.h>
26#include <media/v4l2-chip-ident.h>
979ea1dd 27#include <media/v4l2-subdev.h>
ed922a89
KM		 28#include <media/soc_camera.h>
29#include <media/tw9910.h>
30
31#define GET_ID(val) ((val & 0xF8) >> 3)
32#define GET_ReV(val) (val & 0x07)
33
34/*
35 * register offset
36 */
37#define ID 0x00 /* Product ID Code Register */
38#define STATUS1 0x01 /* Chip Status Register I */
39#define INFORM 0x02 /* Input Format */
40#define OPFORM 0x03 /* Output Format Control Register */
41#define DLYCTR 0x04 /* Hysteresis and HSYNC Delay Control */
42#define OUTCTR1 0x05 /* Output Control I */
43#define ACNTL1 0x06 /* Analog Control Register 1 */
44#define CROP_HI 0x07 /* Cropping Register, High */
45#define VDELAY_LO 0x08 /* Vertical Delay Register, Low */
46#define VACTIVE_LO 0x09 /* Vertical Active Register, Low */
47#define HDELAY_LO 0x0A /* Horizontal Delay Register, Low */
48#define HACTIVE_LO 0x0B /* Horizontal Active Register, Low */
49#define CNTRL1 0x0C /* Control Register I */
50#define VSCALE_LO 0x0D /* Vertical Scaling Register, Low */
51#define SCALE_HI 0x0E /* Scaling Register, High */
52#define HSCALE_LO 0x0F /* Horizontal Scaling Register, Low */
53#define BRIGHT 0x10 /* BRIGHTNESS Control Register */
54#define CONTRAST 0x11 /* CONTRAST Control Register */
55#define SHARPNESS 0x12 /* SHARPNESS Control Register I */
56#define SAT_U 0x13 /* Chroma (U) Gain Register */
57#define SAT_V 0x14 /* Chroma (V) Gain Register */
58#define HUE 0x15 /* Hue Control Register */
59#define CORING1 0x17
60#define CORING2 0x18 /* Coring and IF compensation */
61#define VBICNTL 0x19 /* VBI Control Register */
62#define ACNTL2 0x1A /* Analog Control 2 */
63#define OUTCTR2 0x1B /* Output Control 2 */
64#define SDT 0x1C /* Standard Selection */
65#define SDTR 0x1D /* Standard Recognition */
66#define TEST 0x1F /* Test Control Register */
67#define CLMPG 0x20 /* Clamping Gain */
68#define IAGC 0x21 /* Individual AGC Gain */
69#define AGCGAIN 0x22 /* AGC Gain */
70#define PEAKWT 0x23 /* White Peak Threshold */
71#define CLMPL 0x24 /* Clamp level */
72#define SYNCT 0x25 /* Sync Amplitude */
73#define MISSCNT 0x26 /* Sync Miss Count Register */
74#define PCLAMP 0x27 /* Clamp Position Register */
75#define VCNTL1 0x28 /* Vertical Control I */
76#define VCNTL2 0x29 /* Vertical Control II */
77#define CKILL 0x2A /* Color Killer Level Control */
78#define COMB 0x2B /* Comb Filter Control */
79#define LDLY 0x2C /* Luma Delay and H Filter Control */
80#define MISC1 0x2D /* Miscellaneous Control I */
81#define LOOP 0x2E /* LOOP Control Register */
82#define MISC2 0x2F /* Miscellaneous Control II */
83#define MVSN 0x30 /* Macrovision Detection */
84#define STATUS2 0x31 /* Chip STATUS II */
85#define HFREF 0x32 /* H monitor */
86#define CLMD 0x33 /* CLAMP MODE */
87#define IDCNTL 0x34 /* ID Detection Control */
88#define CLCNTL1 0x35 /* Clamp Control I */
89#define ANAPLLCTL 0x4C
90#define VBIMIN 0x4D
91#define HSLOWCTL 0x4E
92#define WSS3 0x4F
93#define FILLDATA 0x50
94#define SDID 0x51
95#define DID 0x52
96#define WSS1 0x53
97#define WSS2 0x54
98#define VVBI 0x55
99#define LCTL6 0x56
100#define LCTL7 0x57
101#define LCTL8 0x58
102#define LCTL9 0x59
103#define LCTL10 0x5A
104#define LCTL11 0x5B
105#define LCTL12 0x5C
106#define LCTL13 0x5D
107#define LCTL14 0x5E
108#define LCTL15 0x5F
109#define LCTL16 0x60
110#define LCTL17 0x61
111#define LCTL18 0x62
112#define LCTL19 0x63
113#define LCTL20 0x64
114#define LCTL21 0x65
115#define LCTL22 0x66
116#define LCTL23 0x67
117#define LCTL24 0x68
118#define LCTL25 0x69
119#define LCTL26 0x6A
120#define HSGEGIN 0x6B
121#define HSEND 0x6C
122#define OVSDLY 0x6D
123#define OVSEND 0x6E
124#define VBIDELAY 0x6F
125
126/*
127 * register detail
128 */
129
130/* INFORM */
131#define FC27_ON 0x40 /* 1 : Input crystal clock frequency is 27MHz */
132#define FC27_FF 0x00 /* 0 : Square pixel mode. */
133 /* Must use 24.54MHz for 60Hz field rate */
134 /* source or 29.5MHz for 50Hz field rate */
135#define IFSEL_S 0x10 /* 01 : S-video decoding */
136#define IFSEL_C 0x00 /* 00 : Composite video decoding */
137 /* Y input video selection */
138#define YSEL_M0 0x00 /* 00 : Mux0 selected */
139#define YSEL_M1 0x04 /* 01 : Mux1 selected */
140#define YSEL_M2 0x08 /* 10 : Mux2 selected */
141#define YSEL_M3 0x10 /* 11 : Mux3 selected */
142
143/* OPFORM */
144#define MODE 0x80 /* 0 : CCIR601 compatible YCrCb 4:2:2 format */
145 /* 1 : ITU-R-656 compatible data sequence format */
146#define LEN 0x40 /* 0 : 8-bit YCrCb 4:2:2 output format */
147 /* 1 : 16-bit YCrCb 4:2:2 output format.*/
148#define LLCMODE 0x20 /* 1 : LLC output mode. */
149 /* 0 : free-run output mode */
150#define AINC 0x10 /* Serial interface auto-indexing control */
151 /* 0 : auto-increment */
152 /* 1 : non-auto */
153#define VSCTL 0x08 /* 1 : Vertical out ctrl by DVALID */
154 /* 0 : Vertical out ctrl by HACTIVE and DVALID */
155#define OEN 0x04 /* Output Enable together with TRI_SEL. */
156
157/* OUTCTR1 */
158#define VSP_LO 0x00 /* 0 : VS pin output polarity is active low */
159#define VSP_HI 0x80 /* 1 : VS pin output polarity is active high. */
160 /* VS pin output control */
161#define VSSL_VSYNC 0x00 /* 0 : VSYNC */
162#define VSSL_VACT 0x10 /* 1 : VACT */
163#define VSSL_FIELD 0x20 /* 2 : FIELD */
164#define VSSL_VVALID 0x30 /* 3 : VVALID */
165#define VSSL_ZERO 0x70 /* 7 : 0 */
166#define HSP_LOW 0x00 /* 0 : HS pin output polarity is active low */
167#define HSP_HI 0x08 /* 1 : HS pin output polarity is active high.*/
168 /* HS pin output control */
169#define HSSL_HACT 0x00 /* 0 : HACT */
170#define HSSL_HSYNC 0x01 /* 1 : HSYNC */
171#define HSSL_DVALID 0x02 /* 2 : DVALID */
172#define HSSL_HLOCK 0x03 /* 3 : HLOCK */
173#define HSSL_ASYNCW 0x04 /* 4 : ASYNCW */
174#define HSSL_ZERO 0x07 /* 7 : 0 */
175
176/* ACNTL1 */
177#define SRESET 0x80 /* resets the device to its default state
178 * but all register content remain unchanged.
179 * This bit is self-resetting.
180 */
181
182/* VBICNTL */
183/* RTSEL : control the real time signal
184* output from the MPOUT pin
185*/
186#define RTSEL_MASK 0x07
187#define RTSEL_VLOSS 0x00 /* 0000 = Video loss */
188#define RTSEL_HLOCK 0x01 /* 0001 = H-lock */
189#define RTSEL_SLOCK 0x02 /* 0010 = S-lock */
190#define RTSEL_VLOCK 0x03 /* 0011 = V-lock */
191#define RTSEL_MONO 0x04 /* 0100 = MONO */
192#define RTSEL_DET50 0x05 /* 0101 = DET50 */
193#define RTSEL_FIELD 0x06 /* 0110 = FIELD */
194#define RTSEL_RTCO 0x07 /* 0111 = RTCO ( Real Time Control ) */
195
196/*
197 * structure
198 */
199
200struct regval_list {
201 unsigned char reg_num;
202 unsigned char value;
203};
204
205struct tw9910_scale_ctrl {
206 char *name;
207 unsigned short width;
208 unsigned short height;
209 u16 hscale;
210 u16 vscale;
211};
212
213struct tw9910_cropping_ctrl {
214 u16 vdelay;
215 u16 vactive;
216 u16 hdelay;
217 u16 hactive;
218};
219
220struct tw9910_hsync_ctrl {
221 u16 start;
222 u16 end;
223};
224
225struct tw9910_priv {
979ea1dd 226 struct v4l2_subdev subdev;
ed922a89 227 struct tw9910_video_info *info;
ed922a89
KM		 228 const struct tw9910_scale_ctrl *scale;
229};
230
231/*
232 * register settings
233 */
234
235#define ENDMARKER { 0xff, 0xff }
236
237static const struct regval_list tw9910_default_regs[] =
238{
239 { OPFORM, 0x00 },
240 { OUTCTR1, VSP_LO | VSSL_VVALID | HSP_HI | HSSL_HSYNC },
241 ENDMARKER,
242};
243
244static const struct soc_camera_data_format tw9910_color_fmt[] = {
245 {
246 .name = "VYUY",
247 .fourcc = V4L2_PIX_FMT_VYUY,
248 .depth = 16,
249 .colorspace = V4L2_COLORSPACE_SMPTE170M,
250 }
251};
252
253static const struct tw9910_scale_ctrl tw9910_ntsc_scales[] = {
254 {
255 .name = "NTSC SQ",
256 .width = 640,
257 .height = 480,
258 .hscale = 0x0100,
259 .vscale = 0x0100,
260 },
261 {
262 .name = "NTSC CCIR601",
263 .width = 720,
264 .height = 480,
265 .hscale = 0x0100,
266 .vscale = 0x0100,
267 },
268 {
269 .name = "NTSC SQ (CIF)",
270 .width = 320,
271 .height = 240,
272 .hscale = 0x0200,
273 .vscale = 0x0200,
274 },
275 {
276 .name = "NTSC CCIR601 (CIF)",
277 .width = 360,
278 .height = 240,
279 .hscale = 0x0200,
280 .vscale = 0x0200,
281 },
282 {
283 .name = "NTSC SQ (QCIF)",
284 .width = 160,
285 .height = 120,
286 .hscale = 0x0400,
287 .vscale = 0x0400,
288 },
289 {
290 .name = "NTSC CCIR601 (QCIF)",
291 .width = 180,
292 .height = 120,
293 .hscale = 0x0400,
294 .vscale = 0x0400,
295 },
296};
297
298static const struct tw9910_scale_ctrl tw9910_pal_scales[] = {
299 {
300 .name = "PAL SQ",
301 .width = 768,
302 .height = 576,
303 .hscale = 0x0100,
304 .vscale = 0x0100,
305 },
306 {
307 .name = "PAL CCIR601",
308 .width = 720,
309 .height = 576,
310 .hscale = 0x0100,
311 .vscale = 0x0100,
312 },
313 {
314 .name = "PAL SQ (CIF)",
315 .width = 384,
316 .height = 288,
317 .hscale = 0x0200,
318 .vscale = 0x0200,
319 },
320 {
321 .name = "PAL CCIR601 (CIF)",
322 .width = 360,
323 .height = 288,
324 .hscale = 0x0200,
325 .vscale = 0x0200,
326 },
327 {
328 .name = "PAL SQ (QCIF)",
329 .width = 192,
330 .height = 144,
331 .hscale = 0x0400,
332 .vscale = 0x0400,
333 },
334 {
335 .name = "PAL CCIR601 (QCIF)",
336 .width = 180,
337 .height = 144,
338 .hscale = 0x0400,
339 .vscale = 0x0400,
340 },
341};
342
343static const struct tw9910_cropping_ctrl tw9910_cropping_ctrl = {
344 .vdelay = 0x0012,
345 .vactive = 0x00F0,
346 .hdelay = 0x0010,
347 .hactive = 0x02D0,
348};
349
350static const struct tw9910_hsync_ctrl tw9910_hsync_ctrl = {
351 .start = 0x0260,
352 .end = 0x0300,
353};
354
355/*
356 * general function
357 */
979ea1dd
GL		 358static struct tw9910_priv *to_tw9910(const struct i2c_client *client)
359{
360 return container_of(i2c_get_clientdata(client), struct tw9910_priv, subdev);
361}
362
ed922a89
KM		 363static int tw9910_set_scale(struct i2c_client *client,
364 const struct tw9910_scale_ctrl *scale)
365{
366 int ret;
367
368 ret = i2c_smbus_write_byte_data(client, SCALE_HI,
369 (scale->vscale & 0x0F00) >> 4 |
370 (scale->hscale & 0x0F00) >> 8);
371 if (ret < 0)
372 return ret;
373
374 ret = i2c_smbus_write_byte_data(client, HSCALE_LO,
375 scale->hscale & 0x00FF);
376 if (ret < 0)
377 return ret;
378
379 ret = i2c_smbus_write_byte_data(client, VSCALE_LO,
380 scale->vscale & 0x00FF);
381
382 return ret;
383}
384
385static int tw9910_set_cropping(struct i2c_client *client,
386 const struct tw9910_cropping_ctrl *cropping)
387{
388 int ret;
389
390 ret = i2c_smbus_write_byte_data(client, CROP_HI,
391 (cropping->vdelay & 0x0300) >> 2 |
392 (cropping->vactive & 0x0300) >> 4 |
393 (cropping->hdelay & 0x0300) >> 6 |
394 (cropping->hactive & 0x0300) >> 8);
395 if (ret < 0)
396 return ret;
397
398 ret = i2c_smbus_write_byte_data(client, VDELAY_LO,
399 cropping->vdelay & 0x00FF);
400 if (ret < 0)
401 return ret;
402
403 ret = i2c_smbus_write_byte_data(client, VACTIVE_LO,
404 cropping->vactive & 0x00FF);
405 if (ret < 0)
406 return ret;
407
408 ret = i2c_smbus_write_byte_data(client, HDELAY_LO,
409 cropping->hdelay & 0x00FF);
410 if (ret < 0)
411 return ret;
412
413 ret = i2c_smbus_write_byte_data(client, HACTIVE_LO,
414 cropping->hactive & 0x00FF);
415
416 return ret;
417}
418
419static int tw9910_set_hsync(struct i2c_client *client,
420 const struct tw9910_hsync_ctrl *hsync)
421{
422 int ret;
423
424 /* bit 10 - 3 */
425 ret = i2c_smbus_write_byte_data(client, HSGEGIN,
426 (hsync->start & 0x07F8) >> 3);
427 if (ret < 0)
428 return ret;
429
430 /* bit 10 - 3 */
431 ret = i2c_smbus_write_byte_data(client, HSEND,
432 (hsync->end & 0x07F8) >> 3);
433 if (ret < 0)
434 return ret;
435
436 /* bit 2 - 0 */
437 ret = i2c_smbus_read_byte_data(client, HSLOWCTL);
438 if (ret < 0)
439 return ret;
440
441 ret = i2c_smbus_write_byte_data(client, HSLOWCTL,
442 (ret & 0x88) |
443 (hsync->start & 0x0007) << 4 |
444 (hsync->end & 0x0007));
445
446 return ret;
447}
448
449static int tw9910_write_array(struct i2c_client *client,
450 const struct regval_list *vals)
451{
452 while (vals->reg_num != 0xff) {
453 int ret = i2c_smbus_write_byte_data(client,
454 vals->reg_num,
455 vals->value);
456 if (ret < 0)
457 return ret;
458 vals++;
459 }
460 return 0;
461}
462
463static int tw9910_mask_set(struct i2c_client *client, u8 command,
464 u8 mask, u8 set)
465{
466 s32 val = i2c_smbus_read_byte_data(client, command);
1af1b7a2
KM		 467 if (val < 0)
468 return val;
ed922a89
KM		 469
470 val &= ~mask;
1af1b7a2 471 val |= set & mask;
ed922a89
KM		 472
473 return i2c_smbus_write_byte_data(client, command, val);
474}
475
476static void tw9910_reset(struct i2c_client *client)
477{
478 i2c_smbus_write_byte_data(client, ACNTL1, SRESET);
479 msleep(1);
480}
481
482static const struct tw9910_scale_ctrl*
483tw9910_select_norm(struct soc_camera_device *icd, u32 width, u32 height)
484{
485 const struct tw9910_scale_ctrl *scale;
486 const struct tw9910_scale_ctrl *ret = NULL;
487 v4l2_std_id norm = icd->vdev->current_norm;
488 __u32 diff = 0xffffffff, tmp;
489 int size, i;
490
491 if (norm & V4L2_STD_NTSC) {
492 scale = tw9910_ntsc_scales;
493 size = ARRAY_SIZE(tw9910_ntsc_scales);
494 } else if (norm & V4L2_STD_PAL) {
495 scale = tw9910_pal_scales;
496 size = ARRAY_SIZE(tw9910_pal_scales);
497 } else {
498 return NULL;
499 }
500
501 for (i = 0; i < size; i++) {
502 tmp = abs(width - scale[i].width) +
503 abs(height - scale[i].height);
504 if (tmp < diff) {
505 diff = tmp;
506 ret = scale + i;
507 }
508 }
509
510 return ret;
511}
512
513/*
514 * soc_camera_ops function
515 */
979ea1dd 516static int tw9910_s_stream(struct v4l2_subdev *sd, int enable)
ed922a89 517{
979ea1dd
GL		 518 struct i2c_client *client = sd->priv;
519 struct tw9910_priv *priv = to_tw9910(client);
ed922a89 520
979ea1dd
GL		 521 if (!enable)
522 return 0;
ed922a89
KM		 523
524 if (!priv->scale) {
979ea1dd 525 dev_err(&client->dev, "norm select error\n");
ed922a89
KM		 526 return -EPERM;
527 }
528
979ea1dd 529 dev_dbg(&client->dev, "%s %dx%d\n",
ed922a89
KM		 530 priv->scale->name,
531 priv->scale->width,
532 priv->scale->height);
533
534 return 0;
535}
536
ed922a89
KM		 537static int tw9910_set_bus_param(struct soc_camera_device *icd,
538 unsigned long flags)
539{
540 return 0;
541}
542
543static unsigned long tw9910_query_bus_param(struct soc_camera_device *icd)
544{
40e2e092 545 struct i2c_client *client = to_i2c_client(to_soc_camera_control(icd));
979ea1dd 546 struct tw9910_priv *priv = to_tw9910(client);
40e2e092 547 struct soc_camera_link *icl = to_soc_camera_link(icd);
ed922a89
KM		 548 unsigned long flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_MASTER |
549 SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_HSYNC_ACTIVE_HIGH |
550 SOCAM_DATA_ACTIVE_HIGH | priv->info->buswidth;
551
552 return soc_camera_apply_sensor_flags(icl, flags);
553}
554
979ea1dd 555static int tw9910_s_std(struct v4l2_subdev *sd, v4l2_std_id norm)
ed922a89
KM		 556{
557 int ret = -EINVAL;
558
979ea1dd 559 if (norm & (V4L2_STD_NTSC | V4L2_STD_PAL))
ed922a89
KM		 560 ret = 0;
561
562 return ret;
563}
564
565static int tw9910_enum_input(struct soc_camera_device *icd,
566 struct v4l2_input *inp)
567{
568 inp->type = V4L2_INPUT_TYPE_TUNER;
569 inp->std = V4L2_STD_UNKNOWN;
570 strcpy(inp->name, "Video");
571
572 return 0;
573}
574
979ea1dd
GL		 575static int tw9910_g_chip_ident(struct v4l2_subdev *sd,
576 struct v4l2_dbg_chip_ident *id)
577{
578 id->ident = V4L2_IDENT_TW9910;
579 id->revision = 0;
580
581 return 0;
582}
583
ed922a89 584#ifdef CONFIG_VIDEO_ADV_DEBUG
979ea1dd
GL		 585static int tw9910_g_register(struct v4l2_subdev *sd,
586 struct v4l2_dbg_register *reg)
ed922a89 587{
979ea1dd 588 struct i2c_client *client = sd->priv;
ed922a89
KM		 589 int ret;
590
591 if (reg->reg > 0xff)
592 return -EINVAL;
593
40e2e092 594 ret = i2c_smbus_read_byte_data(client, reg->reg);
ed922a89
KM		 595 if (ret < 0)
596 return ret;
597
598 /* ret = int
599 * reg->val = __u64
600 */
601 reg->val = (__u64)ret;
602
603 return 0;
604}
605
979ea1dd
GL		 606static int tw9910_s_register(struct v4l2_subdev *sd,
607 struct v4l2_dbg_register *reg)
ed922a89 608{
979ea1dd 609 struct i2c_client *client = sd->priv;
ed922a89
KM		 610
611 if (reg->reg > 0xff ||
612 reg->val > 0xff)
613 return -EINVAL;
614
40e2e092 615 return i2c_smbus_write_byte_data(client, reg->reg, reg->val);
ed922a89
KM		 616}
617#endif
618
09e231b3
GL		 619static int tw9910_set_crop(struct soc_camera_device *icd,
620 struct v4l2_rect *rect)
ed922a89 621{
40e2e092 622 struct i2c_client *client = to_i2c_client(to_soc_camera_control(icd));
979ea1dd 623 struct tw9910_priv *priv = to_tw9910(client);
ed922a89
KM		 624 int ret = -EINVAL;
625 u8 val;
626
627 /*
628 * select suitable norm
629 */
630 priv->scale = tw9910_select_norm(icd, rect->width, rect->height);
631 if (!priv->scale)
6d756112 632 goto tw9910_set_fmt_error;
ed922a89
KM		 633
634 /*
635 * reset hardware
636 */
40e2e092
GL		 637 tw9910_reset(client);
638 ret = tw9910_write_array(client, tw9910_default_regs);
ed922a89 639 if (ret < 0)
6d756112
KM		 640 goto tw9910_set_fmt_error;
641
ed922a89
KM		 642 /*
643 * set bus width
644 */
645 val = 0x00;
646 if (SOCAM_DATAWIDTH_16 == priv->info->buswidth)
647 val = LEN;
648
40e2e092 649 ret = tw9910_mask_set(client, OPFORM, LEN, val);
ed922a89 650 if (ret < 0)
6d756112 651 goto tw9910_set_fmt_error;
ed922a89
KM		 652
653 /*
654 * select MPOUT behavior
655 */
656 switch (priv->info->mpout) {
657 case TW9910_MPO_VLOSS:
658 val = RTSEL_VLOSS; break;
659 case TW9910_MPO_HLOCK:
660 val = RTSEL_HLOCK; break;
661 case TW9910_MPO_SLOCK:
662 val = RTSEL_SLOCK; break;
663 case TW9910_MPO_VLOCK:
664 val = RTSEL_VLOCK; break;
665 case TW9910_MPO_MONO:
666 val = RTSEL_MONO; break;
667 case TW9910_MPO_DET50:
668 val = RTSEL_DET50; break;
669 case TW9910_MPO_FIELD:
670 val = RTSEL_FIELD; break;
671 case TW9910_MPO_RTCO:
672 val = RTSEL_RTCO; break;
673 default:
674 val = 0;
675 }
676
40e2e092 677 ret = tw9910_mask_set(client, VBICNTL, RTSEL_MASK, val);
ed922a89 678 if (ret < 0)
6d756112 679 goto tw9910_set_fmt_error;
ed922a89
KM		 680
681 /*
682 * set scale
683 */
40e2e092 684 ret = tw9910_set_scale(client, priv->scale);
ed922a89 685 if (ret < 0)
6d756112 686 goto tw9910_set_fmt_error;
ed922a89
KM		 687
688 /*
689 * set cropping
690 */
40e2e092 691 ret = tw9910_set_cropping(client, &tw9910_cropping_ctrl);
ed922a89 692 if (ret < 0)
6d756112 693 goto tw9910_set_fmt_error;
ed922a89
KM		 694
695 /*
696 * set hsync
697 */
40e2e092 698 ret = tw9910_set_hsync(client, &tw9910_hsync_ctrl);
6d756112
KM		 699 if (ret < 0)
700 goto tw9910_set_fmt_error;
701
123ab622
GL		 702 rect->width = priv->scale->width;
703 rect->height = priv->scale->height;
704 rect->left = 0;
705 rect->top = 0;
706
6d756112
KM		 707 return ret;
708
709tw9910_set_fmt_error:
710
40e2e092 711 tw9910_reset(client);
6d756112 712 priv->scale = NULL;
ed922a89
KM		 713
714 return ret;
715}
716
979ea1dd 717static int tw9910_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
09e231b3 718{
979ea1dd
GL		 719 struct i2c_client *client = sd->priv;
720 struct soc_camera_device *icd = client->dev.platform_data;
09e231b3
GL		 721 struct v4l2_pix_format *pix = &f->fmt.pix;
722 struct v4l2_rect rect = {
a0705b07
GL		 723 .left = icd->rect_current.left,
724 .top = icd->rect_current.top,
09e231b3
GL		 725 .width = pix->width,
726 .height = pix->height,
727 };
123ab622 728 int i, ret;
09e231b3
GL		 729
730 /*
731 * check color format
732 */
733 for (i = 0; i < ARRAY_SIZE(tw9910_color_fmt); i++)
734 if (pix->pixelformat == tw9910_color_fmt[i].fourcc)
735 break;
736
737 if (i == ARRAY_SIZE(tw9910_color_fmt))
738 return -EINVAL;
739
123ab622
GL		 740 ret = tw9910_set_crop(icd, &rect);
741 if (!ret) {
742 pix->width = rect.width;
743 pix->height = rect.height;
744 }
745 return ret;
09e231b3
GL		 746}
747
979ea1dd 748static int tw9910_try_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
ed922a89 749{
979ea1dd
GL		 750 struct i2c_client *client = sd->priv;
751 struct soc_camera_device *icd = client->dev.platform_data;
ed922a89
KM		 752 struct v4l2_pix_format *pix = &f->fmt.pix;
753 const struct tw9910_scale_ctrl *scale;
754
755 if (V4L2_FIELD_ANY == pix->field) {
756 pix->field = V4L2_FIELD_INTERLACED;
757 } else if (V4L2_FIELD_INTERLACED != pix->field) {
979ea1dd 758 dev_err(&client->dev, "Field type invalid.\n");
ed922a89
KM		 759 return -EINVAL;
760 }
761
762 /*
763 * select suitable norm
764 */
765 scale = tw9910_select_norm(icd, pix->width, pix->height);
766 if (!scale)
767 return -EINVAL;
768
769 pix->width = scale->width;
770 pix->height = scale->height;
771
772 return 0;
773}
774
40e2e092
GL		 775static int tw9910_video_probe(struct soc_camera_device *icd,
776 struct i2c_client *client)
ed922a89 777{
979ea1dd 778 struct tw9910_priv *priv = to_tw9910(client);
ed922a89 779 s32 val;
ed922a89
KM		 780
781 /*
782 * We must have a parent by now. And it cannot be a wrong one.
783 * So this entire test is completely redundant.
784 */
785 if (!icd->dev.parent ||
786 to_soc_camera_host(icd->dev.parent)->nr != icd->iface)
787 return -ENODEV;
788
789 /*
790 * tw9910 only use 8 or 16 bit bus width
791 */
792 if (SOCAM_DATAWIDTH_16 != priv->info->buswidth &&
793 SOCAM_DATAWIDTH_8 != priv->info->buswidth) {
794 dev_err(&icd->dev, "bus width error\n");
795 return -ENODEV;
796 }
797
798 icd->formats = tw9910_color_fmt;
799 icd->num_formats = ARRAY_SIZE(tw9910_color_fmt);
800
801 /*
802 * check and show Product ID
803 */
40e2e092
GL		 804 val = i2c_smbus_read_byte_data(client, ID);
805
ed922a89
KM		 806 if (0x0B != GET_ID(val) ||
807 0x00 != GET_ReV(val)) {
808 dev_err(&icd->dev,
809 "Product ID error %x:%x\n", GET_ID(val), GET_ReV(val));
810 return -ENODEV;
811 }
812
813 dev_info(&icd->dev,
814 "tw9910 Product ID %0x:%0x\n", GET_ID(val), GET_ReV(val));
815
ed922a89
KM		 816 icd->vdev->tvnorms = V4L2_STD_NTSC | V4L2_STD_PAL;
817 icd->vdev->current_norm = V4L2_STD_NTSC;
818
979ea1dd 819 return 0;
ed922a89
KM		 820}
821
ed922a89 822static struct soc_camera_ops tw9910_ops = {
09e231b3 823 .set_crop = tw9910_set_crop,
ed922a89
KM		 824 .set_bus_param = tw9910_set_bus_param,
825 .query_bus_param = tw9910_query_bus_param,
ed922a89 826 .enum_input = tw9910_enum_input,
979ea1dd
GL		 827};
828
829static struct v4l2_subdev_core_ops tw9910_subdev_core_ops = {
830 .g_chip_ident = tw9910_g_chip_ident,
831 .s_std = tw9910_s_std,
ed922a89 832#ifdef CONFIG_VIDEO_ADV_DEBUG
979ea1dd
GL		 833 .g_register = tw9910_g_register,
834 .s_register = tw9910_s_register,
ed922a89
KM		 835#endif
836};
837
979ea1dd
GL		 838static struct v4l2_subdev_video_ops tw9910_subdev_video_ops = {
839 .s_stream = tw9910_s_stream,
840 .s_fmt = tw9910_s_fmt,
841 .try_fmt = tw9910_try_fmt,
842};
843
844static struct v4l2_subdev_ops tw9910_subdev_ops = {
845 .core = &tw9910_subdev_core_ops,
846 .video = &tw9910_subdev_video_ops,
847};
848
ed922a89
KM		 849/*
850 * i2c_driver function
851 */
852
a0705b07
GL		 853static void limit_to_scale(struct soc_camera_device *icd,
854 const struct tw9910_scale_ctrl *scale)
855{
856 if (scale->width > icd->rect_max.width)
857 icd->rect_max.width = scale->width;
858 if (scale->width < icd->width_min)
859 icd->width_min = scale->width;
860 if (scale->height > icd->rect_max.height)
861 icd->rect_max.height = scale->height;
862 if (scale->height < icd->height_min)
863 icd->height_min = scale->height;
864}
865
ed922a89
KM		 866static int tw9910_probe(struct i2c_client *client,
867 const struct i2c_device_id *did)
868
869{
870 struct tw9910_priv *priv;
871 struct tw9910_video_info *info;
40e2e092
GL		 872 struct soc_camera_device *icd = client->dev.platform_data;
873 struct i2c_adapter *adapter =
874 to_i2c_adapter(client->dev.parent);
875 struct soc_camera_link *icl;
ed922a89
KM		 876 const struct tw9910_scale_ctrl *scale;
877 int i, ret;
878
40e2e092
GL		 879 if (!icd) {
880 dev_err(&client->dev, "TW9910: missing soc-camera data!\n");
ed922a89 881 return -EINVAL;
40e2e092 882 }
ed922a89 883
40e2e092
GL		 884 icl = to_soc_camera_link(icd);
885 if (!icl)
886 return -EINVAL;
0a861e9e 887
40e2e092
GL		 888 info = container_of(icl, struct tw9910_video_info, link);
889
890 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
ed922a89
KM		 891 dev_err(&client->dev,
892 "I2C-Adapter doesn't support "
893 "I2C_FUNC_SMBUS_BYTE_DATA\n");
894 return -EIO;
895 }
896
897 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
898 if (!priv)
899 return -ENOMEM;
900
901 priv->info = info;
979ea1dd
GL		 902
903 v4l2_i2c_subdev_init(&priv->subdev, client, &tw9910_subdev_ops);
ed922a89 904
ed922a89 905 icd->ops = &tw9910_ops;
ed922a89
KM		 906 icd->iface = info->link.bus_id;
907
908 /*
909 * set width and height
910 */
a0705b07 911 icd->rect_max.width = tw9910_ntsc_scales[0].width; /* set default */
ed922a89 912 icd->width_min = tw9910_ntsc_scales[0].width;
a0705b07 913 icd->rect_max.height = tw9910_ntsc_scales[0].height;
ed922a89
KM		 914 icd->height_min = tw9910_ntsc_scales[0].height;
915
916 scale = tw9910_ntsc_scales;
a0705b07
GL		 917 for (i = 0; i < ARRAY_SIZE(tw9910_ntsc_scales); i++)
918 limit_to_scale(icd, scale + i);
919
ed922a89 920 scale = tw9910_pal_scales;
a0705b07
GL		 921 for (i = 0; i < ARRAY_SIZE(tw9910_pal_scales); i++)
922 limit_to_scale(icd, scale + i);
ed922a89 923
40e2e092 924 ret = tw9910_video_probe(icd, client);
ed922a89 925 if (ret) {
40e2e092 926 icd->ops = NULL;
ed922a89
KM		 927 i2c_set_clientdata(client, NULL);
928 kfree(priv);
929 }
930
931 return ret;
932}
933
934static int tw9910_remove(struct i2c_client *client)
935{
979ea1dd 936 struct tw9910_priv *priv = to_tw9910(client);
40e2e092 937 struct soc_camera_device *icd = client->dev.platform_data;
ed922a89 938
40e2e092 939 icd->ops = NULL;
ed922a89
KM		 940 i2c_set_clientdata(client, NULL);
941 kfree(priv);
942 return 0;
943}
944
945static const struct i2c_device_id tw9910_id[] = {
946 { "tw9910", 0 },
947 { }
948};
949MODULE_DEVICE_TABLE(i2c, tw9910_id);
950
951static struct i2c_driver tw9910_i2c_driver = {
952 .driver = {
953 .name = "tw9910",
954 },
955 .probe = tw9910_probe,
956 .remove = tw9910_remove,
957 .id_table = tw9910_id,
958};
959
960/*
961 * module function
962 */
963static int __init tw9910_module_init(void)
964{
965 return i2c_add_driver(&tw9910_i2c_driver);
966}
967
968static void __exit tw9910_module_exit(void)
969{
970 i2c_del_driver(&tw9910_i2c_driver);
971}
972
973module_init(tw9910_module_init);
974module_exit(tw9910_module_exit);
975
976MODULE_DESCRIPTION("SoC Camera driver for tw9910");
977MODULE_AUTHOR("Kuninori Morimoto");
978MODULE_LICENSE("GPL v2");
Linux 6.x block layer and io_uring tree(s)